diff --git a/targets/ARCH/BLADERF/USERSPACE/LIB/bladerf_lib.c b/targets/ARCH/BLADERF/USERSPACE/LIB/bladerf_lib.c index 2f73d6978c..065b0bbad2 100644 --- a/targets/ARCH/BLADERF/USERSPACE/LIB/bladerf_lib.c +++ b/targets/ARCH/BLADERF/USERSPACE/LIB/bladerf_lib.c @@ -412,7 +412,7 @@ void calibrate_rf(openair0_device *device) { bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_LMS_DCOFF_I,offIold); for (i=0;i<10;i++) { trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0); - trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0); + trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0, 0); } for (meanIold=meanQold=i=j=0;idev,BLADERF_MODULE_TX,BLADERF_CORR_LMS_DCOFF_I,offI); for (i=0;i<10;i++) { trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0); - trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0); + trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0, 0); } for (meanI=meanQ=i=j=0;idev,BLADERF_MODULE_TX,BLADERF_CORR_LMS_DCOFF_Q,offQold); for (i=0;i<10;i++) { trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0); - trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0); + trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0, 0); } // project on fs/4 for (meanIold=meanQold=i=j=0;idev,BLADERF_MODULE_TX,BLADERF_CORR_LMS_DCOFF_Q,offQ); for (i=0;i<10;i++) { trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0); - trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0); + trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0, 0); } for (meanI=meanQ=i=j=0;idev,BLADERF_MODULE_TX,BLADERF_CORR_FPGA_PHASE,offphaseold); for (i=0;i<10;i++) { trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0); - trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0); + trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0, 0); } // project on fs/8 (Image of TX signal in +ve frequencies) for (meanIold=meanQold=i=j=0;idev,BLADERF_MODULE_TX,BLADERF_CORR_FPGA_PHASE,offphase); for (i=0;i<10;i++) { trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0); - trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0); + trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0, 0); } // project on fs/8 (Image of TX signal in +ve frequencies) for (meanI=meanQ=i=j=0;idev,BLADERF_MODULE_TX,BLADERF_CORR_FPGA_GAIN,offgainold); for (i=0;i<10;i++) { trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0); - trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0); + trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0, 0); } // project on fs/8 (Image of TX signal in +ve frequencies) for (meanIold=meanQold=i=j=0;idev,BLADERF_MODULE_TX,BLADERF_CORR_FPGA_GAIN,offgain); for (i=0;i<10;i++) { trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0); - trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0); + trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0, 0); } // project on fs/8 (Image of TX signal in +ve frequencies) for (meanI=meanQ=i=j=0;idev,BLADERF_MODULE_RX,BLADERF_CORR_FPGA_PHASE,offphaseold); for (i=0;i<10;i++) { trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0); - trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0); + trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0, 0); } // project on -3fs/8 (Image of TX signal in -ve frequencies) for (meanIold=meanQold=i=j=0;idev,BLADERF_MODULE_RX,BLADERF_CORR_FPGA_PHASE,offphase); for (i=0;i<10;i++) { trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0); - trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0); + trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0, 0); } // project on -3fs/8 (Image of TX signal in -ve frequencies) for (meanI=meanQ=i=j=0;idev,BLADERF_MODULE_RX,BLADERF_CORR_FPGA_GAIN,offgainold); for (i=0;i<10;i++) { trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0); - trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0); + trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0,0); } // project on -3fs/8 (Image of TX signal in +ve frequencies) for (meanIold=meanQold=i=j=0;idev,BLADERF_MODULE_RX,BLADERF_CORR_FPGA_GAIN,offgain); for (i=0;i<10;i++) { trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0); - trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0); + trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0, 0); } // project on 3fs/8 (Image of TX signal in -ve frequencies) for (meanI=meanQ=i=j=0;ilog_level)); printf("BLADERF: Initializing openair0_device\n"); - device->priv = brf; device->Mod_id = num_devices++; device->type = BLADERF_DEV; device->trx_start_func = trx_brf_start;