Merge remote-tracking branch 'origin/develop' into ldpc-decoder-codegen
Conflicts: cmake_targets/CMakeLists.txt cmake_targets/build_oai cmake_targets/phy_simulators cmake_targets/phy_simulators/CMakeLists.txt
This commit is contained in:
@@ -59,8 +59,7 @@ double cpuf;
|
||||
//uint8_t nfapi_mode = 0;
|
||||
uint16_t NB_UE_INST = 1;
|
||||
|
||||
uint8_t const nr_rv_round_map[4] = {0, 2, 1, 3};
|
||||
uint8_t const nr_rv_round_map_ue[4] = {0, 2, 1, 3};
|
||||
uint8_t const nr_rv_round_map[4] = {0, 2, 3, 1};
|
||||
|
||||
// needed for some functions
|
||||
PHY_VARS_NR_UE *PHY_vars_UE_g[1][1] = { { NULL } };
|
||||
@@ -119,7 +118,7 @@ int main(int argc, char **argv)
|
||||
double DS_TDL = .03;
|
||||
cpuf = get_cpu_freq_GHz();
|
||||
char gNBthreads[128]="n";
|
||||
|
||||
|
||||
if (load_configmodule(argc, argv, CONFIG_ENABLECMDLINEONLY) == 0) {
|
||||
exit_fun("[NR_DLSCHSIM] Error, configuration module init failed\n");
|
||||
}
|
||||
@@ -532,12 +531,12 @@ int main(int argc, char **argv)
|
||||
|
||||
//if (i<16)
|
||||
// printf("encoder output f[%d] = %d\n",i,dlsch->harq_processes[0]->f[i]);
|
||||
|
||||
|
||||
if (output[i] == 0)
|
||||
modulated_input[i] = 1.0; ///sqrt(2); //QPSK
|
||||
else
|
||||
modulated_input[i] = -1.0; ///sqrt(2);
|
||||
|
||||
|
||||
//if (i<16) printf("modulated_input[%d] = %d\n",i,modulated_input[i]);
|
||||
//SNR =10;
|
||||
SNR_lin = pow(10, SNR / 10.0);
|
||||
|
||||
@@ -82,6 +82,7 @@ RAN_CONTEXT_t RC;
|
||||
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
|
||||
|
||||
double cpuf;
|
||||
char *uecap_file;
|
||||
|
||||
uint16_t sf_ahead=4 ;
|
||||
uint16_t sl_ahead=0;
|
||||
@@ -279,7 +280,7 @@ void nr_dlsim_preprocessor(module_id_t module_id,
|
||||
UE_info->CellGroup[0],
|
||||
sched_ctrl->active_bwp,
|
||||
NULL,
|
||||
/* tda = */ 0,
|
||||
/* tda = */ 2,
|
||||
dci_format,
|
||||
ps);
|
||||
|
||||
@@ -776,7 +777,7 @@ int main(int argc, char **argv)
|
||||
|
||||
prepare_scd(scd);
|
||||
|
||||
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 6, 0, 0, 0);
|
||||
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 6, 0, 0, 0, 0);
|
||||
|
||||
/* RRC parameter validation for secondaryCellGroup */
|
||||
fix_scd(scd);
|
||||
@@ -983,18 +984,21 @@ int main(int argc, char **argv)
|
||||
|
||||
gNB->threadPool = (tpool_t*)malloc(sizeof(tpool_t));
|
||||
initTpool(gNBthreads, gNB->threadPool, true);
|
||||
gNB->resp_L1_tx = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
|
||||
initNotifiedFIFO(gNB->resp_L1_tx);
|
||||
gNB->L1_tx_free = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
|
||||
gNB->L1_tx_filled = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
|
||||
gNB->L1_tx_out = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
|
||||
initNotifiedFIFO(gNB->L1_tx_free);
|
||||
initNotifiedFIFO(gNB->L1_tx_filled);
|
||||
initNotifiedFIFO(gNB->L1_tx_out);
|
||||
// we create 2 threads for L1 tx processing
|
||||
notifiedFIFO_elt_t *msgL1Tx = newNotifiedFIFO_elt(sizeof(processingData_L1tx_t),0,gNB->resp_L1_tx,processSlotTX);
|
||||
notifiedFIFO_elt_t *msgL1Tx = newNotifiedFIFO_elt(sizeof(processingData_L1tx_t),0,gNB->L1_tx_free,processSlotTX);
|
||||
processingData_L1tx_t *msgDataTx = (processingData_L1tx_t *)NotifiedFifoData(msgL1Tx);
|
||||
init_DLSCH_struct(gNB, msgDataTx);
|
||||
msgDataTx->slot = slot;
|
||||
msgDataTx->frame = frame;
|
||||
memset(msgDataTx->ssb, 0, 64*sizeof(NR_gNB_SSB_t));
|
||||
reset_meas(&msgDataTx->phy_proc_tx);
|
||||
gNB->phy_proc_tx_0 = &msgDataTx->phy_proc_tx;
|
||||
pushTpool(gNB->threadPool,msgL1Tx);
|
||||
gNB->phy_proc_tx[0] = &msgDataTx->phy_proc_tx;
|
||||
|
||||
for (SNR = snr0; SNR < snr1; SNR += .2) {
|
||||
|
||||
@@ -1049,8 +1053,6 @@ int main(int argc, char **argv)
|
||||
|
||||
while ((round<num_rounds) && (UE_harq_process->ack==0)) {
|
||||
|
||||
memset(RC.nrmac[0]->cce_list[1][0],0,MAX_NUM_CCE*sizeof(int));
|
||||
memset(RC.nrmac[0]->cce_list[1][1],0,MAX_NUM_CCE*sizeof(int));
|
||||
clear_nr_nfapi_information(RC.nrmac[0], 0, frame, slot);
|
||||
|
||||
UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].ndi = !(trial&1);
|
||||
@@ -1058,7 +1060,7 @@ int main(int argc, char **argv)
|
||||
|
||||
UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].round = round;
|
||||
for (int i=0; i<MAX_NUM_CORESET; i++)
|
||||
gNB_mac->UE_info.num_pdcch_cand[0][i] = 0;
|
||||
gNB_mac->pdcch_cand[i] = 0;
|
||||
|
||||
if (css_flag == 0) {
|
||||
nr_schedule_ue_spec(0, frame, slot);
|
||||
@@ -1073,6 +1075,7 @@ int main(int argc, char **argv)
|
||||
Sched_INFO.UL_tti_req = gNB_mac->UL_tti_req_ahead[slot];
|
||||
Sched_INFO.UL_dci_req = NULL;
|
||||
Sched_INFO.TX_req = &gNB_mac->TX_req[0];
|
||||
pushNotifiedFIFO(gNB->L1_tx_free,msgL1Tx);
|
||||
nr_schedule_response(&Sched_INFO);
|
||||
|
||||
/* PTRS values for DLSIM calculations */
|
||||
@@ -1099,7 +1102,7 @@ int main(int argc, char **argv)
|
||||
else
|
||||
phy_procedures_gNB_TX(msgDataTx,frame,slot,1);
|
||||
|
||||
int txdataF_offset = (slot%2) * frame_parms->samples_per_slot_wCP;
|
||||
int txdataF_offset = slot * frame_parms->samples_per_slot_wCP;
|
||||
|
||||
if (n_trials==1) {
|
||||
LOG_M("txsigF0.m","txsF0=", &gNB->common_vars.txdataF[0][txdataF_offset+2*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
|
||||
@@ -1306,10 +1309,10 @@ int main(int argc, char **argv)
|
||||
printf("\n");
|
||||
|
||||
if (print_perf==1) {
|
||||
printf("\ngNB TX function statistics (per %d us slot, NPRB %d, mcs %d, TBS %d)\n",
|
||||
printf("\ngNB TX function statistics (per %d us slot, NPRB %d, mcs %d, block %d)\n",
|
||||
1000>>*scc->ssbSubcarrierSpacing, g_rbSize, g_mcsIndex,
|
||||
msgDataTx->dlsch[0][0]->harq_process.pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3);
|
||||
printDistribution(gNB->phy_proc_tx_0,table_tx,"PHY proc tx");
|
||||
printDistribution(gNB->phy_proc_tx[0],table_tx,"PHY proc tx");
|
||||
printStatIndent2(&gNB->dlsch_encoding_stats,"DLSCH encoding time");
|
||||
printStatIndent3(&gNB->dlsch_segmentation_stats,"DLSCH segmentation time");
|
||||
printStatIndent3(&gNB->tinput,"DLSCH LDPC input processing time");
|
||||
|
||||
@@ -63,8 +63,7 @@ uint16_t NB_UE_INST = 1;
|
||||
// needed for some functions
|
||||
openair0_config_t openair0_cfg[MAX_CARDS];
|
||||
|
||||
uint8_t const nr_rv_round_map[4] = {0, 2, 1, 3};
|
||||
uint8_t const nr_rv_round_map_ue[4] = {0, 2, 1, 3};
|
||||
uint8_t const nr_rv_round_map[4] = {0, 2, 3, 1};
|
||||
|
||||
uint64_t get_softmodem_optmask(void) {return 0;}
|
||||
softmodem_params_t *get_softmodem_params(void) {return 0;}
|
||||
@@ -91,8 +90,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
|
||||
PDSCH_t pdsch,
|
||||
NR_UE_DLSCH_t *dlsch0,
|
||||
NR_UE_DLSCH_t *dlsch1,
|
||||
int *dlsch_errors,
|
||||
uint8_t dlsch_parallel) {
|
||||
int *dlsch_errors) {
|
||||
return false;
|
||||
}
|
||||
|
||||
@@ -714,7 +712,7 @@ int main(int argc, char **argv)
|
||||
}
|
||||
if (UE->is_synchronized == 0) {
|
||||
UE_nr_rxtx_proc_t proc={0};
|
||||
ret = nr_initial_sync(&proc, UE, 1, 0, 0);
|
||||
ret = nr_initial_sync(&proc, UE, 1, 0);
|
||||
printf("nr_initial_sync1 returns %d\n",ret);
|
||||
if (ret<0) n_errors++;
|
||||
}
|
||||
|
||||
@@ -60,6 +60,7 @@
|
||||
LCHAN_DESC DCCH_LCHAN_DESC,DTCH_DL_LCHAN_DESC,DTCH_UL_LCHAN_DESC;
|
||||
rlc_info_t Rlc_info_um,Rlc_info_am_config;
|
||||
|
||||
char *uecap_file;
|
||||
PHY_VARS_gNB *gNB;
|
||||
PHY_VARS_NR_UE *UE;
|
||||
RAN_CONTEXT_t RC;
|
||||
|
||||
@@ -56,8 +56,7 @@ int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
|
||||
double cpuf;
|
||||
//uint8_t nfapi_mode = 0;
|
||||
uint16_t NB_UE_INST = 1;
|
||||
uint8_t const nr_rv_round_map[4] = {0, 2, 1, 3};
|
||||
uint8_t const nr_rv_round_map_ue[4] = {0, 2, 1, 3};
|
||||
uint8_t const nr_rv_round_map[4] = {0, 2, 3, 1};
|
||||
|
||||
// needed for some functions
|
||||
PHY_VARS_NR_UE * PHY_vars_UE_g[1][1]={{NULL}};
|
||||
|
||||
@@ -56,8 +56,7 @@ int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
|
||||
|
||||
void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) {}
|
||||
|
||||
uint8_t const nr_rv_round_map[4] = {0, 2, 1, 3};
|
||||
uint8_t const nr_rv_round_map_ue[4] = {0, 2, 1, 3};
|
||||
uint8_t const nr_rv_round_map[4] = {0, 2, 3, 1};
|
||||
|
||||
double cpuf;
|
||||
//uint8_t nfapi_mode = 0;
|
||||
|
||||
@@ -74,6 +74,7 @@ rlc_info_t Rlc_info_um,Rlc_info_am_config;
|
||||
PHY_VARS_gNB *gNB;
|
||||
PHY_VARS_NR_UE *UE;
|
||||
RAN_CONTEXT_t RC;
|
||||
char *uecap_file;
|
||||
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
|
||||
|
||||
uint16_t sf_ahead=4 ;
|
||||
@@ -243,7 +244,6 @@ nrUE_params_t *get_nrUE_params(void) {
|
||||
// needed for some functions
|
||||
uint16_t n_rnti = 0x1234;
|
||||
openair0_config_t openair0_cfg[MAX_CARDS];
|
||||
//const uint8_t nr_rv_round_map[4] = {0, 2, 1, 3};
|
||||
|
||||
channel_desc_t *UE2gNB[NUMBER_OF_UE_MAX][NUMBER_OF_gNB_MAX];
|
||||
|
||||
@@ -682,13 +682,16 @@ int main(int argc, char **argv)
|
||||
|
||||
initTpool(tp_param, gNB->threadPool, false);
|
||||
initNotifiedFIFO(gNB->respDecode);
|
||||
gNB->resp_L1_tx = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
|
||||
initNotifiedFIFO(gNB->resp_L1_tx);
|
||||
notifiedFIFO_elt_t *msgL1Tx = newNotifiedFIFO_elt(sizeof(processingData_L1tx_t),0,gNB->resp_L1_tx,NULL);
|
||||
gNB->L1_tx_free = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
|
||||
gNB->L1_tx_filled = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
|
||||
gNB->L1_tx_out = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
|
||||
initNotifiedFIFO(gNB->L1_tx_free);
|
||||
initNotifiedFIFO(gNB->L1_tx_filled);
|
||||
initNotifiedFIFO(gNB->L1_tx_out);
|
||||
notifiedFIFO_elt_t *msgL1Tx = newNotifiedFIFO_elt(sizeof(processingData_L1tx_t),0,gNB->L1_tx_free,NULL);
|
||||
processingData_L1tx_t *msgDataTx = (processingData_L1tx_t *)NotifiedFifoData(msgL1Tx);
|
||||
msgDataTx->slot = -1;
|
||||
gNB->phy_proc_tx_0 = &msgDataTx->phy_proc_tx;
|
||||
pushNotifiedFIFO(gNB->resp_L1_tx,msgL1Tx); // to unblock the process in the beginning
|
||||
gNB->phy_proc_tx[0] = &msgDataTx->phy_proc_tx;
|
||||
//gNB_config = &gNB->gNB_config;
|
||||
|
||||
//memset((void *)&gNB->UL_INFO,0,sizeof(gNB->UL_INFO));
|
||||
@@ -730,7 +733,7 @@ int main(int argc, char **argv)
|
||||
|
||||
prepare_scd(scd);
|
||||
|
||||
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0, 0, 0);
|
||||
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0, 0, 0, 0);
|
||||
|
||||
// xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
|
||||
|
||||
@@ -1130,6 +1133,7 @@ int main(int argc, char **argv)
|
||||
}
|
||||
|
||||
// prepare ULSCH/PUSCH reception
|
||||
pushNotifiedFIFO(gNB->L1_tx_free,msgL1Tx); // to unblock the process in the beginning
|
||||
nr_schedule_response(Sched_INFO);
|
||||
|
||||
// --------- setting parameters for UE --------
|
||||
|
||||
@@ -229,7 +229,7 @@ int test_srs_periodicity(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc)
|
||||
for (int slot_tx = 0; slot_tx < frame_parms->slots_per_frame; slot_tx++) {
|
||||
proc->frame_tx = frame_tx;
|
||||
proc->nr_slot_tx = slot_tx;
|
||||
if (ue_srs_procedure_nr( ue, proc, 0) == 0) {
|
||||
if (ue_srs_procedures_nr( ue, proc, 0) == 0) {
|
||||
printf("test_srs_periodicity srs at frame %d slot %d \n", frame_tx, slot_tx);
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user