maki/openairinterface5g
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge remote-tracking branch 'origin/issue_709' into integration_2025_w06 (!3000)

Browse Source 
Improvements for NR dlsim and ulsim
This commit is contained in:
Robert Schmidt
2025-02-07 17:31:59 +01:00
parent 6ed05c5334 fabaae3327
commit 999877eaae
10 changed files with 180 additions and 164 deletions
Download Patch File Download Diff File Expand all files Collapse all files
openair2/GNB_APP/gnb_config.c
+39 -16
View File
@@ -274,15 +274,29 @@ void fill_scc_sim(NR_ServingCellConfigCommon_t *scc, uint64_t *ssb_bitmap, int N
scc->dmrs_TypeA_Position = NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2;
*scc->ssbSubcarrierSpacing = mu_dl;
struct NR_FrequencyInfoDL *frequencyInfoDL = scc->downlinkConfigCommon->frequencyInfoDL;
if (mu_dl == 0) {
*frequencyInfoDL->absoluteFrequencySSB = 520432;
*frequencyInfoDL->frequencyBandList.list.array[0] = 38;
frequencyInfoDL->absoluteFrequencyPointA = 520000;
} else {
*frequencyInfoDL->absoluteFrequencySSB = 641032;
*frequencyInfoDL->frequencyBandList.list.array[0] = 78;
frequencyInfoDL->absoluteFrequencyPointA = 640000;
NR_FrequencyInfoDL_t *frequencyInfoDL = scc->downlinkConfigCommon->frequencyInfoDL;
NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_Config = scc->tdd_UL_DL_ConfigurationCommon;
switch (mu_dl) {
case 0 :
*frequencyInfoDL->absoluteFrequencySSB = 520432;
*frequencyInfoDL->frequencyBandList.list.array[0] = 38;
frequencyInfoDL->absoluteFrequencyPointA = 520000;
tdd_UL_DL_Config->pattern1.dl_UL_TransmissionPeriodicity = NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms10;
break;
case 1 :
*frequencyInfoDL->absoluteFrequencySSB = 641032;
*frequencyInfoDL->frequencyBandList.list.array[0] = 78;
frequencyInfoDL->absoluteFrequencyPointA = 640000;
tdd_UL_DL_Config->pattern1.dl_UL_TransmissionPeriodicity = NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5;
break;
case 3 :
*frequencyInfoDL->absoluteFrequencySSB = 2071387;
*frequencyInfoDL->frequencyBandList.list.array[0] = 257;
frequencyInfoDL->absoluteFrequencyPointA = 2071003;
tdd_UL_DL_Config->pattern1.dl_UL_TransmissionPeriodicity = NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms1p25;
break;
default :
AssertFatal(false, "Numerolgy %d not supported\n", mu_dl);
}
*frequencyInfoDL->scs_SpecificCarrierList.list.array[0] = configure_scs_carrier(mu_dl, N_RB_DL);
@@ -306,7 +320,19 @@ void fill_scc_sim(NR_ServingCellConfigCommon_t *scc, uint64_t *ssb_bitmap, int N
timedomainresourceallocation1);
struct NR_FrequencyInfoUL *frequencyInfoUL = scc->uplinkConfigCommon->frequencyInfoUL;
*frequencyInfoUL->frequencyBandList->list.array[0] = mu_ul ? 78 : 38;
switch (mu_ul) {
case 0 :
*frequencyInfoUL->frequencyBandList->list.array[0] = 38;
break;
case 1 :
*frequencyInfoUL->frequencyBandList->list.array[0] = 78;
break;
case 3 :
*frequencyInfoUL->frequencyBandList->list.array[0] = 257;
break;
default :
AssertFatal(false, "Numerolgy %d not supported\n", mu_ul);
}
*frequencyInfoUL->absoluteFrequencyPointA = -1;
*frequencyInfoUL->scs_SpecificCarrierList.list.array[0] = configure_scs_carrier(mu_ul, N_RB_UL);
*frequencyInfoUL->p_Max = 20;
@@ -348,18 +374,15 @@ void fill_scc_sim(NR_ServingCellConfigCommon_t *scc, uint64_t *ssb_bitmap, int N
scc->ssb_PositionsInBurst->present = NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap;
*ssb_bitmap = 0xff;
struct NR_TDD_UL_DL_ConfigCommon *tdd_UL_DL_ConfigurationCommon = scc->tdd_UL_DL_ConfigurationCommon;
tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing = mu_dl;
tdd_UL_DL_Config->referenceSubcarrierSpacing = mu_dl;
NR_TDD_UL_DL_Pattern_t *p1 = &tdd_UL_DL_ConfigurationCommon->pattern1;
p1->dl_UL_TransmissionPeriodicity = (mu_dl == 0) ? NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms10
: NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5;
NR_TDD_UL_DL_Pattern_t *p1 = &tdd_UL_DL_Config->pattern1;
p1->nrofDownlinkSlots = 7;
p1->nrofDownlinkSymbols = 6;
p1->nrofUplinkSlots = 2;
p1->nrofUplinkSymbols = 4;
struct NR_TDD_UL_DL_Pattern *p2 = tdd_UL_DL_ConfigurationCommon->pattern2;
struct NR_TDD_UL_DL_Pattern *p2 = tdd_UL_DL_Config->pattern2;
if (p2) {
p2->dl_UL_TransmissionPeriodicity = 321;
p2->nrofDownlinkSlots = -1;
openair2/LAYER2/NR_MAC_COMMON/nr_compute_tbs_common.c
+61 -72
View File
@@ -63,95 +63,84 @@ uint32_t nr_compute_tbs(uint16_t Qm,
const uint32_t nb_re = min(156, nbp_re) * nb_rb;
// Intermediate number of information bits
// Rx1024 is tabulated as 10 times the actual code rate
const uint32_t R_5 = R/5; // R can be fractional so we can't divide by 10
const uint32_t R_5 = R / 5; // R can be fractional so we can't divide by 10
// So we ned to right shift by 11 (10 for x1024 and 1 additional as above)
const uint32_t Ninfo = ((nb_re * R_5 * Qm * Nl)>>11)>>tb_scaling;
uint32_t nr_tbs=0;
const uint32_t Ninfo = ((nb_re * R_5 * Qm * Nl) >> 11) >> tb_scaling;
uint32_t nr_tbs = 0;
uint32_t Np_info, C, n;
if (Ninfo <= NR_MAX_PDSCH_TBS) {
n = max(3, floor(log2(Ninfo)) - 6);
Np_info = max(24, (Ninfo>>n)<<n);
for (int i=0; i<INDEX_MAX_TBS_TABLE; i++) {
if (Tbstable_nr[i] >= Np_info){
nr_tbs = Tbstable_nr[i];
break;
}
}
} else {
n = log2(Ninfo-24)-5;
Np_info = max(3840, (ROUNDIDIV((Ninfo-24),(1<<n)))<<n);
if (R <= 2560) {
C = CEILIDIV((Np_info+24),3816);
nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
} else {
if (Np_info > 8424){
C = CEILIDIV((Np_info+24),8424);
nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
} else {
nr_tbs = ((CEILIDIV((Np_info+24),8))<<3) - 24;
}
}
}
LOG_D(NR_MAC, "Ninfo %u nbp_re %d nb_re %d Qm %d, R %d, tbs %d bits\n", Ninfo, nbp_re, nb_re, Qm, R, nr_tbs);
return nr_tbs;
}
//tbslbrm calculation according to 5.4.2.1 of 38.212
uint32_t nr_compute_tbslbrm(uint16_t table,
uint16_t nb_rb,
uint8_t Nl) {
uint16_t R, nb_re;
uint16_t nb_rb_lbrm=0;
uint8_t Qm;
int i;
uint32_t nr_tbs=0;
uint32_t Ninfo, Np_info, C;
uint8_t n;
for (i=0; i<7; i++) {
if (NPRB_LBRM[i] >= nb_rb){
nb_rb_lbrm = NPRB_LBRM[i];
break;
}
}
Qm = ((table == 1)? 8 : 6);
R = 948;
nb_re = 156 * nb_rb_lbrm;
// Intermediate number of information bits
Ninfo = (nb_re * R * Qm * Nl)>>10;
if (Ninfo <= NR_MAX_PDSCH_TBS) {
n = max(3, floor(log2(Ninfo)) - 6);
Np_info = max(24, (Ninfo>>n)<<n);
for (int i=0; i<INDEX_MAX_TBS_TABLE; i++) {
Np_info = max(24, (Ninfo >> n) << n);
for (int i = 0; i < INDEX_MAX_TBS_TABLE; i++) {
if (Tbstable_nr[i] >= Np_info){
nr_tbs = Tbstable_nr[i];
break;
}
}
} else {
n = log2(Ninfo-24)-5;
Np_info = max(3840, (ROUNDIDIV((Ninfo-24),(1<<n)))<<n);
n = log2(Ninfo - 24) - 5;
Np_info = max(3840, (ROUNDIDIV((Ninfo - 24), (1 << n))) << n);
if (R <= 2560) {
C = CEILIDIV((Np_info + 24), 3816);
nr_tbs = (C << 3) * CEILIDIV((Np_info + 24), (C << 3)) - 24;
} else {
if (Np_info > 8424){
C = CEILIDIV((Np_info + 24), 8424);
nr_tbs = (C << 3) * CEILIDIV((Np_info + 24), (C << 3)) - 24;
} else {
nr_tbs = ((CEILIDIV((Np_info + 24), 8)) << 3) - 24;
}
}
}
LOG_D(NR_MAC, "Ninfo %u nbp_re %d nb_re %d Qm %d, R %d, tbs %d bits\n", Ninfo, nbp_re, nb_re, Qm, R, nr_tbs);
return nr_tbs;
}
//tbslbrm calculation according to 5.4.2.1 of 38.212
uint32_t nr_compute_tbslbrm(uint16_t table, uint16_t nb_rb, uint8_t Nl)
{
uint16_t nb_rb_lbrm = 0;
for (int i = 0; i < 7; i++) {
if (NPRB_LBRM[i] >= nb_rb){
nb_rb_lbrm = NPRB_LBRM[i];
break;
}
}
int Qm = (table == 1) ? 8 : 6;
uint32_t R = 948;
uint32_t nb_re = 156 * nb_rb_lbrm;
// Intermediate number of information bits
uint32_t Ninfo = (nb_re * R * Qm * Nl) >> 10;
uint32_t nr_tbs = 0;
uint32_t Np_info, n;
if (Ninfo <= NR_MAX_PDSCH_TBS) {
n = max(3, floor(log2(Ninfo)) - 6);
Np_info = max(24, (Ninfo >> n) << n);
for (int i = 0; i < INDEX_MAX_TBS_TABLE; i++) {
if (Tbstable_nr[i] >= Np_info){
nr_tbs = Tbstable_nr[i];
break;
}
}
} else {
n = log2(Ninfo - 24) - 5;
Np_info = max(3840, (ROUNDIDIV((Ninfo - 24), (1 << n))) << n);
int C;
if (R <= 256) {
C = CEILIDIV((Np_info+24),3816);
nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
C = CEILIDIV((Np_info + 24), 3816);
nr_tbs = (C << 3) * CEILIDIV((Np_info + 24), (C << 3)) - 24;
}
else {
if (Np_info > 8424){
C = CEILIDIV((Np_info+24),8424);
nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
C = CEILIDIV((Np_info + 24), 8424);
nr_tbs = (C << 3) * CEILIDIV((Np_info + 24), (C << 3)) - 24;
}
else
nr_tbs = ((CEILIDIV((Np_info+24),8))<<3) - 24;
nr_tbs = ((CEILIDIV((Np_info + 24), 8)) << 3) - 24;
}
}
return nr_tbs;
openair2/LAYER2/NR_MAC_gNB/config.c
+19 -16
View File
@@ -500,34 +500,28 @@ int get_ul_slot_offset(const frame_structure_t *fs, int idx, bool count_mixed)
*
* @param mu numerology
* @param scc pointer to scc
* @param cfg pointer to NFAPI config request
* @param tdd_period TDD period
* @param frame_type type of frame structure (FDD or TDD)
* @param fs pointer to the frame structure to update
*
* @return Number of periods in frame
*/
static int config_frame_structure(int mu,
NR_ServingCellConfigCommon_t *scc,
nfapi_nr_config_request_scf_t *cfg,
frame_structure_t *fs)
void config_frame_structure(int mu,
NR_ServingCellConfigCommon_t *scc,
uint8_t tdd_period,
uint8_t frame_type,
frame_structure_t *fs)
{
fs->numb_slots_frame = nr_slots_per_frame[mu];
if (cfg->cell_config.frame_duplex_type.value == TDD) {
cfg->tdd_table.tdd_period.tl.tag = NFAPI_NR_CONFIG_TDD_PERIOD_TAG;
cfg->num_tlv++;
cfg->tdd_table.tdd_period.value = get_tdd_period_idx(scc->tdd_UL_DL_ConfigurationCommon);
LOG_D(NR_MAC, "Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period.value);
fs->numb_period_frame = get_nb_periods_per_frame(cfg->tdd_table.tdd_period.value);
if (frame_type == TDD) {
fs->numb_period_frame = get_nb_periods_per_frame(tdd_period);
fs->numb_slots_period = fs->numb_slots_frame / fs->numb_period_frame;
fs->is_tdd = true;
config_tdd_patterns(scc->tdd_UL_DL_ConfigurationCommon, fs);
set_tdd_config_nr(cfg, fs);
} else { // FDD
fs->is_tdd = false;
fs->numb_period_frame = 1;
fs->numb_slots_period = nr_slots_per_frame[mu];
}
AssertFatal(fs->numb_period_frame > 0, "Frame configuration cannot be configured!\n");
return fs->numb_period_frame;
}
static void config_common(gNB_MAC_INST *nrmac,
@@ -819,7 +813,16 @@ static void config_common(gNB_MAC_INST *nrmac,
// Frame structure configuration
uint8_t mu = frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
config_frame_structure(mu, scc, cfg, &nrmac->frame_structure);
if (cfg->cell_config.frame_duplex_type.value == TDD) {
cfg->tdd_table.tdd_period.tl.tag = NFAPI_NR_CONFIG_TDD_PERIOD_TAG;
cfg->num_tlv++;
cfg->tdd_table.tdd_period.value = get_tdd_period_idx(scc->tdd_UL_DL_ConfigurationCommon);
LOG_D(NR_MAC, "Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period.value);
}
frame_structure_t *fs = &nrmac->frame_structure;
config_frame_structure(mu, scc, cfg->tdd_table.tdd_period.value, cfg->cell_config.frame_duplex_type.value, fs);
if (cfg->cell_config.frame_duplex_type.value == TDD)
set_tdd_config_nr(cfg, fs);
int nb_tx = config->nb_bfw[0]; // number of tx antennas
int nb_beams = config->nb_bfw[1]; // number of beams
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+5
View File
@@ -39,6 +39,11 @@ void set_cset_offset(uint16_t);
void get_K1_K2(int N1, int N2, int *K1, int *K2, int layers);
int get_NTN_Koffset(const NR_ServingCellConfigCommon_t *scc);
void config_frame_structure(int mu,
NR_ServingCellConfigCommon_t *scc,
uint8_t tdd_period,
uint8_t frame_type,
frame_structure_t *fs);
int get_first_ul_slot(const frame_structure_t *fs, bool mixed);
int get_ul_slots_per_period(const frame_structure_t *fs);
int get_ul_slots_per_frame(const frame_structure_t *fs);
openair2/RRC/NR/nr_rrc_config.c
+3 -2
View File
@@ -566,9 +566,8 @@ static void config_csiim(int do_csirs,
void set_dl_maxmimolayers(NR_PDSCH_ServingCellConfig_t *pdsch_servingcellconfig,
const NR_ServingCellConfigCommon_t *scc,
const NR_UE_NR_Capability_t *uecap,
int maxMIMO_layers)
int maxMIMO_layers)
{
if(!pdsch_servingcellconfig->ext1)
pdsch_servingcellconfig->ext1=calloc(1,sizeof(*pdsch_servingcellconfig->ext1));
if(!pdsch_servingcellconfig->ext1->maxMIMO_Layers)
@@ -871,6 +870,8 @@ void prepare_sim_uecap(NR_UE_NR_Capability_t *cap,
fs_cc->supportedBandwidthDL.present = NR_SupportedBandwidth_PR_fr1;
fs_cc->supportedBandwidthDL.choice.fr1 = bw;
}
fs_cc->maxNumberMIMO_LayersPDSCH = calloc(1, sizeof(*fs_cc->maxNumberMIMO_LayersPDSCH));
*fs_cc->maxNumberMIMO_LayersPDSCH = NR_MIMO_LayersDL_fourLayers;
fs_cc->supportedModulationOrderDL = calloc(1, sizeof(*fs_cc->supportedModulationOrderDL));
*fs_cc->supportedModulationOrderDL = NR_ModulationOrder_qam256;
asn1cSeqAdd(&fs->featureSetsDownlinkPerCC->list, fs_cc);