bugfix: fix timing advance

- re-use ta_timer
- when ta_timer is running:
  - no TA sent to UE
  - no TA from UE (for UE to have time to apply previous TA command)
- decrease ta_timer every TTI
- be careful to use correct value of ta_update (31 means no TA)

Maybe not correct, to be checked.
This commit is contained in:
Cedric Roux
2017-10-10 14:10:32 +02:00
parent a9d6e04cf2
commit 9b428e5e2f
6 changed files with 46 additions and 45 deletions
+4 -4
View File
@@ -749,8 +749,8 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
(unsigned short*)&rrc_sdu_length, //
&lcid, // sdu_lcid
255, // no drx
0, // no timing advance
RA_template->cont_res_id, // contention res id
31, // no timing advance
RA_template->cont_res_id, // contention res id
msg4_padding, // no padding
msg4_post_padding);
@@ -913,8 +913,8 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
(unsigned short*)&rrc_sdu_length, //
&lcid, // sdu_lcid
255, // no drx
0, // no timing advance
RA_template->cont_res_id, // contention res id
31, // no timing advance
RA_template->cont_res_id, // contention res id
msg4_padding, // no padding
msg4_post_padding);
+18 -5
View File
@@ -169,7 +169,7 @@ generate_dlsch_header(
last_size=1;
}
if (timing_advance_cmd != 0) {
if (timing_advance_cmd != 31) {
if (first_element>0) {
mac_header_ptr->E = 1;
mac_header_ptr++;
@@ -457,6 +457,7 @@ schedule_ue_spec(
nfapi_dl_config_request_body_t *dl_req;
nfapi_dl_config_request_pdu_t *dl_config_pdu;
int tdd_sfa;
int ta_update;
#if 0
if (UE_list->head==-1) {
@@ -816,7 +817,18 @@ schedule_ue_spec(
// check first for RLC data on DCCH
// add the length for all the control elements (timing adv, drx, etc) : header + payload
ta_len = (ue_sched_ctl->ta_update!=0) ? 2 : 0;
if (ue_sched_ctl->ta_timer == 0) {
ta_update = ue_sched_ctl->ta_update;
/* if we send TA then set timer to not send it for a while */
if (ta_update != 31)
ue_sched_ctl->ta_timer = 20;
/* reset ta_update */
ue_sched_ctl->ta_update = 31;
} else {
ta_update = 31;
}
ta_len = (ta_update != 31) ? 2 : 0;
header_len_dcch = 2; // 2 bytes DCCH SDU subheader
@@ -1094,17 +1106,17 @@ schedule_ue_spec(
sdu_lengths, //
sdu_lcids,
255, // no drx
ue_sched_ctl->ta_update, // timing advance
ta_update, // timing advance
NULL, // contention res id
padding,
post_padding);
//#ifdef DEBUG_eNB_SCHEDULER
if (ue_sched_ctl->ta_update) {
if (ta_update != 31) {
LOG_D(MAC,
"[eNB %d][DLSCH] Frame %d Generate header for UE_id %d on CC_id %d: sdu_length_total %d, num_sdus %d, sdu_lengths[0] %d, sdu_lcids[0] %d => payload offset %d,timing advance value : %d, padding %d,post_padding %d,(mcs %d, TBS %d, nb_rb %d),header_dcch %d, header_dtch %d\n",
module_idP,frameP, UE_id, CC_id, sdu_length_total,num_sdus,sdu_lengths[0],sdu_lcids[0],offset,
ue_sched_ctl->ta_update,padding,post_padding,mcs,TBS,nb_rb,header_len_dcch,header_len_dtch);
ta_update,padding,post_padding,mcs,TBS,nb_rb,header_len_dcch,header_len_dtch);
}
//#endif
#ifdef DEBUG_eNB_SCHEDULER
@@ -1116,6 +1128,7 @@ schedule_ue_spec(
LOG_T(MAC,"\n");
#endif
// cycle through SDUs and place in dlsch_buffer
memcpy(&UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset],dlsch_buffer,sdu_length_total);
// memcpy(RC.mac[0].DLSCH_pdu[0][0].payload[0][offset],dcch_buffer,sdu_lengths[0]);
@@ -1724,6 +1724,8 @@ int add_new_ue(module_id_t mod_idP, int cc_idP, rnti_t rntiP,int harq_pidP
memset((void*)&UE_list->UE_sched_ctrl[UE_id],0,sizeof(UE_sched_ctrl));
memset((void*)&UE_list->eNB_UE_stats[cc_idP][UE_id],0,sizeof(eNB_UE_STATS));
UE_list->UE_sched_ctrl[UE_id].ta_update = 31;
for (j=0; j<8; j++) {
UE_list->UE_template[cc_idP][UE_id].oldNDI[j] = (j==0)?1:0; // 1 because first transmission is with format1A (Msg4) for harq_pid 0
UE_list->UE_template[cc_idP][UE_id].oldNDI_UL[j] = (j==harq_pidP)?0:1; // 1st transmission is with Msg3;
+3 -1
View File
@@ -115,7 +115,9 @@ void rx_sdu(const module_id_t enb_mod_idP,
UE_list->UE_sched_ctrl[UE_id].ul_inactivity_timer = 0;
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer = 0;
UE_list->UE_sched_ctrl[UE_id].ul_scheduled &= (~(1<<harq_pid));
UE_list->UE_sched_ctrl[UE_id].ta_update = timing_advance;
/* don't take into account TA if timer is running */
if (UE_list->UE_sched_ctrl[UE_id].ta_timer == 0)
UE_list->UE_sched_ctrl[UE_id].ta_update = timing_advance;
UE_list->UE_sched_ctrl[UE_id].ul_cqi = ul_cqi;
UE_list->UE_sched_ctrl[UE_id].ul_consecutive_errors = 0;
first_rb = UE_list->UE_template[CC_idP][UE_id].first_rb_ul[harq_pid];
+2
View File
@@ -894,6 +894,8 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
LOG_D(MAC,"Running preprocessor for UE %d (%x)\n",UE_id,rnti);
// initialize harq_pid and round
if (ue_sched_ctl->ta_timer) ue_sched_ctl->ta_timer--;
/*
eNB_UE_stats *eNB_UE_stats;