Merge branch 'NR_RRCConfiguration' of https://gitlab.eurecom.fr/oai/openairinterface5g into NR_RRCConfiguration
This commit is contained in:
+13
-1
@@ -750,7 +750,19 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
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nextslot_type == NR_UPLINK_SLOT) {
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nextslot_type == NR_UPLINK_SLOT) {
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flags = 3; // end of burst
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flags = 3; // end of burst
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}
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}
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if (fp->freq_range==nr_FR2) {
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// the beam index is written in bits 8-10 of the flags
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// bit 11 enables the gpio programming
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int beam=0;
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if (slot==0 || slot==40) beam=0&8;
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if (slot==10 || slot==50) beam=1&8;
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if (slot==20 || slot==60) beam=2&8;
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if (slot==30 || slot==70) beam=3&8;
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flags |= beam<<8;
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}
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VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_WRITE_FLAGS, flags );
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VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_WRITE_FLAGS, flags );
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VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame );
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VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame );
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VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot );
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VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot );
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@@ -276,14 +276,17 @@ static int trx_usrp_start(openair0_device *device) {
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// setup GPIO for TDD, GPIO(4) = ATR_RX
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// setup GPIO for TDD, GPIO(4) = ATR_RX
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//set data direction register (DDR) to output
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//set data direction register (DDR) to output
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s->usrp->set_gpio_attr("FP0", "DDR", 0x7f, 0x7f);
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s->usrp->set_gpio_attr("FP0", "DDR", 0xfff, 0xfff);
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//set control register to ATR
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//set lower 7 bits to be controlled automatically by ATR (the rest 5 bits are controlled manually)
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s->usrp->set_gpio_attr("FP0", "CTRL", 0x7f,0x7f);
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s->usrp->set_gpio_attr("FP0", "CTRL", 0x7f,0xfff);
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//set pins 4 (RX_TX_Switch) and 6 (Shutdown PA) to 1 when the radio is only receiving (ATR_RX)
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//set pins 4 (RX_TX_Switch) and 6 (Shutdown PA) to 1 when the radio is only receiving (ATR_RX)
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s->usrp->set_gpio_attr("FP0", "ATR_RX", (1<<4)|(1<<6), 0x7f);
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s->usrp->set_gpio_attr("FP0", "ATR_RX", (1<<4)|(1<<6), 0x7f);
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// set pin 5 (Shutdown LNA) to 1 when the radio is transmitting and receiveing (ATR_XX)
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// set pin 5 (Shutdown LNA) to 1 when the radio is transmitting and receiveing (ATR_XX)
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// (we use full duplex here, because our RX is on all the time - this might need to change later)
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// (we use full duplex here, because our RX is on all the time - this might need to change later)
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s->usrp->set_gpio_attr("FP0", "ATR_XX", (1<<5), 0x7f);
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s->usrp->set_gpio_attr("FP0", "ATR_XX", (1<<5), 0x7f);
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// set the output pins to 0
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s->usrp->set_gpio_attr("FP0", "OUT", 7<<7, 0xf80);
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// init recv and send streaming
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// init recv and send streaming
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uhd::stream_cmd_t cmd(uhd::stream_cmd_t::STREAM_MODE_START_CONTINUOUS);
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uhd::stream_cmd_t cmd(uhd::stream_cmd_t::STREAM_MODE_START_CONTINUOUS);
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LOG_I(HW,"Time in secs now: %llu \n", s->usrp->get_time_now().to_ticks(s->sample_rate));
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LOG_I(HW,"Time in secs now: %llu \n", s->usrp->get_time_now().to_ticks(s->sample_rate));
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@@ -404,10 +407,19 @@ static int trx_usrp_write_recplay(openair0_device *device, openair0_timestamp ti
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@param antenna_id index of the antenna if the device has multiple antennas
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@param antenna_id index of the antenna if the device has multiple antennas
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@param flags flags must be set to TRUE if timestamp parameter needs to be applied
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@param flags flags must be set to TRUE if timestamp parameter needs to be applied
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*/
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*/
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static int trx_usrp_write(openair0_device *device, openair0_timestamp timestamp, void **buff, int nsamps, int cc, int flags) {
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static int trx_usrp_write(openair0_device *device,
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openair0_timestamp timestamp,
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void **buff,
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int nsamps,
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int cc,
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int flags) {
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int ret=0;
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int ret=0;
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usrp_state_t *s = (usrp_state_t *)device->priv;
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usrp_state_t *s = (usrp_state_t *)device->priv;
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int nsamps2; // aligned to upper 32 or 16 byte boundary
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int nsamps2; // aligned to upper 32 or 16 byte boundary
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int flags_lsb = flags&0xff;
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int flags_msb = (flags>>8)&0xff;
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#if defined(__x86_64) || defined(__i386__)
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#if defined(__x86_64) || defined(__i386__)
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#ifdef __AVX2__
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#ifdef __AVX2__
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nsamps2 = (nsamps+7)>>3;
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nsamps2 = (nsamps+7)>>3;
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@@ -441,40 +453,51 @@ static int trx_usrp_write(openair0_device *device, openair0_timestamp timestamp,
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boolean_t first_packet_state=false,last_packet_state=false;
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boolean_t first_packet_state=false,last_packet_state=false;
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if (flags == 2) { // start of burst
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if (flags_lsb == 2) { // start of burst
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// s->tx_md.start_of_burst = true;
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// s->tx_md.start_of_burst = true;
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// s->tx_md.end_of_burst = false;
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// s->tx_md.end_of_burst = false;
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first_packet_state = true;
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first_packet_state = true;
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last_packet_state = false;
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last_packet_state = false;
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} else if (flags == 3) { // end of burst
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} else if (flags_lsb == 3) { // end of burst
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//s->tx_md.start_of_burst = false;
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//s->tx_md.start_of_burst = false;
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//s->tx_md.end_of_burst = true;
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//s->tx_md.end_of_burst = true;
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first_packet_state = false;
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first_packet_state = false;
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last_packet_state = true;
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last_packet_state = true;
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} else if (flags == 4) { // start and end
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} else if (flags_lsb == 4) { // start and end
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// s->tx_md.start_of_burst = true;
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// s->tx_md.start_of_burst = true;
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// s->tx_md.end_of_burst = true;
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// s->tx_md.end_of_burst = true;
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first_packet_state = true;
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first_packet_state = true;
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last_packet_state = true;
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last_packet_state = true;
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} else if (flags==1) { // middle of burst
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} else if (flags_lsb==1) { // middle of burst
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// s->tx_md.start_of_burst = false;
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// s->tx_md.start_of_burst = false;
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// s->tx_md.end_of_burst = false;
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// s->tx_md.end_of_burst = false;
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first_packet_state = false;
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first_packet_state = false;
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last_packet_state = false;
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last_packet_state = false;
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} else if (flags==10) { // fail safe mode
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}
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// s->tx_md.has_time_spec = false;
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else if (flags_lsb==10) { // fail safe mode
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// s->tx_md.start_of_burst = false;
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// s->tx_md.has_time_spec = false;
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// s->tx_md.end_of_burst = true;
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// s->tx_md.start_of_burst = false;
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first_packet_state = false;
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// s->tx_md.end_of_burst = true;
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last_packet_state = true;
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first_packet_state = false;
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last_packet_state = true;
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}
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}
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s->tx_md.has_time_spec = true;
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s->tx_md.has_time_spec = true;
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s->tx_md.start_of_burst = (s->tx_count==0) ? true : first_packet_state;
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s->tx_md.start_of_burst = (s->tx_count==0) ? true : first_packet_state;
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s->tx_md.end_of_burst = last_packet_state;
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s->tx_md.end_of_burst = last_packet_state;
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s->tx_md.time_spec = uhd::time_spec_t::from_ticks(timestamp, s->sample_rate);
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s->tx_md.time_spec = uhd::time_spec_t::from_ticks(timestamp, s->sample_rate);
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s->tx_count++;
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s->tx_count++;
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// bit 3 enables gpio (for backward compatibility)
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if (flags_msb&8) {
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// push GPIO bits 7-9 from flags_msb
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int gpio789=(flags_msb&7)<<7;
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s->usrp->set_command_time(s->tx_md.time_spec);
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s->usrp->set_gpio_attr("FP0", "OUT", gpio789, 0x380);
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s->usrp->clear_command_time();
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}
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if (cc>1) {
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if (cc>1) {
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std::vector<void *> buff_ptrs;
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std::vector<void *> buff_ptrs;
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@@ -482,7 +505,11 @@ static int trx_usrp_write(openair0_device *device, openair0_timestamp timestamp,
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buff_ptrs.push_back(&(((int16_t *)buff_tx[i])[0]));
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buff_ptrs.push_back(&(((int16_t *)buff_tx[i])[0]));
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ret = (int)s->tx_stream->send(buff_ptrs, nsamps, s->tx_md);
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ret = (int)s->tx_stream->send(buff_ptrs, nsamps, s->tx_md);
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} else ret = (int)s->tx_stream->send(&(((int16_t *)buff_tx[0])[0]), nsamps, s->tx_md);
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}
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else {
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ret = (int)s->tx_stream->send(&(((int16_t *)buff_tx[0])[0]), nsamps, s->tx_md);
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}
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if (ret != nsamps) LOG_E(HW,"[xmit] tx samples %d != %d\n",ret,nsamps);
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if (ret != nsamps) LOG_E(HW,"[xmit] tx samples %d != %d\n",ret,nsamps);
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return ret;
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return ret;
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@@ -148,7 +148,7 @@ gNBs =
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# ssb_PositionsInBurs_BitmapPR
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# ssb_PositionsInBurs_BitmapPR
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# 1=short, 2=medium, 3=long
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# 1=short, 2=medium, 3=long
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ssb_PositionsInBurst_PR = 3;
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ssb_PositionsInBurst_PR = 3;
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ssb_PositionsInBurst_Bitmap = 1;
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ssb_PositionsInBurst_Bitmap = 0x100000001L;
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# ssb_periodicityServingCell
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# ssb_periodicityServingCell
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# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
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# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
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@@ -170,8 +170,8 @@ gNBs =
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# pattern1
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# pattern1
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# dl_UL_TransmissionPeriodicity
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# dl_UL_TransmissionPeriodicity
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# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
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# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
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dl_UL_TransmissionPeriodicity = 6;
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dl_UL_TransmissionPeriodicity = 5;
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nrofDownlinkSlots = 30;
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nrofDownlinkSlots = 10;
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nrofDownlinkSymbols = 0;
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nrofDownlinkSymbols = 0;
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nrofUplinkSlots = 10;
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nrofUplinkSlots = 10;
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nrofUplinkSymbols = 0;
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nrofUplinkSymbols = 0;
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@@ -237,8 +237,8 @@ RUs = (
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max_pdschReferenceSignalPower = -27;
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max_pdschReferenceSignalPower = -27;
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max_rxgain = 114;
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max_rxgain = 114;
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eNB_instances = [0];
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eNB_instances = [0];
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sdr_addrs = "type=x300";
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sdr_addrs = "addr=192.168.10.2,second_addr=192.168.20.2";
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if_freq = 3000000000;
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if_freq = 5300000000;
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}
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}
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);
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);
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