From 9e34a8ebed62cff3b64cd0bab44284a85f04c1f3 Mon Sep 17 00:00:00 2001
From: Gabriele Gemmi <g.gemmi@northeastern.edu>
Date: Thu, 31 Jul 2025 03:53:26 +0000
Subject: [PATCH] Compute DCI prgsize from Coreset

---
 .../NR_MAC_gNB/gNB_scheduler_primitives.c     | 44 ++++++++++++-------
 1 file changed, 28 insertions(+), 16 deletions(-)

diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
index c1056906ac..5c7edc3111 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
@@ -424,6 +424,27 @@ static NR_SearchSpace_t *get_searchspace(NR_ServingCellConfigCommon_t *scc,
   AssertFatal(false, "Couldn't find an adequate SearchSpace for target SearchSpace %d in ServingCellConfigCommon\n", target_ss);
 }
 
+/// @brief Get CORESET resource block parameters from frequency domain resources bitmap.
+/// @param coreset Pointer to the CORESET configuratio
+/// @param n_rb Output parameter for total # of RBs in the CORESET
+/// @param rb_start Output parameter for the starting resource block index of the CORESET
+static void get_coreset_rb_params(const NR_ControlResourceSet_t *coreset, uint16_t *n_rb, uint16_t *rb_start)
+{
+  *n_rb = 0;
+  *rb_start = 0;
+  
+  for (int i = 0; i < 6; i++) {
+    for (int t = 0; t < 8; t++) {
+      if ((coreset->frequencyDomainResources.buf[i] >> (7 - t)) & 1) {
+        if (*n_rb == 0) {
+            *rb_start = 48 * i + t * 6;
+        }
+        *n_rb += 6;  // Each bit represents 6 RBs
+      }
+    }
+  }
+}
+
 NR_sched_pdcch_t set_pdcch_structure(gNB_MAC_INST *gNB_mac,
                                      NR_SearchSpace_t *ss,
                                      NR_ControlResourceSet_t *coreset,
@@ -496,21 +517,7 @@ NR_sched_pdcch_t set_pdcch_structure(gNB_MAC_INST *gNB_mac,
     pdcch.ShiftIndex = 0;
   }
 
-  uint16_t N_rb = 0; // nb of rbs of coreset per symbol
-  uint16_t rb_start = 0;
-  for (int i = 0; i < 6; i++) {
-    for (int t = 0; t < 8; t++) {
-      if (coreset->frequencyDomainResources.buf[i] >> (7 - t) & 1) {
-        if (N_rb == 0) {
-          rb_start = 48 * i + t * 6;
-        }
-        N_rb++;
-      }
-    }
-  }
-
-  pdcch.rb_start = rb_start;
-  pdcch.n_rb = N_rb *= 6; // each bit of frequencyDomainResources represents 6 PRBs
+  get_coreset_rb_params(coreset, &pdcch.n_rb, &pdcch.rb_start);
 
   return pdcch;
 }
@@ -822,10 +829,15 @@ nfapi_nr_dl_dci_pdu_t *prepare_dci_pdu(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_
     dci_pdu->ScramblingId = *scc->physCellId;
     dci_pdu->ScramblingRNTI = 0;
   }
+
+  uint16_t N_rb = 0;
+  uint16_t rb_start = 0;
+  get_coreset_rb_params(coreset, &N_rb, &rb_start);
+
   dci_pdu->beta_PDCCH_1_0 = 0;
   dci_pdu->powerControlOffsetSS = 1;
   dci_pdu->precodingAndBeamforming.num_prgs = 1;
-  dci_pdu->precodingAndBeamforming.prg_size = 273;
+  dci_pdu->precodingAndBeamforming.prg_size = N_rb;
   dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 1;
   dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
   dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = beam_index;