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Merge remote-tracking branch 'origin/nr_ue_txdata_cleanup' into develop_integration_2020_w36

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This commit is contained in:
Raphael Defosseux
2020-09-03 16:41:25 +02:00
parent ec1a7cadff 070ee365e3
commit a05f7e1448
11 changed files with 88 additions and 466 deletions
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executables/nr-ue.c
+43 -38
View File
@@ -471,21 +471,22 @@ void UE_processing(void *arg) {
UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
PHY_VARS_NR_UE *UE = rxtxD->UE;
uint8_t gNB_id = 0;
// params for UL time alignment procedure
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &UE->ul_time_alignment[gNB_id];
uint8_t numerology = UE->frame_parms.numerology_index;
uint16_t bwp_ul_NB_RB = UE->frame_parms.N_RB_UL;
int slot_tx = proc->nr_tti_tx;
int frame_tx = proc->frame_tx;
processSlotRX(UE, proc);
processSlotTX(UE, proc);
/* UL time alignment
// If the current tx frame and slot match the TA configuration in ul_time_alignment
// then timing advance is processed and set to be applied in the next UL transmission */
if (UE->mac_enabled == 1) {
uint8_t gNB_id = 0;
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &UE->ul_time_alignment[gNB_id];
int slot_tx = proc->nr_tti_tx;
int frame_tx = proc->frame_tx;
if (frame_tx == ul_time_alignment->ta_frame && slot_tx == ul_time_alignment->ta_slot) {
uint8_t numerology = UE->frame_parms.numerology_index;
uint16_t bwp_ul_NB_RB = UE->frame_parms.N_RB_UL;
LOG_D(PHY,"Applying timing advance -- frame %d -- slot %d\n", frame_tx, slot_tx);
//if (nfapi_mode!=3){
@@ -495,9 +496,6 @@ void UE_processing(void *arg) {
//}
}
}
processSlotRX(UE, proc);
processSlotTX(UE, proc);
}
void dummyWrite(PHY_VARS_NR_UE *UE,openair0_timestamp timestamp, int writeBlockSize) {
@@ -622,6 +620,7 @@ void *UE_thread(void *arg) {
notifiedFIFO_t freeBlocks;
initNotifiedFIFO_nothreadSafe(&freeBlocks);
NR_UE_MAC_INST_t *mac = get_mac_inst(0);
int timing_advance = UE->timing_advance;
for (int i=0; i<RX_NB_TH+1; i++) // RX_NB_TH working + 1 we are making to be pushed
pushNotifiedFIFO_nothreadSafe(&freeBlocks,
@@ -726,21 +725,26 @@ void *UE_thread(void *arg) {
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
txp[i] = (void *)&UE->common_vars.txdata[i][UE->frame_parms.get_samples_slot_timestamp(
((curMsg->proc.nr_tti_rx + DURATION_RX_TO_TX -2)%nb_slot_frame),&UE->frame_parms,0)];
((slot_nr + DURATION_RX_TO_TX - RX_NB_TH)%nb_slot_frame),&UE->frame_parms,0)];
int readBlockSize, writeBlockSize;
if (slot_nr<(nb_slot_frame - 1)) {
readBlockSize=get_readBlockSize(slot_nr, &UE->frame_parms);
writeBlockSize=UE->frame_parms.get_samples_per_slot(curMsg->proc.nr_tti_tx,&UE->frame_parms);
writeBlockSize=UE->frame_parms.get_samples_per_slot((slot_nr + DURATION_RX_TO_TX - RX_NB_TH) % nb_slot_frame, &UE->frame_parms);
} else {
UE->rx_offset_diff = computeSamplesShift(UE);
readBlockSize=get_readBlockSize(slot_nr, &UE->frame_parms) -
UE->rx_offset_diff;
writeBlockSize=UE->frame_parms.get_samples_per_slot(curMsg->proc.nr_tti_tx,&UE->frame_parms) -
writeBlockSize=UE->frame_parms.get_samples_per_slot((slot_nr + DURATION_RX_TO_TX - RX_NB_TH) % nb_slot_frame, &UE->frame_parms)-
UE->rx_offset_diff;
}
if (UE->timing_advance != timing_advance) {
writeBlockSize -= UE->timing_advance - timing_advance;
timing_advance = UE->timing_advance;
}
AssertFatal(readBlockSize ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
@@ -748,29 +752,19 @@ void *UE_thread(void *arg) {
readBlockSize,
UE->frame_parms.nb_antennas_rx),"");
AssertFatal( writeBlockSize ==
UE->rfdevice.trx_write_func(&UE->rfdevice,
timestamp+
UE->frame_parms.get_samples_slot_timestamp(slot_nr,
&UE->frame_parms,DURATION_RX_TO_TX -2) - firstSymSamp -
openair0_cfg[0].tx_sample_advance,
txp,
writeBlockSize,
UE->frame_parms.nb_antennas_tx,
1),"");
if( slot_nr==(nb_slot_frame-1)) {
// read in first symbol of next frame and adjust for timing drift
int first_symbols=UE->frame_parms.ofdm_symbol_size+UE->frame_parms.nb_prefix_samples0; // first symbol of every frames
if ( first_symbols > 0 )
if ( first_symbols > 0 ) {
openair0_timestamp ignore_timestamp;
AssertFatal(first_symbols ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
&ignore_timestamp,
(void **)UE->common_vars.rxdata,
first_symbols,
UE->frame_parms.nb_antennas_rx),"");
else
} else
LOG_E(PHY,"can't compensate: diff =%d\n", first_symbols);
}
@@ -781,18 +775,15 @@ void *UE_thread(void *arg) {
notifiedFIFO_elt_t *res;
while (nbSlotProcessing >= RX_NB_TH) {
if ( (res=tryPullTpool(&nf, Tpool)) != NULL ) {
nbSlotProcessing--;
processingData_t *tmp=(processingData_t *)res->msgData;
res=pullTpool(&nf, Tpool);
nbSlotProcessing--;
processingData_t *tmp=(processingData_t *)res->msgData;
if (tmp->proc.decoded_frame_rx != -1)
decoded_frame_rx=(((mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused)<<4) | tmp->proc.decoded_frame_rx);
//decoded_frame_rx=tmp->proc.decoded_frame_rx;
if (tmp->proc.decoded_frame_rx != -1)
decoded_frame_rx=(((mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused)<<4) | tmp->proc.decoded_frame_rx);
//decoded_frame_rx=tmp->proc.decoded_frame_rx;
pushNotifiedFIFO_nothreadSafe(&freeBlocks,res);
}
usleep(200);
pushNotifiedFIFO_nothreadSafe(&freeBlocks,res);
}
if ( (decoded_frame_rx != curMsg->proc.frame_rx) &&
@@ -801,6 +792,20 @@ void *UE_thread(void *arg) {
LOG_E(PHY,"Decoded frame index (%d) is not compatible with current context (%d), UE should go back to synch mode\n",
decoded_frame_rx, curMsg->proc.frame_rx );
AssertFatal( writeBlockSize ==
UE->rfdevice.trx_write_func(&UE->rfdevice,
timestamp+
UE->frame_parms.get_samples_slot_timestamp(slot_nr,
&UE->frame_parms,DURATION_RX_TO_TX - RX_NB_TH) - firstSymSamp -
openair0_cfg[0].tx_sample_advance - UE->N_TA_offset - UE->timing_advance,
txp,
writeBlockSize,
UE->frame_parms.nb_antennas_tx,
1),"");
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
memset(txp[i], 0, writeBlockSize);
nbSlotProcessing++;
msgToPush->key=slot_nr;
pushTpool(Tpool, msgToPush);
executables/nr-uesoftmodem.c
-6
View File
@@ -768,13 +768,7 @@ int main( int argc, char **argv ) {
for(int CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
PHY_vars_UE_g[0][CC_id]->rf_map.card=0;
PHY_vars_UE_g[0][CC_id]->rf_map.chain=CC_id+chain_offset;
#if defined(OAI_USRP) || defined(OAI_ADRV9371_ZC706)
PHY_vars_UE_g[0][CC_id]->hw_timing_advance = timing_advance;
PHY_vars_UE_g[0][CC_id]->timing_advance = timing_advance;
#else
PHY_vars_UE_g[0][CC_id]->hw_timing_advance = 160;
#endif
}
init_NR_UE_threads(1);