diff --git a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
index e227bc5fa2..886d4b71be 100644
--- a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+++ b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
@@ -422,9 +422,6 @@ typedef struct {
 typedef struct {
   fapi_nr_dl_config_dci_dl_pdu_rel15_t dci_config_rel15;
 } fapi_nr_dl_config_dci_pdu;
-typedef struct{
-  uint8_t aperiodicSRS_ResourceTrigger;
-} fapi_nr_dl_srs_config_t;
 
 typedef enum{vrb_to_prb_mapping_non_interleaved = 0, vrb_to_prb_mapping_interleaved = 1} vrb_to_prb_mapping_t;
 
@@ -461,7 +458,6 @@ typedef struct {
   uint16_t dmrs_ports;
   uint8_t n_front_load_symb;
   uint8_t tci_state;
-  fapi_nr_dl_srs_config_t srs_config;
   uint8_t cbgti;
   uint8_t codeBlockGroupFlushIndicator;
   //  to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
diff --git a/openair2/LAYER2/NR_MAC_UE/mac_proto.h b/openair2/LAYER2/NR_MAC_UE/mac_proto.h
index 9a7f6084e0..c8eec75d85 100644
--- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h
+++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h
@@ -190,6 +190,8 @@ int8_t nr_ue_process_csirs_measurements(module_id_t module_id, frame_t frame, in
 
 uint32_t get_ssb_frame(uint32_t test);
 
+void nr_ue_aperiodic_srs_scheduling(NR_UE_MAC_INST_t *mac, long resource_trigger, int frame, int slot);
+
 bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac,
                                          PUCCH_sched_t *pucch,
                                          frame_t frame,
diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
index 377a7e2f08..953d172b79 100644
--- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
@@ -538,6 +538,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
     // - SECOND_DAI
     // - SRS_RESOURCE_IND
 
+    /* SRS_REQUEST */
+    AssertFatal(dci->srs_request.nbits == 2, "If SUL is supported in the cell, there is an additional bit in SRS request field\n");
+    if(dci->srs_request.val > 0)
+      nr_ue_aperiodic_srs_scheduling(mac, dci->srs_request.val, frame, slot);
+
     // Schedule PUSCH
     tda_info = get_ul_tda_info(current_UL_BWP, coreset_type, dci_ind->ss_type, get_rnti_type(mac, rnti), dci->time_domain_assignment.val);
     if (tda_info.nrOfSymbols == 0)
@@ -1076,8 +1081,9 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
       dlsch_config_pdu_1_1->tci_state = dci->transmission_configuration_indication.val;
     }
     /* SRS_REQUEST */
-    // if SUL is supported in the cell, there is an additional bit in this field and the value of this bit represents table 7.1.1.1-1 TS 38.212 FIXME!!!
-    dlsch_config_pdu_1_1->srs_config.aperiodicSRS_ResourceTrigger = (dci->srs_request.val & 0x11); // as per Table 7.3.1.1.2-24 TS 38.212
+    AssertFatal(dci->srs_request.nbits == 2, "If SUL is supported in the cell, there is an additional bit in SRS request field\n");
+    if(dci->srs_request.val > 0 )
+      nr_ue_aperiodic_srs_scheduling(mac, dci->srs_request.val, frame, slot);
     /* CBGTI */
     dlsch_config_pdu_1_1->cbgti = dci->cbgti.val;
     /* CBGFI */
diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
index 5a0a8eb303..a3f4d06b1c 100644
--- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
@@ -801,6 +801,140 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
 
 }
 
+void configure_srs_pdu(NR_UE_MAC_INST_t *mac,
+                       NR_SRS_Resource_t *srs_resource,
+                       fapi_nr_ul_config_srs_pdu *srs_config_pdu,
+                       int period, int offset)
+{
+  NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
+
+  srs_config_pdu->rnti = mac->crnti;
+  srs_config_pdu->handle = 0;
+  srs_config_pdu->bwp_size = current_UL_BWP->BWPSize;
+  srs_config_pdu->bwp_start = current_UL_BWP->BWPStart;
+  srs_config_pdu->subcarrier_spacing = current_UL_BWP->scs;
+  srs_config_pdu->cyclic_prefix = 0;
+  srs_config_pdu->num_ant_ports = srs_resource->nrofSRS_Ports;
+  srs_config_pdu->num_symbols = srs_resource->resourceMapping.nrofSymbols;
+  srs_config_pdu->num_repetitions = srs_resource->resourceMapping.repetitionFactor;
+  srs_config_pdu->time_start_position = srs_resource->resourceMapping.startPosition;
+  srs_config_pdu->config_index = srs_resource->freqHopping.c_SRS;
+  srs_config_pdu->sequence_id = srs_resource->sequenceId;
+  srs_config_pdu->bandwidth_index = srs_resource->freqHopping.b_SRS;
+  srs_config_pdu->comb_size = srs_resource->transmissionComb.present - 1;
+
+  switch(srs_resource->transmissionComb.present) {
+    case NR_SRS_Resource__transmissionComb_PR_n2:
+      srs_config_pdu->comb_offset = srs_resource->transmissionComb.choice.n2->combOffset_n2;
+      srs_config_pdu->cyclic_shift = srs_resource->transmissionComb.choice.n2->cyclicShift_n2;
+      break;
+    case NR_SRS_Resource__transmissionComb_PR_n4:
+      srs_config_pdu->comb_offset = srs_resource->transmissionComb.choice.n4->combOffset_n4;
+      srs_config_pdu->cyclic_shift = srs_resource->transmissionComb.choice.n4->cyclicShift_n4;
+      break;
+    default:
+      LOG_W(NR_MAC, "Invalid or not implemented comb_size!\n");
+  }
+
+  srs_config_pdu->frequency_position = srs_resource->freqDomainPosition;
+  srs_config_pdu->frequency_shift = srs_resource->freqDomainShift;
+  srs_config_pdu->frequency_hopping = srs_resource->freqHopping.b_hop;
+  srs_config_pdu->group_or_sequence_hopping = srs_resource->groupOrSequenceHopping;
+  srs_config_pdu->resource_type = srs_resource->resourceType.present - 1;
+  if(srs_config_pdu->resource_type > 0) { // not aperiodic
+    srs_config_pdu->t_srs = period;
+    srs_config_pdu->t_offset = offset;
+  }
+
+#ifdef SRS_DEBUG
+  LOG_I(NR_MAC,"Frame = %i, slot = %i\n", frame, slot);
+  LOG_I(NR_MAC,"srs_config_pdu->rnti = 0x%04x\n", srs_config_pdu->rnti);
+  LOG_I(NR_MAC,"srs_config_pdu->handle = %u\n", srs_config_pdu->handle);
+  LOG_I(NR_MAC,"srs_config_pdu->bwp_size = %u\n", srs_config_pdu->bwp_size);
+  LOG_I(NR_MAC,"srs_config_pdu->bwp_start = %u\n", srs_config_pdu->bwp_start);
+  LOG_I(NR_MAC,"srs_config_pdu->subcarrier_spacing = %u\n", srs_config_pdu->subcarrier_spacing);
+  LOG_I(NR_MAC,"srs_config_pdu->cyclic_prefix = %u (0: Normal; 1: Extended)\n", srs_config_pdu->cyclic_prefix);
+  LOG_I(NR_MAC,"srs_config_pdu->num_ant_ports = %u (0 = 1 port, 1 = 2 ports, 2 = 4 ports)\n", srs_config_pdu->num_ant_ports);
+  LOG_I(NR_MAC,"srs_config_pdu->num_symbols = %u (0 = 1 symbol, 1 = 2 symbols, 2 = 4 symbols)\n", srs_config_pdu->num_symbols);
+  LOG_I(NR_MAC,"srs_config_pdu->num_repetitions = %u (0 = 1, 1 = 2, 2 = 4)\n", srs_config_pdu->num_repetitions);
+  LOG_I(NR_MAC,"srs_config_pdu->time_start_position = %u\n", srs_config_pdu->time_start_position);
+  LOG_I(NR_MAC,"srs_config_pdu->config_index = %u\n", srs_config_pdu->config_index);
+  LOG_I(NR_MAC,"srs_config_pdu->sequence_id = %u\n", srs_config_pdu->sequence_id);
+  LOG_I(NR_MAC,"srs_config_pdu->bandwidth_index = %u\n", srs_config_pdu->bandwidth_index);
+  LOG_I(NR_MAC,"srs_config_pdu->comb_size = %u (0 = comb size 2, 1 = comb size 4, 2 = comb size 8)\n", srs_config_pdu->comb_size);
+  LOG_I(NR_MAC,"srs_config_pdu->comb_offset = %u\n", srs_config_pdu->comb_offset);
+  LOG_I(NR_MAC,"srs_config_pdu->cyclic_shift = %u\n", srs_config_pdu->cyclic_shift);
+  LOG_I(NR_MAC,"srs_config_pdu->frequency_position = %u\n", srs_config_pdu->frequency_position);
+  LOG_I(NR_MAC,"srs_config_pdu->frequency_shift = %u\n", srs_config_pdu->frequency_shift);
+  LOG_I(NR_MAC,"srs_config_pdu->frequency_hopping = %u\n", srs_config_pdu->frequency_hopping);
+  LOG_I(NR_MAC,"srs_config_pdu->group_or_sequence_hopping = %u (0 = No hopping, 1 = Group hopping groupOrSequenceHopping, 2 = Sequence hopping)\n", srs_config_pdu->group_or_sequence_hopping);
+  LOG_I(NR_MAC,"srs_config_pdu->resource_type = %u (0: aperiodic, 1: semi-persistent, 2: periodic)\n", srs_config_pdu->resource_type);
+  LOG_I(NR_MAC,"srs_config_pdu->t_srs = %u\n", srs_config_pdu->t_srs);
+  LOG_I(NR_MAC,"srs_config_pdu->t_offset = %u\n", srs_config_pdu->t_offset);
+#endif
+}
+
+// Aperiodic SRS scheduling
+void nr_ue_aperiodic_srs_scheduling(NR_UE_MAC_INST_t *mac, long resource_trigger, int frame, int slot)
+{
+  NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
+  NR_SRS_Config_t *srs_config = current_UL_BWP->srs_Config;
+
+  if (!srs_config) {
+    LOG_E(NR_MAC, "DCI is triggering aperiodic SRS but there is no SRS configuration\n");
+    return;
+  }
+
+  int slot_offset = 0;
+  NR_SRS_Resource_t *srs_resource = NULL;
+  for(int rs = 0; rs < srs_config->srs_ResourceSetToAddModList->list.count; rs++) {
+
+    // Find aperiodic resource set
+    NR_SRS_ResourceSet_t *srs_resource_set = srs_config->srs_ResourceSetToAddModList->list.array[rs];
+    if(srs_resource_set->resourceType.present != NR_SRS_ResourceSet__resourceType_PR_aperiodic)
+      continue;
+    // the resource trigger need to match the DCI one
+    if(srs_resource_set->resourceType.choice.aperiodic->aperiodicSRS_ResourceTrigger != resource_trigger)
+      continue;
+    // if slotOffset is null -> offset = 0
+    if(srs_resource_set->resourceType.choice.aperiodic->slotOffset)
+      slot_offset = *srs_resource_set->resourceType.choice.aperiodic->slotOffset;
+
+    // Find the corresponding srs resource
+    for(int r1 = 0; r1 < srs_resource_set->srs_ResourceIdList->list.count; r1++) {
+      for (int r2 = 0; r2 < srs_config->srs_ResourceToAddModList->list.count; r2++) {
+        if ((*srs_resource_set->srs_ResourceIdList->list.array[r1] == srs_config->srs_ResourceToAddModList->list.array[r2]->srs_ResourceId) &&
+            (srs_config->srs_ResourceToAddModList->list.array[r2]->resourceType.present == NR_SRS_Resource__resourceType_PR_aperiodic)) {
+          srs_resource = srs_config->srs_ResourceToAddModList->list.array[r2];
+          break;
+        }
+      }
+    }
+  }
+
+  if(srs_resource == NULL) {
+    LOG_E(NR_MAC, "Couldn't find SRS aperiodic resource with trigger %ld\n", resource_trigger);
+    return;
+  }
+
+  AssertFatal(slot_offset >= DURATION_RX_TO_TX,"Slot offset between DCI and aperiodic SRS (%d) cannot be less than DURATION_RX_TO_TX (%d)\n",
+              slot_offset, DURATION_RX_TO_TX);
+  int n_slots_frame = nr_slots_per_frame[current_UL_BWP->scs];
+  int sched_slot = (slot + slot_offset) % n_slots_frame;
+  NR_TDD_UL_DL_ConfigCommon_t *tdd_config = mac->scc==NULL ? mac->scc_SIB->tdd_UL_DL_ConfigurationCommon : mac->scc->tdd_UL_DL_ConfigurationCommon;
+  if (!is_nr_UL_slot(tdd_config, sched_slot, mac->frame_type)) {
+    LOG_E(NR_MAC, "Slot for scheduling aperiodic SRS %d is not an UL slot\n", sched_slot);
+    return;
+  }
+  int sched_frame = frame + (slot + slot_offset >= n_slots_frame) % 1024;
+
+  fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, sched_slot);
+  fapi_nr_ul_config_srs_pdu *srs_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].srs_config_pdu;
+  configure_srs_pdu(mac, srs_resource, srs_config_pdu, 0, 0);
+  fill_ul_config(ul_config, sched_frame, sched_slot, FAPI_NR_UL_CONFIG_TYPE_SRS);
+}
+
+
 // Periodic SRS scheduling
 bool nr_ue_periodic_srs_scheduling(module_id_t mod_id, frame_t frame, slot_t slot)
 {
@@ -850,68 +984,7 @@ bool nr_ue_periodic_srs_scheduling(module_id_t mod_id, frame_t frame, slot_t slo
       fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot);
       fapi_nr_ul_config_srs_pdu *srs_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].srs_config_pdu;
 
-      srs_config_pdu->rnti = mac->crnti;
-      srs_config_pdu->handle = 0;
-      srs_config_pdu->bwp_size = current_UL_BWP->BWPSize;
-      srs_config_pdu->bwp_start = current_UL_BWP->BWPStart;
-      srs_config_pdu->subcarrier_spacing = current_UL_BWP->scs;
-      srs_config_pdu->cyclic_prefix = 0;
-      srs_config_pdu->num_ant_ports = srs_resource->nrofSRS_Ports;
-      srs_config_pdu->num_symbols = srs_resource->resourceMapping.nrofSymbols;
-      srs_config_pdu->num_repetitions = srs_resource->resourceMapping.repetitionFactor;
-      srs_config_pdu->time_start_position = srs_resource->resourceMapping.startPosition;
-      srs_config_pdu->config_index = srs_resource->freqHopping.c_SRS;
-      srs_config_pdu->sequence_id = srs_resource->sequenceId;
-      srs_config_pdu->bandwidth_index = srs_resource->freqHopping.b_SRS;
-      srs_config_pdu->comb_size = srs_resource->transmissionComb.present - 1;
-
-      switch(srs_resource->transmissionComb.present) {
-        case NR_SRS_Resource__transmissionComb_PR_n2:
-          srs_config_pdu->comb_offset = srs_resource->transmissionComb.choice.n2->combOffset_n2;
-          srs_config_pdu->cyclic_shift = srs_resource->transmissionComb.choice.n2->cyclicShift_n2;
-          break;
-        case NR_SRS_Resource__transmissionComb_PR_n4:
-          srs_config_pdu->comb_offset = srs_resource->transmissionComb.choice.n4->combOffset_n4;
-          srs_config_pdu->cyclic_shift = srs_resource->transmissionComb.choice.n4->cyclicShift_n4;
-          break;
-        default:
-          LOG_W(NR_MAC, "Invalid or not implemented comb_size!\n");
-      }
-
-      srs_config_pdu->frequency_position = srs_resource->freqDomainPosition;
-      srs_config_pdu->frequency_shift = srs_resource->freqDomainShift;
-      srs_config_pdu->frequency_hopping = srs_resource->freqHopping.b_hop;
-      srs_config_pdu->group_or_sequence_hopping = srs_resource->groupOrSequenceHopping;
-      srs_config_pdu->resource_type = srs_resource->resourceType.present - 1;
-      srs_config_pdu->t_srs = period;
-      srs_config_pdu->t_offset = offset;
-
-#ifdef SRS_DEBUG
-      LOG_I(NR_MAC,"Frame = %i, slot = %i\n", frame, slot);
-      LOG_I(NR_MAC,"srs_config_pdu->rnti = 0x%04x\n", srs_config_pdu->rnti);
-      LOG_I(NR_MAC,"srs_config_pdu->handle = %u\n", srs_config_pdu->handle);
-      LOG_I(NR_MAC,"srs_config_pdu->bwp_size = %u\n", srs_config_pdu->bwp_size);
-      LOG_I(NR_MAC,"srs_config_pdu->bwp_start = %u\n", srs_config_pdu->bwp_start);
-      LOG_I(NR_MAC,"srs_config_pdu->subcarrier_spacing = %u\n", srs_config_pdu->subcarrier_spacing);
-      LOG_I(NR_MAC,"srs_config_pdu->cyclic_prefix = %u (0: Normal; 1: Extended)\n", srs_config_pdu->cyclic_prefix);
-      LOG_I(NR_MAC,"srs_config_pdu->num_ant_ports = %u (0 = 1 port, 1 = 2 ports, 2 = 4 ports)\n", srs_config_pdu->num_ant_ports);
-      LOG_I(NR_MAC,"srs_config_pdu->num_symbols = %u (0 = 1 symbol, 1 = 2 symbols, 2 = 4 symbols)\n", srs_config_pdu->num_symbols);
-      LOG_I(NR_MAC,"srs_config_pdu->num_repetitions = %u (0 = 1, 1 = 2, 2 = 4)\n", srs_config_pdu->num_repetitions);
-      LOG_I(NR_MAC,"srs_config_pdu->time_start_position = %u\n", srs_config_pdu->time_start_position);
-      LOG_I(NR_MAC,"srs_config_pdu->config_index = %u\n", srs_config_pdu->config_index);
-      LOG_I(NR_MAC,"srs_config_pdu->sequence_id = %u\n", srs_config_pdu->sequence_id);
-      LOG_I(NR_MAC,"srs_config_pdu->bandwidth_index = %u\n", srs_config_pdu->bandwidth_index);
-      LOG_I(NR_MAC,"srs_config_pdu->comb_size = %u (0 = comb size 2, 1 = comb size 4, 2 = comb size 8)\n", srs_config_pdu->comb_size);
-      LOG_I(NR_MAC,"srs_config_pdu->comb_offset = %u\n", srs_config_pdu->comb_offset);
-      LOG_I(NR_MAC,"srs_config_pdu->cyclic_shift = %u\n", srs_config_pdu->cyclic_shift);
-      LOG_I(NR_MAC,"srs_config_pdu->frequency_position = %u\n", srs_config_pdu->frequency_position);
-      LOG_I(NR_MAC,"srs_config_pdu->frequency_shift = %u\n", srs_config_pdu->frequency_shift);
-      LOG_I(NR_MAC,"srs_config_pdu->frequency_hopping = %u\n", srs_config_pdu->frequency_hopping);
-      LOG_I(NR_MAC,"srs_config_pdu->group_or_sequence_hopping = %u (0 = No hopping, 1 = Group hopping groupOrSequenceHopping, 2 = Sequence hopping)\n", srs_config_pdu->group_or_sequence_hopping);
-      LOG_I(NR_MAC,"srs_config_pdu->resource_type = %u (0: aperiodic, 1: semi-persistent, 2: periodic)\n", srs_config_pdu->resource_type);
-      LOG_I(NR_MAC,"srs_config_pdu->t_srs = %u\n", srs_config_pdu->t_srs);
-      LOG_I(NR_MAC,"srs_config_pdu->t_offset = %u\n", srs_config_pdu->t_offset);
-#endif
+      configure_srs_pdu(mac, srs_resource, srs_config_pdu, period, offset);
 
       fill_ul_config(ul_config, frame, slot, FAPI_NR_UL_CONFIG_TYPE_SRS);
       srs_scheduled = true;