Merge remote-tracking branch 'origin/aw2s-n41' into F1_interop_ACC
This commit is contained in:
@@ -613,7 +613,6 @@ void RCconfig_NR_L1(void) {
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config_get( GNBSParams,sizeof(GNBSParams)/sizeof(paramdef_t),NULL);
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int num_gnbs = GNBSParams[GNB_ACTIVE_GNBS_IDX].numelt;
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AssertFatal (num_gnbs > 0,"Failed to parse config file no gnbs %s \n",GNB_CONFIG_STRING_ACTIVE_GNBS);
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config_getlist( &GNBParamList,GNBParams,sizeof(GNBParams)/sizeof(paramdef_t),NULL);
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char *ulprbbl = *GNBParamList.paramarray[0][GNB_ULPRBBLACKLIST_IDX].strptr;
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if (ulprbbl) LOG_I(NR_PHY,"PRB blacklist %s\n",ulprbbl);
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@@ -629,7 +628,6 @@ void RCconfig_NR_L1(void) {
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num_prbbl++;
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}
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paramdef_t L1_Params[] = L1PARAMS_DESC;
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paramlist_def_t L1_ParamList = {CONFIG_STRING_L1_LIST,NULL,0};
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@@ -740,10 +738,8 @@ void RCconfig_nr_macrlc() {
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pt = strtok(NULL,",");
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num_prbbl++;
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}
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paramdef_t MacRLC_Params[] = MACRLCPARAMS_DESC;
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paramlist_def_t MacRLC_ParamList = {CONFIG_STRING_MACRLC_LIST,NULL,0};
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config_getlist( &MacRLC_ParamList,MacRLC_Params,sizeof(MacRLC_Params)/sizeof(paramdef_t), NULL);
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if ( MacRLC_ParamList.numelt > 0) {
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@@ -815,9 +811,7 @@ void RCconfig_nr_macrlc() {
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RC.nrmac[j]->dl_rd2_bler_threshold = *(MacRLC_ParamList.paramarray[j][MACRLC_DL_RD2_BLER_THRESHOLD_IDX].dblptr);
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RC.nrmac[j]->dl_max_mcs = *(MacRLC_ParamList.paramarray[j][MACRLC_DL_MAX_MCS_IDX].u8ptr);
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RC.nrmac[j]->num_ulprbbl = num_prbbl;
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LOG_I(NR_MAC,"Blacklisted PRBS %d\n",num_prbbl);
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memcpy(RC.nrmac[j]->ulprbbl,prbbl,275*sizeof(prbbl[0]));
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}// for (j=0;j<RC.nb_nr_macrlc_inst;j++)
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}else {// MacRLC_ParamList.numelt > 0
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LOG_E(PHY,"No %s configuration found\n", CONFIG_STRING_MACRLC_LIST);
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@@ -1510,7 +1504,7 @@ void NRRCConfig(void) {
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config_get( GNBSParams,sizeof(GNBSParams)/sizeof(paramdef_t),NULL);
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RC.nb_nr_inst = GNBSParams[GNB_ACTIVE_GNBS_IDX].numelt;
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// Get num MACRLC instances
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// Get num MACRLC instances
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config_getlist( &MACRLCParamList,NULL,0, NULL);
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RC.nb_nr_macrlc_inst = MACRLCParamList.numelt;
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// Get num L1 instances
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@@ -2325,11 +2325,6 @@ static inline uint8_t get_table_idx(uint8_t mcs_table, uint8_t dci_format, uint8
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}
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/* returns the total DMRS symbols in a slot*/
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uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype){
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return get_num_dmrs(fill_dmrs_mask(pdsch_Config,dmrs_TypeA_Position,NrOfSymbols, startSymbol, mappingtype));
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}
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// Table 5.1.2.2.1-1 38.214
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uint8_t getRBGSize(uint16_t bwp_size, long rbg_size_config) {
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@@ -3050,9 +3045,9 @@ int is_nr_UL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, sl
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else return(slot_in_period >= slots1+tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots ? 1 : 0);
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}
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int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype_fromDCI) {
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int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype_fromDCI, int length) {
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int l0;int dmrs_AdditionalPosition = 0;int maxLength = 0;
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int l0;int dmrs_AdditionalPosition = 0;
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NR_DMRS_DownlinkConfig_t *dmrs_config = NULL;
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LOG_D(MAC, "NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d\n", NrOfSymbols, startSymbol, mappingtype_fromDCI, dmrs_TypeA_Position);
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@@ -3064,7 +3059,6 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
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// in case of DCI FORMAT 1_0 or dedicated pdsch config not received additionposition = pos2, len1 should be used
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// referred to section 5.1.6.2 in 38.214
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dmrs_AdditionalPosition = 2;
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maxLength = 1;
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if (pdsch_Config != NULL) {
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if (mappingtype_fromDCI == typeA) { // Type A
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@@ -3079,8 +3073,7 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
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AssertFatal(dmrs_config != NULL," DMRS configs not present in PDSCH DMRS Downlink config\n");
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// default values of maxlength = len2, additionalposition is pos2
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if (dmrs_config->maxLength != NULL) maxLength = 2;
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// default values of additionalposition is pos2
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if (dmrs_config->dmrs_AdditionalPosition != NULL) dmrs_AdditionalPosition = *dmrs_config->dmrs_AdditionalPosition;
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}
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@@ -3095,11 +3088,6 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
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// For TypeB, ld is the duration of the scheduled PDSCH resources
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ld = (mappingtype_fromDCI == typeA) ? (NrOfSymbols + startSymbol) : NrOfSymbols;
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// Section 7.4.1.1.2 in Spec 38.211
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//For PDSCH Mapping typeB, if PDSCH duration ld <=4, only single symbol DMRS is supported
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if (mappingtype_fromDCI == typeB && ld <= 4)
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maxLength = 1;
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AssertFatal(ld > 2 && ld < 15,"Illegal NrOfSymbols according to Table 5.1.2.1-1 Spec 38.214 %d\n",ld);
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AssertFatal((NrOfSymbols + startSymbol) < 15,"Illegal S+L according to Table 5.1.2.1-1 Spec 38.214 S:%d L:%d\n",startSymbol, NrOfSymbols);
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@@ -3116,7 +3104,8 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
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}
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if (maxLength == 1) {
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// number of front loaded symbols
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if (length == 1) {
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row = ld - 2;
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l_prime = table_7_4_1_1_2_3_pdsch_dmrs_positions_l[row][column];
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l0 = 1 << l0;
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@@ -3127,7 +3116,7 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
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l0 = 1<<l0 | 1<<(l0+1);
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}
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LOG_D(MAC, "l0:%d, ld:%d,row:%d, column:%d, addpos:%d, maxlen:%d\n", l0, ld, row, column, dmrs_AdditionalPosition, maxLength);
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LOG_D(MAC, "l0:%d, ld:%d,row:%d, column:%d, addpos:%d, maxlen:%d\n", l0, ld, row, column, dmrs_AdditionalPosition, length);
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AssertFatal(l_prime>=0,"ERROR in configuration.Check Time Domain allocation of this Grant. l_prime < 1. row:%d, column:%d\n", row, column);
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l_prime = (mappingtype_fromDCI == typeA) ? (l_prime | l0) : (l_prime << startSymbol);
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@@ -41,7 +41,7 @@ uint64_t from_nrarfcn(int nr_bandP, uint8_t scs_index, uint32_t dl_nrarfcn);
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uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw);
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int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,int mappingtype_fromDCI);
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int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,int mappingtype_fromDCI,int length);
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int is_nr_DL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon,slot_t slotP);
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@@ -175,8 +175,6 @@ bool set_ul_ptrs_values(NR_PTRS_UplinkConfig_t *ul_ptrs_config,
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uint8_t *reOffset, uint8_t *maxNumPorts, uint8_t *ulPower,
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uint8_t NrOfSymbols);
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uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,int mappingtype);
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/* \brief Set the transform precoding according to 6.1.3 of 3GPP TS 38.214 version 16.3.0 Release 16
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@param *pusch_config, pointer to pusch config
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@param *ubwp pointer to uplink bwp
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@@ -57,12 +57,12 @@ extern const uint8_t table_7_3_1_1_2_21[19][4];
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extern const uint8_t table_7_3_1_1_2_22[6][5];
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extern const uint8_t table_7_3_1_1_2_23[5][6];
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extern const uint8_t table_7_3_2_3_3_1[12][5];
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extern const uint8_t table_7_3_2_3_3_2_oneCodeword[31][6];
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extern const uint8_t table_7_3_2_3_3_2_oneCodeword[31][10];
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extern const uint8_t table_7_3_2_3_3_2_twoCodeword[4][10];
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extern const uint8_t table_7_3_2_3_3_3_oneCodeword[24][5];
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extern const uint8_t table_7_3_2_3_3_3_oneCodeword[24][7];
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extern const uint8_t table_7_3_2_3_3_3_twoCodeword[2][7];
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extern const uint8_t table_7_3_2_3_3_4_oneCodeword[58][6];
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extern const uint8_t table_7_3_2_3_3_4_twoCodeword[6][10];
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extern const uint8_t table_7_3_2_3_3_4_oneCodeword[58][14];
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extern const uint8_t table_7_3_2_3_3_4_twoCodeword[6][14];
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extern const uint16_t table_7_2_1[16];
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@@ -257,161 +257,161 @@ const uint8_t table_7_3_1_1_2_23[5][6] = {
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};
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const uint8_t table_7_3_2_3_3_1[12][5] = {
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{1,0,0,0,0},
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{1,1,0,0,0},
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{1,0,1,0,0},
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{2,0,0,0,0},
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{1,1,1,0,0},
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{2,1,0,0,0},
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{2,2,0,0,0},
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{2,3,0,0,0},
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{2,0,1,0,0},
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{2,2,3,0,0},
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{2,0,1,2,0},
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{2,0,1,2,3},
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{2,0,2,0,0}
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{2,0,0,1,0},
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{2,0,0,0,1},
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{2,1,1,0,0},
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{2,0,0,1,1},
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{2,1,1,1,0},
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{2,1,1,1,1},
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{2,1,0,1,0}
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};
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const uint8_t table_7_3_2_3_3_2_oneCodeword[31][6] = {
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{1,0,0,0,0,1},
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{1,1,0,0,0,1},
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{1,0,1,0,0,1},
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{2,0,0,0,0,1},
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{2,1,0,0,0,1},
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{2,2,0,0,0,1},
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{2,3,0,0,0,1},
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{2,0,1,0,0,1},
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{2,2,3,0,0,1},
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{2,0,1,2,0,1},
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{2,0,1,2,3,1},
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{2,0,2,0,0,1},
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{2,0,0,0,0,2},
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{2,1,0,0,0,2},
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{2,2,0,0,0,2},
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{2,3,0,0,0,2},
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{2,4,0,0,0,2},
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{2,5,0,0,0,2},
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{2,6,0,0,0,2},
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{2,7,0,0,0,2},
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{2,0,1,0,0,2},
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{2,2,3,0,0,2},
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{2,4,5,0,0,2},
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{2,6,7,0,0,2},
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{2,0,4,0,0,2},
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{2,2,6,0,0,2},
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{2,0,1,4,0,2},
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{2,2,3,6,0,2},
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{2,0,1,4,5,2},
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{2,2,3,6,7,2},
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{2,0,2,4,6,2}
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const uint8_t table_7_3_2_3_3_2_oneCodeword[31][10] = {
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{1,1,0,0,0,0,0,0,0,1},
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{1,0,1,0,0,0,0,0,0,1},
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{1,1,1,0,0,0,0,0,0,1},
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{2,1,0,0,0,0,0,0,0,1},
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{2,0,1,0,0,0,0,0,0,1},
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{2,0,0,1,0,0,0,0,0,1},
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{2,0,0,0,1,0,0,0,0,1},
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{2,1,1,0,0,0,0,0,0,1},
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{2,0,0,1,1,0,0,0,0,1},
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{2,1,1,1,0,0,0,0,0,1},
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{2,1,1,1,1,0,0,0,0,1},
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{2,1,0,1,0,0,0,0,0,1},
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{2,1,0,0,0,0,0,0,0,2},
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{2,0,1,0,0,0,0,0,0,2},
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{2,0,0,1,0,0,0,0,0,2},
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{2,0,0,0,1,0,0,0,0,2},
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{2,0,0,0,0,1,0,0,0,2},
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{2,0,0,0,0,0,1,0,0,2},
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{2,0,0,0,0,0,0,1,0,2},
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{2,0,0,0,0,0,0,0,1,2},
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{2,1,1,0,0,0,0,0,0,2},
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{2,0,0,1,1,0,0,0,0,2},
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{2,0,0,0,0,1,1,0,0,2},
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{2,0,0,0,0,0,0,1,1,2},
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{2,1,0,0,0,1,0,0,0,2},
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{2,0,0,1,0,0,0,1,0,2},
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{2,1,1,0,0,1,0,0,0,2},
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{2,0,0,1,1,0,0,1,0,2},
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{2,1,1,0,0,1,1,0,0,2},
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{2,0,0,1,1,0,0,1,1,2},
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{2,1,0,1,0,1,0,1,0,2}
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};
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const uint8_t table_7_3_2_3_3_2_twoCodeword[4][10] = {
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{2,0,1,2,3,4,0,0,0,2},
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{2,0,1,2,3,4,6,0,0,2},
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{2,0,1,2,3,4,5,6,0,2},
|
||||
{2,0,1,2,3,4,5,6,7,2}
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||||
{2,1,1,1,1,1,0,0,0,2},
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||||
{2,1,1,1,1,1,0,1,0,2},
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||||
{2,1,1,1,1,1,1,1,0,2},
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||||
{2,1,1,1,1,1,1,1,1,2}
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};
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const uint8_t table_7_3_2_3_3_3_oneCodeword[24][5] = {
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{1,0,0,0,0},
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{1,1,0,0,0},
|
||||
{1,0,1,0,0},
|
||||
{2,0,0,0,0},
|
||||
{2,1,0,0,0},
|
||||
{2,2,0,0,0},
|
||||
{2,3,0,0,0},
|
||||
{2,0,1,0,0},
|
||||
{2,2,3,0,0},
|
||||
{2,0,1,2,0},
|
||||
{2,0,1,2,3},
|
||||
{3,0,0,0,0},
|
||||
{3,1,0,0,0},
|
||||
{3,2,0,0,0},
|
||||
{3,3,0,0,0},
|
||||
{3,4,0,0,0},
|
||||
{3,5,0,0,0},
|
||||
{3,0,1,0,0},
|
||||
{3,2,3,0,0},
|
||||
{3,4,5,0,0},
|
||||
{3,0,1,2,0},
|
||||
{3,3,4,5,0},
|
||||
{3,0,1,2,3},
|
||||
{2,0,2,0,0}
|
||||
const uint8_t table_7_3_2_3_3_3_oneCodeword[24][7] = {
|
||||
{1,1,0,0,0,0,0},
|
||||
{1,0,1,0,0,0,0},
|
||||
{1,1,1,0,0,0,0},
|
||||
{2,1,0,0,0,0,0},
|
||||
{2,0,1,0,0,0,0},
|
||||
{2,0,0,1,0,0,0},
|
||||
{2,0,0,0,1,0,0},
|
||||
{2,1,1,0,0,0,0},
|
||||
{2,0,0,1,1,0,0},
|
||||
{2,1,1,1,0,0,0},
|
||||
{2,1,1,1,1,0,0},
|
||||
{3,1,0,0,0,0,0},
|
||||
{3,0,1,0,0,0,0},
|
||||
{3,0,0,1,0,0,0},
|
||||
{3,0,0,0,1,0,0},
|
||||
{3,0,0,0,0,1,0},
|
||||
{3,0,0,0,0,0,1},
|
||||
{3,1,1,0,0,0,0},
|
||||
{3,0,0,1,1,0,0},
|
||||
{3,0,0,0,0,1,1},
|
||||
{3,1,1,1,0,0,0},
|
||||
{3,0,0,0,1,1,1},
|
||||
{3,1,1,1,1,0,0},
|
||||
{3,1,0,1,0,0,0}
|
||||
};
|
||||
|
||||
const uint8_t table_7_3_2_3_3_3_twoCodeword[2][7] = {
|
||||
{3,0,1,2,3,4,0},
|
||||
{3,0,1,2,3,4,5}
|
||||
{3,1,1,1,1,1,0},
|
||||
{3,1,1,1,1,1,1}
|
||||
};
|
||||
|
||||
const uint8_t table_7_3_2_3_3_4_oneCodeword[58][6] = {
|
||||
{1,0,0,0,0,1},
|
||||
{1,1,0,0,0,1},
|
||||
{1,0,1,0,0,1},
|
||||
{2,0,0,0,0,1},
|
||||
{2,1,0,0,0,1},
|
||||
{2,2,0,0,0,1},
|
||||
{2,3,0,0,0,1},
|
||||
{2,0,1,0,0,1},
|
||||
{2,2,3,0,0,1},
|
||||
{2,0,1,2,0,1},
|
||||
{2,0,1,2,3,1},
|
||||
{3,0,0,0,0,1},
|
||||
{3,1,0,0,0,1},
|
||||
{3,2,0,0,0,1},
|
||||
{3,3,0,0,0,1},
|
||||
{3,4,0,0,0,1},
|
||||
{3,5,0,0,0,1},
|
||||
{3,0,1,0,0,1},
|
||||
{3,2,3,0,0,1},
|
||||
{3,4,5,0,0,1},
|
||||
{3,0,1,2,0,1},
|
||||
{3,3,4,5,0,1},
|
||||
{3,0,1,2,3,1},
|
||||
{2,0,2,0,0,1},
|
||||
{3,0,0,0,0,2},
|
||||
{3,1,0,0,0,2},
|
||||
{3,2,0,0,0,2},
|
||||
{3,3,0,0,0,2},
|
||||
{3,4,0,0,0,2},
|
||||
{3,5,0,0,0,2},
|
||||
{3,6,0,0,0,2},
|
||||
{3,7,0,0,0,2},
|
||||
{3,8,0,0,0,2},
|
||||
{3,9,0,0,0,2},
|
||||
{3,10,0,0,0,2},
|
||||
{3,11,0,0,0,2},
|
||||
{3,0,1,0,0,2},
|
||||
{3,2,3,0,0,2},
|
||||
{3,4,5,0,0,2},
|
||||
{3,6,7,0,0,2},
|
||||
{3,8,9,0,0,2},
|
||||
{3,10,11,0,0,2},
|
||||
{3,0,1,6,0,2},
|
||||
{3,2,3,8,0,2},
|
||||
{3,4,5,10,0,2},
|
||||
{3,0,1,6,7,2},
|
||||
{3,2,3,8,9,2},
|
||||
{3,4,5,10,11,2},
|
||||
{1,0,0,0,0,2},
|
||||
{1,1,0,0,0,2},
|
||||
{1,6,0,0,0,2},
|
||||
{1,7,0,0,0,2},
|
||||
{1,0,1,0,0,2},
|
||||
{1,6,7,0,0,2},
|
||||
{2,0,1,0,0,2},
|
||||
{2,2,3,0,0,2},
|
||||
{2,6,7,0,0,2},
|
||||
{2,8,9,0,0,2}
|
||||
const uint8_t table_7_3_2_3_3_4_oneCodeword[58][14] = {
|
||||
{1,1,0,0,0,0,0,0,0,0,0,0,0,1},
|
||||
{1,0,1,0,0,0,0,0,0,0,0,0,0,1},
|
||||
{1,1,1,0,0,0,0,0,0,0,0,0,0,1},
|
||||
{2,1,0,0,0,0,0,0,0,0,0,0,0,1},
|
||||
{2,0,1,0,0,0,0,0,0,0,0,0,0,1},
|
||||
{2,0,0,1,0,0,0,0,0,0,0,0,0,1},
|
||||
{2,0,0,0,1,0,0,0,0,0,0,0,0,1},
|
||||
{2,1,1,0,0,0,0,0,0,0,0,0,0,1},
|
||||
{2,0,0,1,1,0,0,0,0,0,0,0,0,1},
|
||||
{2,1,1,1,0,0,0,0,0,0,0,0,0,1},
|
||||
{2,1,1,1,1,0,0,0,0,0,0,0,0,1},
|
||||
{3,1,0,0,0,0,0,0,0,0,0,0,0,1},
|
||||
{3,0,1,0,0,0,0,0,0,0,0,0,0,1},
|
||||
{3,0,0,1,0,0,0,0,0,0,0,0,0,1},
|
||||
{3,0,0,0,1,0,0,0,0,0,0,0,0,1},
|
||||
{3,0,0,0,0,1,0,0,0,0,0,0,0,1},
|
||||
{3,0,0,0,0,0,1,0,0,0,0,0,0,1},
|
||||
{3,1,1,0,0,0,0,0,0,0,0,0,0,1},
|
||||
{3,0,0,1,1,0,0,0,0,0,0,0,0,1},
|
||||
{3,0,0,0,0,1,1,0,0,0,0,0,0,1},
|
||||
{3,1,1,1,0,0,0,0,0,0,0,0,0,1},
|
||||
{3,0,0,0,1,1,1,0,0,0,0,0,0,1},
|
||||
{3,1,1,1,1,0,0,0,0,0,0,0,0,1},
|
||||
{2,1,0,1,0,0,0,0,0,0,0,0,0,1},
|
||||
{3,1,0,0,0,0,0,0,0,0,0,0,0,2},
|
||||
{3,0,1,0,0,0,0,0,0,0,0,0,0,2},
|
||||
{3,0,0,1,0,0,0,0,0,0,0,0,0,2},
|
||||
{3,0,0,0,1,0,0,0,0,0,0,0,0,2},
|
||||
{3,0,0,0,0,1,0,0,0,0,0,0,0,2},
|
||||
{3,0,0,0,0,0,1,0,0,0,0,0,0,2},
|
||||
{3,0,0,0,0,0,0,1,0,0,0,0,0,2},
|
||||
{3,0,0,0,0,0,0,0,1,0,0,0,0,2},
|
||||
{3,0,0,0,0,0,0,0,0,1,0,0,0,2},
|
||||
{3,0,0,0,0,0,0,0,0,0,1,0,0,2},
|
||||
{3,0,0,0,0,0,0,0,0,0,0,1,0,2},
|
||||
{3,0,0,0,0,0,0,0,0,0,0,0,1,2},
|
||||
{3,1,1,0,0,0,0,0,0,0,0,0,0,2},
|
||||
{3,0,0,1,1,0,0,0,0,0,0,0,0,2},
|
||||
{3,0,0,0,0,1,1,0,0,0,0,0,0,2},
|
||||
{3,0,0,0,0,0,0,1,1,0,0,0,0,2},
|
||||
{3,0,0,0,0,0,0,0,0,1,1,0,0,2},
|
||||
{3,0,0,0,0,0,0,0,0,0,0,1,1,2},
|
||||
{3,1,1,0,0,0,0,1,0,0,0,0,0,2},
|
||||
{3,0,0,1,1,0,0,0,0,1,0,0,0,2},
|
||||
{3,0,0,0,0,1,1,0,0,0,0,1,0,2},
|
||||
{3,1,1,0,0,0,0,1,1,0,0,0,0,2},
|
||||
{3,0,0,1,1,0,0,0,0,1,1,0,0,2},
|
||||
{3,0,0,0,0,1,1,0,0,0,0,1,1,2},
|
||||
{1,1,0,0,0,0,0,0,0,0,0,0,0,2},
|
||||
{1,0,1,0,0,0,0,0,0,0,0,0,0,2},
|
||||
{1,0,0,0,0,0,0,1,0,0,0,0,0,2},
|
||||
{1,0,0,0,0,0,0,0,1,0,0,0,0,2},
|
||||
{1,1,1,0,0,0,0,0,0,0,0,0,0,2},
|
||||
{1,0,0,0,0,0,0,1,1,0,0,0,0,2},
|
||||
{2,1,1,0,0,0,0,0,0,0,0,0,0,2},
|
||||
{2,0,0,1,1,0,0,0,0,0,0,0,0,2},
|
||||
{2,0,0,0,0,0,0,1,1,0,0,0,0,2},
|
||||
{2,0,0,0,0,0,0,0,0,1,1,0,0,2}
|
||||
};
|
||||
|
||||
const uint8_t table_7_3_2_3_3_4_twoCodeword[6][10] = {
|
||||
{3,0,1,2,3,4,0,0,0,1},
|
||||
{3,0,1,2,3,4,5,0,0,1},
|
||||
{2,0,1,2,3,6,0,0,0,2},
|
||||
{2,0,1,2,3,6,8,0,0,2},
|
||||
{2,0,1,2,3,6,7,8,0,2},
|
||||
{2,0,1,2,3,6,7,8,9,2}
|
||||
const uint8_t table_7_3_2_3_3_4_twoCodeword[6][14] = {
|
||||
{3,1,1,1,1,1,0,0,0,0,0,0,0,1},
|
||||
{3,1,1,1,1,1,1,0,0,0,0,0,0,1},
|
||||
{2,1,1,1,1,0,0,1,0,0,0,0,0,2},
|
||||
{2,1,1,1,1,0,0,1,0,1,0,0,0,2},
|
||||
{2,1,1,1,1,0,0,1,1,1,0,0,0,2},
|
||||
{2,1,1,1,1,0,0,1,1,1,1,0,0,2},
|
||||
};
|
||||
|
||||
// table 7.2-1 TS 38.321
|
||||
|
||||
@@ -871,14 +871,16 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
|
||||
(get_softmodem_params()->nsa) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position,
|
||||
dlsch_config_pdu_1_0->number_symbols,
|
||||
dlsch_config_pdu_1_0->start_symbol,
|
||||
mappingtype);
|
||||
mappingtype, 1);
|
||||
dlsch_config_pdu_1_0->dmrsConfigType = (mac->DLbwp[0] != NULL) ?
|
||||
(mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0;
|
||||
|
||||
/* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */
|
||||
if (dlsch_config_pdu_1_0->number_symbols == 2)
|
||||
dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1;
|
||||
else
|
||||
dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 2;
|
||||
dlsch_config_pdu_1_0->dmrs_ports = 1; // only port 0 in case of DCI 1_0
|
||||
/* VRB_TO_PRB_MAPPING */
|
||||
dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved;
|
||||
/* MCS TABLE INDEX */
|
||||
@@ -1062,13 +1064,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
|
||||
|
||||
int mappingtype = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType : ((dlsch_config_pdu_1_1->start_symbol <= 3)? typeA: typeB);
|
||||
|
||||
/* dmrs symbol positions*/
|
||||
dlsch_config_pdu_1_1->dlDmrsSymbPos = fill_dmrs_mask(pdsch_Config,
|
||||
mac->scc? mac->scc->dmrs_TypeA_Position:mac->mib->dmrs_TypeA_Position,
|
||||
dlsch_config_pdu_1_1->number_symbols,
|
||||
dlsch_config_pdu_1_1->start_symbol,
|
||||
mappingtype);
|
||||
|
||||
dlsch_config_pdu_1_1->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? NFAPI_NR_DMRS_TYPE1 : NFAPI_NR_DMRS_TYPE2;
|
||||
|
||||
/* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214,
|
||||
@@ -1132,6 +1127,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
|
||||
uint8_t n_codewords = 1; // FIXME!!!
|
||||
long *max_length = NULL;
|
||||
long *dmrs_type = NULL;
|
||||
dlsch_config_pdu_1_1->n_front_load_symb = 1; // default value
|
||||
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA) {
|
||||
max_length = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength;
|
||||
dmrs_type = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type;
|
||||
@@ -1143,31 +1139,36 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
|
||||
if ((dmrs_type == NULL) && (max_length == NULL)){
|
||||
// Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1
|
||||
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_1[dci->antenna_ports.val][0];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_1[dci->antenna_ports.val][1];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_1[dci->antenna_ports.val][2];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_1[dci->antenna_ports.val][3];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_1[dci->antenna_ports.val][4];
|
||||
dlsch_config_pdu_1_1->dmrs_ports = (table_7_3_2_3_3_1[dci->antenna_ports.val][1] +
|
||||
(table_7_3_2_3_3_1[dci->antenna_ports.val][2]<<1) +
|
||||
(table_7_3_2_3_3_1[dci->antenna_ports.val][3]<<2) +
|
||||
(table_7_3_2_3_3_1[dci->antenna_ports.val][4]<<3));
|
||||
dlsch_config_pdu_1_1->n_front_load_symb = 1;
|
||||
}
|
||||
if ((dmrs_type == NULL) && (max_length != NULL)){
|
||||
// Table 7.3.1.2.2-2: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=2
|
||||
if (n_codewords == 1) {
|
||||
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][0];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][1];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][2];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][3];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][4];
|
||||
dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][5];
|
||||
dlsch_config_pdu_1_1->dmrs_ports = (table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][1] +
|
||||
(table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][2]<<1) +
|
||||
(table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][3]<<2) +
|
||||
(table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][4]<<3) +
|
||||
(table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][5]<<4) +
|
||||
(table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][6]<<5) +
|
||||
(table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][7]<<6) +
|
||||
(table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][8]<<7));
|
||||
dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][9];
|
||||
}
|
||||
if (n_codewords == 2) {
|
||||
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][0];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][1];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][2];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][3];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][4];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][5];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][6];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][7];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][8];
|
||||
dlsch_config_pdu_1_1->dmrs_ports = (table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][1] +
|
||||
(table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][2]<<1) +
|
||||
(table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][3]<<2) +
|
||||
(table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][4]<<3) +
|
||||
(table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][5]<<4) +
|
||||
(table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][6]<<5) +
|
||||
(table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][7]<<6) +
|
||||
(table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][8]<<7));
|
||||
dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][9];
|
||||
}
|
||||
}
|
||||
@@ -1175,44 +1176,67 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
|
||||
// Table 7.3.1.2.2-3: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=1
|
||||
if (n_codewords == 1) {
|
||||
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][0];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][1];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][2];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][3];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][4];
|
||||
dlsch_config_pdu_1_1->dmrs_ports = (table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][1] +
|
||||
(table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][2]<<1) +
|
||||
(table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][3]<<2) +
|
||||
(table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][4]<<3) +
|
||||
(table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][5]<<4) +
|
||||
(table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][6]<<5));
|
||||
}
|
||||
if (n_codewords == 2) {
|
||||
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][0];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][1];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][2];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][3];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][4];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][5];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][6];
|
||||
dlsch_config_pdu_1_1->dmrs_ports = (table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][1] +
|
||||
(table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][2]<<1) +
|
||||
(table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][3]<<2) +
|
||||
(table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][4]<<3) +
|
||||
(table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][5]<<4) +
|
||||
(table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][6]<<5));
|
||||
}
|
||||
}
|
||||
if ((dmrs_type != NULL) && (max_length != NULL)){
|
||||
// Table 7.3.1.2.2-4: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=2
|
||||
if (n_codewords == 1) {
|
||||
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][0];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][1];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][2];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][3];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][4];
|
||||
dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][5];
|
||||
dlsch_config_pdu_1_1->dmrs_ports = (table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][1] +
|
||||
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][2]<<1) +
|
||||
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][3]<<2) +
|
||||
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][4]<<3) +
|
||||
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][5]<<4) +
|
||||
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][6]<<5) +
|
||||
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][7]<<6) +
|
||||
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][8]<<7) +
|
||||
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][9]<<8) +
|
||||
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][10]<<9) +
|
||||
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][11]<<10) +
|
||||
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][12]<<11));
|
||||
dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][13];
|
||||
}
|
||||
if (n_codewords == 2) {
|
||||
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][0];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][1];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][2];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][3];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][4];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][5];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][6];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][7];
|
||||
dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][8];
|
||||
dlsch_config_pdu_1_1->dmrs_ports = (table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][1] +
|
||||
(table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][2]<<1) +
|
||||
(table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][3]<<2) +
|
||||
(table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][4]<<3) +
|
||||
(table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][5]<<4) +
|
||||
(table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][6]<<5) +
|
||||
(table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][7]<<6) +
|
||||
(table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][8]<<7) +
|
||||
(table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][9]<<8) +
|
||||
(table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][10]<<9) +
|
||||
(table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][11]<<10) +
|
||||
(table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][12]<<11));
|
||||
dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][9];
|
||||
}
|
||||
}
|
||||
|
||||
/* dmrs symbol positions*/
|
||||
dlsch_config_pdu_1_1->dlDmrsSymbPos = fill_dmrs_mask(pdsch_Config,
|
||||
mac->scc? mac->scc->dmrs_TypeA_Position:mac->mib->dmrs_TypeA_Position,
|
||||
dlsch_config_pdu_1_1->number_symbols,
|
||||
dlsch_config_pdu_1_1->start_symbol,
|
||||
mappingtype,
|
||||
dlsch_config_pdu_1_1->n_front_load_symb);
|
||||
|
||||
/* TCI */
|
||||
if (mac->dl_config_request.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.tci_present_in_dci == 1){
|
||||
// 0 bit if higher layer parameter tci-PresentInDCI is not enabled
|
||||
|
||||
@@ -326,15 +326,14 @@ void config_common(int Mod_idP, int ssb_SubcarrierOffset, int pdsch_AntennaPorts
|
||||
ssb_SubcarrierOffset_limit = 12;
|
||||
}
|
||||
if (ssb_SubcarrierOffset<ssb_SubcarrierOffset_limit)
|
||||
AssertFatal(sco==(scs_scaling * ssb_SubcarrierOffset),"absoluteFrequencySSB has a subcarrier offset of %d while it should be %d\n",sco/scs_scaling,ssb_SubcarrierOffset);
|
||||
|
||||
AssertFatal(sco==(scs_scaling * (ssb_SubcarrierOffset>>(cfg->ssb_config.scs_common.value))),"absoluteFrequencySSB has a subcarrier offset of %d while it should be %d\n",sco/scs_scaling,ssb_SubcarrierOffset);
|
||||
cfg->ssb_table.ssb_offset_point_a.value = absolute_diff/(12*scs_scaling) - 10; //absoluteFrequencySSB is the central frequency of SSB which is made by 20RBs in total
|
||||
cfg->ssb_table.ssb_offset_point_a.tl.tag = NFAPI_NR_CONFIG_SSB_OFFSET_POINT_A_TAG;
|
||||
cfg->num_tlv++;
|
||||
cfg->ssb_table.ssb_period.value = *scc->ssb_periodicityServingCell;
|
||||
cfg->ssb_table.ssb_period.tl.tag = NFAPI_NR_CONFIG_SSB_PERIOD_TAG;
|
||||
cfg->num_tlv++;
|
||||
cfg->ssb_table.ssb_subcarrier_offset.value = ssb_SubcarrierOffset;
|
||||
cfg->ssb_table.ssb_subcarrier_offset.value = ssb_SubcarrierOffset>>(cfg->ssb_config.scs_common.value);
|
||||
cfg->ssb_table.ssb_subcarrier_offset.tl.tag = NFAPI_NR_CONFIG_SSB_SUBCARRIER_OFFSET_TAG;
|
||||
cfg->num_tlv++;
|
||||
|
||||
@@ -363,8 +362,9 @@ void config_common(int Mod_idP, int ssb_SubcarrierOffset, int pdsch_AntennaPorts
|
||||
cfg->ssb_table.ssb_mask_list[1].ssb_mask.tl.tag = NFAPI_NR_CONFIG_SSB_MASK_TAG;
|
||||
cfg->num_tlv+=2;
|
||||
|
||||
// logical antenna ports
|
||||
cfg->carrier_config.num_tx_ant.value = pdsch_AntennaPorts;
|
||||
AssertFatal(pdsch_AntennaPorts > 0 && pdsch_AntennaPorts < 13, "pdsch_AntennaPorts in 1...12\n");
|
||||
AssertFatal(pdsch_AntennaPorts > 0 && pdsch_AntennaPorts < 33, "pdsch_AntennaPorts in 1...32\n");
|
||||
cfg->carrier_config.num_tx_ant.tl.tag = NFAPI_NR_CONFIG_NUM_TX_ANT_TAG;
|
||||
|
||||
int num_ssb=0;
|
||||
@@ -641,6 +641,12 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
|
||||
sched_ctrl->search_space = get_searchspace(scc, bwpd, target_ss);
|
||||
sched_ctrl->coreset = get_coreset(Mod_idP, scc, bwpd, sched_ctrl->search_space, target_ss);
|
||||
sched_ctrl->maxL = 2;
|
||||
if (CellGroup->spCellConfig &&
|
||||
CellGroup->spCellConfig->spCellConfigDedicated &&
|
||||
CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig &&
|
||||
CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup
|
||||
)
|
||||
compute_csi_bitlen (CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup, UE_info, UE_id, Mod_idP);
|
||||
}
|
||||
}
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_OUT);
|
||||
|
||||
@@ -1300,7 +1300,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
|
||||
nr_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position,
|
||||
nrOfSymbols,
|
||||
startSymbolIndex,
|
||||
mappingtype);
|
||||
mappingtype, 1);
|
||||
|
||||
int x_Overhead = 0;
|
||||
uint8_t tb_scaling = 0;
|
||||
@@ -1541,7 +1541,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
|
||||
scc->dmrs_TypeA_Position,
|
||||
nrOfSymbols,
|
||||
startSymbolIndex,
|
||||
mappingtype);
|
||||
mappingtype, 1);
|
||||
|
||||
uint16_t N_DMRS_SLOT = get_num_dmrs(dlDmrsSymbPos);
|
||||
|
||||
@@ -1582,14 +1582,23 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
|
||||
int rbSize = 0;
|
||||
uint8_t tb_scaling = 0;
|
||||
uint16_t *vrb_map = cc[CC_id].vrb_map;
|
||||
// increase PRBs until we get to BWPSize or TBS is bigger than MAC PDU size
|
||||
do {
|
||||
rbSize++;
|
||||
LOG_D(NR_MAC,"Calling nr_compute_tbs with N_PRB_DMRS %d, N_DMRS_SLOT %d\n",N_PRB_DMRS,N_DMRS_SLOT);
|
||||
LOG_D(NR_MAC,"Msg4 Allocation : RBloop Calling nr_compute_tbs with N_PRB_DMRS %d, N_DMRS_SLOT %d\n",N_PRB_DMRS,N_DMRS_SLOT);
|
||||
harq->tb_size = nr_compute_tbs(nr_get_Qm_dl(mcsIndex, mcsTableIdx),
|
||||
nr_get_code_rate_dl(mcsIndex, mcsTableIdx),
|
||||
rbSize, nrOfSymbols, N_PRB_DMRS * N_DMRS_SLOT, 0, tb_scaling,1) >> 3;
|
||||
} while (rbSize < BWPSize && harq->tb_size < ra->mac_pdu_length);
|
||||
|
||||
// increase mcs until we get a TBS that is big enough to fix the MAC PDU
|
||||
do {
|
||||
mcsIndex++;
|
||||
LOG_D(NR_MAC,"Msg4 Allocation: MCSloop Calling nr_compute_tbs with N_PRB_DMRS %d, N_DMRS_SLOT %d\n",N_PRB_DMRS,N_DMRS_SLOT);
|
||||
harq->tb_size = nr_compute_tbs(nr_get_Qm_dl(mcsIndex, mcsTableIdx),
|
||||
nr_get_code_rate_dl(mcsIndex, mcsTableIdx),
|
||||
rbSize, nrOfSymbols, N_PRB_DMRS * N_DMRS_SLOT, 0, tb_scaling,1) >> 3;
|
||||
} while (harq->tb_size < ra->mac_pdu_length && mcsIndex<10);
|
||||
AssertFatal(mcsIndex<10,"Cannot fit Msg4 in %d PRBs with QPSK\n",(int)BWPSize);
|
||||
int i = 0;
|
||||
while ((i < rbSize) && (rbStart + rbSize <= BWPSize)) {
|
||||
if (vrb_map[BWPStart + rbStart + i]) {
|
||||
@@ -1710,7 +1719,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
|
||||
dci_payload.pucch_resource_indicator = delta_PRI; // This is delta_PRI from 9.2.1 in 38.213
|
||||
dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch->timing_indicator;
|
||||
|
||||
LOG_D(NR_MAC,
|
||||
LOG_I(NR_MAC,
|
||||
"[RAPROC] DCI 1_0 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d pucchres %d harqtiming %d\n",
|
||||
dci_payload.frequency_domain_assignment.val,
|
||||
pdsch_pdu_rel15->rbStart,
|
||||
@@ -1723,7 +1732,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
|
||||
dci_payload.pucch_resource_indicator,
|
||||
dci_payload.pdsch_to_harq_feedback_timing_indicator.val);
|
||||
|
||||
LOG_D(NR_MAC,
|
||||
LOG_I(NR_MAC,
|
||||
"[RAPROC] DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d, BWPsize %d\n",
|
||||
pdcch_pdu_rel15->dci_pdu[0].RNTI,
|
||||
NR_RNTI_TC,
|
||||
|
||||
@@ -379,7 +379,6 @@ uint32_t schedule_control_sib1(module_id_t module_id,
|
||||
// Calculate number of PRB_DMRS
|
||||
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData * 6;
|
||||
uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos);
|
||||
|
||||
LOG_D(MAC,"dlDmrsSymbPos %x\n",dlDmrsSymbPos);
|
||||
int rbSize = 0;
|
||||
uint32_t TBS = 0;
|
||||
@@ -403,14 +402,14 @@ uint32_t schedule_control_sib1(module_id_t module_id,
|
||||
gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize = rbSize;
|
||||
gNB_mac->sched_ctrlCommon->sched_pdsch.rbStart = 0;
|
||||
|
||||
LOG_D(MAC,"mcs = %i\n", gNB_mac->sched_ctrlCommon->sched_pdsch.mcs);
|
||||
LOG_D(MAC,"startSymbolIndex = %i\n", startSymbolIndex);
|
||||
LOG_D(MAC,"nrOfSymbols = %i\n", nrOfSymbols);
|
||||
LOG_D(MAC, "rbSize = %i\n", gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize);
|
||||
LOG_D(MAC,"TBS = %i\n", TBS);
|
||||
LOG_D(MAC,"dmrs_length %d\n",dmrs_length);
|
||||
LOG_D(MAC,"N_PRB_DMRS = %d\n",N_PRB_DMRS);
|
||||
LOG_D(MAC,"mappingtype = %d\n", mappingtype);
|
||||
LOG_D(NR_MAC,"mcs = %i\n", gNB_mac->sched_ctrlCommon->sched_pdsch.mcs);
|
||||
LOG_D(NR_MAC,"startSymbolIndex = %i\n", startSymbolIndex);
|
||||
LOG_D(NR_MAC,"nrOfSymbols = %i\n", nrOfSymbols);
|
||||
LOG_D(NR_MAC, "rbSize = %i\n", gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize);
|
||||
LOG_D(NR_MAC,"TBS = %i\n", TBS);
|
||||
LOG_D(NR_MAC,"dmrs_length %d\n",dmrs_length);
|
||||
LOG_D(NR_MAC,"N_PRB_DMRS = %d\n",N_PRB_DMRS);
|
||||
LOG_D(NR_MAC,"mappingtype = %d\n", mappingtype);
|
||||
|
||||
// Mark the corresponding RBs as used
|
||||
for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; rb++) {
|
||||
@@ -490,7 +489,9 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
|
||||
pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
|
||||
pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols;
|
||||
pdsch_pdu_rel15->dlDmrsSymbPos = dlDmrsSymbPos;
|
||||
LOG_D(MAC,"dlDmrsSymbPos = 0x%x\n", pdsch_pdu_rel15->dlDmrsSymbPos);
|
||||
LOG_D(NR_MAC,"sib1:bwpStart %d, bwpSize %d\n",pdsch_pdu_rel15->BWPStart,pdsch_pdu_rel15->BWPSize);
|
||||
LOG_D(NR_MAC,"sib1:rbStart %d, rbSize %d\n",pdsch_pdu_rel15->rbStart,pdsch_pdu_rel15->rbSize);
|
||||
LOG_D(NR_MAC,"sib1:dlDmrsSymbPos = 0x%x\n", pdsch_pdu_rel15->dlDmrsSymbPos);
|
||||
|
||||
/* Fill PDCCH DL DCI PDU */
|
||||
nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci];
|
||||
@@ -610,8 +611,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
|
||||
|
||||
// TODO: There are exceptions to this in table 5.1.2.1.1-4,5 (Default time domain allocation tables B, C)
|
||||
int mappingtype = (startSymbolIndex <= 3)? typeA: typeB;
|
||||
|
||||
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype);
|
||||
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype, 1);
|
||||
|
||||
// Configure sched_ctrlCommon for SIB1
|
||||
uint32_t TBS = schedule_control_sib1(module_idP, CC_id,
|
||||
|
||||
@@ -551,7 +551,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
|
||||
int rbStart = 0; // start wrt BWPstart
|
||||
|
||||
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
|
||||
const long f = (sched_ctrl->active_bwp ||bwpd) ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
|
||||
|
||||
int rbSize = 0;
|
||||
const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot];
|
||||
AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n");
|
||||
@@ -572,7 +572,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
|
||||
/* check whether we need to switch the TDA allocation since the last
|
||||
* (re-)transmission */
|
||||
if (ps->time_domain_allocation != tda)
|
||||
nr_set_pdsch_semi_static(scc, cg, sched_ctrl->active_bwp, bwpd, tda, f, ps);
|
||||
nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, ps->nrOfLayers, sched_ctrl, ps);
|
||||
} else {
|
||||
/* the retransmission will use a different time domain allocation, check
|
||||
* that we have enough resources */
|
||||
@@ -580,13 +580,13 @@ bool allocate_dl_retransmission(module_id_t module_id,
|
||||
rbStart++;
|
||||
while (rbStart + rbSize < bwpSize && rballoc_mask[rbStart + rbSize])
|
||||
rbSize++;
|
||||
NR_pdsch_semi_static_t temp_ps;
|
||||
temp_ps.nrOfLayers = 1;
|
||||
nr_set_pdsch_semi_static(scc, cg, sched_ctrl->active_bwp, bwpd, tda, f, &temp_ps);
|
||||
NR_pdsch_semi_static_t temp_ps = *ps;
|
||||
nr_set_pdsch_semi_static(scc, cg, sched_ctrl->active_bwp, bwpd,tda, ps->nrOfLayers, sched_ctrl, &temp_ps);
|
||||
uint32_t new_tbs;
|
||||
uint16_t new_rbSize;
|
||||
bool success = nr_find_nb_rb(retInfo->Qm,
|
||||
retInfo->R,
|
||||
temp_ps.nrOfLayers,
|
||||
temp_ps.nrOfSymbols,
|
||||
temp_ps.N_PRB_DMRS * temp_ps.N_DMRS_SLOT,
|
||||
retInfo->tb_size,
|
||||
@@ -662,6 +662,7 @@ void pf_dl(module_id_t module_id,
|
||||
float coeff_ue[MAX_MOBILES_PER_GNB];
|
||||
// UEs that could be scheduled
|
||||
int ue_array[MAX_MOBILES_PER_GNB];
|
||||
int layers[MAX_MOBILES_PER_GNB];
|
||||
NR_list_t UE_sched = { .head = -1, .next = ue_array, .tail = -1, .len = MAX_MOBILES_PER_GNB };
|
||||
|
||||
/* Loop UE_info->list to check retransmission */
|
||||
@@ -674,6 +675,8 @@ void pf_dl(module_id_t module_id,
|
||||
/* get the PID of a HARQ process awaiting retrnasmission, or -1 otherwise */
|
||||
sched_pdsch->dl_harq_pid = sched_ctrl->retrans_dl_harq.head;
|
||||
|
||||
layers[UE_id] = ps->nrOfLayers; // initialization of layers to the previous value in the strcuture
|
||||
|
||||
/* Calculate Throughput */
|
||||
const float a = 0.0005f; // corresponds to 200ms window
|
||||
const uint32_t b = UE_info->mac_stats[UE_id].dlsch_current_bytes;
|
||||
@@ -697,9 +700,19 @@ void pf_dl(module_id_t module_id,
|
||||
continue;
|
||||
|
||||
/* Calculate coeff */
|
||||
ps->nrOfLayers = 1;
|
||||
set_dl_mcs(sched_pdsch,sched_ctrl,&mac->dl_max_mcs,ps->mcsTableIdx);
|
||||
sched_pdsch->mcs = get_mcs_from_bler(module_id, /* CC_id = */ 0, frame, slot, UE_id);
|
||||
uint32_t tbs = pf_tbs[ps->mcsTableIdx][sched_pdsch->mcs];
|
||||
layers[UE_id] = set_dl_nrOfLayers(sched_ctrl);
|
||||
const uint8_t Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
|
||||
const uint16_t R = nr_get_code_rate_dl(sched_pdsch->mcs, ps->mcsTableIdx);
|
||||
uint32_t tbs = nr_compute_tbs(Qm,
|
||||
R,
|
||||
1, /* rbSize */
|
||||
10, /* hypothetical number of slots */
|
||||
0, /* N_PRB_DMRS * N_DMRS_SLOT */
|
||||
0 /* N_PRB_oh, 0 for initialBWP */,
|
||||
0 /* tb_scaling */,
|
||||
layers[UE_id]) >> 3;
|
||||
coeff_ue[UE_id] = (float) tbs / thr_ue[UE_id];
|
||||
LOG_D(NR_MAC,"b %d, thr_ue[%d] %f, tbs %d, coeff_ue[%d] %f\n",
|
||||
b, UE_id, thr_ue[UE_id], tbs, UE_id, coeff_ue[UE_id]);
|
||||
@@ -787,9 +800,9 @@ void pf_dl(module_id_t module_id,
|
||||
AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n");
|
||||
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
|
||||
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
|
||||
const long f = (sched_ctrl->active_bwp || bwpd) ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
|
||||
if (ps->time_domain_allocation != tda)
|
||||
nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, f, ps);
|
||||
if (ps->nrOfLayers != layers[UE_id] ||
|
||||
ps->time_domain_allocation != tda)
|
||||
nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, layers[UE_id], sched_ctrl, ps);
|
||||
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
|
||||
sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, ps->mcsTableIdx);
|
||||
sched_pdsch->pucch_allocation = alloc;
|
||||
@@ -798,6 +811,7 @@ void pf_dl(module_id_t module_id,
|
||||
const int oh = 3 + 2 * (frame == (sched_ctrl->ta_frame + 10) % 1024);
|
||||
nr_find_nb_rb(sched_pdsch->Qm,
|
||||
sched_pdsch->R,
|
||||
ps->nrOfLayers,
|
||||
ps->nrOfSymbols,
|
||||
ps->N_PRB_DMRS * ps->N_DMRS_SLOT,
|
||||
sched_ctrl->num_total_bytes + oh,
|
||||
@@ -969,8 +983,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
|
||||
harq->is_waiting = true;
|
||||
UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++;
|
||||
|
||||
LOG_D(NR_MAC,
|
||||
"%4d.%2d [DLSCH/PDSCH/PUCCH] UE %d RNTI %04x DCI L %d start %3d RBs %3d startSymbol %2d nb_symbol %2d dmrspos %x MCS %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d dl_data_to_ULACK %d (%d.%d) PUCCH allocation %d TPC %d\n",
|
||||
LOG_D(NR_MAC,"%4d.%2d [DLSCH/PDSCH/PUCCH] UE %d RNTI %04x DCI L %d start %3d RBs %3d startSymbol %2d nb_symbol %2d dmrspos %x MCS %2d nrOfLayers %d TBS %4d HARQ PID %2d round %d RV %d NDI %d dl_data_to_ULACK %d (%d.%d) PUCCH allocation %d TPC %d\n",
|
||||
frame,
|
||||
slot,
|
||||
UE_id,
|
||||
@@ -982,6 +995,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
|
||||
ps->nrOfSymbols,
|
||||
ps->dl_dmrs_symb_pos,
|
||||
sched_pdsch->mcs,
|
||||
nrOfLayers,
|
||||
TBS,
|
||||
current_harq_pid,
|
||||
harq->round,
|
||||
|
||||
@@ -166,7 +166,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
|
||||
scc->dmrs_TypeA_Position,
|
||||
NrOfSymbols,
|
||||
StartSymbolIndex,
|
||||
mappingtype);
|
||||
mappingtype, 1);
|
||||
|
||||
/*
|
||||
AssertFatal(k0==0,"k0 is not zero for Initial DL BWP TimeDomain Alloc\n");
|
||||
@@ -374,11 +374,9 @@ void nr_preprocessor_phytest(module_id_t module_id,
|
||||
sched_pdsch->rbStart = rbStart;
|
||||
sched_pdsch->rbSize = rbSize;
|
||||
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1;
|
||||
const long f = sched_ctrl->active_bwp ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
|
||||
ps->nrOfLayers = target_dl_Nl;
|
||||
if (ps->time_domain_allocation != tda)
|
||||
nr_set_pdsch_semi_static(
|
||||
scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, NULL, tda, f, ps);
|
||||
|
||||
if (ps->time_domain_allocation != tda || ps->nrOfLayers != target_dl_Nl)
|
||||
nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, NULL, tda, target_dl_Nl, sched_ctrl, ps);
|
||||
|
||||
sched_pdsch->mcs = target_dl_mcs;
|
||||
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
|
||||
|
||||
@@ -113,6 +113,20 @@ uint8_t nr_ss_first_symb_idx_scs_120_120_mux3[4] = {4,8,2,6};
|
||||
uint8_t nr_max_number_of_candidates_per_slot[4] = {44, 36, 22, 20};
|
||||
uint8_t nr_max_number_of_cces_per_slot[4] = {56, 56, 48, 32};
|
||||
|
||||
// CQI TABLES
|
||||
// Table 1 (38.214 5.2.2.1-2)
|
||||
uint16_t cqi_table1[16][2] = {{0,0},{2,78},{2,120},{2,193},{2,308},{2,449},{2,602},{4,378},
|
||||
{4,490},{4,616},{6,466},{6,567},{6,666},{6,772},{6,873},{6,948}};
|
||||
|
||||
// Table 2 (38.214 5.2.2.1-3)
|
||||
uint16_t cqi_table2[16][2] = {{0,0},{2,78},{2,193},{2,449},{4,378},{4,490},{4,616},{6,466},
|
||||
{6,567},{6,666},{6,772},{6,873},{8,711},{8,797},{8,885},{8,948}};
|
||||
|
||||
// Table 2 (38.214 5.2.2.1-4)
|
||||
uint16_t cqi_table3[16][2] = {{0,0},{2,30},{2,50},{2,78},{2,120},{2,193},{2,308},{2,449},
|
||||
{2,602},{4,378},{4,490},{4,616},{6,466},{6,567},{6,666},{6,772}};
|
||||
|
||||
|
||||
static inline uint8_t get_max_candidates(uint8_t scs) {
|
||||
AssertFatal(scs<4, "Invalid PDCCH subcarrier spacing %d\n", scs);
|
||||
return (nr_max_number_of_candidates_per_slot[scs]);
|
||||
@@ -123,6 +137,59 @@ static inline uint8_t get_max_cces(uint8_t scs) {
|
||||
return (nr_max_number_of_cces_per_slot[scs]);
|
||||
}
|
||||
|
||||
uint8_t set_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl) {
|
||||
|
||||
// TODO check this but it should be enough for now
|
||||
// if there is not csi report RI is 0 from initialization
|
||||
return (sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.ri + 1);
|
||||
|
||||
}
|
||||
|
||||
void set_dl_mcs(NR_sched_pdsch_t *sched_pdsch,
|
||||
NR_UE_sched_ctrl_t *sched_ctrl,
|
||||
uint8_t *target_mcs,
|
||||
uint8_t mcs_table_idx) {
|
||||
|
||||
if (sched_ctrl->set_mcs) {
|
||||
// TODO for wideband case and multiple TB
|
||||
int cqi_idx = sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.wb_cqi_1tb;
|
||||
uint16_t target_coderate,target_qm;
|
||||
if (cqi_idx>0) {
|
||||
int cqi_table = sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.cqi_table;
|
||||
AssertFatal(cqi_table == mcs_table_idx, "Indices of MCS tables don't correspond\n");
|
||||
switch (cqi_table) {
|
||||
case 0:
|
||||
target_qm = cqi_table1[cqi_idx][0];
|
||||
target_coderate = cqi_table1[cqi_idx][1];
|
||||
break;
|
||||
case 1:
|
||||
target_qm = cqi_table2[cqi_idx][0];
|
||||
target_coderate = cqi_table2[cqi_idx][1];
|
||||
break;
|
||||
case 2:
|
||||
target_qm = cqi_table3[cqi_idx][0];
|
||||
target_coderate = cqi_table3[cqi_idx][1];
|
||||
break;
|
||||
default:
|
||||
AssertFatal(1==0,"Invalid cqi table index %d\n",cqi_table);
|
||||
}
|
||||
int max_mcs = 28;
|
||||
int R,Qm;
|
||||
if (mcs_table_idx == 1)
|
||||
max_mcs = 27;
|
||||
for (int i=0; i<=max_mcs; i++) {
|
||||
R = nr_get_code_rate_dl(i, mcs_table_idx);
|
||||
Qm = nr_get_Qm_dl(i, mcs_table_idx);
|
||||
if ((Qm == target_qm) && (target_coderate <= R)) {
|
||||
*target_mcs = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
sched_ctrl->set_mcs = FALSE;
|
||||
}
|
||||
}
|
||||
|
||||
void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps) {
|
||||
|
||||
//TODO first basic implementation of dmrs port selection
|
||||
@@ -130,23 +197,29 @@ void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps) {
|
||||
// for now it assumes a selection of Nl consecutive dmrs ports
|
||||
// and a single front loaded symbol
|
||||
// dmrs_ports_id is the index of Tables 7.3.1.2.2-1/2/3/4
|
||||
// number of front loaded symbols need to be consistent with maxLength
|
||||
// when a more complete implementation is done
|
||||
|
||||
switch (ps->nrOfLayers) {
|
||||
case 1:
|
||||
ps->dmrs_ports_id = 0;
|
||||
ps->numDmrsCdmGrpsNoData = 1;
|
||||
ps->frontloaded_symb = 1;
|
||||
break;
|
||||
case 2:
|
||||
ps->dmrs_ports_id = 2;
|
||||
ps->numDmrsCdmGrpsNoData = 1;
|
||||
ps->frontloaded_symb = 1;
|
||||
break;
|
||||
case 3:
|
||||
ps->dmrs_ports_id = 9;
|
||||
ps->numDmrsCdmGrpsNoData = 2;
|
||||
ps->frontloaded_symb = 1;
|
||||
break;
|
||||
case 4:
|
||||
ps->dmrs_ports_id = 10;
|
||||
ps->numDmrsCdmGrpsNoData = 2;
|
||||
ps->frontloaded_symb = 1;
|
||||
break;
|
||||
default:
|
||||
AssertFatal(1==0,"Number of layers %d\n not supported or not valid\n",ps->nrOfLayers);
|
||||
@@ -257,6 +330,7 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
|
||||
|
||||
bool nr_find_nb_rb(uint16_t Qm,
|
||||
uint16_t R,
|
||||
uint8_t nrOfLayers,
|
||||
uint16_t nb_symb_sch,
|
||||
uint16_t nb_dmrs_prb,
|
||||
uint32_t bytes,
|
||||
@@ -266,7 +340,7 @@ bool nr_find_nb_rb(uint16_t Qm,
|
||||
{
|
||||
/* is the maximum (not even) enough? */
|
||||
*nb_rb = nb_rb_max;
|
||||
*tbs = nr_compute_tbs(Qm, R, *nb_rb, nb_symb_sch, nb_dmrs_prb, 0, 0, 1) >> 3;
|
||||
*tbs = nr_compute_tbs(Qm, R, *nb_rb, nb_symb_sch, nb_dmrs_prb, 0, 0, nrOfLayers) >> 3;
|
||||
/* check whether it does not fit, or whether it exactly fits. Some algorithms
|
||||
* might depend on the return value! */
|
||||
if (bytes > *tbs)
|
||||
@@ -276,7 +350,7 @@ bool nr_find_nb_rb(uint16_t Qm,
|
||||
|
||||
/* is the minimum enough? */
|
||||
*nb_rb = 5;
|
||||
*tbs = nr_compute_tbs(Qm, R, *nb_rb, nb_symb_sch, nb_dmrs_prb, 0, 0, 1) >> 3;
|
||||
*tbs = nr_compute_tbs(Qm, R, *nb_rb, nb_symb_sch, nb_dmrs_prb, 0, 0, nrOfLayers) >> 3;
|
||||
if (bytes <= *tbs)
|
||||
return true;
|
||||
|
||||
@@ -285,7 +359,7 @@ bool nr_find_nb_rb(uint16_t Qm,
|
||||
int hi = nb_rb_max;
|
||||
int lo = 1;
|
||||
for (int p = (hi + lo) / 2; lo + 1 < hi; p = (hi + lo) / 2) {
|
||||
const uint32_t TBS = nr_compute_tbs(Qm, R, p, nb_symb_sch, nb_dmrs_prb, 0, 0, 1) >> 3;
|
||||
const uint32_t TBS = nr_compute_tbs(Qm, R, p, nb_symb_sch, nb_dmrs_prb, 0, 0, nrOfLayers) >> 3;
|
||||
if (bytes == TBS) {
|
||||
hi = p;
|
||||
break;
|
||||
@@ -296,7 +370,7 @@ bool nr_find_nb_rb(uint16_t Qm,
|
||||
}
|
||||
}
|
||||
*nb_rb = hi;
|
||||
*tbs = nr_compute_tbs(Qm, R, *nb_rb, nb_symb_sch, nb_dmrs_prb, 0, 0, 1) >> 3;
|
||||
*tbs = nr_compute_tbs(Qm, R, *nb_rb, nb_symb_sch, nb_dmrs_prb, 0, 0, nrOfLayers) >> 3;
|
||||
/* return whether we could allocate all bytes and stay below nb_rb_max */
|
||||
return *tbs >= bytes && *nb_rb <= nb_rb_max;
|
||||
}
|
||||
@@ -306,18 +380,12 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
|
||||
const NR_BWP_Downlink_t *bwp,
|
||||
const NR_BWP_DownlinkDedicated_t *bwpd0,
|
||||
int tda,
|
||||
const long dci_format,
|
||||
uint8_t layers,
|
||||
NR_UE_sched_ctrl_t *sched_ctrl,
|
||||
NR_pdsch_semi_static_t *ps)
|
||||
{
|
||||
ps->time_domain_allocation = tda;
|
||||
bool reset_dmrs = false;
|
||||
|
||||
const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = bwp ?
|
||||
bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList :
|
||||
scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
|
||||
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
|
||||
const int mapping_type = tdaList->list.array[tda]->mappingType;
|
||||
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
|
||||
SLIV2SL(startSymbolAndLength, &ps->startSymbolIndex, &ps->nrOfSymbols);
|
||||
NR_BWP_DownlinkDedicated_t *bwpd;
|
||||
|
||||
if (bwp && bwp->bwp_Dedicated) {
|
||||
@@ -326,8 +394,8 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
|
||||
bwpd = (NR_BWP_DownlinkDedicated_t*)bwpd0;
|
||||
}
|
||||
|
||||
ps->mcsTableIdx = 0;
|
||||
if (bwpd->pdsch_Config &&
|
||||
if (bwpd &&
|
||||
bwpd->pdsch_Config &&
|
||||
bwpd->pdsch_Config->choice.setup &&
|
||||
bwpd->pdsch_Config->choice.setup->mcs_Table) {
|
||||
if (*bwpd->pdsch_Config->choice.setup->mcs_Table == 0)
|
||||
@@ -337,15 +405,60 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
|
||||
}
|
||||
else ps->mcsTableIdx = 0;
|
||||
|
||||
if(dci_format == 0) // format 1_0
|
||||
ps->numDmrsCdmGrpsNoData = (ps->nrOfSymbols == 2 ? 1 : 2);
|
||||
else
|
||||
set_dl_dmrs_ports(ps);
|
||||
ps->dmrsConfigType = bwp!=NULL ? (bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0;
|
||||
NR_PDSCH_Config_t *pdsch_Config=NULL;
|
||||
if (bwpd) pdsch_Config = bwpd->pdsch_Config->choice.setup;
|
||||
LOG_D(NR_MAC,"tda %d, ps->time_domain_allocation %d,layers %d, ps->nrOfLayers %d, pdsch_config %p\n",tda,ps->time_domain_allocation,layers,ps->nrOfLayers,pdsch_Config);
|
||||
if (ps->time_domain_allocation != tda) {
|
||||
reset_dmrs = true;
|
||||
ps->time_domain_allocation = tda;
|
||||
const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = bwp ?
|
||||
bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList :
|
||||
scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
|
||||
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
|
||||
ps->mapping_type = tdaList->list.array[tda]->mappingType;
|
||||
if (pdsch_Config) {
|
||||
if (ps->mapping_type == NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB)
|
||||
ps->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type == NULL ? 0 : 1;
|
||||
else
|
||||
ps->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
|
||||
}
|
||||
else
|
||||
ps->dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
|
||||
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
|
||||
SLIV2SL(startSymbolAndLength, &ps->startSymbolIndex, &ps->nrOfSymbols);
|
||||
}
|
||||
|
||||
const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats;
|
||||
int dci_format;
|
||||
if (sched_ctrl->search_space) {
|
||||
dci_format = f ? NR_DL_DCI_FORMAT_1_1 : NR_DL_DCI_FORMAT_1_0;
|
||||
}
|
||||
else {
|
||||
dci_format = NR_DL_DCI_FORMAT_1_0;
|
||||
}
|
||||
if (dci_format == NR_DL_DCI_FORMAT_1_0) {
|
||||
if (ps->nrOfSymbols == 2)
|
||||
ps->numDmrsCdmGrpsNoData = 1;
|
||||
else
|
||||
ps->numDmrsCdmGrpsNoData = 2;
|
||||
ps->dmrs_ports_id = 0;
|
||||
ps->frontloaded_symb = 1;
|
||||
ps->nrOfLayers = 1;
|
||||
}
|
||||
else {
|
||||
LOG_D(NR_MAC,"checking layers\n");
|
||||
if (ps->nrOfLayers != layers) {
|
||||
reset_dmrs = true;
|
||||
ps->nrOfLayers = layers;
|
||||
set_dl_dmrs_ports(ps);
|
||||
}
|
||||
}
|
||||
|
||||
ps->N_PRB_DMRS = ps->numDmrsCdmGrpsNoData * (ps->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4);
|
||||
ps->dl_dmrs_symb_pos = fill_dmrs_mask(bwpd ? bwpd->pdsch_Config->choice.setup : NULL, scc->dmrs_TypeA_Position, ps->nrOfSymbols, ps->startSymbolIndex, mapping_type);
|
||||
ps->N_DMRS_SLOT = get_num_dmrs(ps->dl_dmrs_symb_pos);
|
||||
if (reset_dmrs) {
|
||||
ps->dl_dmrs_symb_pos = fill_dmrs_mask(bwpd ? bwpd->pdsch_Config->choice.setup : NULL, scc->dmrs_TypeA_Position, ps->nrOfSymbols, ps->startSymbolIndex, ps->mapping_type, ps->frontloaded_symb);
|
||||
ps->N_DMRS_SLOT = get_num_dmrs(ps->dl_dmrs_symb_pos);
|
||||
}
|
||||
LOG_D(NR_MAC,"bwpd0 %p, bwpd %p : Filling dmrs info, ps->N_PRB_DMRS %d, ps->dl_dmrs_symb_pos %x, ps->N_DMRS_SLOT %d\n",bwpd0,bwpd,ps->N_PRB_DMRS,ps->dl_dmrs_symb_pos,ps->N_DMRS_SLOT);
|
||||
}
|
||||
|
||||
@@ -1946,10 +2059,16 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG
|
||||
add_nr_list(&UE_info->list, UE_id);
|
||||
memset(&UE_info->mac_stats[UE_id], 0, sizeof(NR_mac_stats_t));
|
||||
set_Y(UE_info->Y[UE_id], rntiP);
|
||||
if (CellGroup && CellGroup->spCellConfig && CellGroup->spCellConfig->spCellConfigDedicated)
|
||||
if (CellGroup &&
|
||||
CellGroup->spCellConfig &&
|
||||
CellGroup->spCellConfig->spCellConfigDedicated &&
|
||||
CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig &&
|
||||
CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup
|
||||
)
|
||||
compute_csi_bitlen (CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup, UE_info, UE_id, mod_idP);
|
||||
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
|
||||
memset(sched_ctrl, 0, sizeof(*sched_ctrl));
|
||||
sched_ctrl->set_mcs = TRUE;
|
||||
sched_ctrl->lcid_mask = 0;
|
||||
if (!get_softmodem_params()->phy_test && !get_softmodem_params()->do_ra && !get_softmodem_params()->sa) {
|
||||
sched_ctrl->lcid_mask = 1<<DL_SCH_LCID_DTCH;
|
||||
@@ -2231,8 +2350,10 @@ void nr_csirs_scheduling(int Mod_idP,
|
||||
int period, offset;
|
||||
|
||||
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
|
||||
NR_BWP_Downlink_t *bwp=CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[sched_ctrl->active_bwp->bwp_Id-1];
|
||||
|
||||
NR_BWP_Downlink_t *bwp=sched_ctrl->active_bwp;
|
||||
NR_BWP_t *genericParameters = sched_ctrl->active_bwp ?
|
||||
&sched_ctrl->active_bwp->bwp_Common->genericParameters:
|
||||
&gNB_mac->common_channels[0].ServingCellConfigCommon->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
|
||||
for (int id = 0; id < csi_measconfig->nzp_CSI_RS_ResourceToAddModList->list.count; id++){
|
||||
nzpcsi = csi_measconfig->nzp_CSI_RS_ResourceToAddModList->list.array[id];
|
||||
NR_CSI_RS_ResourceMapping_t resourceMapping = nzpcsi->resourceMapping;
|
||||
@@ -2240,7 +2361,7 @@ void nr_csirs_scheduling(int Mod_idP,
|
||||
|
||||
if((frame*n_slots_frame+slot-offset)%period == 0) {
|
||||
|
||||
LOG_I(MAC,"Scheduling CSI-RS in frame %d slot %d\n",frame,slot);
|
||||
LOG_D(NR_MAC,"Scheduling CSI-RS in frame %d slot %d\n",frame,slot);
|
||||
|
||||
nfapi_nr_dl_tti_request_pdu_t *dl_tti_csirs_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
|
||||
memset((void*)dl_tti_csirs_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
|
||||
@@ -2249,11 +2370,11 @@ void nr_csirs_scheduling(int Mod_idP,
|
||||
|
||||
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t *csirs_pdu_rel15 = &dl_tti_csirs_pdu->csi_rs_pdu.csi_rs_pdu_rel15;
|
||||
|
||||
csirs_pdu_rel15->bwp_size = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||
csirs_pdu_rel15->bwp_start = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||
csirs_pdu_rel15->subcarrier_spacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
|
||||
if (bwp->bwp_Common->genericParameters.cyclicPrefix)
|
||||
csirs_pdu_rel15->cyclic_prefix = *bwp->bwp_Common->genericParameters.cyclicPrefix;
|
||||
csirs_pdu_rel15->bwp_size = NRRIV2BW(genericParameters->locationAndBandwidth,275);
|
||||
csirs_pdu_rel15->bwp_start = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth,275);
|
||||
csirs_pdu_rel15->subcarrier_spacing = genericParameters->subcarrierSpacing;
|
||||
if (genericParameters->cyclicPrefix)
|
||||
csirs_pdu_rel15->cyclic_prefix = *genericParameters->cyclicPrefix;
|
||||
else
|
||||
csirs_pdu_rel15->cyclic_prefix = 0;
|
||||
|
||||
|
||||
@@ -49,7 +49,8 @@ void nr_fill_nfapi_pucch(module_id_t mod_id,
|
||||
&RC.nrmac[mod_id]->UL_tti_req_ahead[0][pucch->ul_slot];
|
||||
AssertFatal(future_ul_tti_req->SFN == pucch->frame
|
||||
&& future_ul_tti_req->Slot == pucch->ul_slot,
|
||||
"future UL_tti_req's frame.slot %d.%d does not match PUCCH %d.%d\n",
|
||||
"Current %d.%d : future UL_tti_req's frame.slot %d.%d does not match PUCCH %d.%d\n",
|
||||
frame,slot,
|
||||
future_ul_tti_req->SFN,
|
||||
future_ul_tti_req->Slot,
|
||||
pucch->frame,
|
||||
@@ -161,7 +162,7 @@ void nr_schedule_pucch(int Mod_idP,
|
||||
|
||||
|
||||
//! Calculating number of bits set
|
||||
uint8_t number_of_bits_set (uint8_t buf,uint8_t * max_ri){
|
||||
uint8_t number_of_bits_set (uint8_t buf){
|
||||
uint8_t nb_of_bits_set = 0;
|
||||
uint8_t mask = 0xff;
|
||||
uint8_t index = 0;
|
||||
@@ -172,14 +173,13 @@ uint8_t number_of_bits_set (uint8_t buf,uint8_t * max_ri){
|
||||
|
||||
mask>>=1;
|
||||
}
|
||||
*max_ri = 8-index;
|
||||
return nb_of_bits_set;
|
||||
}
|
||||
|
||||
|
||||
void compute_rsrp_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
|
||||
uint8_t nb_resources,
|
||||
nr_csi_report_t *csi_report){
|
||||
nr_csi_report_t *csi_report) {
|
||||
|
||||
if (NR_CSI_ReportConfig__groupBasedBeamReporting_PR_disabled == csi_reportconfig->groupBasedBeamReporting.present) {
|
||||
if (NULL != csi_reportconfig->groupBasedBeamReporting.choice.disabled->nrofReportedRS)
|
||||
@@ -211,42 +211,24 @@ uint8_t compute_ri_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
|
||||
nr_csi_report_t *csi_report){
|
||||
|
||||
struct NR_CodebookConfig *codebookConfig = csi_reportconfig->codebookConfig;
|
||||
uint8_t nb_allowed_ri, ri_restriction,ri_bitlen;
|
||||
uint8_t max_ri = 0;
|
||||
uint8_t nb_allowed_ri, ri_bitlen;
|
||||
uint8_t ri_restriction = 0;
|
||||
|
||||
if (codebookConfig == NULL) {
|
||||
csi_report->csi_meas_bitlen.ri_bitlen=0;
|
||||
return max_ri;
|
||||
return ri_restriction;
|
||||
}
|
||||
|
||||
// codebook type1 single panel
|
||||
if (NR_CodebookConfig__codebookType__type1__subType_PR_typeI_SinglePanel==codebookConfig->codebookType.choice.type1->subType.present){
|
||||
struct NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel *type1single = codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel;
|
||||
if (type1single->nrOfAntennaPorts.present == NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts_PR_two){
|
||||
// two antenna ports case
|
||||
/* From Spec 38.212
|
||||
* If the higher layer parameter nrofCQIsPerReport=1, nRI in Table 6.3.1.1.2-3 is the number of allowed rank indicator
|
||||
* values in the 4 LSBs of the higher layer parameter typeI-SinglePanel-ri-Restriction according to Subclause 5.2.2.2.1 [6,
|
||||
* TS 38.214]; otherwise nRI in Table 6.3.1.1.2-3 is the number of allowed rank indicator values according to Subclause
|
||||
* 5.2.2.2.1 [6, TS 38.214].
|
||||
*
|
||||
* But from Current RRC ASN structures nrofCQIsPerReport is not present. Present a dummy variable is present so using it to
|
||||
* calculate RI for antennas equal or more than two.
|
||||
* */
|
||||
AssertFatal (NULL!=csi_reportconfig->dummy, "nrofCQIsPerReport is not present");
|
||||
|
||||
ri_restriction = csi_reportconfig->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->typeI_SinglePanel_ri_Restriction.buf[0];
|
||||
|
||||
/* Replace dummy with the nrofCQIsPerReport from the CSIreport
|
||||
config when equalent ASN structure present */
|
||||
if (0==*(csi_reportconfig->dummy)){
|
||||
nb_allowed_ri = number_of_bits_set((ri_restriction & 0xf0), &max_ri);
|
||||
ri_bitlen = ceil(log2(nb_allowed_ri));
|
||||
}
|
||||
else{
|
||||
nb_allowed_ri = number_of_bits_set(ri_restriction, &max_ri);
|
||||
ri_bitlen = ceil(log2(nb_allowed_ri));
|
||||
}
|
||||
nb_allowed_ri = number_of_bits_set(ri_restriction);
|
||||
ri_bitlen = ceil(log2(nb_allowed_ri));
|
||||
|
||||
ri_bitlen = ri_bitlen<1?ri_bitlen:1; //from the spec 38.212 and table 6.3.1.1.2-3: RI, LI, CQI, and CRI of codebookType=typeI-SinglePanel
|
||||
csi_report->csi_meas_bitlen.ri_bitlen=ri_bitlen;
|
||||
}
|
||||
@@ -254,43 +236,27 @@ uint8_t compute_ri_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
|
||||
if (type1single->nrOfAntennaPorts.choice.moreThanTwo->n1_n2.present ==
|
||||
NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_two_one_TypeI_SinglePanel_Restriction) {
|
||||
// 4 ports
|
||||
AssertFatal (NULL!=csi_reportconfig->dummy, "nrofCQIsPerReport is not present");
|
||||
|
||||
ri_restriction = csi_reportconfig->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->typeI_SinglePanel_ri_Restriction.buf[0];
|
||||
|
||||
/* Replace dummy with the nrofCQIsPerReport from the CSIreport
|
||||
config when equalent ASN structure present*/
|
||||
if (0==*(csi_reportconfig->dummy)){
|
||||
nb_allowed_ri = number_of_bits_set((ri_restriction & 0xf0), &max_ri);
|
||||
ri_bitlen = ceil(log2(nb_allowed_ri));
|
||||
}
|
||||
else{
|
||||
nb_allowed_ri = number_of_bits_set(ri_restriction,&max_ri);
|
||||
ri_bitlen = ceil(log2(nb_allowed_ri));
|
||||
}
|
||||
nb_allowed_ri = number_of_bits_set(ri_restriction);
|
||||
ri_bitlen = ceil(log2(nb_allowed_ri));
|
||||
|
||||
ri_bitlen = ri_bitlen<2?ri_bitlen:2; //from the spec 38.212 and table 6.3.1.1.2-3: RI, LI, CQI, and CRI of codebookType=typeI-SinglePanel
|
||||
csi_report->csi_meas_bitlen.ri_bitlen=ri_bitlen;
|
||||
}
|
||||
else {
|
||||
// more than 4 ports
|
||||
AssertFatal (NULL!=csi_reportconfig->dummy, "nrofCQIsPerReport is not present");
|
||||
|
||||
ri_restriction = csi_reportconfig->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->typeI_SinglePanel_ri_Restriction.buf[0];
|
||||
|
||||
/* Replace dummy with the nrofCQIsPerReport from the CSIreport
|
||||
config when equalent ASN structure present */
|
||||
if (0==*(csi_reportconfig->dummy)){
|
||||
nb_allowed_ri = number_of_bits_set((ri_restriction & 0xf0),&max_ri);
|
||||
ri_bitlen = ceil(log2(nb_allowed_ri));
|
||||
}
|
||||
else{
|
||||
nb_allowed_ri = number_of_bits_set(ri_restriction, &max_ri);
|
||||
ri_bitlen = ceil(log2(nb_allowed_ri));
|
||||
}
|
||||
nb_allowed_ri = number_of_bits_set(ri_restriction);
|
||||
ri_bitlen = ceil(log2(nb_allowed_ri));
|
||||
|
||||
csi_report->csi_meas_bitlen.ri_bitlen=ri_bitlen;
|
||||
}
|
||||
}
|
||||
return max_ri;
|
||||
return ri_restriction;
|
||||
}
|
||||
else
|
||||
AssertFatal(1==0,"Other configurations not yet implemented\n");
|
||||
@@ -298,71 +264,301 @@ uint8_t compute_ri_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
|
||||
}
|
||||
|
||||
void compute_li_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
|
||||
uint8_t max_ri,
|
||||
uint8_t ri_restriction,
|
||||
nr_csi_report_t *csi_report){
|
||||
|
||||
struct NR_CodebookConfig *codebookConfig = csi_reportconfig->codebookConfig;
|
||||
if (codebookConfig == NULL) {
|
||||
csi_report->csi_meas_bitlen.li_bitlen=0;
|
||||
return;
|
||||
for(int i=0; i<8; i++) {
|
||||
if (codebookConfig == NULL || ((ri_restriction>>i)&0x01) == 0)
|
||||
csi_report->csi_meas_bitlen.li_bitlen[i]=0;
|
||||
else {
|
||||
// codebook type1 single panel
|
||||
if (NR_CodebookConfig__codebookType__type1__subType_PR_typeI_SinglePanel==codebookConfig->codebookType.choice.type1->subType.present)
|
||||
csi_report->csi_meas_bitlen.li_bitlen[i]=ceil(log2(i+1))<2?ceil(log2(i+1)):2;
|
||||
else
|
||||
AssertFatal(1==0,"Other configurations not yet implemented\n");
|
||||
}
|
||||
}
|
||||
// codebook type1 single panel
|
||||
if (NR_CodebookConfig__codebookType__type1__subType_PR_typeI_SinglePanel==codebookConfig->codebookType.choice.type1->subType.present){
|
||||
/* From Spec 38.212
|
||||
* If the higher layer parameter nrofCQIsPerReport=1, nRI in Table 6.3.1.1.2-3 is the number of allowed rank indicator
|
||||
* values in the 4 LSBs of the higher layer parameter typeI-SinglePanel-ri-Restriction according to Subclause 5.2.2.2.1 [6,
|
||||
* TS 38.214]; otherwise nRI in Table 6.3.1.1.2-3 is the number of allowed rank indicator values according to Subclause
|
||||
* 5.2.2.2.1 [6, TS 38.214].
|
||||
*
|
||||
* But from Current RRC ASN structures nrofCQIsPerReport is not present. Present a dummy variable is present so using it to
|
||||
* calculate RI for antennas equal or more than two.
|
||||
*/
|
||||
//! TODO: The bit length of LI is as follows LI = log2(RI), Need to confirm wheather we should consider maximum RI can be reported from ri_restricted
|
||||
// or we should consider reported RI. If we need to consider reported RI for calculating LI bit length then we need to modify the code.
|
||||
csi_report->csi_meas_bitlen.li_bitlen=ceil(log2(max_ri))<2?ceil(log2(max_ri)):2;
|
||||
}
|
||||
else
|
||||
AssertFatal(1==0,"Other configurations not yet implemented\n");
|
||||
}
|
||||
|
||||
|
||||
void get_n1n2_o1o2_singlepanel(int *n1, int *n2, int *o1, int *o2,
|
||||
struct NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo *morethantwo) {
|
||||
|
||||
// Table 5.2.2.2.1-2 in 38.214 for supported configurations
|
||||
switch(morethantwo->n1_n2.present){
|
||||
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_two_one_TypeI_SinglePanel_Restriction):
|
||||
*n1 = 2;
|
||||
*n2 = 1;
|
||||
*o1 = 4;
|
||||
*o2 = 1;
|
||||
break;
|
||||
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_two_two_TypeI_SinglePanel_Restriction):
|
||||
*n1 = 2;
|
||||
*n2 = 2;
|
||||
*o1 = 4;
|
||||
*o2 = 4;
|
||||
break;
|
||||
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_four_one_TypeI_SinglePanel_Restriction):
|
||||
*n1 = 4;
|
||||
*n2 = 1;
|
||||
*o1 = 4;
|
||||
*o2 = 1;
|
||||
break;
|
||||
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_three_two_TypeI_SinglePanel_Restriction):
|
||||
*n1 = 3;
|
||||
*n2 = 2;
|
||||
*o1 = 4;
|
||||
*o2 = 4;
|
||||
break;
|
||||
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_six_one_TypeI_SinglePanel_Restriction):
|
||||
*n1 = 6;
|
||||
*n2 = 1;
|
||||
*o1 = 4;
|
||||
*o2 = 1;
|
||||
break;
|
||||
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_four_two_TypeI_SinglePanel_Restriction):
|
||||
*n1 = 4;
|
||||
*n2 = 2;
|
||||
*o1 = 4;
|
||||
*o2 = 4;
|
||||
break;
|
||||
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_eight_one_TypeI_SinglePanel_Restriction):
|
||||
*n1 = 8;
|
||||
*n2 = 1;
|
||||
*o1 = 4;
|
||||
*o2 = 1;
|
||||
break;
|
||||
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_four_three_TypeI_SinglePanel_Restriction):
|
||||
*n1 = 4;
|
||||
*n2 = 3;
|
||||
*o1 = 4;
|
||||
*o2 = 4;
|
||||
break;
|
||||
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_six_two_TypeI_SinglePanel_Restriction):
|
||||
*n1 = 4;
|
||||
*n2 = 2;
|
||||
*o1 = 4;
|
||||
*o2 = 4;
|
||||
break;
|
||||
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_twelve_one_TypeI_SinglePanel_Restriction):
|
||||
*n1 = 12;
|
||||
*n2 = 1;
|
||||
*o1 = 4;
|
||||
*o2 = 1;
|
||||
break;
|
||||
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_four_four_TypeI_SinglePanel_Restriction):
|
||||
*n1 = 4;
|
||||
*n2 = 4;
|
||||
*o1 = 4;
|
||||
*o2 = 4;
|
||||
break;
|
||||
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_eight_two_TypeI_SinglePanel_Restriction):
|
||||
*n1 = 8;
|
||||
*n2 = 2;
|
||||
*o1 = 4;
|
||||
*o2 = 4;
|
||||
break;
|
||||
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_sixteen_one_TypeI_SinglePanel_Restriction):
|
||||
*n1 = 16;
|
||||
*n2 = 1;
|
||||
*o1 = 4;
|
||||
*o2 = 1;
|
||||
break;
|
||||
default:
|
||||
AssertFatal(1==0,"Not supported configuration for n1_n2 in codebook configuration");
|
||||
}
|
||||
}
|
||||
|
||||
void get_x1x2_bitlen_singlepanel(int n1, int n2, int o1, int o2,
|
||||
int *x1, int *x2, int rank, int codebook_mode) {
|
||||
|
||||
// Table 6.3.1.1.2-1 in 38.212
|
||||
switch(rank){
|
||||
case 1:
|
||||
if(n2>1) {
|
||||
if (codebook_mode == 1) {
|
||||
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
|
||||
*x2 = 2;
|
||||
}
|
||||
else {
|
||||
*x1 = ceil(log2(n1*o1/2)) + ceil(log2(n2*o2/2));
|
||||
*x2 = 4;
|
||||
}
|
||||
}
|
||||
else{
|
||||
if (codebook_mode == 1) {
|
||||
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
|
||||
*x2 = 2;
|
||||
}
|
||||
else {
|
||||
*x1 = ceil(log2(n1*o1/2));
|
||||
*x2 = 4;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 2:
|
||||
if(n1*n2 == 2) {
|
||||
if (codebook_mode == 1) {
|
||||
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
|
||||
*x2 = 1;
|
||||
}
|
||||
else {
|
||||
*x1 = ceil(log2(n1*o1/2));
|
||||
*x2 = 3;
|
||||
}
|
||||
*x1 += 1;
|
||||
}
|
||||
else {
|
||||
if(n2>1) {
|
||||
if (codebook_mode == 1) {
|
||||
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
|
||||
*x2 = 3;
|
||||
}
|
||||
else {
|
||||
*x1 = ceil(log2(n1*o1/2)) + ceil(log2(n2*o2/2));
|
||||
*x2 = 3;
|
||||
}
|
||||
}
|
||||
else{
|
||||
if (codebook_mode == 1) {
|
||||
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
|
||||
*x2 = 1;
|
||||
}
|
||||
else {
|
||||
*x1 = ceil(log2(n1*o1/2));
|
||||
*x2 = 3;
|
||||
}
|
||||
}
|
||||
*x1 += 2;
|
||||
}
|
||||
break;
|
||||
case 3:
|
||||
case 4:
|
||||
if(n1*n2 == 2) {
|
||||
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
|
||||
*x2 = 1;
|
||||
}
|
||||
else {
|
||||
if(n1*n2 >= 8) {
|
||||
*x1 = ceil(log2(n1*o1/2)) + ceil(log2(n2*o2)) + 2;
|
||||
*x2 = 1;
|
||||
}
|
||||
else {
|
||||
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2)) + 2;
|
||||
*x2 = 1;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 5:
|
||||
case 6:
|
||||
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
|
||||
*x2 = 1;
|
||||
break;
|
||||
case 7:
|
||||
case 8:
|
||||
if(n1 == 4 && n2 == 1) {
|
||||
*x1 = ceil(log2(n1*o1/2)) + ceil(log2(n2*o2));
|
||||
*x2 = 1;
|
||||
}
|
||||
else {
|
||||
if(n1 > 2 && n2 == 2) {
|
||||
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2/2));
|
||||
*x2 = 1;
|
||||
}
|
||||
else {
|
||||
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
|
||||
*x2 = 1;
|
||||
}
|
||||
}
|
||||
break;
|
||||
default:
|
||||
AssertFatal(1==0,"Invalid rank in x1 x2 bit length computation\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void compute_pmi_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
|
||||
uint8_t ri_restriction,
|
||||
nr_csi_report_t *csi_report){
|
||||
|
||||
struct NR_CodebookConfig *codebookConfig = csi_reportconfig->codebookConfig;
|
||||
for(int i=0; i<8; i++) {
|
||||
csi_report->csi_meas_bitlen.pmi_x1_bitlen[i]=0;
|
||||
csi_report->csi_meas_bitlen.pmi_x2_bitlen[i]=0;
|
||||
if (codebookConfig == NULL || ((ri_restriction>>i)&0x01) == 0)
|
||||
return;
|
||||
else {
|
||||
if(codebookConfig->codebookType.present == NR_CodebookConfig__codebookType_PR_type1) {
|
||||
if(codebookConfig->codebookType.choice.type1->subType.present == NR_CodebookConfig__codebookType__type1__subType_PR_typeI_SinglePanel) {
|
||||
if(codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->nrOfAntennaPorts.present ==
|
||||
NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts_PR_two) {
|
||||
if (i==0)
|
||||
csi_report->csi_meas_bitlen.pmi_x2_bitlen[i]=2;
|
||||
if (i==1)
|
||||
csi_report->csi_meas_bitlen.pmi_x2_bitlen[i]=1;
|
||||
}
|
||||
else { // more than two
|
||||
int n1,n2,o1,o2,x1,x2;
|
||||
get_n1n2_o1o2_singlepanel(&n1,&n2,&o1,&o2,codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->nrOfAntennaPorts.choice.moreThanTwo);
|
||||
get_x1x2_bitlen_singlepanel(n1,n2,o1,o2,&x1,&x2,i+1,codebookConfig->codebookType.choice.type1->codebookMode);
|
||||
csi_report->csi_meas_bitlen.pmi_x1_bitlen[i]=x1;
|
||||
csi_report->csi_meas_bitlen.pmi_x2_bitlen[i]=x2;
|
||||
}
|
||||
}
|
||||
else
|
||||
AssertFatal(1==0,"Type1 Multi-panel Codebook Config not yet implemented\n");
|
||||
}
|
||||
else
|
||||
AssertFatal(1==0,"Type2 Codebook Config not yet implemented\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void compute_cqi_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
|
||||
uint8_t max_ri,
|
||||
uint8_t ri_restriction,
|
||||
nr_csi_report_t *csi_report){
|
||||
|
||||
struct NR_CodebookConfig *codebookConfig = csi_reportconfig->codebookConfig;
|
||||
struct NR_CSI_ReportConfig__reportFreqConfiguration *freq_config = csi_reportconfig->reportFreqConfiguration;
|
||||
|
||||
if (*freq_config->cqi_FormatIndicator == NR_CSI_ReportConfig__reportFreqConfiguration__cqi_FormatIndicator_widebandCQI) {
|
||||
csi_report->csi_meas_bitlen.cqi_bitlen = 4;
|
||||
if(codebookConfig != NULL) {
|
||||
if (NR_CodebookConfig__codebookType__type1__subType_PR_typeI_SinglePanel == codebookConfig->codebookType.choice.type1->subType.present){
|
||||
struct NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel *type1single = codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel;
|
||||
if (type1single->nrOfAntennaPorts.present == NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts_PR_moreThanTwo) {
|
||||
if (type1single->nrOfAntennaPorts.choice.moreThanTwo->n1_n2.present >
|
||||
NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_two_one_TypeI_SinglePanel_Restriction) {
|
||||
// more than 4 antenna ports
|
||||
if (max_ri > 4)
|
||||
csi_report->csi_meas_bitlen.cqi_bitlen += 4; // CQI for second TB
|
||||
for(int i=0; i<8; i++) {
|
||||
if ((ri_restriction>>i)&0x01) {
|
||||
csi_report->csi_meas_bitlen.cqi_bitlen[i] = 4;
|
||||
if(codebookConfig != NULL) {
|
||||
if (NR_CodebookConfig__codebookType__type1__subType_PR_typeI_SinglePanel == codebookConfig->codebookType.choice.type1->subType.present){
|
||||
struct NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel *type1single = codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel;
|
||||
if (type1single->nrOfAntennaPorts.present == NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts_PR_moreThanTwo) {
|
||||
if (type1single->nrOfAntennaPorts.choice.moreThanTwo->n1_n2.present >
|
||||
NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_two_one_TypeI_SinglePanel_Restriction) {
|
||||
// more than 4 antenna ports
|
||||
if (i > 4)
|
||||
csi_report->csi_meas_bitlen.cqi_bitlen[i] += 4; // CQI for second TB
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
csi_report->csi_meas_bitlen.cqi_bitlen[i] = 0;
|
||||
}
|
||||
}
|
||||
else
|
||||
AssertFatal(1==0,"Sub-band CQI reporting not yet supported");
|
||||
}
|
||||
|
||||
|
||||
//!TODO : same function can be written to handle csi_resources
|
||||
void compute_csi_bitlen(NR_CSI_MeasConfig_t *csi_MeasConfig, NR_UE_info_t *UE_info, int UE_id, module_id_t Mod_idP){
|
||||
uint8_t csi_report_id = 0;
|
||||
uint8_t nb_resources = 0;
|
||||
uint8_t max_ri = 0;
|
||||
NR_CSI_ReportConfig__reportQuantity_PR reportQuantity_type;
|
||||
NR_CSI_ResourceConfigId_t csi_ResourceConfigId;
|
||||
struct NR_CSI_ResourceConfig *csi_resourceconfig;
|
||||
|
||||
// for each CSI measurement report configuration (list of CSI-ReportConfig)
|
||||
LOG_D(NR_MAC,"Searching %d csi_reports\n",csi_MeasConfig->csi_ReportConfigToAddModList->list.count);
|
||||
for (csi_report_id=0; csi_report_id < csi_MeasConfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){
|
||||
struct NR_CSI_ReportConfig *csi_reportconfig = csi_MeasConfig->csi_ReportConfigToAddModList->list.array[csi_report_id];
|
||||
// MAC structure for CSI measurement reports (per UE and per report)
|
||||
@@ -417,7 +613,7 @@ void compute_csi_bitlen(NR_CSI_MeasConfig_t *csi_MeasConfig, NR_UE_info_t *UE_in
|
||||
}
|
||||
else AssertFatal(1==0,"Only periodic resource configuration currently supported\n");
|
||||
}
|
||||
|
||||
LOG_D(NR_MAC,"nb_resources %d\n",nb_resources);
|
||||
// computation of bit length depending on the report type
|
||||
switch(reportQuantity_type){
|
||||
case (NR_CSI_ReportConfig__reportQuantity_PR_ssb_Index_RSRP):
|
||||
@@ -428,8 +624,21 @@ void compute_csi_bitlen(NR_CSI_MeasConfig_t *csi_MeasConfig, NR_UE_info_t *UE_in
|
||||
break;
|
||||
case (NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_CQI):
|
||||
csi_report->csi_meas_bitlen.cri_bitlen=ceil(log2(nb_resources));
|
||||
max_ri = compute_ri_bitlen(csi_reportconfig, csi_report);
|
||||
compute_cqi_bitlen(csi_reportconfig, max_ri, csi_report);
|
||||
csi_report->csi_meas_bitlen.ri_restriction = compute_ri_bitlen(csi_reportconfig, csi_report);
|
||||
compute_cqi_bitlen(csi_reportconfig, csi_report->csi_meas_bitlen.ri_restriction, csi_report);
|
||||
break;
|
||||
case (NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_PMI_CQI):
|
||||
csi_report->csi_meas_bitlen.cri_bitlen=ceil(log2(nb_resources));
|
||||
csi_report->csi_meas_bitlen.ri_restriction = compute_ri_bitlen(csi_reportconfig, csi_report);
|
||||
compute_cqi_bitlen(csi_reportconfig, csi_report->csi_meas_bitlen.ri_restriction, csi_report);
|
||||
compute_pmi_bitlen(csi_reportconfig, csi_report->csi_meas_bitlen.ri_restriction, csi_report);
|
||||
break;
|
||||
case (NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_LI_PMI_CQI):
|
||||
csi_report->csi_meas_bitlen.cri_bitlen=ceil(log2(nb_resources));
|
||||
csi_report->csi_meas_bitlen.ri_restriction = compute_ri_bitlen(csi_reportconfig, csi_report);
|
||||
compute_li_bitlen(csi_reportconfig, csi_report->csi_meas_bitlen.ri_restriction, csi_report);
|
||||
compute_cqi_bitlen(csi_reportconfig, csi_report->csi_meas_bitlen.ri_restriction, csi_report);
|
||||
compute_pmi_bitlen(csi_reportconfig, csi_report->csi_meas_bitlen.ri_restriction, csi_report);
|
||||
break;
|
||||
default:
|
||||
AssertFatal(1==0,"Not yet supported CSI report quantity type");
|
||||
@@ -442,7 +651,8 @@ uint16_t nr_get_csi_bitlen(int Mod_idP,
|
||||
int UE_id,
|
||||
uint8_t csi_report_id) {
|
||||
|
||||
uint16_t csi_bitlen =0;
|
||||
uint16_t csi_bitlen = 0;
|
||||
uint16_t max_bitlen = 0;
|
||||
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
|
||||
L1_RSRP_bitlen_t * CSI_report_bitlen = NULL;
|
||||
CSI_Meas_bitlen_t * csi_meas_bitlen = NULL;
|
||||
@@ -455,7 +665,18 @@ uint16_t nr_get_csi_bitlen(int Mod_idP,
|
||||
(CSI_report_bitlen->nb_ssbri_cri -1 )));
|
||||
} else{
|
||||
csi_meas_bitlen = &(UE_info->csi_report_template[UE_id][csi_report_id].csi_meas_bitlen); //This might need to be moodif for Aperiodic CSI-RS measurements
|
||||
csi_bitlen+= (csi_meas_bitlen->cri_bitlen +csi_meas_bitlen->ri_bitlen+csi_meas_bitlen->li_bitlen+csi_meas_bitlen->cqi_bitlen+csi_meas_bitlen->pmi_x1_bitlen+csi_meas_bitlen->pmi_x2_bitlen);
|
||||
uint16_t temp_bitlen;
|
||||
for (int i=0; i<8; i++) {
|
||||
temp_bitlen = (csi_meas_bitlen->cri_bitlen+
|
||||
csi_meas_bitlen->ri_bitlen+
|
||||
csi_meas_bitlen->li_bitlen[i]+
|
||||
csi_meas_bitlen->cqi_bitlen[i]+
|
||||
csi_meas_bitlen->pmi_x1_bitlen[i]+
|
||||
csi_meas_bitlen->pmi_x2_bitlen[i]);
|
||||
if(temp_bitlen>max_bitlen)
|
||||
max_bitlen = temp_bitlen;
|
||||
}
|
||||
csi_bitlen += max_bitlen;
|
||||
}
|
||||
|
||||
return csi_bitlen;
|
||||
@@ -480,7 +701,18 @@ void nr_csi_meas_reporting(int Mod_idP,
|
||||
const NR_CSI_MeasConfig_t *csi_measconfig = CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup;
|
||||
AssertFatal(csi_measconfig->csi_ReportConfigToAddModList->list.count > 0,
|
||||
"NO CSI report configuration available");
|
||||
NR_PUCCH_Config_t *pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup;
|
||||
NR_PUCCH_Config_t *pucch_Config;
|
||||
if (sched_ctrl->active_ubwp) {
|
||||
pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup;
|
||||
} else if (RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id] &&
|
||||
RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig &&
|
||||
RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated &&
|
||||
RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig &&
|
||||
RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP &&
|
||||
RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) {
|
||||
pucch_Config = RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
|
||||
}
|
||||
|
||||
|
||||
for (int csi_report_id = 0; csi_report_id < csi_measconfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){
|
||||
NR_CSI_ReportConfig_t *csirep = csi_measconfig->csi_ReportConfigToAddModList->list.array[csi_report_id];
|
||||
@@ -504,7 +736,7 @@ void nr_csi_meas_reporting(int Mod_idP,
|
||||
if (*pucchresset->resourceList.list.array[res_index] == pucchcsires->pucch_Resource)
|
||||
break;
|
||||
AssertFatal(res_index < n,
|
||||
"CSI resource not found among PUCCH resources\n");
|
||||
"CSI pucch resource %d not found among PUCCH resources\n",pucchcsires->pucch_Resource);
|
||||
|
||||
// find free PUCCH that is in order with possibly existing PUCCH
|
||||
// schedulings (other CSI, SR)
|
||||
@@ -691,18 +923,26 @@ void tci_handling(module_id_t Mod_idP, int UE_id, frame_t frame, slot_t slot) {
|
||||
int ssb_index[MAX_NUM_SSB] = {0};
|
||||
int ssb_rsrp[MAX_NUM_SSB] = {0};
|
||||
uint8_t idx = 0;
|
||||
int bwp_id = 1;
|
||||
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
|
||||
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
|
||||
int bwp_id = sched_ctrl->active_bwp ? 1 : 0;
|
||||
NR_CellGroupConfig_t *CellGroup = UE_info->CellGroup[UE_id];
|
||||
NR_BWP_Downlink_t *bwp = CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
|
||||
NR_BWP_Downlink_t *bwp = bwp_id>0 ?
|
||||
sched_ctrl->active_bwp:
|
||||
NULL;
|
||||
|
||||
|
||||
//bwp indicator
|
||||
int n_dl_bwp = CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count;
|
||||
int n_dl_bwp=0;
|
||||
if (CellGroup->spCellConfig->spCellConfigDedicated &&
|
||||
CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList)
|
||||
n_dl_bwp = CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count;
|
||||
|
||||
uint8_t nr_ssbri_cri = 0;
|
||||
uint8_t nb_of_csi_ssb_report = UE_info->csi_report_template[UE_id][cqi_idx].nb_of_csi_ssb_report;
|
||||
int better_rsrp_reported = -140-(-0); /*minimum_measured_RSRP_value - minimum_differntail_RSRP_value*///considering the minimum RSRP value as better RSRP initially
|
||||
uint8_t diff_rsrp_idx = 0;
|
||||
uint8_t i, j;
|
||||
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
|
||||
|
||||
if (n_dl_bwp < 4)
|
||||
pdsch_bwp_id = bwp_id;
|
||||
@@ -718,36 +958,32 @@ void tci_handling(module_id_t Mod_idP, int UE_id, frame_t frame, slot_t slot) {
|
||||
idx: resource set index
|
||||
*/
|
||||
|
||||
//for all reported SSB
|
||||
for (idx = 0; idx < nb_of_csi_ssb_report; idx++) {
|
||||
nr_ssbri_cri = sched_ctrl->CSI_report[idx].choice.ssb_cri_report.nr_ssbri_cri;
|
||||
//extracting the ssb indexes
|
||||
for (ssb_idx = 0; ssb_idx < nr_ssbri_cri; ssb_idx++) {
|
||||
ssb_index[idx * nb_of_csi_ssb_report + ssb_idx] = sched_ctrl->CSI_report[idx].choice.ssb_cri_report.CRI_SSBRI[ssb_idx];
|
||||
}
|
||||
|
||||
//if strongest measured RSRP is configured
|
||||
strongest_ssb_rsrp = get_measured_rsrp(sched_ctrl->CSI_report[idx].choice.ssb_cri_report.RSRP);
|
||||
ssb_rsrp[idx * nb_of_csi_ssb_report] = strongest_ssb_rsrp;
|
||||
LOG_D(NR_MAC,"ssb_rsrp = %d\n",strongest_ssb_rsrp);
|
||||
|
||||
//if current ssb rsrp is greater than better rsrp
|
||||
if(ssb_rsrp[idx * nb_of_csi_ssb_report] > better_rsrp_reported) {
|
||||
better_rsrp_reported = ssb_rsrp[idx * nb_of_csi_ssb_report];
|
||||
target_ssb_beam_index = idx * nb_of_csi_ssb_report;
|
||||
}
|
||||
|
||||
for(diff_rsrp_idx =1; diff_rsrp_idx < nr_ssbri_cri; diff_rsrp_idx++) {
|
||||
ssb_rsrp[idx * nb_of_csi_ssb_report + diff_rsrp_idx] = get_diff_rsrp(sched_ctrl->CSI_report[idx].choice.ssb_cri_report.diff_RSRP[diff_rsrp_idx-1], strongest_ssb_rsrp);
|
||||
|
||||
//if current reported rsrp is greater than better rsrp
|
||||
if(ssb_rsrp[idx * nb_of_csi_ssb_report + diff_rsrp_idx] > better_rsrp_reported) {
|
||||
better_rsrp_reported = ssb_rsrp[idx * nb_of_csi_ssb_report + diff_rsrp_idx];
|
||||
target_ssb_beam_index = idx * nb_of_csi_ssb_report + diff_rsrp_idx;
|
||||
}
|
||||
}
|
||||
nr_ssbri_cri = sched_ctrl->CSI_report.ssb_cri_report.nr_ssbri_cri;
|
||||
//extracting the ssb indexes
|
||||
for (ssb_idx = 0; ssb_idx < nr_ssbri_cri; ssb_idx++) {
|
||||
ssb_index[idx * nb_of_csi_ssb_report + ssb_idx] = sched_ctrl->CSI_report.ssb_cri_report.CRI_SSBRI[ssb_idx];
|
||||
}
|
||||
|
||||
//if strongest measured RSRP is configured
|
||||
strongest_ssb_rsrp = get_measured_rsrp(sched_ctrl->CSI_report.ssb_cri_report.RSRP);
|
||||
ssb_rsrp[idx * nb_of_csi_ssb_report] = strongest_ssb_rsrp;
|
||||
LOG_D(NR_MAC,"ssb_rsrp = %d\n",strongest_ssb_rsrp);
|
||||
|
||||
//if current ssb rsrp is greater than better rsrp
|
||||
if(ssb_rsrp[idx * nb_of_csi_ssb_report] > better_rsrp_reported) {
|
||||
better_rsrp_reported = ssb_rsrp[idx * nb_of_csi_ssb_report];
|
||||
target_ssb_beam_index = idx * nb_of_csi_ssb_report;
|
||||
}
|
||||
|
||||
for(diff_rsrp_idx =1; diff_rsrp_idx < nr_ssbri_cri; diff_rsrp_idx++) {
|
||||
ssb_rsrp[idx * nb_of_csi_ssb_report + diff_rsrp_idx] = get_diff_rsrp(sched_ctrl->CSI_report.ssb_cri_report.diff_RSRP[diff_rsrp_idx-1], strongest_ssb_rsrp);
|
||||
|
||||
//if current reported rsrp is greater than better rsrp
|
||||
if(ssb_rsrp[idx * nb_of_csi_ssb_report + diff_rsrp_idx] > better_rsrp_reported) {
|
||||
better_rsrp_reported = ssb_rsrp[idx * nb_of_csi_ssb_report + diff_rsrp_idx];
|
||||
target_ssb_beam_index = idx * nb_of_csi_ssb_report + diff_rsrp_idx;
|
||||
}
|
||||
}
|
||||
|
||||
if(ssb_index[target_ssb_beam_index] != ssb_index[curr_ssb_beam_index] && ssb_rsrp[target_ssb_beam_index] > ssb_rsrp[curr_ssb_beam_index]) {
|
||||
if( ssb_rsrp[target_ssb_beam_index] - ssb_rsrp[curr_ssb_beam_index] > L1_RSRP_HYSTERIS) {
|
||||
@@ -823,7 +1059,10 @@ void tci_handling(module_id_t Mod_idP, int UE_id, frame_t frame, slot_t slot) {
|
||||
}
|
||||
}
|
||||
|
||||
sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tci_present_inDCI = bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[bwp_id-1]->tci_PresentInDCI;
|
||||
sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tci_present_inDCI = bwp ?
|
||||
bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[bwp_id-1]->tci_PresentInDCI :
|
||||
CellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[0]->tci_PresentInDCI;
|
||||
|
||||
|
||||
//filling pdsch tci state activation deactivation mac ce structure fields
|
||||
if(sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tci_present_inDCI) {
|
||||
@@ -876,7 +1115,8 @@ void evaluate_rsrp_report(NR_UE_info_t *UE_info,
|
||||
int *cumul_bits,
|
||||
NR_CSI_ReportConfig__reportQuantity_PR reportQuantity_type){
|
||||
|
||||
uint8_t cri_ssbri_bitlen = UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen.cri_ssbri_bitlen;
|
||||
nr_csi_report_t *csi_report = &UE_info->csi_report_template[UE_id][csi_report_id];
|
||||
uint8_t cri_ssbri_bitlen = csi_report->CSI_report_bitlen.cri_ssbri_bitlen;
|
||||
uint16_t curr_payload;
|
||||
|
||||
/*! As per the spec 38.212 and table: 6.3.1.1.2-12 in a single UCI sequence we can have multiple CSI_report
|
||||
@@ -897,44 +1137,43 @@ void evaluate_rsrp_report(NR_UE_info_t *UE_info,
|
||||
multiple simultaneous spatial domain receive filter
|
||||
*/
|
||||
|
||||
int idx = 0; //Since for SSB RSRP reporting in RRC can configure only one ssb resource set per one report config
|
||||
sched_ctrl->CSI_report[idx].choice.ssb_cri_report.nr_ssbri_cri = UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen.nb_ssbri_cri;
|
||||
sched_ctrl->CSI_report.ssb_cri_report.nr_ssbri_cri = csi_report->CSI_report_bitlen.nb_ssbri_cri;
|
||||
|
||||
for (int csi_ssb_idx = 0; csi_ssb_idx < sched_ctrl->CSI_report[idx].choice.ssb_cri_report.nr_ssbri_cri ; csi_ssb_idx++) {
|
||||
for (int csi_ssb_idx = 0; csi_ssb_idx < sched_ctrl->CSI_report.ssb_cri_report.nr_ssbri_cri ; csi_ssb_idx++) {
|
||||
curr_payload = pickandreverse_bits(payload, cri_ssbri_bitlen, *cumul_bits);
|
||||
|
||||
if (NR_CSI_ReportConfig__reportQuantity_PR_ssb_Index_RSRP == reportQuantity_type)
|
||||
sched_ctrl->CSI_report[idx].choice.ssb_cri_report.CRI_SSBRI[csi_ssb_idx] =
|
||||
*(UE_info->csi_report_template[UE_id][csi_report_id].SSB_Index_list[cri_ssbri_bitlen>0?((curr_payload)&~(~1<<(cri_ssbri_bitlen-1))):cri_ssbri_bitlen]);
|
||||
else
|
||||
sched_ctrl->CSI_report[idx].choice.ssb_cri_report.CRI_SSBRI[csi_ssb_idx] =
|
||||
*(UE_info->csi_report_template[UE_id][csi_report_id].CSI_Index_list[cri_ssbri_bitlen>0?((curr_payload)&~(~1<<(cri_ssbri_bitlen-1))):cri_ssbri_bitlen]);
|
||||
|
||||
if (NR_CSI_ReportConfig__reportQuantity_PR_ssb_Index_RSRP == reportQuantity_type) {
|
||||
sched_ctrl->CSI_report.ssb_cri_report.CRI_SSBRI[csi_ssb_idx] =
|
||||
*(csi_report->SSB_Index_list[cri_ssbri_bitlen>0?((curr_payload)&~(~1<<(cri_ssbri_bitlen-1))):cri_ssbri_bitlen]);
|
||||
LOG_D(MAC,"SSB_index = %d\n",sched_ctrl->CSI_report.ssb_cri_report.CRI_SSBRI[csi_ssb_idx]);
|
||||
}
|
||||
else {
|
||||
sched_ctrl->CSI_report.ssb_cri_report.CRI_SSBRI[csi_ssb_idx] =
|
||||
*(csi_report->CSI_Index_list[cri_ssbri_bitlen>0?((curr_payload)&~(~1<<(cri_ssbri_bitlen-1))):cri_ssbri_bitlen]);
|
||||
LOG_D(MAC,"CSI-RS Resource Indicator = %d\n",sched_ctrl->CSI_report.ssb_cri_report.CRI_SSBRI[csi_ssb_idx]);
|
||||
}
|
||||
*cumul_bits += cri_ssbri_bitlen;
|
||||
if(UE_info->csi_report_template[UE_id][csi_report_id].reportQuantity_type == NR_CSI_ReportConfig__reportQuantity_PR_cri_RSRP)
|
||||
LOG_D(MAC,"CSI-RS Resource Indicator = %d\n",sched_ctrl->CSI_report[idx].choice.ssb_cri_report.CRI_SSBRI[csi_ssb_idx]);
|
||||
else
|
||||
LOG_D(MAC,"SSB Resource Indicator = %d\n",sched_ctrl->CSI_report[idx].choice.ssb_cri_report.CRI_SSBRI[csi_ssb_idx]);
|
||||
|
||||
}
|
||||
|
||||
curr_payload = pickandreverse_bits(payload, 7, *cumul_bits);
|
||||
sched_ctrl->CSI_report[idx].choice.ssb_cri_report.RSRP = curr_payload & 0x7f;
|
||||
sched_ctrl->CSI_report.ssb_cri_report.RSRP = curr_payload & 0x7f;
|
||||
*cumul_bits += 7;
|
||||
|
||||
for (int diff_rsrp_idx =0; diff_rsrp_idx < sched_ctrl->CSI_report[idx].choice.ssb_cri_report.nr_ssbri_cri - 1; diff_rsrp_idx++ ) {
|
||||
for (int diff_rsrp_idx =0; diff_rsrp_idx < sched_ctrl->CSI_report.ssb_cri_report.nr_ssbri_cri - 1; diff_rsrp_idx++ ) {
|
||||
curr_payload = pickandreverse_bits(payload, 4, *cumul_bits);
|
||||
sched_ctrl->CSI_report[idx].choice.ssb_cri_report.diff_RSRP[diff_rsrp_idx] = curr_payload & 0x0f;
|
||||
sched_ctrl->CSI_report.ssb_cri_report.diff_RSRP[diff_rsrp_idx] = curr_payload & 0x0f;
|
||||
*cumul_bits += 4;
|
||||
}
|
||||
UE_info->csi_report_template[UE_id][csi_report_id].nb_of_csi_ssb_report++;
|
||||
int strongest_ssb_rsrp = get_measured_rsrp(sched_ctrl->CSI_report[idx].choice.ssb_cri_report.RSRP);
|
||||
csi_report->nb_of_csi_ssb_report++;
|
||||
int strongest_ssb_rsrp = get_measured_rsrp(sched_ctrl->CSI_report.ssb_cri_report.RSRP);
|
||||
NR_mac_stats_t *stats = &UE_info->mac_stats[UE_id];
|
||||
// including ssb rsrp in mac stats
|
||||
stats->cumul_rsrp += strongest_ssb_rsrp;
|
||||
stats->num_rsrp_meas++;
|
||||
LOG_D(MAC,"rsrp_id = %d rsrp = %d\n",
|
||||
sched_ctrl->CSI_report[idx].choice.ssb_cri_report.RSRP,
|
||||
strongest_ssb_rsrp);
|
||||
sched_ctrl->CSI_report.ssb_cri_report.RSRP,
|
||||
get_measured_rsrp(sched_ctrl->CSI_report.ssb_cri_report.RSRP));
|
||||
}
|
||||
|
||||
|
||||
@@ -943,39 +1182,122 @@ void evaluate_cri_report(uint8_t *payload,
|
||||
int cumul_bits,
|
||||
NR_UE_sched_ctrl_t *sched_ctrl){
|
||||
|
||||
int idx = 0; // FIXME not sure about this index. Should it be the same as csi_report_id?
|
||||
|
||||
uint8_t temp_cri = pickandreverse_bits(payload, cri_bitlen, cumul_bits);
|
||||
sched_ctrl->CSI_report[idx].choice.cri_ri_li_pmi_cqi_report.cri = temp_cri;
|
||||
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.cri = temp_cri;
|
||||
}
|
||||
|
||||
void evaluate_ri_report(uint8_t *payload,
|
||||
uint8_t ri_bitlen,
|
||||
NR_UE_sched_ctrl_t *sched_ctrl){
|
||||
int evaluate_ri_report(uint8_t *payload,
|
||||
uint8_t ri_bitlen,
|
||||
uint8_t ri_restriction,
|
||||
int cumul_bits,
|
||||
NR_UE_sched_ctrl_t *sched_ctrl){
|
||||
|
||||
AssertFatal(1==0,"Evaluation of RI report not yet implemented\n");
|
||||
uint8_t ri_index = pickandreverse_bits(payload, ri_bitlen, cumul_bits);
|
||||
int count=0;
|
||||
for (int i=0; i<8; i++) {
|
||||
if ((ri_restriction>>i)&0x01) {
|
||||
if(count == ri_index) {
|
||||
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.ri = i;
|
||||
LOG_D(MAC,"CSI Reported Rank %d\n", i+1);
|
||||
return i;
|
||||
}
|
||||
count++;
|
||||
}
|
||||
}
|
||||
AssertFatal(1==0, "Decoded ri %d does not correspond to any valid value in ri_restriction %d\n",ri_index,ri_restriction);
|
||||
}
|
||||
|
||||
|
||||
void evaluate_cqi_report(uint8_t *payload,
|
||||
uint8_t cqi_bitlen,
|
||||
int *cumul_bits,
|
||||
NR_UE_sched_ctrl_t *sched_ctrl){
|
||||
nr_csi_report_t *csi_report,
|
||||
int cumul_bits,
|
||||
uint8_t ri,
|
||||
NR_UE_sched_ctrl_t *sched_ctrl,
|
||||
long *cqi_Table){
|
||||
|
||||
//TODO sub-band CQI report not yet implemented
|
||||
int idx = 0; // FIXME not sure about this index. Should it be the same as csi_report_id?
|
||||
|
||||
uint8_t temp_cqi = pickandreverse_bits(payload, 4, *cumul_bits);
|
||||
sched_ctrl->CSI_report[idx].choice.cri_ri_li_pmi_cqi_report.wb_cqi_1tb = temp_cqi;
|
||||
*cumul_bits += 4;
|
||||
LOG_I(MAC,"Wide-band CQI for the first TB %d\n", temp_cqi);
|
||||
int cqi_bitlen = csi_report->csi_meas_bitlen.cqi_bitlen[ri];
|
||||
|
||||
uint8_t temp_cqi = pickandreverse_bits(payload, 4, cumul_bits);
|
||||
|
||||
// NR_CSI_ReportConfig__cqi_Table_table1 = 0
|
||||
// NR_CSI_ReportConfig__cqi_Table_table2 = 1
|
||||
// NR_CSI_ReportConfig__cqi_Table_table3 = 2
|
||||
if (cqi_Table)
|
||||
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.cqi_table = *cqi_Table;
|
||||
else
|
||||
AssertFatal(1==0,"CQI Table not present in RRC configuration\n");
|
||||
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.wb_cqi_1tb = temp_cqi;
|
||||
LOG_D(MAC,"Wide-band CQI for the first TB %d\n", temp_cqi);
|
||||
if (cqi_bitlen > 4) {
|
||||
temp_cqi = pickandreverse_bits(payload, 4, *cumul_bits);
|
||||
sched_ctrl->CSI_report[idx].choice.cri_ri_li_pmi_cqi_report.wb_cqi_2tb = temp_cqi;
|
||||
temp_cqi = pickandreverse_bits(payload, 4, cumul_bits);
|
||||
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.wb_cqi_2tb = temp_cqi;
|
||||
LOG_D(MAC,"Wide-band CQI for the second TB %d\n", temp_cqi);
|
||||
}
|
||||
sched_ctrl->set_mcs = TRUE;
|
||||
}
|
||||
|
||||
|
||||
uint8_t evaluate_pmi_report(uint8_t *payload,
|
||||
nr_csi_report_t *csi_report,
|
||||
int cumul_bits,
|
||||
uint8_t ri,
|
||||
NR_UE_sched_ctrl_t *sched_ctrl){
|
||||
|
||||
int x1_bitlen = csi_report->csi_meas_bitlen.pmi_x1_bitlen[ri];
|
||||
int x2_bitlen = csi_report->csi_meas_bitlen.pmi_x2_bitlen[ri];
|
||||
int tot_bitlen = x1_bitlen + x2_bitlen;
|
||||
|
||||
//in case of 2 port CSI configuration x1 is empty and the information bits are in x2
|
||||
int temp_pmi = pickandreverse_bits(payload, tot_bitlen, cumul_bits);
|
||||
|
||||
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x1 = temp_pmi&((1<<x1_bitlen)-1);
|
||||
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x2 = (temp_pmi>>x1_bitlen)&((1<<x2_bitlen)-1);
|
||||
LOG_D(MAC,"PMI Report: X1 %d X2 %d\n",
|
||||
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x1,
|
||||
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x2);
|
||||
|
||||
return tot_bitlen;
|
||||
|
||||
}
|
||||
|
||||
|
||||
int evaluate_li_report(uint8_t *payload,
|
||||
nr_csi_report_t *csi_report,
|
||||
int cumul_bits,
|
||||
uint8_t ri,
|
||||
NR_UE_sched_ctrl_t *sched_ctrl){
|
||||
|
||||
int li_bitlen = csi_report->csi_meas_bitlen.li_bitlen[ri];
|
||||
|
||||
if (li_bitlen>0) {
|
||||
int temp_li = pickandreverse_bits(payload, li_bitlen, cumul_bits);
|
||||
LOG_D(MAC,"LI %d\n",temp_li);
|
||||
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.li = temp_li;
|
||||
}
|
||||
return li_bitlen;
|
||||
|
||||
}
|
||||
|
||||
void skip_zero_padding(int *cumul_bits,
|
||||
nr_csi_report_t *csi_report,
|
||||
uint8_t ri,
|
||||
uint16_t max_bitlen) {
|
||||
|
||||
// actual number of reported bits depends on the reported rank
|
||||
// zero padding bits are added to have a predetermined max bit length to decode
|
||||
|
||||
uint16_t reported_bitlen = csi_report->csi_meas_bitlen.cri_bitlen+
|
||||
csi_report->csi_meas_bitlen.ri_bitlen+
|
||||
csi_report->csi_meas_bitlen.li_bitlen[ri]+
|
||||
csi_report->csi_meas_bitlen.cqi_bitlen[ri]+
|
||||
csi_report->csi_meas_bitlen.pmi_x1_bitlen[ri]+
|
||||
csi_report->csi_meas_bitlen.pmi_x2_bitlen[ri];
|
||||
|
||||
*cumul_bits+=(max_bitlen-reported_bitlen);
|
||||
}
|
||||
|
||||
|
||||
void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
|
||||
const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu,
|
||||
frame_t frame,
|
||||
@@ -988,21 +1310,25 @@ void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
|
||||
RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
|
||||
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
|
||||
uint8_t *payload = uci_pdu->csi_part1.csi_part1_payload;
|
||||
uint16_t bitlen = uci_pdu->csi_part1.csi_part1_bit_len;
|
||||
NR_CSI_ReportConfig__reportQuantity_PR reportQuantity_type = NR_CSI_ReportConfig__reportQuantity_PR_NOTHING;
|
||||
NR_UE_info_t *UE_info = &(RC.nrmac[Mod_idP]->UE_info);
|
||||
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
|
||||
int cumul_bits = 0;
|
||||
int r_index = -1;
|
||||
for (int csi_report_id = 0; csi_report_id < csi_MeasConfig->csi_ReportConfigToAddModList->list.count; csi_report_id++ ) {
|
||||
UE_info->csi_report_template[UE_id][csi_report_id].nb_of_csi_ssb_report = 0;
|
||||
nr_csi_report_t *csi_report = &UE_info->csi_report_template[UE_id][csi_report_id];
|
||||
csi_report->nb_of_csi_ssb_report = 0;
|
||||
uint8_t cri_bitlen = 0;
|
||||
uint8_t ri_bitlen = 0;
|
||||
uint8_t cqi_bitlen = 0;
|
||||
uint8_t li_bitlen = 0;
|
||||
uint8_t pmi_bitlen = 0;
|
||||
NR_CSI_ReportConfig_t *csirep = csi_MeasConfig->csi_ReportConfigToAddModList->list.array[csi_report_id];
|
||||
int period, offset;
|
||||
csi_period_offset(csirep, NULL, &period, &offset);
|
||||
// verify if report with current id has been scheduled for this frame and slot
|
||||
if ((n_slots_frame*frame + slot - offset)%period == 0) {
|
||||
reportQuantity_type = UE_info->csi_report_template[UE_id][csi_report_id].reportQuantity_type;
|
||||
reportQuantity_type = csi_report->reportQuantity_type;
|
||||
LOG_D(MAC,"SFN/SF:%d/%d reportQuantity type = %d\n",frame,slot,reportQuantity_type);
|
||||
switch(reportQuantity_type){
|
||||
case NR_CSI_ReportConfig__reportQuantity_PR_cri_RSRP:
|
||||
@@ -1012,18 +1338,49 @@ void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
|
||||
evaluate_rsrp_report(UE_info,sched_ctrl,UE_id,csi_report_id,payload,&cumul_bits,reportQuantity_type);
|
||||
break;
|
||||
case NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_CQI:
|
||||
cri_bitlen = UE_info->csi_report_template[UE_id][csi_report_id].csi_meas_bitlen.cri_bitlen;
|
||||
cri_bitlen = csi_report->csi_meas_bitlen.cri_bitlen;
|
||||
if(cri_bitlen)
|
||||
evaluate_cri_report(payload,cri_bitlen,cumul_bits,sched_ctrl);
|
||||
cumul_bits += cri_bitlen;
|
||||
ri_bitlen = UE_info->csi_report_template[UE_id][csi_report_id].csi_meas_bitlen.ri_bitlen;
|
||||
ri_bitlen = csi_report->csi_meas_bitlen.ri_bitlen;
|
||||
if(ri_bitlen)
|
||||
evaluate_ri_report(payload,ri_bitlen,sched_ctrl);
|
||||
r_index = evaluate_ri_report(payload,ri_bitlen,csi_report->csi_meas_bitlen.ri_restriction,cumul_bits,sched_ctrl);
|
||||
cumul_bits += ri_bitlen;
|
||||
//TODO add zero padding bits when needed
|
||||
cqi_bitlen = UE_info->csi_report_template[UE_id][csi_report_id].csi_meas_bitlen.cqi_bitlen;
|
||||
if(cqi_bitlen)
|
||||
evaluate_cqi_report(payload,cqi_bitlen,&cumul_bits,sched_ctrl);
|
||||
if (r_index != -1)
|
||||
skip_zero_padding(&cumul_bits,csi_report,r_index,bitlen);
|
||||
evaluate_cqi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl,csirep->cqi_Table);
|
||||
break;
|
||||
case NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_PMI_CQI:
|
||||
cri_bitlen = csi_report->csi_meas_bitlen.cri_bitlen;
|
||||
if(cri_bitlen)
|
||||
evaluate_cri_report(payload,cri_bitlen,cumul_bits,sched_ctrl);
|
||||
cumul_bits += cri_bitlen;
|
||||
ri_bitlen = csi_report->csi_meas_bitlen.ri_bitlen;
|
||||
if(ri_bitlen)
|
||||
r_index = evaluate_ri_report(payload,ri_bitlen,csi_report->csi_meas_bitlen.ri_restriction,cumul_bits,sched_ctrl);
|
||||
cumul_bits += ri_bitlen;
|
||||
if (r_index != -1)
|
||||
skip_zero_padding(&cumul_bits,csi_report,r_index,bitlen);
|
||||
pmi_bitlen = evaluate_pmi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl);
|
||||
cumul_bits += pmi_bitlen;
|
||||
evaluate_cqi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl,csirep->cqi_Table);
|
||||
break;
|
||||
case NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_LI_PMI_CQI:
|
||||
cri_bitlen = csi_report->csi_meas_bitlen.cri_bitlen;
|
||||
if(cri_bitlen)
|
||||
evaluate_cri_report(payload,cri_bitlen,cumul_bits,sched_ctrl);
|
||||
cumul_bits += cri_bitlen;
|
||||
ri_bitlen = csi_report->csi_meas_bitlen.ri_bitlen;
|
||||
if(ri_bitlen)
|
||||
r_index = evaluate_ri_report(payload,ri_bitlen,csi_report->csi_meas_bitlen.ri_restriction,cumul_bits,sched_ctrl);
|
||||
cumul_bits += ri_bitlen;
|
||||
li_bitlen = evaluate_li_report(payload,csi_report,cumul_bits,r_index,sched_ctrl);
|
||||
cumul_bits += li_bitlen;
|
||||
if (r_index != -1)
|
||||
skip_zero_padding(&cumul_bits,csi_report,r_index,bitlen);
|
||||
pmi_bitlen = evaluate_pmi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl);
|
||||
cumul_bits += pmi_bitlen;
|
||||
evaluate_cqi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl,csirep->cqi_Table);
|
||||
break;
|
||||
default:
|
||||
AssertFatal(1==0, "Invalid or not supported CSI measurement report\n");
|
||||
@@ -1117,7 +1474,7 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
|
||||
|
||||
// tpc (power control) only if we received AckNack or positive SR. For a
|
||||
// negative SR, the UE won't have sent anything, and the SNR is not valid
|
||||
if (((uci_01->pduBitmap >> 1) & 0x1) ) {
|
||||
if (((uci_01->pduBitmap >> 1) & 0x1) /*|| sched_ctrl->SR*/) {
|
||||
if ((uci_01->harq) && (uci_01->harq->harq_confidence_level==0)) sched_ctrl->tpc1 = nr_get_tpc(RC.nrmac[mod_id]->pucch_target_snrx10, uci_01->ul_cqi, 30);
|
||||
else sched_ctrl->tpc1 = 3;
|
||||
sched_ctrl->pucch_snrx10 = uci_01->ul_cqi * 5 - 640;
|
||||
@@ -1238,6 +1595,7 @@ int nr_acknack_scheduling(int mod_id,
|
||||
&& csi_pucch->frame == pucch->frame
|
||||
&& csi_pucch->ul_slot == pucch->ul_slot
|
||||
&& !csi_pucch->simultaneous_harqcsi) {
|
||||
LOG_D(NR_MAC,"Cannot multiplex csi_pucch for %d.%d\n",csi_pucch->frame,csi_pucch->ul_slot);
|
||||
nr_fill_nfapi_pucch(mod_id, frame, slot, csi_pucch, UE_id);
|
||||
memset(csi_pucch, 0, sizeof(*csi_pucch));
|
||||
pucch->frame = pucch->ul_slot == n_slots_frame - 1 ? (pucch->frame + 1) % 1024 : pucch->frame;
|
||||
@@ -1370,6 +1728,7 @@ int nr_acknack_scheduling(int mod_id,
|
||||
// FIXME currently we support at most 11 bits in pucch2 so skip also in that case
|
||||
if(!csi_pucch->simultaneous_harqcsi
|
||||
|| ((csi_pucch->csi_bits + csi_pucch->dai_c) >= 11)) {
|
||||
LOG_D(NR_MAC,"Cannot multiplex csi_pucch %d +csi_pucch->dai_c %d for %d.%d\n",csi_pucch->csi_bits,csi_pucch->dai_c,csi_pucch->frame,csi_pucch->ul_slot);
|
||||
nr_fill_nfapi_pucch(mod_id, frame, slot, csi_pucch, UE_id);
|
||||
memset(csi_pucch, 0, sizeof(*csi_pucch));
|
||||
/* advance the UL slot information in PUCCH by one so we won't schedule in
|
||||
@@ -1388,6 +1747,8 @@ int nr_acknack_scheduling(int mod_id,
|
||||
else {
|
||||
csi_pucch->timing_indicator = ind_found;
|
||||
csi_pucch->dai_c++;
|
||||
memset(pucch,0,sizeof(*pucch));
|
||||
LOG_D(NR_MAC,"multiplexing csi_pucch %d +csi_pucch->dai_c %d for %d.%d\n",csi_pucch->csi_bits,csi_pucch->dai_c,csi_pucch->frame,csi_pucch->ul_slot);
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -991,6 +991,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
|
||||
uint16_t new_rbSize;
|
||||
bool success = nr_find_nb_rb(retInfo->Qm,
|
||||
retInfo->R,
|
||||
1, // layers
|
||||
temp_ps.nrOfSymbols,
|
||||
temp_ps.N_PRB_DMRS * temp_ps.num_dmrs_symb,
|
||||
retInfo->tb_size,
|
||||
@@ -1008,6 +1009,9 @@ bool allocate_ul_retransmission(module_id_t module_id,
|
||||
retInfo->rbSize = new_rbSize;
|
||||
retInfo->time_domain_allocation = tda;
|
||||
sched_ctrl->pusch_semi_static = temp_ps;
|
||||
|
||||
// Get previous PUSCH filed info
|
||||
sched_ctrl->sched_pusch = *retInfo;
|
||||
}
|
||||
|
||||
/* Find free CCE */
|
||||
@@ -1265,8 +1269,10 @@ void pf_ul(module_id_t module_id,
|
||||
const int B = cmax(sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes, 0);
|
||||
uint16_t rbSize = 0;
|
||||
uint32_t TBS = 0;
|
||||
|
||||
nr_find_nb_rb(sched_pusch->Qm,
|
||||
sched_pusch->R,
|
||||
1, // layers
|
||||
ps->nrOfSymbols,
|
||||
ps->N_PRB_DMRS * ps->num_dmrs_symb,
|
||||
B,
|
||||
@@ -1275,8 +1281,8 @@ void pf_ul(module_id_t module_id,
|
||||
&rbSize);
|
||||
sched_pusch->rbSize = rbSize;
|
||||
sched_pusch->tb_size = TBS;
|
||||
LOG_D(NR_MAC,"rbSize %d, TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n",
|
||||
rbSize, sched_pusch->tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, B,sched_ctrl->cce_index,ps->num_dmrs_symb,ps->N_PRB_DMRS);
|
||||
LOG_D(NR_MAC,"rbSize %d (max_rbSize %d), TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n",
|
||||
rbSize, max_rbSize,sched_pusch->tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, B,sched_ctrl->cce_index,ps->num_dmrs_symb,ps->N_PRB_DMRS);
|
||||
|
||||
/* Mark the corresponding RBs as used */
|
||||
n_rb_sched -= sched_pusch->rbSize;
|
||||
@@ -1376,7 +1382,7 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
|
||||
/* Calculate mask: if any RB in vrb_map_UL is blocked (1), the current RB will be 0 */
|
||||
for (int i = 0; i < bwpSize; i++)
|
||||
rballoc_mask[i] = i >= st && i <= e;
|
||||
|
||||
LOG_D(NR_MAC,"%d.%d : UL start %d, end %d\n",frame,slot,st,e);
|
||||
/* proportional fair scheduling algorithm */
|
||||
pf_ul(module_id,
|
||||
frame,
|
||||
@@ -1519,30 +1525,30 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
|
||||
UE_info->mac_stats[UE_id].ulsch_current_bytes = sched_pusch->tb_size;
|
||||
sched_ctrl->last_ul_frame = sched_pusch->frame;
|
||||
sched_ctrl->last_ul_slot = sched_pusch->slot;
|
||||
|
||||
LOG_D(NR_MAC,
|
||||
"ULSCH/PUSCH: %4d.%2d RNTI %04x UL sched %4d.%2d DCI L %d start %2d RBS %3d startSymbol %2d nb_symbol %2d dmrs_pos %x MCS %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d est %6d sched %6d est BSR %6d TPC %d\n",
|
||||
frame,
|
||||
slot,
|
||||
rnti,
|
||||
sched_pusch->frame,
|
||||
sched_pusch->slot,
|
||||
sched_ctrl->aggregation_level,
|
||||
sched_pusch->rbStart,
|
||||
sched_pusch->rbSize,
|
||||
ps->startSymbolIndex,
|
||||
ps->nrOfSymbols,
|
||||
ps->ul_dmrs_symb_pos,
|
||||
sched_pusch->mcs,
|
||||
sched_pusch->tb_size,
|
||||
harq_id,
|
||||
cur_harq->round,
|
||||
nr_rv_round_map[cur_harq->round],
|
||||
cur_harq->ndi,
|
||||
sched_ctrl->estimated_ul_buffer,
|
||||
sched_ctrl->sched_ul_bytes,
|
||||
sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes,
|
||||
sched_ctrl->tpc0);
|
||||
if (sched_pusch->rbSize > 5)
|
||||
LOG_D(NR_MAC,
|
||||
"ULSCH/PUSCH: %4d.%2d RNTI %04x UL sched %4d.%2d DCI L %d start %2d RBS %3d startSymbol %2d nb_symbol %2d dmrs_pos %x MCS %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d est %6d sched %6d est BSR %6d TPC %d\n",
|
||||
frame,
|
||||
slot,
|
||||
rnti,
|
||||
sched_pusch->frame,
|
||||
sched_pusch->slot,
|
||||
sched_ctrl->aggregation_level,
|
||||
sched_pusch->rbStart,
|
||||
sched_pusch->rbSize,
|
||||
ps->startSymbolIndex,
|
||||
ps->nrOfSymbols,
|
||||
ps->ul_dmrs_symb_pos,
|
||||
sched_pusch->mcs,
|
||||
sched_pusch->tb_size,
|
||||
harq_id,
|
||||
cur_harq->round,
|
||||
nr_rv_round_map[cur_harq->round],
|
||||
cur_harq->ndi,
|
||||
sched_ctrl->estimated_ul_buffer,
|
||||
sched_ctrl->sched_ul_bytes,
|
||||
sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes,
|
||||
sched_ctrl->tpc0);
|
||||
|
||||
|
||||
/* PUSCH in a later slot, but corresponding DCI now! */
|
||||
|
||||
@@ -242,7 +242,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
|
||||
uint16_t O_csi,
|
||||
uint16_t O_ack,
|
||||
uint8_t O_sr,
|
||||
int r_pucch);
|
||||
int r_pucch);
|
||||
|
||||
void find_search_space(int ss_type,
|
||||
NR_BWP_Downlink_t *bwp,
|
||||
@@ -289,7 +289,8 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
|
||||
const NR_BWP_Downlink_t *bwp,
|
||||
const NR_BWP_DownlinkDedicated_t *bwpd0,
|
||||
int tda,
|
||||
const long dci_format,
|
||||
uint8_t layers,
|
||||
NR_UE_sched_ctrl_t *sched_ctrl,
|
||||
NR_pdsch_semi_static_t *ps);
|
||||
|
||||
void nr_set_pusch_semi_static(const NR_ServingCellConfigCommon_t *scc,
|
||||
@@ -431,6 +432,13 @@ void find_SSB_and_RO_available(module_id_t module_idP);
|
||||
|
||||
void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps);
|
||||
|
||||
void set_dl_mcs(NR_sched_pdsch_t *sched_pdsch,
|
||||
NR_UE_sched_ctrl_t *sched_ctrl,
|
||||
uint8_t *target_mcs,
|
||||
uint8_t mcs_table_idx);
|
||||
|
||||
uint8_t set_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl);
|
||||
|
||||
void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *bwp);
|
||||
void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ubwp);
|
||||
|
||||
@@ -438,6 +446,7 @@ bool find_free_CCE(module_id_t module_id, sub_frame_t slot, int UE_id);
|
||||
|
||||
bool nr_find_nb_rb(uint16_t Qm,
|
||||
uint16_t R,
|
||||
uint8_t nrOfLayers,
|
||||
uint16_t nb_symb_sch,
|
||||
uint16_t nb_dmrs_prb,
|
||||
uint32_t bytes,
|
||||
|
||||
@@ -93,6 +93,12 @@ void dump_mac_stats(gNB_MAC_INST *gNB, char *output, int strlen, bool reset_rsrp
|
||||
sched_ctrl->pcmax,
|
||||
avg_rsrp,
|
||||
stats->num_rsrp_meas);
|
||||
stroff+=sprintf(output+stroff,"UE %d: CQI %d, RI %d, PMI (%d,%d)\n",
|
||||
UE_id,
|
||||
UE_info->UE_sched_ctrl[UE_id].CSI_report.cri_ri_li_pmi_cqi_report.wb_cqi_1tb,
|
||||
UE_info->UE_sched_ctrl[UE_id].CSI_report.cri_ri_li_pmi_cqi_report.ri+1,
|
||||
UE_info->UE_sched_ctrl[UE_id].CSI_report.cri_ri_li_pmi_cqi_report.pmi_x1,
|
||||
UE_info->UE_sched_ctrl[UE_id].CSI_report.cri_ri_li_pmi_cqi_report.pmi_x2);
|
||||
|
||||
stroff+=sprintf(output+stroff,"UE %d: dlsch_rounds %"PRIu64"/%"PRIu64"/%"PRIu64"/%"PRIu64", dlsch_errors %"PRIu64", pucch0_DTX %d, BLER %.5f MCS %d\n",
|
||||
UE_id,
|
||||
|
||||
@@ -369,7 +369,8 @@ typedef struct NR_sched_pusch {
|
||||
typedef struct NR_pdsch_semi_static {
|
||||
int time_domain_allocation;
|
||||
uint8_t numDmrsCdmGrpsNoData;
|
||||
|
||||
uint8_t frontloaded_symb;
|
||||
int mapping_type;
|
||||
int startSymbolIndex;
|
||||
int nrOfSymbols;
|
||||
uint8_t nrOfLayers;
|
||||
@@ -455,6 +456,7 @@ struct CRI_RI_LI_PMI_CQI {
|
||||
uint8_t pmi_x2;
|
||||
uint8_t wb_cqi_1tb;
|
||||
uint8_t wb_cqi_2tb;
|
||||
uint8_t cqi_table;
|
||||
};
|
||||
|
||||
typedef struct CRI_SSB_RSRP {
|
||||
@@ -465,11 +467,8 @@ typedef struct CRI_SSB_RSRP {
|
||||
} CRI_SSB_RSRP_t;
|
||||
|
||||
struct CSI_Report {
|
||||
NR_CSI_Report_Config_PR present;
|
||||
union Config_CSI_Report {
|
||||
struct CRI_RI_LI_PMI_CQI cri_ri_li_pmi_cqi_report;
|
||||
struct CRI_SSB_RSRP ssb_cri_report;
|
||||
} choice;
|
||||
struct CRI_RI_LI_PMI_CQI cri_ri_li_pmi_cqi_report;
|
||||
struct CRI_SSB_RSRP ssb_cri_report;
|
||||
};
|
||||
|
||||
#define MAX_SR_BITLEN 8
|
||||
@@ -482,12 +481,13 @@ typedef struct {
|
||||
}L1_RSRP_bitlen_t;
|
||||
|
||||
typedef struct{
|
||||
uint8_t ri_restriction;
|
||||
uint8_t cri_bitlen;
|
||||
uint8_t ri_bitlen;
|
||||
uint8_t li_bitlen;
|
||||
uint8_t pmi_x1_bitlen;
|
||||
uint8_t pmi_x2_bitlen;
|
||||
uint8_t cqi_bitlen;
|
||||
uint8_t li_bitlen[8];
|
||||
uint8_t pmi_x1_bitlen[8];
|
||||
uint8_t pmi_x2_bitlen[8];
|
||||
uint8_t cqi_bitlen[8];
|
||||
} CSI_Meas_bitlen_t;
|
||||
|
||||
typedef struct nr_csi_report {
|
||||
@@ -592,9 +592,9 @@ typedef struct {
|
||||
int pusch_consecutive_dtx_cnt;
|
||||
int pucch_consecutive_dtx_cnt;
|
||||
int ul_failure;
|
||||
struct CSI_Report CSI_report[MAX_CSI_REPORTS];
|
||||
struct CSI_Report CSI_report;
|
||||
bool SR;
|
||||
|
||||
bool set_mcs;
|
||||
/// information about every HARQ process
|
||||
NR_UE_harq_t harq_processes[NR_MAX_NB_HARQ_PROCESSES];
|
||||
/// HARQ processes that are free
|
||||
@@ -647,7 +647,6 @@ typedef struct {
|
||||
NR_mac_stats_t mac_stats[MAX_MOBILES_PER_GNB];
|
||||
NR_list_t list;
|
||||
int num_UEs;
|
||||
|
||||
bool active[MAX_MOBILES_PER_GNB];
|
||||
rnti_t rnti[MAX_MOBILES_PER_GNB];
|
||||
NR_CellGroupConfig_t *CellGroup[MAX_MOBILES_PER_GNB];
|
||||
|
||||
@@ -1103,7 +1103,7 @@ boolean_t nr_rrc_pdcp_config_asn1_req(
|
||||
if (kRRCint != NULL) {
|
||||
/* todo */
|
||||
}
|
||||
|
||||
|
||||
if (drb2release_list != NULL) {
|
||||
// TODO
|
||||
}
|
||||
|
||||
@@ -218,7 +218,7 @@ nr_rrc_data_req(
|
||||
return TRUE; // TODO should be changed to a CNF message later, currently RRC lite does not used the returned value anyway.
|
||||
}
|
||||
|
||||
int8_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
|
||||
int mac_rrc_nr_data_req(const module_id_t Mod_idP,
|
||||
const int CC_id,
|
||||
const frame_t frameP,
|
||||
const rb_id_t Srb_id,
|
||||
@@ -286,7 +286,7 @@ int8_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
|
||||
LOG_D(NR_RRC,"[gNB %d] Frame %d CCCH request (Srb_id %ld)\n", Mod_idP, frameP, Srb_id);
|
||||
|
||||
AssertFatal(ue_context_p!=NULL,"failed to get ue_context, rnti %x\n",rnti);
|
||||
char payload_size = ue_context_p->ue_context.Srb0.Tx_buffer.payload_size;
|
||||
int payload_size = ue_context_p->ue_context.Srb0.Tx_buffer.payload_size;
|
||||
|
||||
// check if data is there for MAC
|
||||
if (payload_size > 0) {
|
||||
@@ -380,10 +380,10 @@ int8_t nr_mac_rrc_data_ind(const module_id_t module_idP,
|
||||
}
|
||||
|
||||
void nr_mac_gNB_rrc_ul_failure(const module_id_t Mod_instP,
|
||||
const int CC_idP,
|
||||
const frame_t frameP,
|
||||
const sub_frame_t subframeP,
|
||||
const rnti_t rntiP) {
|
||||
const int CC_idP,
|
||||
const frame_t frameP,
|
||||
const sub_frame_t subframeP,
|
||||
const rnti_t rntiP) {
|
||||
struct rrc_gNB_ue_context_s *ue_context_p = NULL;
|
||||
ue_context_p = rrc_gNB_get_ue_context(
|
||||
RC.nrrrc[Mod_instP],
|
||||
|
||||
@@ -980,6 +980,8 @@ void fill_initial_SpCellConfig(rnti_t rnti,
|
||||
NR_SpCellConfig_t *SpCellConfig,
|
||||
NR_ServingCellConfigCommon_t *scc,
|
||||
rrc_gNB_carrier_data_t *carrier) {
|
||||
|
||||
int uid=rnti&15;
|
||||
int curr_bwp = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,MAX_BWP_SIZE);
|
||||
SpCellConfig->servCellIndex = NULL;
|
||||
SpCellConfig->reconfigurationWithSync = NULL;
|
||||
@@ -996,6 +998,7 @@ void fill_initial_SpCellConfig(rnti_t rnti,
|
||||
pucch_Config->resourceSetToAddModList = calloc(1,sizeof(*pucch_Config->resourceSetToAddModList));
|
||||
pucch_Config->resourceSetToReleaseList = NULL;
|
||||
NR_PUCCH_ResourceSet_t *pucchresset0=calloc(1,sizeof(*pucchresset0));
|
||||
NR_PUCCH_ResourceSet_t *pucchresset1=calloc(1,sizeof(*pucchresset1));
|
||||
pucchresset0->pucch_ResourceSetId = 0;
|
||||
NR_PUCCH_ResourceId_t *pucchresset0id0=calloc(1,sizeof(*pucchresset0id0));
|
||||
*pucchresset0id0=0;
|
||||
@@ -1003,6 +1006,13 @@ void fill_initial_SpCellConfig(rnti_t rnti,
|
||||
pucchresset0->maxPayloadSize=NULL;
|
||||
ASN_SEQUENCE_ADD(&pucch_Config->resourceSetToAddModList->list,pucchresset0);
|
||||
|
||||
pucchresset1->pucch_ResourceSetId = 1;
|
||||
NR_PUCCH_ResourceId_t *pucchresset1id0=calloc(1,sizeof(*pucchresset1id0));
|
||||
*pucchresset1id0=1;
|
||||
ASN_SEQUENCE_ADD(&pucchresset1->resourceList.list,pucchresset1id0);
|
||||
pucchresset1->maxPayloadSize=NULL;
|
||||
ASN_SEQUENCE_ADD(&pucch_Config->resourceSetToAddModList->list,pucchresset1);
|
||||
|
||||
pucch_Config->resourceToAddModList = calloc(1,sizeof(*pucch_Config->resourceToAddModList));
|
||||
pucch_Config->resourceToReleaseList = NULL;
|
||||
// configure one single PUCCH0 opportunity for initial connection procedure
|
||||
@@ -1020,6 +1030,50 @@ void fill_initial_SpCellConfig(rnti_t rnti,
|
||||
pucchres0->format.choice.format0->nrofSymbols=1;
|
||||
pucchres0->format.choice.format0->startingSymbolIndex=13;
|
||||
ASN_SEQUENCE_ADD(&pucch_Config->resourceToAddModList->list,pucchres0);
|
||||
|
||||
NR_PUCCH_Resource_t *pucchres2=calloc(1,sizeof(*pucchres2));
|
||||
pucchres2->pucch_ResourceId=1;
|
||||
pucchres2->startingPRB=0;
|
||||
pucchres2->intraSlotFrequencyHopping=NULL;
|
||||
pucchres2->secondHopPRB=NULL;
|
||||
pucchres2->format.present= NR_PUCCH_Resource__format_PR_format2;
|
||||
pucchres2->format.choice.format2=calloc(1,sizeof(*pucchres2->format.choice.format2));
|
||||
pucchres2->format.choice.format2->nrofPRBs=8;
|
||||
pucchres2->format.choice.format2->nrofSymbols=1;
|
||||
pucchres2->format.choice.format2->startingSymbolIndex=13;
|
||||
ASN_SEQUENCE_ADD(&pucch_Config->resourceToAddModList->list,pucchres2);
|
||||
|
||||
pucch_Config->format2=calloc(1,sizeof(*pucch_Config->format2));
|
||||
pucch_Config->format2->present=NR_SetupRelease_PUCCH_FormatConfig_PR_setup;
|
||||
NR_PUCCH_FormatConfig_t *pucchfmt2 = calloc(1,sizeof(*pucchfmt2));
|
||||
pucch_Config->format2->choice.setup = pucchfmt2;
|
||||
pucchfmt2->interslotFrequencyHopping=NULL;
|
||||
pucchfmt2->additionalDMRS=NULL;
|
||||
pucchfmt2->maxCodeRate=calloc(1,sizeof(*pucchfmt2->maxCodeRate));
|
||||
*pucchfmt2->maxCodeRate=NR_PUCCH_MaxCodeRate_zeroDot35;
|
||||
pucchfmt2->nrofSlots=NULL;
|
||||
pucchfmt2->pi2BPSK=NULL;
|
||||
pucchfmt2->simultaneousHARQ_ACK_CSI=calloc(1,sizeof(*pucchfmt2->simultaneousHARQ_ACK_CSI));
|
||||
*pucchfmt2->simultaneousHARQ_ACK_CSI=NR_PUCCH_FormatConfig__simultaneousHARQ_ACK_CSI_true;
|
||||
|
||||
pucch_Config->spatialRelationInfoToAddModList = calloc(1,sizeof(*pucch_Config->spatialRelationInfoToAddModList));
|
||||
NR_PUCCH_SpatialRelationInfo_t *pucchspatial = calloc(1,sizeof(*pucchspatial));
|
||||
pucchspatial->pucch_SpatialRelationInfoId = 1;
|
||||
pucchspatial->servingCellId = NULL;
|
||||
if(carrier->do_CSIRS) {
|
||||
pucchspatial->referenceSignal.present = NR_PUCCH_SpatialRelationInfo__referenceSignal_PR_csi_RS_Index;
|
||||
pucchspatial->referenceSignal.choice.csi_RS_Index = 0;
|
||||
}
|
||||
else {
|
||||
pucchspatial->referenceSignal.present = NR_PUCCH_SpatialRelationInfo__referenceSignal_PR_ssb_Index;
|
||||
pucchspatial->referenceSignal.choice.ssb_Index = 0;
|
||||
}
|
||||
pucchspatial->pucch_PathlossReferenceRS_Id = 0;
|
||||
pucchspatial->p0_PUCCH_Id = 1;
|
||||
pucchspatial->closedLoopIndex = NR_PUCCH_SpatialRelationInfo__closedLoopIndex_i0;
|
||||
ASN_SEQUENCE_ADD(&pucch_Config->spatialRelationInfoToAddModList->list,pucchspatial);
|
||||
|
||||
|
||||
initialUplinkBWP->pusch_Config = calloc(1,sizeof(*initialUplinkBWP->pusch_Config));
|
||||
initialUplinkBWP->pusch_Config->present = NR_SetupRelease_PUSCH_Config_PR_setup;
|
||||
NR_PUSCH_Config_t *pusch_Config = calloc(1,sizeof(*pusch_Config));
|
||||
@@ -1196,7 +1250,6 @@ void fill_initial_SpCellConfig(rnti_t rnti,
|
||||
// options are 24, 48 or 96
|
||||
coreset->frequencyDomainResources.buf = calloc(1,6);
|
||||
if (0) {
|
||||
int curr_bwp = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
|
||||
if (curr_bwp < 48)
|
||||
coreset->frequencyDomainResources.buf[0] = 0xf0;
|
||||
else
|
||||
@@ -1295,6 +1348,234 @@ void fill_initial_SpCellConfig(rnti_t rnti,
|
||||
NR_PDSCH_ServingCellConfig_t *pdsch_servingcellconfig = calloc(1,sizeof(*pdsch_servingcellconfig));
|
||||
SpCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->present = NR_SetupRelease_PDSCH_ServingCellConfig_PR_setup;
|
||||
SpCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup = pdsch_servingcellconfig;
|
||||
|
||||
if (carrier->do_CSIRS) {
|
||||
|
||||
SpCellConfig->spCellConfigDedicated->csi_MeasConfig=calloc(1,sizeof(*SpCellConfig->spCellConfigDedicated->csi_MeasConfig));
|
||||
SpCellConfig->spCellConfigDedicated->csi_MeasConfig->present = NR_SetupRelease_CSI_MeasConfig_PR_setup;
|
||||
|
||||
NR_CSI_MeasConfig_t *csi_MeasConfig = calloc(1,sizeof(*csi_MeasConfig));
|
||||
SpCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup = csi_MeasConfig;
|
||||
|
||||
if (carrier->pdsch_AntennaPorts > 1) {
|
||||
csi_MeasConfig->csi_IM_ResourceToAddModList = calloc(1,sizeof(*csi_MeasConfig->csi_IM_ResourceToAddModList));
|
||||
NR_CSI_IM_Resource_t *imres0 = calloc(1,sizeof(*imres0));
|
||||
imres0->csi_IM_ResourceId = 0;
|
||||
imres0->csi_IM_ResourceElementPattern = calloc(1,sizeof(*imres0->csi_IM_ResourceElementPattern));
|
||||
imres0->csi_IM_ResourceElementPattern->present = NR_CSI_IM_Resource__csi_IM_ResourceElementPattern_PR_pattern1;
|
||||
imres0->csi_IM_ResourceElementPattern->choice.pattern1 = calloc(1,sizeof(*imres0->csi_IM_ResourceElementPattern->choice.pattern1));
|
||||
imres0->csi_IM_ResourceElementPattern->choice.pattern1->subcarrierLocation_p1 = NR_CSI_IM_Resource__csi_IM_ResourceElementPattern__pattern1__subcarrierLocation_p1_s4;
|
||||
imres0->csi_IM_ResourceElementPattern->choice.pattern1->symbolLocation_p1 = 6;
|
||||
imres0->freqBand = calloc(1,sizeof(*imres0->freqBand));
|
||||
imres0->freqBand->startingRB = 0;
|
||||
imres0->freqBand->nrofRBs = 108;
|
||||
imres0->periodicityAndOffset = calloc(1,sizeof(*imres0->periodicityAndOffset));
|
||||
imres0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots320;
|
||||
imres0->periodicityAndOffset->choice.slots320 = 0;
|
||||
ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_IM_ResourceToAddModList->list,imres0);
|
||||
csi_MeasConfig->csi_IM_ResourceSetToAddModList = calloc(1,sizeof(*csi_MeasConfig->csi_IM_ResourceSetToAddModList));
|
||||
NR_CSI_IM_ResourceSet_t *imset0 = calloc(1,sizeof(*imset0));
|
||||
imset0->csi_IM_ResourceSetId = 0;
|
||||
NR_CSI_IM_ResourceId_t *res0 = calloc(1,sizeof(*res0));
|
||||
*res0 = 0;
|
||||
ASN_SEQUENCE_ADD(&imset0->csi_IM_Resources,res0);
|
||||
ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_IM_ResourceSetToAddModList->list,imset0);
|
||||
}
|
||||
else {
|
||||
csi_MeasConfig->csi_IM_ResourceToAddModList = NULL;
|
||||
csi_MeasConfig->csi_IM_ResourceSetToAddModList = NULL;
|
||||
}
|
||||
|
||||
csi_MeasConfig->csi_IM_ResourceToReleaseList = NULL;
|
||||
csi_MeasConfig->csi_IM_ResourceSetToReleaseList = NULL;
|
||||
|
||||
csi_MeasConfig->nzp_CSI_RS_ResourceSetToAddModList = calloc(1,sizeof(*csi_MeasConfig->nzp_CSI_RS_ResourceSetToAddModList));
|
||||
NR_NZP_CSI_RS_ResourceSet_t *nzpcsirs0 = calloc(1,sizeof(*nzpcsirs0));
|
||||
nzpcsirs0->nzp_CSI_ResourceSetId = 0;
|
||||
NR_NZP_CSI_RS_ResourceId_t *nzpid0 = calloc(1,sizeof(*nzpid0));
|
||||
*nzpid0 = 0;
|
||||
ASN_SEQUENCE_ADD(&nzpcsirs0->nzp_CSI_RS_Resources,nzpid0);
|
||||
nzpcsirs0->repetition = NULL;
|
||||
nzpcsirs0->aperiodicTriggeringOffset = NULL;
|
||||
nzpcsirs0->trs_Info = NULL;
|
||||
ASN_SEQUENCE_ADD(&csi_MeasConfig->nzp_CSI_RS_ResourceSetToAddModList->list,nzpcsirs0);
|
||||
|
||||
csi_MeasConfig->nzp_CSI_RS_ResourceSetToReleaseList = NULL;
|
||||
|
||||
config_csirs(scc, csi_MeasConfig,carrier->pdsch_AntennaPorts,curr_bwp,carrier->do_CSIRS);
|
||||
|
||||
csi_MeasConfig->csi_SSB_ResourceSetToAddModList = calloc(1,sizeof(*csi_MeasConfig->csi_SSB_ResourceSetToAddModList));
|
||||
csi_MeasConfig->csi_SSB_ResourceSetToReleaseList = NULL;
|
||||
|
||||
NR_CSI_SSB_ResourceSet_t *ssbresset0 = calloc(1,sizeof(*ssbresset0));
|
||||
ssbresset0->csi_SSB_ResourceSetId=0;
|
||||
|
||||
uint64_t bitmap=0;
|
||||
switch (scc->ssb_PositionsInBurst->present) {
|
||||
case 1 :
|
||||
bitmap = ((uint64_t) scc->ssb_PositionsInBurst->choice.shortBitmap.buf[0])<<56;
|
||||
break;
|
||||
case 2 :
|
||||
bitmap = ((uint64_t) scc->ssb_PositionsInBurst->choice.mediumBitmap.buf[0])<<56;
|
||||
break;
|
||||
case 3 :
|
||||
for (int i=0; i<8; i++) {
|
||||
bitmap |= (((uint64_t) scc->ssb_PositionsInBurst->choice.longBitmap.buf[i])<<((7-i)*8));
|
||||
}
|
||||
break;
|
||||
default:
|
||||
AssertFatal(1==0,"SSB bitmap size value %d undefined (allowed values 1,2,3) \n", scc->ssb_PositionsInBurst->present);
|
||||
}
|
||||
|
||||
NR_SSB_Index_t *ssbresset[64];
|
||||
for (int i=0;i<64;i++) {
|
||||
if ((bitmap>>(63-i))&0x01){
|
||||
ssbresset[i]=calloc(1,sizeof(*ssbresset[i]));
|
||||
*ssbresset[i] = i;
|
||||
ASN_SEQUENCE_ADD(&ssbresset0->csi_SSB_ResourceList.list,ssbresset[i]);
|
||||
}
|
||||
}
|
||||
ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_SSB_ResourceSetToAddModList->list,ssbresset0);
|
||||
|
||||
csi_MeasConfig->csi_ResourceConfigToAddModList = calloc(1,sizeof(*csi_MeasConfig->csi_ResourceConfigToAddModList));
|
||||
|
||||
csi_MeasConfig->csi_ResourceConfigToReleaseList = NULL;
|
||||
NR_CSI_ResourceConfig_t *csires0 = calloc(1,sizeof(*csires0));
|
||||
csires0->csi_ResourceConfigId=0;
|
||||
csires0->csi_RS_ResourceSetList.present = NR_CSI_ResourceConfig__csi_RS_ResourceSetList_PR_nzp_CSI_RS_SSB;
|
||||
csires0->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB = calloc(1,sizeof(*csires0->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB));
|
||||
csires0->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB->nzp_CSI_RS_ResourceSetList = calloc(1,sizeof(*csires0->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB->nzp_CSI_RS_ResourceSetList));
|
||||
NR_NZP_CSI_RS_ResourceSetId_t *nzp0 = calloc(1,sizeof(*nzp0));
|
||||
*nzp0 = 0;
|
||||
ASN_SEQUENCE_ADD(&csires0->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB->nzp_CSI_RS_ResourceSetList->list,nzp0);
|
||||
csires0->bwp_Id = 0;
|
||||
csires0->resourceType = NR_CSI_ResourceConfig__resourceType_periodic;
|
||||
ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_ResourceConfigToAddModList->list,csires0);
|
||||
|
||||
|
||||
NR_CSI_ResourceConfig_t *csires1 = calloc(1,sizeof(*csires1));
|
||||
csires1->csi_ResourceConfigId=1;
|
||||
csires1->csi_RS_ResourceSetList.present = NR_CSI_ResourceConfig__csi_RS_ResourceSetList_PR_nzp_CSI_RS_SSB;
|
||||
csires1->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB = calloc(1,sizeof(*csires1->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB));
|
||||
csires1->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB->csi_SSB_ResourceSetList = calloc(1,sizeof(*csires1->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB->csi_SSB_ResourceSetList));
|
||||
NR_CSI_SSB_ResourceSetId_t *ssbres00 = calloc(1,sizeof(*ssbres00));
|
||||
*ssbres00 = 0;
|
||||
ASN_SEQUENCE_ADD(&csires1->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB->csi_SSB_ResourceSetList->list,ssbres00);
|
||||
csires1->bwp_Id = 0;
|
||||
csires1->resourceType = NR_CSI_ResourceConfig__resourceType_periodic;
|
||||
ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_ResourceConfigToAddModList->list,csires1);
|
||||
|
||||
if (carrier->pdsch_AntennaPorts > 1) {
|
||||
NR_CSI_ResourceConfig_t *csires2 = calloc(1,sizeof(*csires2));
|
||||
csires2->csi_ResourceConfigId=2;
|
||||
csires2->csi_RS_ResourceSetList.present = NR_CSI_ResourceConfig__csi_RS_ResourceSetList_PR_csi_IM_ResourceSetList;
|
||||
csires2->csi_RS_ResourceSetList.choice.csi_IM_ResourceSetList = calloc(1,sizeof(*csires2->csi_RS_ResourceSetList.choice.csi_IM_ResourceSetList));
|
||||
NR_CSI_IM_ResourceSetId_t *csiim00 = calloc(1,sizeof(*csiim00));
|
||||
*csiim00 = 0;
|
||||
ASN_SEQUENCE_ADD(&csires2->csi_RS_ResourceSetList.choice.csi_IM_ResourceSetList->list,csiim00);
|
||||
csires2->bwp_Id=0;
|
||||
csires2->resourceType = NR_CSI_ResourceConfig__resourceType_periodic;
|
||||
ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_ResourceConfigToAddModList->list,csires2);
|
||||
}
|
||||
|
||||
NR_PUCCH_CSI_Resource_t *pucchcsires1 = calloc(1,sizeof(*pucchcsires1));
|
||||
pucchcsires1->uplinkBandwidthPartId=0;
|
||||
pucchcsires1->pucch_Resource=1;
|
||||
csi_MeasConfig->csi_ReportConfigToAddModList = calloc(1,sizeof(*csi_MeasConfig->csi_ReportConfigToAddModList));
|
||||
csi_MeasConfig->csi_ReportConfigToReleaseList = NULL;
|
||||
if (carrier->pdsch_AntennaPorts > 1) {
|
||||
LOG_I(NR_RRC,"Filling CSI Report Config for RI_PMI_CQI\n");
|
||||
NR_CSI_ReportConfig_t *csirep1 = calloc(1,sizeof(*csirep1));
|
||||
csirep1->reportConfigId=0;
|
||||
csirep1->carrier=NULL;
|
||||
csirep1->resourcesForChannelMeasurement=0;
|
||||
csirep1->csi_IM_ResourcesForInterference=calloc(1,sizeof(*csirep1->csi_IM_ResourcesForInterference));
|
||||
*csirep1->csi_IM_ResourcesForInterference=2;
|
||||
csirep1->nzp_CSI_RS_ResourcesForInterference=NULL;
|
||||
csirep1->reportConfigType.present = NR_CSI_ReportConfig__reportConfigType_PR_periodic;
|
||||
csirep1->reportConfigType.choice.periodic = calloc(1,sizeof(*csirep1->reportConfigType.choice.periodic));
|
||||
csirep1->reportConfigType.choice.periodic->reportSlotConfig.present=NR_CSI_ReportPeriodicityAndOffset_PR_slots320;
|
||||
csirep1->reportConfigType.choice.periodic->reportSlotConfig.choice.slots320 = 8 + (20 * uid) % 320;
|
||||
ASN_SEQUENCE_ADD(&csirep1->reportConfigType.choice.periodic->pucch_CSI_ResourceList.list,pucchcsires1);
|
||||
csirep1->reportQuantity.present = NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_PMI_CQI;
|
||||
csirep1->reportQuantity.choice.cri_RI_PMI_CQI=(NULL_t)0;
|
||||
csirep1->reportFreqConfiguration = calloc(1,sizeof(*csirep1->reportFreqConfiguration));
|
||||
csirep1->reportFreqConfiguration->cqi_FormatIndicator = calloc(1,sizeof(*csirep1->reportFreqConfiguration->cqi_FormatIndicator));
|
||||
*csirep1->reportFreqConfiguration->cqi_FormatIndicator=NR_CSI_ReportConfig__reportFreqConfiguration__cqi_FormatIndicator_widebandCQI;
|
||||
csirep1->reportFreqConfiguration->pmi_FormatIndicator = calloc(1,sizeof(*csirep1->reportFreqConfiguration->pmi_FormatIndicator));
|
||||
*csirep1->reportFreqConfiguration->pmi_FormatIndicator=NR_CSI_ReportConfig__reportFreqConfiguration__pmi_FormatIndicator_widebandPMI;
|
||||
csirep1->reportFreqConfiguration->csi_ReportingBand = NULL;
|
||||
/*calloc(1,sizeof(*csirep1->reportFreqConfiguration->csi_ReportingBand));
|
||||
csirep1->reportFreqConfiguration->csi_ReportingBand->present = NR_CSI_ReportConfig__reportFreqConfiguration__csi_ReportingBand_PR_subbands7;
|
||||
csirep1->reportFreqConfiguration->csi_ReportingBand->choice.subbands7.size=1;
|
||||
csirep1->reportFreqConfiguration->csi_ReportingBand->choice.subbands7.bits_unused=1;
|
||||
csirep1->reportFreqConfiguration->csi_ReportingBand->choice.subbands7.buf=malloc(1);
|
||||
csirep1->reportFreqConfiguration->csi_ReportingBand->choice.subbands7.buf[0]=254;*/
|
||||
csirep1->timeRestrictionForChannelMeasurements= NR_CSI_ReportConfig__timeRestrictionForChannelMeasurements_notConfigured;
|
||||
csirep1->timeRestrictionForInterferenceMeasurements=NR_CSI_ReportConfig__timeRestrictionForInterferenceMeasurements_notConfigured;
|
||||
csirep1->codebookConfig=calloc(1,sizeof(*csirep1->codebookConfig));
|
||||
csirep1->codebookConfig->codebookType.present = NR_CodebookConfig__codebookType_PR_type1;
|
||||
csirep1->codebookConfig->codebookType.choice.type1 = calloc(1,sizeof(*csirep1->codebookConfig->codebookType.choice.type1));
|
||||
csirep1->codebookConfig->codebookType.choice.type1->subType.present=NR_CodebookConfig__codebookType__type1__subType_PR_typeI_SinglePanel;
|
||||
csirep1->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel=calloc(1,sizeof(*csirep1->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel));
|
||||
csirep1->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->nrOfAntennaPorts.present=
|
||||
NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts_PR_two;
|
||||
csirep1->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->nrOfAntennaPorts.choice.two=
|
||||
calloc(1,sizeof(*csirep1->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->nrOfAntennaPorts.choice.two));
|
||||
csirep1->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->nrOfAntennaPorts.choice.two->twoTX_CodebookSubsetRestriction.size=1;
|
||||
csirep1->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->nrOfAntennaPorts.choice.two->twoTX_CodebookSubsetRestriction.bits_unused=2;
|
||||
csirep1->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->nrOfAntennaPorts.choice.two->twoTX_CodebookSubsetRestriction.buf=malloc(1);
|
||||
csirep1->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->nrOfAntennaPorts.choice.two->twoTX_CodebookSubsetRestriction.buf[0]=0xfc;
|
||||
csirep1->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->typeI_SinglePanel_ri_Restriction.size=1;
|
||||
csirep1->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->typeI_SinglePanel_ri_Restriction.bits_unused=0;
|
||||
csirep1->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->typeI_SinglePanel_ri_Restriction.buf=malloc(1);
|
||||
csirep1->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->typeI_SinglePanel_ri_Restriction.buf[0]=0x03;
|
||||
csirep1->codebookConfig->codebookType.choice.type1->codebookMode=1;
|
||||
csirep1->dummy = NULL;
|
||||
csirep1->groupBasedBeamReporting.present = NR_CSI_ReportConfig__groupBasedBeamReporting_PR_disabled;
|
||||
csirep1->groupBasedBeamReporting.choice.disabled=calloc(1,sizeof(*csirep1->groupBasedBeamReporting.choice.disabled));
|
||||
//csirep1->groupBasedBeamReporting.choice.disabled->nrofReportedRS = calloc(1,sizeof(*csirep1->groupBasedBeamReporting.choice.disabled->nrofReportedRS));
|
||||
//*csirep1->groupBasedBeamReporting.choice.disabled->nrofReportedRS=NR_CSI_ReportConfig__groupBasedBeamReporting__disabled__nrofReportedRS_n1;
|
||||
csirep1->cqi_Table = calloc(1,sizeof(*csirep1->cqi_Table));
|
||||
*csirep1->cqi_Table = NR_CSI_ReportConfig__cqi_Table_table1;
|
||||
csirep1->subbandSize = NR_CSI_ReportConfig__subbandSize_value2;
|
||||
csirep1->non_PMI_PortIndication = NULL;
|
||||
csirep1->ext1 = NULL;
|
||||
ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_ReportConfigToAddModList->list,csirep1);
|
||||
}
|
||||
|
||||
LOG_I(NR_RRC,"Filling CSI Report Config for CRI_RSRP\n");
|
||||
NR_CSI_ReportConfig_t *csirep2 = calloc(1,sizeof(*csirep2));
|
||||
csirep2->reportConfigId=1;
|
||||
csirep2->carrier=NULL;
|
||||
csirep2->resourcesForChannelMeasurement=0;
|
||||
csirep2->csi_IM_ResourcesForInterference=NULL;
|
||||
csirep2->nzp_CSI_RS_ResourcesForInterference=NULL;
|
||||
csirep2->reportConfigType.present = NR_CSI_ReportConfig__reportConfigType_PR_periodic;
|
||||
csirep2->reportConfigType.choice.periodic = calloc(1,sizeof(*csirep2->reportConfigType.choice.periodic));
|
||||
csirep2->reportConfigType.choice.periodic->reportSlotConfig.present=NR_CSI_ReportPeriodicityAndOffset_PR_slots320;
|
||||
csirep2->reportConfigType.choice.periodic->reportSlotConfig.choice.slots320 = 28 + (20 * uid) % 320;
|
||||
ASN_SEQUENCE_ADD(&csirep2->reportConfigType.choice.periodic->pucch_CSI_ResourceList.list,pucchcsires1);
|
||||
csirep2->reportQuantity.present = NR_CSI_ReportConfig__reportQuantity_PR_cri_RSRP;
|
||||
csirep2->reportQuantity.choice.cri_RSRP=(NULL_t)0;
|
||||
csirep2->reportFreqConfiguration = calloc(1,sizeof(*csirep2->reportFreqConfiguration));
|
||||
csirep2->reportFreqConfiguration->cqi_FormatIndicator = NULL;
|
||||
csirep2->reportFreqConfiguration->pmi_FormatIndicator=NULL;
|
||||
csirep2->reportFreqConfiguration->csi_ReportingBand=NULL;
|
||||
csirep2->timeRestrictionForChannelMeasurements= NR_CSI_ReportConfig__timeRestrictionForChannelMeasurements_configured;
|
||||
csirep2->timeRestrictionForInterferenceMeasurements=NR_CSI_ReportConfig__timeRestrictionForInterferenceMeasurements_configured;
|
||||
csirep2->codebookConfig=NULL;
|
||||
csirep2->dummy = NULL;
|
||||
csirep2->groupBasedBeamReporting.present = NR_CSI_ReportConfig__groupBasedBeamReporting_PR_disabled;
|
||||
csirep2->groupBasedBeamReporting.choice.disabled=calloc(1,sizeof(*csirep2->groupBasedBeamReporting.choice.disabled));
|
||||
csirep2->groupBasedBeamReporting.choice.disabled->nrofReportedRS=calloc(1,sizeof(*csirep2->groupBasedBeamReporting.choice.disabled->nrofReportedRS));
|
||||
*csirep2->groupBasedBeamReporting.choice.disabled->nrofReportedRS=NR_CSI_ReportConfig__groupBasedBeamReporting__disabled__nrofReportedRS_n1;
|
||||
csirep2->cqi_Table = NULL;
|
||||
csirep2->subbandSize = NR_CSI_ReportConfig__subbandSize_value1;
|
||||
csirep2->non_PMI_PortIndication = NULL;
|
||||
csirep2->ext1 = NULL;
|
||||
ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_ReportConfigToAddModList->list,csirep2);
|
||||
}
|
||||
pdsch_servingcellconfig->codeBlockGroupTransmission = NULL;
|
||||
pdsch_servingcellconfig->xOverhead = NULL;
|
||||
pdsch_servingcellconfig->nrofHARQ_ProcessesForPDSCH = calloc(1, sizeof(*pdsch_servingcellconfig->nrofHARQ_ProcessesForPDSCH));
|
||||
@@ -1508,7 +1789,7 @@ void fill_initial_cellGroupConfig(rnti_t rnti,
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
uint8_t do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP,
|
||||
int do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP,
|
||||
uint8_t *const buffer,
|
||||
const uint8_t transaction_id,
|
||||
OCTET_STRING_t *masterCellGroup_from_DU,
|
||||
@@ -1523,7 +1804,7 @@ uint8_t do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP,
|
||||
NR_SRB_ToAddMod_t *SRB1_config = NULL;
|
||||
NR_PDCP_Config_t *pdcp_Config = NULL;
|
||||
NR_CellGroupConfig_t *cellGroupConfig = NULL;
|
||||
char masterCellGroup_buf[1000];
|
||||
char masterCellGroup_buf[3000];
|
||||
|
||||
AssertFatal(ue_context_pP != NULL,"ue_context_p is null\n");
|
||||
gNB_RRC_UE_t *ue_p = &ue_context_pP->ue_context;
|
||||
@@ -1586,7 +1867,7 @@ uint8_t do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP,
|
||||
NULL,
|
||||
(void *)cellGroupConfig,
|
||||
masterCellGroup_buf,
|
||||
1000);
|
||||
3000);
|
||||
|
||||
if(enc_rval.encoded == -1) {
|
||||
LOG_E(NR_RRC, "ASN1 message CellGroupConfig encoding failed (%s, %lu)!\n",
|
||||
@@ -1617,7 +1898,7 @@ uint8_t do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP,
|
||||
return -1;
|
||||
}
|
||||
|
||||
LOG_D(NR_RRC,"RRCSetup Encoded %zd bits (%zd bytes)\n",
|
||||
LOG_I(NR_RRC,"RRCSetup Encoded %zd bits (%zd bytes)\n",
|
||||
enc_rval.encoded,(enc_rval.encoded+7)/8);
|
||||
return((enc_rval.encoded+7)/8);
|
||||
}
|
||||
|
||||
@@ -114,7 +114,7 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, NR_CellGroupC
|
||||
|
||||
void fill_mastercellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, NR_CellGroupConfig_t *ue_context_mastercellGroup, uint8_t SRB_config_present, uint8_t DRB_config_present);
|
||||
|
||||
uint8_t do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP,
|
||||
int do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP,
|
||||
uint8_t *const buffer,
|
||||
const uint8_t transaction_id,
|
||||
OCTET_STRING_t *masterCellGroup_from_DU,
|
||||
|
||||
@@ -213,7 +213,7 @@ typedef struct HANDOVER_INFO_NR_s {
|
||||
typedef struct {
|
||||
char Payload[NR_RRC_BUFFER_SIZE_MAX];
|
||||
char Header[NR_RRC_HEADER_SIZE_MAX];
|
||||
char payload_size;
|
||||
int payload_size;
|
||||
} NR_RRC_BUFFER;
|
||||
|
||||
#define NR_RRC_BUFFER_SIZE sizeof(RRC_BUFFER_NR)
|
||||
@@ -286,10 +286,10 @@ typedef struct gNB_RRC_UE_s {
|
||||
NR_DRB_ToReleaseList_t *DRB_Release_configList2[RRC_TRANSACTION_IDENTIFIER_NUMBER];
|
||||
uint8_t DRB_active[8];
|
||||
|
||||
SRB_INFO SI;
|
||||
SRB_INFO Srb0;
|
||||
SRB_INFO_TABLE_ENTRY Srb1;
|
||||
SRB_INFO_TABLE_ENTRY Srb2;
|
||||
NR_SRB_INFO SI;
|
||||
NR_SRB_INFO Srb0;
|
||||
NR_SRB_INFO_TABLE_ENTRY Srb1;
|
||||
NR_SRB_INFO_TABLE_ENTRY Srb2;
|
||||
NR_MeasConfig_t *measConfig;
|
||||
HANDOVER_INFO *handover_info;
|
||||
NR_MeasResults_t *measResults;
|
||||
@@ -458,7 +458,6 @@ typedef struct {
|
||||
NR_CellGroupConfig_t *secondaryCellGroup[MAX_NR_RRC_UE_CONTEXTS];
|
||||
NR_SRB_INFO SI;
|
||||
NR_SRB_INFO Srb0;
|
||||
int initial_csi_index[MAX_NR_RRC_UE_CONTEXTS];
|
||||
int p_gNB;
|
||||
|
||||
} rrc_gNB_carrier_data_t;
|
||||
@@ -523,6 +522,8 @@ typedef struct gNB_RRC_INST_s {
|
||||
int cell_info_configured;
|
||||
pthread_mutex_t cell_info_mutex;
|
||||
|
||||
char *uecap_file;
|
||||
|
||||
// security configuration (preferred algorithms)
|
||||
nr_security_configuration_t security;
|
||||
} gNB_RRC_INST;
|
||||
|
||||
@@ -47,7 +47,7 @@ void rrc_config_nr_buffer(NR_SRB_INFO* Srb_info,
|
||||
uint8_t Lchan_type,
|
||||
uint8_t Role);
|
||||
|
||||
int8_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
|
||||
int mac_rrc_nr_data_req(const module_id_t Mod_idP,
|
||||
const int CC_id,
|
||||
const frame_t frameP,
|
||||
const rb_id_t Srb_id,
|
||||
@@ -81,10 +81,13 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
|
||||
int dl_antenna_ports,
|
||||
int minRXTXTIMEpdsch,
|
||||
int do_csirs,
|
||||
int initial_csi_index,
|
||||
int uid);
|
||||
|
||||
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon, NR_CSI_MeasConfig_t *csi_MeasConfig, int dl_antenna_ports, int do_csirs);
|
||||
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
|
||||
NR_CSI_MeasConfig_t *csi_MeasConfig,
|
||||
int dl_antenna_ports,
|
||||
int curr_bwp,
|
||||
int do_csirs);
|
||||
|
||||
void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
|
||||
NR_ServingCellConfig_t *servingcellconfigdedicated,
|
||||
@@ -93,7 +96,6 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon
|
||||
int dl_antenna_ports,
|
||||
int minRXTXTIMEpdsch,
|
||||
int do_csirs,
|
||||
int initial_csi_index,
|
||||
int uid);
|
||||
|
||||
void fill_default_rbconfig(NR_RadioBearerConfig_t *rbconfig,
|
||||
|
||||
+16
-59
@@ -202,56 +202,12 @@ static void init_NR_SI(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration
|
||||
pthread_mutex_unlock(&rrc->cell_info_mutex);
|
||||
|
||||
if (get_softmodem_params()->phy_test > 0 || get_softmodem_params()->do_ra > 0) {
|
||||
// This is for phytest only, emulate first X2 message if uecap.raw file is present
|
||||
FILE *fd;
|
||||
fd = fopen("uecap.raw","r");
|
||||
|
||||
if (fd != NULL) {
|
||||
char buffer[4096];
|
||||
int msg_len=fread(buffer,1,4096,fd);
|
||||
LOG_I(RRC,"Read in %d bytes for uecap\n",msg_len);
|
||||
LTE_UL_DCCH_Message_t *LTE_UL_DCCH_Message;
|
||||
asn_dec_rval_t dec_rval = uper_decode_complete( NULL,
|
||||
&asn_DEF_LTE_UL_DCCH_Message,
|
||||
(void **)<E_UL_DCCH_Message,
|
||||
(uint8_t *)buffer,
|
||||
msg_len);
|
||||
|
||||
if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) {
|
||||
AssertFatal(1==0,"NR_UL_DCCH_MESSAGE decode error\n");
|
||||
// free the memory
|
||||
SEQUENCE_free( &asn_DEF_LTE_UL_DCCH_Message, LTE_UL_DCCH_Message, 1 );
|
||||
return;
|
||||
}
|
||||
|
||||
fclose(fd);
|
||||
xer_fprint(stdout,&asn_DEF_LTE_UL_DCCH_Message, LTE_UL_DCCH_Message);
|
||||
// recreate enough of X2 EN-DC Container
|
||||
AssertFatal(LTE_UL_DCCH_Message->message.choice.c1.present == LTE_UL_DCCH_MessageType__c1_PR_ueCapabilityInformation,
|
||||
"ueCapabilityInformation not present\n");
|
||||
NR_CG_ConfigInfo_t *CG_ConfigInfo = calloc(1,sizeof(*CG_ConfigInfo));
|
||||
CG_ConfigInfo->criticalExtensions.present = NR_CG_ConfigInfo__criticalExtensions_PR_c1;
|
||||
CG_ConfigInfo->criticalExtensions.choice.c1 = calloc(1,sizeof(*CG_ConfigInfo->criticalExtensions.choice.c1));
|
||||
CG_ConfigInfo->criticalExtensions.choice.c1->present = NR_CG_ConfigInfo__criticalExtensions__c1_PR_cg_ConfigInfo;
|
||||
CG_ConfigInfo->criticalExtensions.choice.c1->choice.cg_ConfigInfo = calloc(1,sizeof(*CG_ConfigInfo->criticalExtensions.choice.c1->choice.cg_ConfigInfo));
|
||||
NR_CG_ConfigInfo_IEs_t *cg_ConfigInfo = CG_ConfigInfo->criticalExtensions.choice.c1->choice.cg_ConfigInfo;
|
||||
cg_ConfigInfo->ue_CapabilityInfo = calloc(1,sizeof(*cg_ConfigInfo->ue_CapabilityInfo));
|
||||
asn_enc_rval_t enc_rval = uper_encode_to_buffer(&asn_DEF_LTE_UE_CapabilityRAT_ContainerList,NULL,
|
||||
(void *)<E_UL_DCCH_Message->message.choice.c1.choice.ueCapabilityInformation.criticalExtensions.choice.c1.choice.ueCapabilityInformation_r8.ue_CapabilityRAT_ContainerList,buffer,4096);
|
||||
AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %jd)!\n",
|
||||
enc_rval.failed_type->name, enc_rval.encoded);
|
||||
OCTET_STRING_fromBuf(cg_ConfigInfo->ue_CapabilityInfo,
|
||||
(const char *)buffer,
|
||||
(enc_rval.encoded+7)>>3);
|
||||
parse_CG_ConfigInfo(rrc,CG_ConfigInfo,NULL);
|
||||
} else {
|
||||
struct rrc_gNB_ue_context_s *ue_context_p = rrc_gNB_allocate_new_UE_context(rrc);
|
||||
ue_context_p->ue_context.spCellConfig = calloc(1, sizeof(struct NR_SpCellConfig));
|
||||
ue_context_p->ue_context.spCellConfig->spCellConfigDedicated = configuration->scd;
|
||||
LOG_I(NR_RRC,"Adding new user (%p)\n",ue_context_p);
|
||||
if (!NODE_IS_CU(RC.nrrrc[0]->node_type)) {
|
||||
rrc_add_nsa_user(rrc,ue_context_p,NULL);
|
||||
}
|
||||
struct rrc_gNB_ue_context_s *ue_context_p = rrc_gNB_allocate_new_UE_context(rrc);
|
||||
ue_context_p->ue_context.spCellConfig = calloc(1, sizeof(struct NR_SpCellConfig));
|
||||
ue_context_p->ue_context.spCellConfig->spCellConfigDedicated = configuration->scd;
|
||||
LOG_I(NR_RRC,"Adding new user (%p)\n",ue_context_p);
|
||||
if (!NODE_IS_CU(RC.nrrrc[0]->node_type)) {
|
||||
rrc_add_nsa_user(rrc,ue_context_p,NULL);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -3867,20 +3823,20 @@ void nr_rrc_subframe_process(protocol_ctxt_t *const ctxt_pP, const int CC_id) {
|
||||
RB_FOREACH(ue_context_p, rrc_nr_ue_tree_s, &(RC.nrrrc[ctxt_pP->module_id]->rrc_ue_head)) {
|
||||
ctxt_pP->rnti = ue_context_p->ue_id_rnti;
|
||||
|
||||
if (fd) {
|
||||
if (ue_context_p->ue_context.Initialue_identity_5g_s_TMSI.presence == TRUE) {
|
||||
fprintf(fd,"NR RRC UE rnti %x: S-TMSI %x failure timer %d/8\n",
|
||||
if (fd) {
|
||||
if (ue_context_p->ue_context.Initialue_identity_5g_s_TMSI.presence == TRUE) {
|
||||
fprintf(fd,"NR RRC UE rnti %x: S-TMSI %x failure timer %d/8\n",
|
||||
ue_context_p->ue_id_rnti,
|
||||
ue_context_p->ue_context.Initialue_identity_5g_s_TMSI.fiveg_tmsi,
|
||||
ue_context_p->ue_context.ul_failure_timer);
|
||||
} else {
|
||||
fprintf(fd,"NR RRC UE rnti %x failure timer %d/8\n",
|
||||
} else {
|
||||
fprintf(fd,"NR RRC UE rnti %x failure timer %d/8\n",
|
||||
ue_context_p->ue_id_rnti,
|
||||
ue_context_p->ue_context.ul_failure_timer);
|
||||
}
|
||||
}
|
||||
|
||||
if (ue_context_p->ue_context.UE_Capability_nr) {
|
||||
fprintf(fd,"NR RRC UE cap: BW DL %x. BW UL %x, 256 QAM DL %s, 256 QAM UL %s, DL MIMO Layers %d UL MIMO Layers (CB) %d UL MIMO Layers (nonCB) %d\n",
|
||||
if (ue_context_p->ue_context.UE_Capability_nr) {
|
||||
fprintf(fd,"NR RRC UE cap: BW DL %x. BW UL %x, 256 QAM DL %s, 256 QAM UL %s, DL MIMO Layers %d UL MIMO Layers (CB) %d UL MIMO Layers (nonCB) %d\n",
|
||||
get_dl_bw_mask(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr),
|
||||
get_ul_bw_mask(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr),
|
||||
is_dl_256QAM_supported(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr) == 1 ? "yes" : "no",
|
||||
@@ -3888,7 +3844,7 @@ void nr_rrc_subframe_process(protocol_ctxt_t *const ctxt_pP, const int CC_id) {
|
||||
get_dl_mimo_layers(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr),
|
||||
get_ul_mimo_layersCB(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr),
|
||||
get_ul_mimo_layers(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr));
|
||||
}
|
||||
}
|
||||
}
|
||||
if (ue_context_p->ue_context.ul_failure_timer > 0) {
|
||||
ue_context_p->ue_context.ul_failure_timer++;
|
||||
@@ -3961,6 +3917,7 @@ void nr_rrc_subframe_process(protocol_ctxt_t *const ctxt_pP, const int CC_id) {
|
||||
|
||||
if (fd) fclose(fd);
|
||||
|
||||
|
||||
/* send a tick to x2ap */
|
||||
if (is_x2ap_enabled()){
|
||||
msg = itti_alloc_new_message(TASK_RRC_ENB, 0, X2AP_SUBFRAME_PROCESS);
|
||||
|
||||
@@ -38,6 +38,7 @@
|
||||
#include "openair2/LAYER2/NR_MAC_gNB/mac_proto.h"
|
||||
#include "openair2/RRC/LTE/rrc_eNB_GTPV1U.h"
|
||||
#include "executables/softmodem-common.h"
|
||||
#include "executables/nr-softmodem.h"
|
||||
#include <openair2/RRC/NR/rrc_gNB_UE_context.h>
|
||||
#include <openair3/ocp-gtpu/gtp_itf.h>
|
||||
#include "UTIL/OSA/osa_defs.h"
|
||||
@@ -143,6 +144,30 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
|
||||
unsigned char *kUPenc = NULL;
|
||||
unsigned char *kUPint = NULL;
|
||||
int i;
|
||||
|
||||
// In case of phy-test and do-ra mode, read UE capabilities directly from file
|
||||
if (get_softmodem_params()->phy_test == 1 || get_softmodem_params()->do_ra == 1) {
|
||||
NR_UE_NR_Capability_t* UE_Capability_nr = NULL;
|
||||
char UE_NR_Capability_xer[65536];
|
||||
FILE *f = NULL;
|
||||
if (uecap_file)
|
||||
f = fopen(uecap_file, "r");
|
||||
if(f){
|
||||
size_t size = fread(UE_NR_Capability_xer, 1, sizeof UE_NR_Capability_xer, f);
|
||||
if (size == 0 || size == sizeof UE_NR_Capability_xer)
|
||||
LOG_E(NR_RRC,"UE Capabilities XER file %s is too large (%ld)\n", uecap_file, size);
|
||||
else {
|
||||
UE_Capability_nr = CALLOC(1,sizeof(NR_UE_NR_Capability_t));
|
||||
asn_dec_rval_t dec_rval = xer_decode(0, &asn_DEF_NR_UE_NR_Capability, (void *)&UE_Capability_nr, UE_NR_Capability_xer, size);
|
||||
assert(dec_rval.code == RC_OK);
|
||||
xer_fprint(stdout,&asn_DEF_NR_UE_NR_Capability,(void *)UE_Capability_nr);
|
||||
}
|
||||
}
|
||||
else
|
||||
LOG_E(NR_RRC,"Could not open UE Capabilities input file. Not handling OAI UE Capabilities.\n");
|
||||
ue_context_p->ue_context.UE_Capability_nr = UE_Capability_nr;
|
||||
}
|
||||
|
||||
// NR RRCReconfiguration
|
||||
AssertFatal(rrc->Nb_ue < MAX_NR_RRC_UE_CONTEXTS,"cannot add another UE\n");
|
||||
ue_context_p->ue_context.reconfig = calloc(1,sizeof(NR_RRCReconfiguration_t));
|
||||
@@ -152,7 +177,6 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
|
||||
ue_context_p->ue_context.reconfig->criticalExtensions.present = NR_RRCReconfiguration__criticalExtensions_PR_rrcReconfiguration;
|
||||
NR_RRCReconfiguration_IEs_t *reconfig_ies=calloc(1,sizeof(NR_RRCReconfiguration_IEs_t));
|
||||
ue_context_p->ue_context.reconfig->criticalExtensions.choice.rrcReconfiguration = reconfig_ies;
|
||||
carrier->initial_csi_index[ue_context_p->local_uid + 1] = 0;
|
||||
ue_context_p->ue_context.rb_config = calloc(1,sizeof(NR_RRCReconfiguration_t));
|
||||
if (get_softmodem_params()->phy_test == 1 || get_softmodem_params()->do_ra == 1 || get_softmodem_params()->sa == 1){
|
||||
fill_default_rbconfig(ue_context_p->ue_context.rb_config,
|
||||
@@ -244,7 +268,6 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
|
||||
carrier->pdsch_AntennaPorts,
|
||||
carrier->minRXTXTIME,
|
||||
carrier->do_CSIRS,
|
||||
carrier->initial_csi_index[ue_context_p->local_uid + 1],
|
||||
ue_context_p->local_uid);
|
||||
} else {
|
||||
fill_default_reconfig(carrier->servingcellconfigcommon,
|
||||
@@ -254,7 +277,6 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
|
||||
carrier->pdsch_AntennaPorts,
|
||||
carrier->minRXTXTIME,
|
||||
carrier->do_CSIRS,
|
||||
carrier->initial_csi_index[ue_context_p->local_uid + 1],
|
||||
ue_context_p->local_uid);
|
||||
}
|
||||
ue_context_p->ue_id_rnti = ue_context_p->ue_context.secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity;
|
||||
|
||||
@@ -57,8 +57,8 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
|
||||
int dl_antenna_ports,
|
||||
int minRXTXTIME,
|
||||
int do_csirs,
|
||||
int initial_csi_index,
|
||||
int uid) {
|
||||
|
||||
AssertFatal(servingcellconfigcommon!=NULL,"servingcellconfigcommon is null\n");
|
||||
AssertFatal(secondaryCellGroup!=NULL,"secondaryCellGroup is null\n");
|
||||
|
||||
@@ -554,7 +554,9 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
|
||||
}
|
||||
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dataScramblingIdentityPDSCH = NULL;
|
||||
|
||||
if (dl_antenna_ports > 1)// for MIMO, we use DMRS Config Type 2
|
||||
if ((get_softmodem_params()->do_ra ||
|
||||
get_softmodem_params()->phy_test) &&
|
||||
dl_antenna_ports > 1) // for MIMO, we use DMRS Config Type 2 but only with OAI UE
|
||||
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type));
|
||||
else
|
||||
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=NULL;
|
||||
@@ -1033,7 +1035,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
|
||||
pdsch_servingcellconfig->pucch_Cell= NULL;
|
||||
pdsch_servingcellconfig->ext1=calloc(1,sizeof(*pdsch_servingcellconfig->ext1));
|
||||
pdsch_servingcellconfig->ext1->maxMIMO_Layers = calloc(1,sizeof(*pdsch_servingcellconfig->ext1->maxMIMO_Layers));
|
||||
*pdsch_servingcellconfig->ext1->maxMIMO_Layers = 2;
|
||||
*pdsch_servingcellconfig->ext1->maxMIMO_Layers = dl_antenna_ports;
|
||||
pdsch_servingcellconfig->ext1->processingType2Enabled = NULL;
|
||||
|
||||
secondaryCellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig=NULL;
|
||||
@@ -1054,7 +1056,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
|
||||
imres0->csi_IM_ResourceElementPattern->choice.pattern1->symbolLocation_p1 = 6;
|
||||
imres0->freqBand = calloc(1,sizeof(*imres0->freqBand));
|
||||
imres0->freqBand->startingRB = 0;
|
||||
imres0->freqBand->nrofRBs = 108;
|
||||
imres0->freqBand->nrofRBs = ((curr_bwp>>2)+(curr_bwp%4>0))<<2;
|
||||
imres0->periodicityAndOffset = calloc(1,sizeof(*imres0->periodicityAndOffset));
|
||||
imres0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots320;
|
||||
imres0->periodicityAndOffset->choice.slots320 = 0;
|
||||
@@ -1073,7 +1075,6 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
|
||||
}
|
||||
|
||||
csi_MeasConfig->csi_IM_ResourceToReleaseList = NULL;
|
||||
csi_MeasConfig->csi_IM_ResourceSetToAddModList = NULL;
|
||||
csi_MeasConfig->csi_IM_ResourceSetToReleaseList = NULL;
|
||||
|
||||
if (do_csirs) {
|
||||
@@ -1093,7 +1094,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
|
||||
|
||||
csi_MeasConfig->nzp_CSI_RS_ResourceSetToReleaseList = NULL;
|
||||
|
||||
config_csirs(servingcellconfigcommon, csi_MeasConfig,dl_antenna_ports,do_csirs);
|
||||
config_csirs(servingcellconfigcommon, csi_MeasConfig,dl_antenna_ports,curr_bwp,do_csirs);
|
||||
|
||||
csi_MeasConfig->csi_SSB_ResourceSetToAddModList = calloc(1,sizeof(*csi_MeasConfig->csi_SSB_ResourceSetToAddModList));
|
||||
csi_MeasConfig->csi_SSB_ResourceSetToReleaseList = NULL;
|
||||
@@ -1148,6 +1149,8 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
|
||||
NR_CSI_IM_ResourceSetId_t *csiim00 = calloc(1,sizeof(*csiim00));
|
||||
*csiim00 = 0;
|
||||
ASN_SEQUENCE_ADD(&csires2->csi_RS_ResourceSetList.choice.csi_IM_ResourceSetList->list,csiim00);
|
||||
csires2->bwp_Id = 1;
|
||||
csires2->resourceType = NR_CSI_ResourceConfig__resourceType_periodic;
|
||||
ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_ResourceConfigToAddModList->list,csires2);
|
||||
}
|
||||
|
||||
@@ -1292,7 +1295,11 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
|
||||
}
|
||||
|
||||
|
||||
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon, NR_CSI_MeasConfig_t *csi_MeasConfig, int dl_antenna_ports, int do_csirs) {
|
||||
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
|
||||
NR_CSI_MeasConfig_t *csi_MeasConfig,
|
||||
int dl_antenna_ports,
|
||||
int curr_bwp,
|
||||
int do_csirs) {
|
||||
|
||||
if (do_csirs) {
|
||||
csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList = calloc(1,sizeof(*csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList));
|
||||
@@ -1327,7 +1334,7 @@ void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon, NR_CSI_
|
||||
resourceMapping.density.present = NR_CSI_RS_ResourceMapping__density_PR_one;
|
||||
resourceMapping.density.choice.one = (NULL_t)0;
|
||||
resourceMapping.freqBand.startingRB = 0;
|
||||
resourceMapping.freqBand.nrofRBs = 108;
|
||||
resourceMapping.freqBand.nrofRBs = ((curr_bwp>>2)+(curr_bwp%4>0))<<2;
|
||||
nzpcsi0->resourceMapping = resourceMapping;
|
||||
nzpcsi0->powerControlOffset = 0;
|
||||
nzpcsi0->powerControlOffsetSS=calloc(1,sizeof(*nzpcsi0->powerControlOffsetSS));
|
||||
@@ -1336,7 +1343,8 @@ void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon, NR_CSI_
|
||||
nzpcsi0->periodicityAndOffset = calloc(1,sizeof(*nzpcsi0->periodicityAndOffset));
|
||||
nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots320;
|
||||
nzpcsi0->periodicityAndOffset->choice.slots320 = 0;
|
||||
nzpcsi0->qcl_InfoPeriodicCSI_RS = NULL;
|
||||
nzpcsi0->qcl_InfoPeriodicCSI_RS = calloc(1,sizeof(*nzpcsi0->qcl_InfoPeriodicCSI_RS));
|
||||
*nzpcsi0->qcl_InfoPeriodicCSI_RS=0;
|
||||
ASN_SEQUENCE_ADD(&csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList->list,nzpcsi0);
|
||||
}
|
||||
else
|
||||
@@ -1351,7 +1359,6 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon
|
||||
int dl_antenna_ports,
|
||||
int minRXTXTIME,
|
||||
int do_csirs,
|
||||
int initial_csi_index,
|
||||
int uid) {
|
||||
AssertFatal(servingcellconfigcommon!=NULL,"servingcellconfigcommon is null\n");
|
||||
AssertFatal(reconfig!=NULL,"reconfig is null\n");
|
||||
@@ -1367,7 +1374,6 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon
|
||||
dl_antenna_ports,
|
||||
minRXTXTIME,
|
||||
do_csirs,
|
||||
initial_csi_index,
|
||||
uid);
|
||||
|
||||
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
|
||||
|
||||
@@ -34,8 +34,8 @@
|
||||
#include "rrc_proto.h"
|
||||
#include "common/utils/LOG/log.h"
|
||||
|
||||
NR_UE_RRC_INST_t* nr_l3_init_ue(char* rrc_config_path){
|
||||
NR_UE_RRC_INST_t* nr_l3_init_ue(char* uecap, char* rrc_config_path){
|
||||
//LOG_I(RRC, "[MAIN] NR UE MAC initialization...\n");
|
||||
|
||||
return openair_rrc_top_init_ue_nr(rrc_config_path);
|
||||
return openair_rrc_top_init_ue_nr(uecap,rrc_config_path);
|
||||
}
|
||||
|
||||
+34
-13
@@ -422,7 +422,7 @@ void process_nsa_message(NR_UE_RRC_INST_t *rrc, nsa_message_t nsa_message_type,
|
||||
|
||||
}
|
||||
|
||||
NR_UE_RRC_INST_t* openair_rrc_top_init_ue_nr(char* rrc_config_path){
|
||||
NR_UE_RRC_INST_t* openair_rrc_top_init_ue_nr(char* uecap_file, char* rrc_config_path){
|
||||
int nr_ue;
|
||||
if(NB_NR_UE_INST > 0){
|
||||
NR_UE_rrc_inst = (NR_UE_RRC_INST_t *)calloc(NB_NR_UE_INST , sizeof(NR_UE_RRC_INST_t));
|
||||
@@ -496,6 +496,8 @@ NR_UE_RRC_INST_t* openair_rrc_top_init_ue_nr(char* rrc_config_path){
|
||||
RRC_LIST_INIT(NR_UE_rrc_inst[nr_ue].CSI_ReportConfig_list, NR_maxNrofCSI_ReportConfigurations);
|
||||
}
|
||||
|
||||
NR_UE_rrc_inst->uecap_file = uecap_file;
|
||||
|
||||
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra==1) {
|
||||
// read in files for RRCReconfiguration and RBconfig
|
||||
FILE *fd;
|
||||
@@ -505,7 +507,7 @@ NR_UE_RRC_INST_t* openair_rrc_top_init_ue_nr(char* rrc_config_path){
|
||||
else
|
||||
sprintf(filename,"reconfig.raw");
|
||||
fd = fopen(filename,"r");
|
||||
char buffer[1024];
|
||||
char buffer[1024];
|
||||
AssertFatal(fd,
|
||||
"cannot read file %s: errno %d, %s\n",
|
||||
filename,
|
||||
@@ -2634,14 +2636,18 @@ nr_rrc_ue_process_ueCapabilityEnquiry(
|
||||
//-----------------------------------------------------------------------------
|
||||
{
|
||||
asn_enc_rval_t enc_rval;
|
||||
asn_dec_rval_t dec_rval;
|
||||
NR_UL_DCCH_Message_t ul_dcch_msg;
|
||||
NR_UE_CapabilityRAT_Container_t ue_CapabilityRAT_Container;
|
||||
char UE_NR_Capability_xer[65536];
|
||||
size_t size;
|
||||
uint8_t buffer[200];
|
||||
int i;
|
||||
LOG_I(NR_RRC,"[UE %d] Frame %d: Receiving from SRB1 (DL-DCCH), Processing UECapabilityEnquiry (gNB %d)\n",
|
||||
ctxt_pP->module_id,
|
||||
ctxt_pP->frame,
|
||||
gNB_index);
|
||||
|
||||
memset((void *)&ul_dcch_msg,0,sizeof(NR_UL_DCCH_Message_t));
|
||||
memset((void *)&ue_CapabilityRAT_Container,0,sizeof(NR_UE_CapabilityRAT_Container_t));
|
||||
ul_dcch_msg.message.present = NR_UL_DCCH_MessageType_PR_c1;
|
||||
@@ -2650,20 +2656,35 @@ nr_rrc_ue_process_ueCapabilityEnquiry(
|
||||
ul_dcch_msg.message.choice.c1->choice.ueCapabilityInformation = CALLOC(1, sizeof(struct NR_UECapabilityInformation));
|
||||
ul_dcch_msg.message.choice.c1->choice.ueCapabilityInformation->rrc_TransactionIdentifier = UECapabilityEnquiry->rrc_TransactionIdentifier;
|
||||
ue_CapabilityRAT_Container.rat_Type = NR_RAT_Type_nr;
|
||||
NR_UE_NR_Capability_t* UE_Capability_nr;
|
||||
UE_Capability_nr = CALLOC(1,sizeof(NR_UE_NR_Capability_t));
|
||||
NR_BandNR_t *nr_bandnr;
|
||||
nr_bandnr = CALLOC(1,sizeof(NR_BandNR_t));
|
||||
nr_bandnr->bandNR = 1;
|
||||
ASN_SEQUENCE_ADD(
|
||||
&UE_Capability_nr->rf_Parameters.supportedBandListNR.list,
|
||||
nr_bandnr);
|
||||
NR_UE_NR_Capability_t* UE_Capability_nr = NULL;
|
||||
|
||||
char *file_path = NR_UE_rrc_inst[ctxt_pP->module_id].uecap_file;
|
||||
|
||||
FILE *f = NULL;
|
||||
if (file_path)
|
||||
f = fopen(file_path, "r");
|
||||
if(f){
|
||||
size = fread(UE_NR_Capability_xer, 1, sizeof UE_NR_Capability_xer, f);
|
||||
if (size == 0 || size == sizeof UE_NR_Capability_xer) {
|
||||
LOG_E(NR_RRC,"UE Capabilities XER file %s is too large (%ld)\n", file_path,size);
|
||||
free(UE_Capability_nr);
|
||||
return;
|
||||
}
|
||||
dec_rval = xer_decode(0, &asn_DEF_NR_UE_NR_Capability, (void *)&UE_Capability_nr, UE_NR_Capability_xer, size);
|
||||
assert(dec_rval.code == RC_OK);
|
||||
}
|
||||
else {
|
||||
UE_Capability_nr = CALLOC(1,sizeof(NR_UE_NR_Capability_t));
|
||||
NR_BandNR_t *nr_bandnr;
|
||||
nr_bandnr = CALLOC(1,sizeof(NR_BandNR_t));
|
||||
nr_bandnr->bandNR = 1;
|
||||
ASN_SEQUENCE_ADD(&UE_Capability_nr->rf_Parameters.supportedBandListNR.list,
|
||||
nr_bandnr);
|
||||
}
|
||||
OAI_NR_UECapability_t *UECap;
|
||||
UECap = CALLOC(1,sizeof(OAI_NR_UECapability_t));
|
||||
UECap->UE_NR_Capability = UE_Capability_nr;
|
||||
if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) {
|
||||
xer_fprint(stdout,&asn_DEF_NR_UE_NR_Capability,(void *)UE_Capability_nr);
|
||||
}
|
||||
xer_fprint(stdout,&asn_DEF_NR_UE_NR_Capability,(void *)UE_Capability_nr);
|
||||
|
||||
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_UE_NR_Capability,
|
||||
NULL,
|
||||
|
||||
@@ -70,7 +70,7 @@ typedef enum {
|
||||
nr_RadioBearerConfigX_r15=1
|
||||
} nsa_message_t;
|
||||
|
||||
#define MAX_UE_NR_CAPABILITY_SIZE 255
|
||||
#define MAX_UE_NR_CAPABILITY_SIZE 2048
|
||||
typedef struct OAI_NR_UECapability_s {
|
||||
uint8_t sdu[MAX_UE_NR_CAPABILITY_SIZE];
|
||||
uint8_t sdu_size;
|
||||
@@ -120,13 +120,15 @@ typedef struct NR_UE_RRC_INST_s {
|
||||
NR_DRB_ToAddMod_t *DRB_config[NB_CNX_UE][8];
|
||||
rb_id_t *defaultDRB; // remember the ID of the default DRB
|
||||
|
||||
NR_SRB_INFO Srb0[NB_SIG_CNX_UE];
|
||||
char *uecap_file;
|
||||
|
||||
NR_SRB_INFO Srb0[NB_SIG_CNX_UE];
|
||||
NR_SRB_INFO_TABLE_ENTRY Srb1[NB_CNX_UE];
|
||||
NR_SRB_INFO_TABLE_ENTRY Srb2[NB_CNX_UE];
|
||||
|
||||
uint8_t MBMS_flag;
|
||||
OAI_NR_UECapability_t *UECap;
|
||||
uint8_t *UECapability;
|
||||
uint8_t *UECapability;
|
||||
uint8_t UECapability_size;
|
||||
|
||||
RA_trigger_t ra_trigger;
|
||||
|
||||
@@ -56,14 +56,14 @@ extern queue_t nr_wait_ul_tti_req_queue;
|
||||
// main_rrc.c
|
||||
//
|
||||
/**\brief Layer 3 initialization*/
|
||||
NR_UE_RRC_INST_t* nr_l3_init_ue(char*);
|
||||
NR_UE_RRC_INST_t* nr_l3_init_ue(char*,char*);
|
||||
|
||||
//
|
||||
// UE_rrc.c
|
||||
//
|
||||
|
||||
/**\brief Initial the top level RRC structure instance*/
|
||||
NR_UE_RRC_INST_t* openair_rrc_top_init_ue_nr(char*);
|
||||
NR_UE_RRC_INST_t* openair_rrc_top_init_ue_nr(char*,char*);
|
||||
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user