Merge remote-tracking branch 'origin/HARQ_rv_circular_array' into integration_2022_wk30b
This commit is contained in:
@@ -67,7 +67,8 @@
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#define CONFIG_STRING_MACRLC_UL_BLER_TARGET_UPPER "ul_bler_target_upper"
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#define CONFIG_STRING_MACRLC_UL_BLER_TARGET_LOWER "ul_bler_target_lower"
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#define CONFIG_STRING_MACRLC_UL_MAX_MCS "ul_max_mcs"
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#define CONFIG_STRING_MACRLC_HARQ_ROUND_MAX "harq_round_max"
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#define CONFIG_STRING_MACRLC_DL_HARQ_ROUND_MAX "dl_harq_round_max"
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#define CONFIG_STRING_MACRLC_UL_HARQ_ROUND_MAX "ul_harq_round_max"
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#define CONFIG_STRING_MACRLC_MIN_GRANT_PRB "min_grant_prb"
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#define CONFIG_STRING_MACRLC_MIN_GRANT_MCS "min_grant_mcs"
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@@ -97,7 +98,7 @@
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{CONFIG_STRING_MACRLC_ULSCH_MAX_FRAME_INACTIVITY, NULL, 0, uptr:NULL, defintval:10, TYPE_UINT, 0}, \
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{CONFIG_STRING_MACRLC_PUSCHTARGETSNRX10, NULL, 0, iptr:NULL, defintval:200, TYPE_INT, 0}, \
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{CONFIG_STRING_MACRLC_PUCCHTARGETSNRX10, NULL, 0, iptr:NULL, defintval:150, TYPE_INT, 0}, \
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{CONFIG_STRING_MACRLC_UL_PRBBLACK_SNR_THRESHOLD, "SNR threshold to decide whether a PRB will be blacklisted or not", 0, iptr:NULL, defintval:10, TYPE_INT, 0}, \
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{CONFIG_STRING_MACRLC_UL_PRBBLACK_SNR_THRESHOLD, "SNR threshold to decide whether a PRB will be blacklisted or not", 0, iptr:NULL, defintval:10, TYPE_INT, 0}, \
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{CONFIG_STRING_MACRLC_PUCCHFAILURETHRES, NULL, 0, iptr:NULL, defintval:10, TYPE_INT, 0}, \
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{CONFIG_STRING_MACRLC_PUSCHFAILURETHRES, NULL, 0, iptr:NULL, defintval:10, TYPE_INT, 0}, \
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{CONFIG_STRING_MACRLC_DL_BLER_TARGET_UPPER, "Upper threshold of BLER to decrease DL MCS", 0, dblptr:NULL, defdblval:0.15, TYPE_DOUBLE, 0}, \
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@@ -106,9 +107,10 @@
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{CONFIG_STRING_MACRLC_UL_BLER_TARGET_UPPER, "Upper threshold of BLER to decrease UL MCS", 0, dblptr:NULL, defdblval:0.15, TYPE_DOUBLE, 0}, \
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{CONFIG_STRING_MACRLC_UL_BLER_TARGET_LOWER, "Lower threshold of BLER to increase UL MCS", 0, dblptr:NULL, defdblval:0.05, TYPE_DOUBLE, 0}, \
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{CONFIG_STRING_MACRLC_UL_MAX_MCS, "Maximum UL MCS that should be used", 0, u8ptr:NULL, defintval:9, TYPE_UINT8, 0}, \
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{CONFIG_STRING_MACRLC_HARQ_ROUND_MAX, "Maximum number of HARQ rounds", 0, u8ptr:NULL, defintval:4, TYPE_UINT8, 0}, \
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{CONFIG_STRING_MACRLC_DL_HARQ_ROUND_MAX, "Maximum number of DL HARQ rounds", 0, u8ptr:NULL, defintval:4, TYPE_UINT8, 0}, \
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{CONFIG_STRING_MACRLC_UL_HARQ_ROUND_MAX, "Maximum number of UL HARQ rounds", 0, u8ptr:NULL, defintval:4, TYPE_UINT8, 0}, \
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{CONFIG_STRING_MACRLC_MIN_GRANT_PRB, "Minimal Periodic ULSCH Grant PRBs", 0, u8ptr:NULL, defintval:5, TYPE_UINT8, 0}, \
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{CONFIG_STRING_MACRLC_MIN_GRANT_MCS, "Minimal Periodic ULSCH Grant MCS", 0, u8ptr:NULL, defintval:9, TYPE_UINT8, 0} \
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{CONFIG_STRING_MACRLC_MIN_GRANT_MCS, "Minimal Periodic ULSCH Grant MCS", 0, u8ptr:NULL, defintval:9, TYPE_UINT8, 0}, \
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}
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#define MACRLC_CC_IDX 0
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#define MACRLC_TRANSPORT_N_PREFERENCE_IDX 1
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@@ -139,9 +141,46 @@
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#define MACRLC_UL_BLER_TARGET_UPPER_IDX 26
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#define MACRLC_UL_BLER_TARGET_LOWER_IDX 27
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#define MACRLC_UL_MAX_MCS_IDX 28
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#define MACRLC_HARQ_ROUND_MAX_IDX 29
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#define MACRLC_MIN_GRANT_PRB_IDX 30
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#define MACRLC_MIN_GRANT_MCS_IDX 31
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#define MACRLC_DL_HARQ_ROUND_MAX_IDX 29
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#define MACRLC_UL_HARQ_ROUND_MAX_IDX 30
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#define MACRLC_MIN_GRANT_PRB_IDX 31
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#define MACRLC_MIN_GRANT_MCS_IDX 32
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#define MACRLCPARAMS_CHECK { \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s2 = { config_check_intrange, {1, 8} } }, /* DL max HARQ rounds */ \
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{ .s2 = { config_check_intrange, {1, 8} } }, /* UL max HARQ rounds */ \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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}
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/*---------------------------------------------------------------------------------------------------------------------------------------------------------*/
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#endif
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@@ -816,6 +816,10 @@ void RCconfig_nr_macrlc() {
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}
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paramdef_t MacRLC_Params[] = MACRLCPARAMS_DESC;
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paramlist_def_t MacRLC_ParamList = {CONFIG_STRING_MACRLC_LIST,NULL,0};
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/* map parameter checking array instances to parameter definition array instances */
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checkedparam_t config_check_MacRLCParams [] = MACRLCPARAMS_CHECK;
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for (int i = 0; i < sizeof(MacRLC_Params) / sizeof(paramdef_t); ++i)
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MacRLC_Params[i].chkPptr = &(config_check_MacRLCParams[i]);
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config_getlist( &MacRLC_ParamList,MacRLC_Params,sizeof(MacRLC_Params)/sizeof(paramdef_t), NULL);
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if ( MacRLC_ParamList.numelt > 0) {
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@@ -887,11 +891,12 @@ void RCconfig_nr_macrlc() {
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dl_bler_options->upper = *(MacRLC_ParamList.paramarray[j][MACRLC_DL_BLER_TARGET_UPPER_IDX].dblptr);
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dl_bler_options->lower = *(MacRLC_ParamList.paramarray[j][MACRLC_DL_BLER_TARGET_LOWER_IDX].dblptr);
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dl_bler_options->max_mcs = *(MacRLC_ParamList.paramarray[j][MACRLC_DL_MAX_MCS_IDX].u8ptr);
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dl_bler_options->harq_round_max = *(MacRLC_ParamList.paramarray[j][MACRLC_DL_HARQ_ROUND_MAX_IDX].u8ptr);
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NR_bler_options_t *ul_bler_options = &RC.nrmac[j]->ul_bler;
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ul_bler_options->upper = *(MacRLC_ParamList.paramarray[j][MACRLC_UL_BLER_TARGET_UPPER_IDX].dblptr);
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ul_bler_options->lower = *(MacRLC_ParamList.paramarray[j][MACRLC_UL_BLER_TARGET_LOWER_IDX].dblptr);
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ul_bler_options->max_mcs = *(MacRLC_ParamList.paramarray[j][MACRLC_UL_MAX_MCS_IDX].u8ptr);
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RC.nrmac[j]->harq_round_max = *(MacRLC_ParamList.paramarray[j][MACRLC_HARQ_ROUND_MAX_IDX].u8ptr);
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ul_bler_options->harq_round_max = *(MacRLC_ParamList.paramarray[j][MACRLC_UL_HARQ_ROUND_MAX_IDX].u8ptr);
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RC.nrmac[j]->min_grant_prb = *(MacRLC_ParamList.paramarray[j][MACRLC_MIN_GRANT_PRB_IDX].u8ptr);
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RC.nrmac[j]->min_grant_mcs = *(MacRLC_ParamList.paramarray[j][MACRLC_MIN_GRANT_MCS_IDX].u8ptr);
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RC.nrmac[j]->num_ulprbbl = num_prbbl;
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@@ -3716,7 +3716,7 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info,
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#endif
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*/
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LOG_I(NR_MAC, "[%d.%d] Received TA_COMMAND %u TAGID %u CC_id %d\n", frameP, slot, ul_time_alignment->ta_command, ul_time_alignment->tag_id, CC_id);
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LOG_I(NR_MAC, "[%d.%d] Received TA_COMMAND %u TAGID %u CC_id %d\n", frameP, slot, ul_time_alignment->ta_command, ul_time_alignment->tag_id, CC_id);
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break;
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case DL_SCH_LCID_CON_RES_ID:
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@@ -1090,13 +1090,16 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
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pusch_pdu->vrb_to_prb_mapping = 0;
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pusch_pdu->frequency_hopping = fh;
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//pusch_pdu->tx_direct_current_location;//The uplink Tx Direct Current location for the carrier. Only values in the value range of this field between 0 and 3299, which indicate the subcarrier index within the carrier corresponding 1o the numerology of the corresponding uplink BWP and value 3300, which indicates "Outside the carrier" and value 3301, which indicates "Undetermined position within the carrier" are used. [TS38.331, UplinkTxDirectCurrentBWP IE]
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//pusch_pdu->tx_direct_current_location;
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//The uplink Tx Direct Current location for the carrier. Only values in the value range of this field between 0 and 3299,
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//which indicate the subcarrier index within the carrier corresponding 1o the numerology of the corresponding uplink BWP and value 3300,
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//which indicates "Outside the carrier" and value 3301, which indicates "Undetermined position within the carrier" are used. [TS38.331, UplinkTxDirectCurrentBWP IE]
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pusch_pdu->uplink_frequency_shift_7p5khz = 0;
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//Resource Allocation in time domain
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pusch_pdu->start_symbol_index = start_symbol_index;
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pusch_pdu->nr_of_symbols = nr_of_symbols;
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//Optional Data only included if indicated in pduBitmap
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pusch_pdu->pusch_data.rv_index = nr_rv_round_map[round];
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pusch_pdu->pusch_data.rv_index = nr_rv_round_map[round%4];
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pusch_pdu->pusch_data.harq_process_id = 0;
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pusch_pdu->pusch_data.new_data_indicator = 1;
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pusch_pdu->pusch_data.num_cb = 0;
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@@ -1804,7 +1807,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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pdsch_pdu_rel15->qamModOrder[0] = 2;
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pdsch_pdu_rel15->mcsIndex[0] = mcsIndex;
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pdsch_pdu_rel15->mcsTable[0] = mcsTableIdx;
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pdsch_pdu_rel15->rvIndex[0] = nr_rv_round_map[harq->round];
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pdsch_pdu_rel15->rvIndex[0] = nr_rv_round_map[harq->round%4];
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pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
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pdsch_pdu_rel15->nrOfLayers = 1;
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pdsch_pdu_rel15->transmissionScheme = 0;
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@@ -437,7 +437,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
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pdsch_pdu_rel15->qamModOrder[0] = 2;
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pdsch_pdu_rel15->mcsIndex[0] = gNB_mac->sched_ctrlCommon->sched_pdsch.mcs;
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pdsch_pdu_rel15->mcsTable[0] = 0;
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pdsch_pdu_rel15->rvIndex[0] = nr_rv_round_map[0];
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pdsch_pdu_rel15->rvIndex[0] = 0;
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pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
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pdsch_pdu_rel15->nrOfLayers = 1;
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pdsch_pdu_rel15->transmissionScheme = 0;
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@@ -643,7 +643,10 @@ void pf_dl(module_id_t module_id,
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const NR_bler_options_t *bo = &mac->dl_bler;
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const int max_mcs_table = ps->mcsTableIdx == 1 ? 27 : 28;
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const int max_mcs = min(sched_ctrl->dl_max_mcs, max_mcs_table);
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sched_pdsch->mcs = get_mcs_from_bler(bo, stats, &sched_ctrl->dl_bler_stats, max_mcs, frame);
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if (bo->harq_round_max == 1)
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sched_pdsch->mcs = max_mcs;
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else
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sched_pdsch->mcs = get_mcs_from_bler(bo, stats, &sched_ctrl->dl_bler_stats, max_mcs, frame);
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UE->layers = set_dl_nrOfLayers(sched_ctrl);
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const uint8_t Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
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const uint16_t R = nr_get_code_rate_dl(sched_pdsch->mcs, ps->mcsTableIdx);
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@@ -1015,7 +1018,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
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TBS,
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current_harq_pid,
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harq->round,
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nr_rv_round_map[harq->round],
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nr_rv_round_map[harq->round%4],
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harq->ndi,
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pucch->timing_indicator,
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pucch->frame,
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@@ -1083,8 +1086,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
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pdsch_pdu->mcsIndex[0] = sched_pdsch->mcs;
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pdsch_pdu->mcsTable[0] = ps->mcsTableIdx;
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AssertFatal(harq!=NULL,"harq is null\n");
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AssertFatal(harq->round<4,"%d",harq->round);
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pdsch_pdu->rvIndex[0] = nr_rv_round_map[harq->round];
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AssertFatal(harq->round<gNB_mac->dl_bler.harq_round_max,"%d",harq->round);
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pdsch_pdu->rvIndex[0] = nr_rv_round_map[harq->round%4];
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pdsch_pdu->TBSize[0] = TBS;
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pdsch_pdu->dataScramblingId = *scc->physCellId;
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pdsch_pdu->nrOfLayers = nrOfLayers;
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@@ -929,7 +929,7 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
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for (int harq_bit = 0; harq_bit < uci_01->harq->num_harq; harq_bit++) {
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const uint8_t harq_value = uci_01->harq->harq_list[harq_bit].harq_value;
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const uint8_t harq_confidence = uci_01->harq->harq_confidence_level;
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NR_UE_harq_t *harq = find_harq(frame, slot, UE, RC.nrmac[mod_id]->harq_round_max);
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NR_UE_harq_t *harq = find_harq(frame, slot, UE, RC.nrmac[mod_id]->dl_bler.harq_round_max);
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if (!harq) {
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LOG_E(NR_MAC, "Oh no! Could not find a harq in %s!\n", __FUNCTION__);
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break;
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@@ -938,7 +938,7 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
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const int8_t pid = sched_ctrl->feedback_dl_harq.head;
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remove_front_nr_list(&sched_ctrl->feedback_dl_harq);
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LOG_D(NR_MAC,"%4d.%2d bit %d pid %d ack/nack %d\n",frame, slot, harq_bit,pid,harq_value);
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handle_dl_harq(UE, pid, harq_value == 0 && harq_confidence == 0, RC.nrmac[mod_id]->harq_round_max);
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handle_dl_harq(UE, pid, harq_value == 0 && harq_confidence == 0, RC.nrmac[mod_id]->dl_bler.harq_round_max);
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if (harq_confidence == 1) UE->mac_stats.pucch0_DTX++;
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}
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}
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@@ -991,13 +991,13 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
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// iterate over received harq bits
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for (int harq_bit = 0; harq_bit < uci_234->harq.harq_bit_len; harq_bit++) {
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const int acknack = ((uci_234->harq.harq_payload[harq_bit >> 3]) >> harq_bit) & 0x01;
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NR_UE_harq_t *harq = find_harq(frame, slot, UE, RC.nrmac[mod_id]->harq_round_max);
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NR_UE_harq_t *harq = find_harq(frame, slot, UE, RC.nrmac[mod_id]->dl_bler.harq_round_max);
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if (!harq)
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break;
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DevAssert(harq->is_waiting);
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const int8_t pid = sched_ctrl->feedback_dl_harq.head;
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remove_front_nr_list(&sched_ctrl->feedback_dl_harq);
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handle_dl_harq(UE, pid, uci_234->harq.harq_crc != 1 && acknack, RC.nrmac[mod_id]->harq_round_max);
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handle_dl_harq(UE, pid, uci_234->harq.harq_crc != 1 && acknack, RC.nrmac[mod_id]->dl_bler.harq_round_max);
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}
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}
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if ((uci_234->pduBitmap >> 2) & 0x01) {
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@@ -455,7 +455,7 @@ void handle_nr_ul_harq(const int CC_idP,
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remove_front_nr_list(&sched_ctrl->feedback_ul_harq);
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sched_ctrl->ul_harq_processes[harq_pid].is_waiting = false;
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if(sched_ctrl->ul_harq_processes[harq_pid].round >= RC.nrmac[mod_id]->harq_round_max - 1) {
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if(sched_ctrl->ul_harq_processes[harq_pid].round >= RC.nrmac[mod_id]->ul_bler.harq_round_max - 1) {
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abort_nr_ul_harq(UE, harq_pid);
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} else {
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sched_ctrl->ul_harq_processes[harq_pid].round++;
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@@ -476,7 +476,7 @@ void handle_nr_ul_harq(const int CC_idP,
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harq_pid,
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crc_pdu->rnti);
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add_tail_nr_list(&sched_ctrl->available_ul_harq, harq_pid);
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} else if (harq->round >= RC.nrmac[mod_id]->harq_round_max - 1) {
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} else if (harq->round >= RC.nrmac[mod_id]->ul_bler.harq_round_max - 1) {
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abort_nr_ul_harq(UE, harq_pid);
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LOG_D(NR_MAC,
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"RNTI %04x: Ulharq id %d crc failed in all rounds\n",
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@@ -751,8 +751,8 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
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return;
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}
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if (ra->msg3_round >= MAX_HARQ_ROUNDS - 1) {
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LOG_D(NR_MAC, "Random Access %i failed at state %i (Reached msg3 max harq rounds)\n", i, ra->state);
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if (ra->msg3_round >= gNB_mac->ul_bler.harq_round_max - 1) {
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LOG_W(NR_MAC, "Random Access %i failed at state %i (Reached msg3 max harq rounds)\n", i, ra->state);
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nr_mac_remove_ra_rnti(gnb_mod_idP, ra->rnti);
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nr_clear_ra_proc(gnb_mod_idP, CC_idP, frameP, ra);
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return;
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@@ -1149,7 +1149,10 @@ void pf_ul(module_id_t module_id,
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||||
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const NR_bler_options_t *bo = &nrmac->ul_bler;
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const int max_mcs = bo->max_mcs; /* no per-user maximum MCS yet */
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sched_pusch->mcs = get_mcs_from_bler(bo, stats, &UE->UE_sched_ctrl.ul_bler_stats, max_mcs, frame);
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if (bo->harq_round_max == 1)
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sched_pusch->mcs = max_mcs;
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else
|
||||
sched_pusch->mcs = get_mcs_from_bler(bo, stats, &UE->UE_sched_ctrl.ul_bler_stats, max_mcs, frame);
|
||||
|
||||
/* Schedule UE on SR or UL inactivity and no data (otherwise, will be scheduled
|
||||
* based on data to transmit) */
|
||||
@@ -1627,7 +1630,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
|
||||
NR_pusch_semi_static_t *ps = &sched_ctrl->pusch_semi_static;
|
||||
|
||||
/* Statistics */
|
||||
AssertFatal(cur_harq->round < 8, "Indexing ulsch_rounds[%d] is out of bounds\n", cur_harq->round);
|
||||
AssertFatal(cur_harq->round < nr_mac->ul_bler.harq_round_max, "Indexing ulsch_rounds[%d] is out of bounds\n", cur_harq->round);
|
||||
UE->mac_stats.ul.rounds[cur_harq->round]++;
|
||||
if (cur_harq->round == 0) {
|
||||
UE->mac_stats.ulsch_total_bytes_scheduled += sched_pusch->tb_size;
|
||||
@@ -1673,7 +1676,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
|
||||
sched_pusch->tb_size,
|
||||
harq_id,
|
||||
cur_harq->round,
|
||||
nr_rv_round_map[cur_harq->round],
|
||||
nr_rv_round_map[cur_harq->round%4],
|
||||
cur_harq->ndi,
|
||||
sched_ctrl->estimated_ul_buffer,
|
||||
sched_ctrl->sched_ul_bytes,
|
||||
@@ -1769,8 +1772,8 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
|
||||
pusch_pdu->nr_of_symbols = ps->nrOfSymbols;
|
||||
|
||||
/* PUSCH PDU */
|
||||
AssertFatal(cur_harq->round < 4, "Indexing nr_rv_round_map[%d] is out of bounds\n", cur_harq->round);
|
||||
pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round];
|
||||
AssertFatal(cur_harq->round < nr_mac->ul_bler.harq_round_max, "Indexing nr_rv_round_map[%d] is out of bounds\n", cur_harq->round%4);
|
||||
pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round%4];
|
||||
pusch_pdu->pusch_data.harq_process_id = harq_id;
|
||||
pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi;
|
||||
pusch_pdu->pusch_data.tb_size = sched_pusch->tb_size;
|
||||
|
||||
@@ -105,17 +105,21 @@ size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset
|
||||
end - output,
|
||||
"UE %04x: CQI %d, RI %d, PMI (%d,%d)\n",
|
||||
UE->rnti,
|
||||
UE->UE_sched_ctrl.CSI_report.cri_ri_li_pmi_cqi_report.wb_cqi_1tb,
|
||||
UE->UE_sched_ctrl.CSI_report.cri_ri_li_pmi_cqi_report.ri+1,
|
||||
UE->UE_sched_ctrl.CSI_report.cri_ri_li_pmi_cqi_report.pmi_x1,
|
||||
UE->UE_sched_ctrl.CSI_report.cri_ri_li_pmi_cqi_report.pmi_x2);
|
||||
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.wb_cqi_1tb,
|
||||
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.ri+1,
|
||||
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x1,
|
||||
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x2);
|
||||
|
||||
output += snprintf(output,
|
||||
end - output,
|
||||
"UE %04x: dlsch_rounds %"PRIu64"/%"PRIu64"/%"PRIu64"/%"PRIu64", dlsch_errors %"PRIu64", pucch0_DTX %d, BLER %.5f MCS %d\n",
|
||||
UE->rnti,
|
||||
stats->dl.rounds[0], stats->dl.rounds[1],
|
||||
stats->dl.rounds[2], stats->dl.rounds[3],
|
||||
"UE %04x: dlsch_rounds ", UE->rnti);
|
||||
output += snprintf(output, end - output, "%"PRIu64, stats->dl.rounds[0]);
|
||||
for (int i = 1; i < gNB->dl_bler.harq_round_max; i++)
|
||||
output += snprintf(output, end - output, "/%"PRIu64, stats->dl.rounds[i]);
|
||||
|
||||
output += snprintf(output,
|
||||
end - output,
|
||||
", dlsch_errors %"PRIu64", pucch0_DTX %d, BLER %.5f MCS %d\n",
|
||||
stats->dl.errors,
|
||||
stats->pucch0_DTX,
|
||||
sched_ctrl->dl_bler_stats.bler,
|
||||
@@ -127,23 +131,27 @@ size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset
|
||||
output += snprintf(output,
|
||||
end - output,
|
||||
"UE %04x: dlsch_total_bytes %"PRIu64"\n",
|
||||
UE->rnti,
|
||||
stats->dl.total_bytes);
|
||||
UE->rnti, stats->dl.total_bytes);
|
||||
output += snprintf(output,
|
||||
end - output,
|
||||
"UE %04x: ulsch_rounds %"PRIu64"/%"PRIu64"/%"PRIu64"/%"PRIu64", ulsch_DTX %d, ulsch_errors %"PRIu64", BLER %.5f MCS %d\n",
|
||||
UE->rnti,
|
||||
stats->ul.rounds[0], stats->ul.rounds[1],
|
||||
stats->ul.rounds[2], stats->ul.rounds[3],
|
||||
"UE %04x: ulsch_rounds ", UE->rnti);
|
||||
output += snprintf(output, end - output, "%"PRIu64, stats->ul.rounds[0]);
|
||||
for (int i = 1; i < gNB->ul_bler.harq_round_max; i++)
|
||||
output += snprintf(output, end - output, "/%"PRIu64, stats->ul.rounds[i]);
|
||||
|
||||
output += snprintf(output,
|
||||
end - output,
|
||||
", ulsch_DTX %d, ulsch_errors %"PRIu64", BLER %.5f MCS %d\n",
|
||||
stats->ulsch_DTX,
|
||||
stats->ul.errors,
|
||||
sched_ctrl->ul_bler_stats.bler,
|
||||
sched_ctrl->ul_bler_stats.mcs);
|
||||
output += snprintf(output,
|
||||
end - output,
|
||||
"UE %04x: ulsch_total_bytes_scheduled %"PRIu64", ulsch_total_bytes_received %"PRIu64"\n",
|
||||
UE->rnti,
|
||||
stats->ulsch_total_bytes_scheduled, stats->ul.total_bytes);
|
||||
"UE %04x: ulsch_total_bytes_scheduled %"PRIu64", ulsch_total_bytes_received %"PRIu64"\n",
|
||||
UE->rnti,
|
||||
stats->ulsch_total_bytes_scheduled, stats->ul.total_bytes);
|
||||
|
||||
for (int lc_id = 0; lc_id < 63; lc_id++) {
|
||||
if (stats->dl.lc_bytes[lc_id] > 0)
|
||||
output += snprintf(output,
|
||||
|
||||
@@ -75,7 +75,6 @@
|
||||
#define MAX_NUM_BWP 5
|
||||
#define MAX_NUM_CORESET 12
|
||||
#define MAX_NUM_CCE 90
|
||||
#define MAX_HARQ_ROUNDS 4
|
||||
/*!\brief Maximum number of random access process */
|
||||
#define NR_NB_RA_PROC_MAX 4
|
||||
#define MAX_NUM_OF_SSB 64
|
||||
@@ -668,6 +667,7 @@ typedef struct NR_bler_options {
|
||||
double upper;
|
||||
double lower;
|
||||
uint8_t max_mcs;
|
||||
uint8_t harq_round_max;
|
||||
} NR_bler_options_t;
|
||||
|
||||
/*! \brief UE list used by gNB to order UEs/CC for scheduling*/
|
||||
@@ -821,7 +821,6 @@ typedef struct gNB_MAC_INST_s {
|
||||
bool first_MIB;
|
||||
NR_bler_options_t dl_bler;
|
||||
NR_bler_options_t ul_bler;
|
||||
uint8_t harq_round_max;
|
||||
uint8_t min_grant_prb;
|
||||
uint8_t min_grant_mcs;
|
||||
} gNB_MAC_INST;
|
||||
|
||||
Reference in New Issue
Block a user