vrb_map_UL for every slot
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@@ -342,6 +342,11 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
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req->Slot = i;
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req->Slot = i;
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}
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}
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RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL =
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calloc(n * 275, sizeof(uint16_t));
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AssertFatal(RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL,
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"could not allocate memory for RC.nrmac[]->common_channels[0].vrb_map_UL\n");
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LOG_I(MAC,"Configuring common parameters from NR ServingCellConfig\n");
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LOG_I(MAC,"Configuring common parameters from NR ServingCellConfig\n");
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config_common(Mod_idP,
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config_common(Mod_idP,
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@@ -415,7 +415,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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// clear vrb_maps
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// clear vrb_maps
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memset(cc[CC_id].vrb_map, 0, sizeof(uint16_t) * 275);
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memset(cc[CC_id].vrb_map, 0, sizeof(uint16_t) * 275);
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memset(cc[CC_id].vrb_map_UL, 0, sizeof(uint16_t) * 275);
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// clear last scheduled slot's content (only)!
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const int num_slots = slots_per_frame[*scc->ssbSubcarrierSpacing];
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const int last_slot = (slot + num_slots - 1) % num_slots;
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uint16_t *vrb_map_UL = cc[CC_id].vrb_map_UL;
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memset(&vrb_map_UL[last_slot * 275], 0, sizeof(uint16_t) * 275);
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clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frame, slot);
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clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frame, slot);
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}
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}
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@@ -192,8 +192,9 @@ typedef struct {
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NR_RA_t ra[NR_NB_RA_PROC_MAX];
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NR_RA_t ra[NR_NB_RA_PROC_MAX];
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/// VRB map for common channels
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/// VRB map for common channels
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uint16_t vrb_map[275];
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uint16_t vrb_map[275];
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/// VRB map for common channels and retransmissions by PHICH
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/// VRB map for common channels and PUSCH, dynamically allocated because
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uint16_t vrb_map_UL[275];
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/// length depends on number of slots and RBs
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uint16_t *vrb_map_UL;
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/// number of subframe allocation pattern available for MBSFN sync area
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/// number of subframe allocation pattern available for MBSFN sync area
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uint8_t num_sf_allocation_pattern;
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uint8_t num_sf_allocation_pattern;
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///Number of active SSBs
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///Number of active SSBs
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