Merge branch 'develop' into feature-43-doxygen
This commit is contained in:
+3
-1
@@ -20,9 +20,11 @@ job1:
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- EXTERNAL_SHARE_RESULTS_DIR=$EXTERNAL_SHARE_DIR/$git_branch/$git_head
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- EXTERNAL_SHARE_RESULTS_DIR=$EXTERNAL_SHARE_DIR/$git_branch/$git_head
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- echo $NFS_TEST_RESULTS_DIR
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- echo $NFS_TEST_RESULTS_DIR
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- echo $EXTERNAL_SHARE_RESULTS_DIR
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- echo $EXTERNAL_SHARE_RESULTS_DIR
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- echo $NRUNS_LTE_SOFTMODEM
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- echo $TIMEOUT_CMD
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- mkdir -p $OPENAIR_DIR/cmake_targets/autotests/log
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- mkdir -p $OPENAIR_DIR/cmake_targets/autotests/log
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- python $OPENAIR_DIR/cmake_targets/autotests/run_exec_lte-softmodem_tests.py -c -5GRepoHeadVersion $git_head -n $NFS_SHARE_DIR -u $OAI_USER -p $OAI_PASS $OAI_EXTRA_ARGS -g "$OAI_TEST_CASE_GROUP">& $OPENAIR_DIR/cmake_targets/autotests/python_autotest_cleanup.log
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- python $OPENAIR_DIR/cmake_targets/autotests/run_exec_lte-softmodem_tests.py -c -5GRepoHeadVersion $git_head -n $NFS_SHARE_DIR -u $OAI_USER -p $OAI_PASS $OAI_EXTRA_ARGS -g "$OAI_TEST_CASE_GROUP">& $OPENAIR_DIR/cmake_targets/autotests/python_autotest_cleanup.log
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- python $OPENAIR_DIR/cmake_targets/autotests/run_exec_lte-softmodem_tests.py -r -5GRepoHeadVersion $git_head -n $NFS_SHARE_DIR -u $OAI_USER -p $OAI_PASS `echo $OAI_EXTRA_ARGS` -g "$OAI_TEST_CASE_GROUP" >& $OPENAIR_DIR/cmake_targets/autotests/python_autotest.log
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- python $OPENAIR_DIR/cmake_targets/autotests/run_exec_lte-softmodem_tests.py -r -5GRepoHeadVersion $git_head -n $NFS_SHARE_DIR -u $OAI_USER -p $OAI_PASS `echo $OAI_EXTRA_ARGS` -g "$OAI_TEST_CASE_GROUP" --nrun_lte_softmodem $NRUNS_LTE_SOFTMODEM --timeout_cmd $TIMEOUT_CMD >& $OPENAIR_DIR/cmake_targets/autotests/python_autotest.log
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- mv $OPENAIR_DIR/cmake_targets/autotests/python_autotest.log $OPENAIR_DIR/cmake_targets/autotests/log/python_autotest.log
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- mv $OPENAIR_DIR/cmake_targets/autotests/python_autotest.log $OPENAIR_DIR/cmake_targets/autotests/log/python_autotest.log
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- mv $OPENAIR_DIR/cmake_targets/autotests/python_autotest_cleanup.log $OPENAIR_DIR/cmake_targets/autotests/log/python_autotest_cleanup.log
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- mv $OPENAIR_DIR/cmake_targets/autotests/python_autotest_cleanup.log $OPENAIR_DIR/cmake_targets/autotests/log/python_autotest_cleanup.log
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- sshpass -p "$OAI_PASS" rsync -az -e "ssh -o StrictHostKeyChecking=no " --rsync-path="mkdir -p $NFS_TEST_RESULTS_DIR && rsync" $OPENAIR_DIR/cmake_targets/autotests/log $OAI_USER@localhost:$NFS_TEST_RESULTS_DIR
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- sshpass -p "$OAI_PASS" rsync -az -e "ssh -o StrictHostKeyChecking=no " --rsync-path="mkdir -p $NFS_TEST_RESULTS_DIR && rsync" $OPENAIR_DIR/cmake_targets/autotests/log $OAI_USER@localhost:$NFS_TEST_RESULTS_DIR
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@@ -98,46 +98,70 @@ Obj.# Case# Test# Description
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01 55 lte-softmodem tests with USRP B210 RF as eNB and ALU EPC w/ Bandrich COTS UE for TX/1RX, 2TX/2RX
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01 55 lte-softmodem tests with USRP B210 RF as eNB and ALU EPC w/ Bandrich COTS UE for TX/1RX, 2TX/2RX
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01 55 00 Band 7 FDD 5MHz UL Throughput for 60 sec for 1TX/1RX
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01 55 00 Band 7 FDD 5MHz UL Throughput for 300 sec for 1TX/1RX
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01 55 01 Band 7 FDD 10MHz UL Throughput for 60 sec for 1TX/1RX
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01 55 01 Band 7 FDD 10MHz UL Throughput for 300 sec for 1TX/1RX
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01 55 02 Band 7 FDD 20MHz UL Throughput for 60 sec for 1TX/1RX
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01 55 02 Band 7 FDD 20MHz UL Throughput for 300 sec for 1TX/1RX
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01 55 03 Band 7 FDD 5MHz DL Throughput for 60 sec for 1TX/1RX
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01 55 03 Band 7 FDD 5MHz DL Throughput for 300 sec for 1TX/1RX
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01 55 04 Band 7 FDD 10MHz DL Throughput for 60 sec for 1TX/1RX
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01 55 04 Band 7 FDD 10MHz DL Throughput for 300 sec for 1TX/1RX
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01 55 05 Band 7 FDD 20MHz DL Throughput for 60 sec for 1TX/1RX
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01 55 05 Band 7 FDD 20MHz DL Throughput for 300 sec for 1TX/1RX
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01 55 06 Band 7 FDD 5MHz UL Throughput for 60 sec for 2TX/2RX
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01 55 06 Band 7 FDD 5MHz UL Throughput for 300 sec for 2TX/2RX
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01 55 07 Band 7 FDD 10MHz UL Throughput for 60 sec for 2TX/2RX
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01 55 07 Band 7 FDD 10MHz UL Throughput for 300 sec for 2TX/2RX
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01 55 08 Band 7 FDD 20MHz UL Throughput for 60 sec for 2TX/2RX
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01 55 08 Band 7 FDD 20MHz UL Throughput for 300 sec for 2TX/2RX
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01 55 09 Band 7 FDD 5MHz DL Throughput for 60 sec for 2TX/2RX
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01 55 09 Band 7 FDD 5MHz DL Throughput for 300 sec for 2TX/2RX
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01 55 10 Band 7 FDD 10MHz DL Throughput for 60 sec for 2TX/2RX
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01 55 10 Band 7 FDD 10MHz DL Throughput for 300 sec for 2TX/2RX
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01 55 11 Band 7 FDD 20MHz DL Throughput for 60 sec for 2TX/2RX
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01 55 11 Band 7 FDD 20MHz DL Throughput for 300 sec for 2TX/2RX
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01 56 lte-softmodem tests with USRP B210 RF as eNB and OAI EPC (eNB and EPC are on same machines) w/ Bandrich COTS UE
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01 56 lte-softmodem tests with USRP B210 RF as eNB and OAI EPC (eNB and EPC are on same machines) w/ Bandrich COTS UE
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01 56 00 Band 7 FDD 5MHz UL Throughput for 300 sec for 1TX/1RX
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01 56 01 Band 7 FDD 10MHz UL Throughput for 300 sec for 1TX/1RX
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01 56 02 Band 7 FDD 20MHz UL Throughput for 300 sec for 1TX/1RX
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01 56 03 Band 7 FDD 5MHz DL Throughput for 300 sec for 1TX/1RX
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01 56 04 Band 7 FDD 10MHz DL Throughput for 300 sec for 1TX/1RX
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01 56 05 Band 7 FDD 20MHz DL Throughput for 300 sec for 1TX/1RX
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01 57 lte-softmodem tests with USRP B210 RF as eNB and OAI EPC (eNB and EPC are on different machines) w/ Bandrich COTS UE
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01 57 lte-softmodem tests with USRP B210 RF as eNB and OAI EPC (eNB and EPC are on different machines) w/ Bandrich COTS UE
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01 57 00 Band 7 FDD 5MHz UL Throughput for 300 sec for 1TX/1RX
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01 57 01 Band 7 FDD 10MHz UL Throughput for 300 sec for 1TX/1RX
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01 57 02 Band 7 FDD 20MHz UL Throughput for 300 sec for 1TX/1RX
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01 57 03 Band 7 FDD 5MHz DL Throughput for 300 sec for 1TX/1RX
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01 57 04 Band 7 FDD 10MHz DL Throughput for 300 sec for 1TX/1RX
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01 57 05 Band 7 FDD 20MHz DL Throughput for 300 sec for 1TX/1RX
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01 58 lte-softmodem tests with USRP X310 RF as eNB and ALU EPC w/ Bandrich COTS UE for `TX/1RX, 2TX/2RX
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01 58 lte-softmodem tests with USRP X310 RF as eNB and ALU EPC w/ Bandrich COTS UE for `TX/1RX, 2TX/2RX
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01 58 00 Band 7 FDD 5MHz UL Throughput for 60 sec for 1TX/1RX
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01 58 00 Band 7 FDD 5MHz UL Throughput for 300 sec for 1TX/1RX
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01 58 01 Band 7 FDD 10MHz UL Throughput for 60 sec for 1TX/1RX
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01 58 01 Band 7 FDD 10MHz UL Throughput for 300 sec for 1TX/1RX
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01 58 02 Band 7 FDD 20MHz UL Throughput for 60 sec for 1TX/1RX
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01 58 02 Band 7 FDD 20MHz UL Throughput for 300 sec for 1TX/1RX
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01 58 03 Band 7 FDD 5MHz DL Throughput for 60 sec for 1TX/1RX
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01 58 03 Band 7 FDD 5MHz DL Throughput for 300 sec for 1TX/1RX
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01 58 04 Band 7 FDD 10MHz DL Throughput for 60 sec for 1TX/1RX
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01 58 04 Band 7 FDD 10MHz DL Throughput for 300 sec for 1TX/1RX
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01 58 05 Band 7 FDD 20MHz DL Throughput for 60 sec for 1TX/1RX
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01 58 05 Band 7 FDD 20MHz DL Throughput for 300 sec for 1TX/1RX
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01 59 lte-softmodem tests with USRP X310 RF as eNB and OAI EPC (eNB and EPC are on same machines) w/ Bandrich COTS UE
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01 59 lte-softmodem tests with USRP X310 RF as eNB and OAI EPC (eNB and EPC are on same machines) w/ Bandrich COTS UE
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01 61 lte-softmodem tests with USRP X310 RF as eNB and OAI EPC (eNB and EPC are on different machines) w/ Bandrich COTS UE
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01 60 lte-softmodem tests with USRP X310 RF as eNB and OAI EPC (eNB and EPC are on different machines) w/ Bandrich COTS UE
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01 60 00 Band 7 FDD 5MHz UL Throughput for 300 sec for 1TX/1RX
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01 60 01 Band 7 FDD 10MHz UL Throughput for 300 sec for 1TX/1RX
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01 60 02 Band 7 FDD 20MHz UL Throughput for 300 sec for 1TX/1RX
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01 60 03 Band 7 FDD 5MHz DL Throughput for 300 sec for 1TX/1RX
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01 60 04 Band 7 FDD 10MHz DL Throughput for 300 sec for 1TX/1RX
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01 60 05 Band 7 FDD 20MHz DL Throughput for 300 sec for 1TX/1RX
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01 61 lte-softmodem tests with EXMIMO RF as eNB and ALU EPC w/ Bandrich COTS UE for `TX/1RX, 2TX/2RX
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01 61 lte-softmodem tests with EXMIMO RF as eNB and ALU EPC w/ Bandrich COTS UE for `TX/1RX, 2TX/2RX
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01 61 00 Band 7 FDD 5MHz UL Throughput for 60 sec for 1TX/1RX
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01 61 00 Band 7 FDD 5MHz UL Throughput for 300 sec for 1TX/1RX
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01 61 01 Band 7 FDD 10MHz UL Throughput for 60 sec for 1TX/1RX
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01 61 01 Band 7 FDD 10MHz UL Throughput for 300 sec for 1TX/1RX
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01 61 02 Band 7 FDD 20MHz UL Throughput for 60 sec for 1TX/1RX
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01 61 02 Band 7 FDD 20MHz UL Throughput for 300 sec for 1TX/1RX
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01 61 03 Band 7 FDD 5MHz DL Throughput for 60 sec for 1TX/1RX
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01 61 03 Band 7 FDD 5MHz DL Throughput for 300 sec for 1TX/1RX
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01 61 04 Band 7 FDD 10MHz DL Throughput for 60 sec for 1TX/1RX
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01 61 04 Band 7 FDD 10MHz DL Throughput for 300 sec for 1TX/1RX
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01 61 05 Band 7 FDD 20MHz DL Throughput for 60 sec for 1TX/1RX
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01 61 05 Band 7 FDD 20MHz DL Throughput for 300 sec for 1TX/1RX
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01 62 lte-softmodem tests with EXMIMO RF as eNB and OAI EPC (eNB and EPC are on same machines) w/ Bandrich COTS UE
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01 62 lte-softmodem tests with EXMIMO RF as eNB and OAI EPC (eNB and EPC are on same machines) w/ Bandrich COTS UE
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01 63 lte-softmodem tests with EXMIMO RF as eNB and OAI EPC (eNB and EPC are on different machines) w/ Bandrich COTS UE
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01 63 lte-softmodem tests with EXMIMO RF as eNB and OAI EPC (eNB and EPC are on different machines) w/ Bandrich COTS UE
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01 63 00 Band 7 FDD 5MHz UL Throughput for 300 sec for 1TX/1RX
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01 63 01 Band 7 FDD 10MHz UL Throughput for 300 sec for 1TX/1RX
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01 63 02 Band 7 FDD 20MHz UL Throughput for 300 sec for 1TX/1RX
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01 63 03 Band 7 FDD 5MHz DL Throughput for 300 sec for 1TX/1RX
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01 63 04 Band 7 FDD 10MHz DL Throughput for 300 sec for 1TX/1RX
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01 63 05 Band 7 FDD 20MHz DL Throughput for 300 sec for 1TX/1RX
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01 64 lte-softmodem-noS1 tests
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01 64 lte-softmodem-noS1 tests
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@@ -192,6 +192,7 @@ class core:
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if index == 0 or index == 1 :
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if index == 0 or index == 1 :
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return self.oai.before
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return self.oai.before
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else:
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else:
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print "command = " + command + "rsp1 = " + rsp1 + " rsp2 = " + rsp2 + " index = " + str(index)
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raise log.err(self.failed(command, rsp1 + ' or ' + rsp2,debug))
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raise log.err(self.failed(command, rsp1 + ' or ' + rsp2,debug))
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@@ -240,7 +241,7 @@ class core:
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if (rsp.find(expect) == -1):
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if (rsp.find(expect) == -1):
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return 'OK'
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return 'OK'
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else:
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else:
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print "command = " + cmd + "expect = " + expect + "rsp = " + rsp
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print "command = " + command + "expect = " + expect + "rsp = " + rsp
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raise log.err(self.failed(command, expect,debug))
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raise log.err(self.failed(command, expect,debug))
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@@ -258,17 +258,17 @@ def finalize_deploy_script (timeout_cmd, terminate_missing_procs='True'):
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# \param logdirRepo directory of remote repository
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# \param logdirRepo directory of remote repository
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# \param python_script python script location
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# \param python_script python script location
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def update_config_file(oai, config_string, logdirRepo, python_script):
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def update_config_file(oai, config_string, logdirRepo, python_script):
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cmd=""
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if config_string :
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if config_string :
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stringArray = config_string.splitlines()
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stringArray = config_string.splitlines()
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cmd=""
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#python_script = '$OPENAIR_DIR/targets/autotests/tools/search_repl.py'
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#python_script = '$OPENAIR_DIR/targets/autotests/tools/search_repl.py'
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for string in stringArray:
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for string in stringArray:
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#split the string based on space now
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#split the string based on space now
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string1=string.split()
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string1=string.split()
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cmd = cmd + 'python ' + python_script + ' ' + logdirRepo+'/'+string1[0] + ' ' + string1[1] + ' '+ string1[2] + '\n'
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cmd = cmd + 'python ' + python_script + ' ' + logdirRepo+'/'+string1[0] + ' ' + string1[1] + ' '+ string1[2] + '\n'
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#cmd = cmd + 'perl -p -i -e \'s/'+ string1[1] + '\\s*=\\s*"\\S*"\\s*/' + string1[1] + ' = "' + string1[2] +'"' + '/g\' ' + logdirRepo + '/' +string1[0] + '\n'
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#cmd = cmd + 'perl -p -i -e \'s/'+ string1[1] + '\\s*=\\s*"\\S*"\\s*/' + string1[1] + ' = "' + string1[2] +'"' + '/g\' ' + logdirRepo + '/' +string1[0] + '\n'
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return cmd
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return cmd
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#result = oai.send_recv(cmd)
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#result = oai.send_recv(cmd)
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# \brief thread safe sshsession wrapper due to occasional connection issues with ssh
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# \brief thread safe sshsession wrapper due to occasional connection issues with ssh
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# \param machine name of machine
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# \param machine name of machine
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@@ -323,7 +323,7 @@ def cleanOldPrograms(oai, programList, CleanUpAluLteBox, ExmimoRfStop):
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#result = oai.send_recv(cmd)
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#result = oai.send_recv(cmd)
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#print result
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#print result
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result = oai.send_expect_false(cmd, 'Match found', False)
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result = oai.send_expect_false(cmd, 'Match found', False)
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print result
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print "Looking for old programs..." + result
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res=oai.send_recv(CleanUpAluLteBox, True)
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res=oai.send_recv(CleanUpAluLteBox, True)
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res = oai.send_recv(ExmimoRfStop, False)
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res = oai.send_recv(ExmimoRfStop, False)
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@@ -359,7 +359,7 @@ class oaiThread (threading.Thread):
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except Exception, e:
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except Exception, e:
|
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error=''
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error=''
|
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error = error + ' In class oaiThread, function: ' + sys._getframe().f_code.co_name + ': *** Caught exception: ' + str(e.__class__) + " : " + str( e)
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error = error + ' In class oaiThread, function: ' + sys._getframe().f_code.co_name + ': *** Caught exception: ' + str(e.__class__) + " : " + str( e)
|
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error = error + '\n threadID = ' + str(self.threadID) + '\n threadname = ' + self.threadname + '\n timeout = ' + self.timeout + '\n machine = ' + self.machine + '\n cmd = ' + self.cmd + '\n timeout = ' + str(self.timeout) + '\n username = ' + self.username + '\n'
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error = error + '\n threadID = ' + str(self.threadID) + '\n threadname = ' + self.threadname + '\n timeout = ' + str(self.timeout) + '\n machine = ' + self.machine + '\n cmd = ' + self.cmd + '\n timeout = ' + str(self.timeout) + '\n username = ' + self.username + '\n'
|
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error = error + traceback.format_exc()
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error = error + traceback.format_exc()
|
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print error
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print error
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||||||
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|
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@@ -548,7 +548,7 @@ def wait_testcaseclass_generic_threads(threadListGeneric, timeout = 1):
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# \param CleanupAluLteBox string that contains commands to stop ALU Bell Labs LTEBox (specified in test_case_list.xml)
|
# \param CleanupAluLteBox string that contains commands to stop ALU Bell Labs LTEBox (specified in test_case_list.xml)
|
||||||
# \param ExmimoRfStop command to stop EXMIMO Card
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# \param ExmimoRfStop command to stop EXMIMO Card
|
||||||
# \param nruns_lte-softmodem global parameter to override number of runs (nruns) within the test case
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# \param nruns_lte-softmodem global parameter to override number of runs (nruns) within the test case
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||||||
def handle_testcaseclass_softmodem (testcase, oldprogramList, logdirOAI5GRepo , logdirOpenaircnRepo, MachineList, user, password, CleanUpAluLteBox, ExmimoRfStop, nruns_lte_softmodem):
|
def handle_testcaseclass_softmodem (testcase, oldprogramList, logdirOAI5GRepo , logdirOpenaircnRepo, MachineList, user, password, CleanUpAluLteBox, ExmimoRfStop, nruns_lte_softmodem, timeout_cmd):
|
||||||
#We ignore the password sent to this function for secuirity reasons for password present in log files
|
#We ignore the password sent to this function for secuirity reasons for password present in log files
|
||||||
#It is recommended to add a line in /etc/sudoers that looks something like below. The line below will run sudo without password prompt
|
#It is recommended to add a line in /etc/sudoers that looks something like below. The line below will run sudo without password prompt
|
||||||
# your_user_name ALL=(ALL:ALL) NOPASSWD: ALL
|
# your_user_name ALL=(ALL:ALL) NOPASSWD: ALL
|
||||||
@@ -558,7 +558,8 @@ def handle_testcaseclass_softmodem (testcase, oldprogramList, logdirOAI5GRepo ,
|
|||||||
#user = getpass.getuser()
|
#user = getpass.getuser()
|
||||||
testcasename = testcase.get('id')
|
testcasename = testcase.get('id')
|
||||||
testcaseclass = testcase.findtext('class',default='')
|
testcaseclass = testcase.findtext('class',default='')
|
||||||
timeout_cmd = testcase.findtext('TimeOut_cmd',default='')
|
if timeout_cmd == '':
|
||||||
|
timeout_cmd = testcase.findtext('TimeOut_cmd',default='')
|
||||||
timeout_cmd = int(float(timeout_cmd))
|
timeout_cmd = int(float(timeout_cmd))
|
||||||
#Timeout_thread is more than that of cmd to have room for compilation time, etc
|
#Timeout_thread is more than that of cmd to have room for compilation time, etc
|
||||||
timeout_thread = timeout_cmd + 300
|
timeout_thread = timeout_cmd + 300
|
||||||
@@ -580,6 +581,8 @@ def handle_testcaseclass_softmodem (testcase, oldprogramList, logdirOAI5GRepo ,
|
|||||||
eNB_traffic_exec_args = testcase.findtext('eNB_traffic_exec_args',default='')
|
eNB_traffic_exec_args = testcase.findtext('eNB_traffic_exec_args',default='')
|
||||||
eNB_terminate_missing_procs = testcase.findtext('eNB_terminate_missing_procs',default='True')
|
eNB_terminate_missing_procs = testcase.findtext('eNB_terminate_missing_procs',default='True')
|
||||||
eNB_search_expr_true = testcase.findtext('eNB_search_expr_true','')
|
eNB_search_expr_true = testcase.findtext('eNB_search_expr_true','')
|
||||||
|
if re.compile('\w+').match(eNB_search_expr_true) != None:
|
||||||
|
eNB_search_expr_true = eNB_search_expr_true + ' duration=' + str(timeout_cmd-90) + 's'
|
||||||
|
|
||||||
UEMachine = testcase.findtext('UE',default='')
|
UEMachine = testcase.findtext('UE',default='')
|
||||||
UE_config_file = testcase.findtext('UE_config_file',default='')
|
UE_config_file = testcase.findtext('UE_config_file',default='')
|
||||||
@@ -594,6 +597,8 @@ def handle_testcaseclass_softmodem (testcase, oldprogramList, logdirOAI5GRepo ,
|
|||||||
UE_terminate_missing_procs = testcase.findtext('UE_terminate_missing_procs',default='True')
|
UE_terminate_missing_procs = testcase.findtext('UE_terminate_missing_procs',default='True')
|
||||||
UE_search_expr_true = testcase.findtext('UE_search_expr_true','')
|
UE_search_expr_true = testcase.findtext('UE_search_expr_true','')
|
||||||
UE_stop_script = testcase.findtext('UE_stop_script','')
|
UE_stop_script = testcase.findtext('UE_stop_script','')
|
||||||
|
if re.compile('\w+').match(UE_search_expr_true) != None:
|
||||||
|
UE_search_expr_true = UE_search_expr_true + ' duration=' + str(timeout_cmd-90) + 's'
|
||||||
|
|
||||||
EPCMachine = testcase.findtext('EPC',default='')
|
EPCMachine = testcase.findtext('EPC',default='')
|
||||||
EPC_config_file = testcase.findtext('EPC_config_file',default='')
|
EPC_config_file = testcase.findtext('EPC_config_file',default='')
|
||||||
@@ -612,6 +617,8 @@ def handle_testcaseclass_softmodem (testcase, oldprogramList, logdirOAI5GRepo ,
|
|||||||
EPC_traffic_exec_args = testcase.findtext('EPC_traffic_exec_args',default='')
|
EPC_traffic_exec_args = testcase.findtext('EPC_traffic_exec_args',default='')
|
||||||
EPC_terminate_missing_procs = testcase.findtext('EPC_terminate_missing_procs',default='True')
|
EPC_terminate_missing_procs = testcase.findtext('EPC_terminate_missing_procs',default='True')
|
||||||
EPC_search_expr_true = testcase.findtext('EPC_search_expr_true','')
|
EPC_search_expr_true = testcase.findtext('EPC_search_expr_true','')
|
||||||
|
if re.compile('\w+').match(EPC_search_expr_true) != None:
|
||||||
|
EPC_search_expr_true = EPC_search_expr_true + ' duration=' + str(timeout_cmd-90) + 's'
|
||||||
|
|
||||||
index_eNBMachine = MachineList.index(eNBMachine)
|
index_eNBMachine = MachineList.index(eNBMachine)
|
||||||
index_UEMachine = MachineList.index(UEMachine)
|
index_UEMachine = MachineList.index(UEMachine)
|
||||||
@@ -680,6 +687,10 @@ def handle_testcaseclass_softmodem (testcase, oldprogramList, logdirOAI5GRepo ,
|
|||||||
logfile_task_eNB_out = logdir_eNB + '/eNB_task_out' + '_' + str(run) + '_.log'
|
logfile_task_eNB_out = logdir_eNB + '/eNB_task_out' + '_' + str(run) + '_.log'
|
||||||
logfile_task_eNB = logdir_local_testcase + '/eNB_task' + '_' + str(run) + '_.log'
|
logfile_task_eNB = logdir_local_testcase + '/eNB_task' + '_' + str(run) + '_.log'
|
||||||
logfile_local_traffic_eNB_out = logdir_local_testcase + '/eNB_traffic' + '_' + str(run) + '_.log'
|
logfile_local_traffic_eNB_out = logdir_local_testcase + '/eNB_traffic' + '_' + str(run) + '_.log'
|
||||||
|
logfile_tshark_eNB = logdir_eNB + '/eNB_tshark' + '_' + str(run) + '_.log'
|
||||||
|
logfile_pcap_eNB = logdir_eNB + '/eNB_tshark' + '_' + str(run) + '_.pcap'
|
||||||
|
logfile_pcap_zip_eNB = logdir_eNB + '/eNB_tshark' + '_' + str(run) + '_.pcap.zip'
|
||||||
|
logfile_pcap_tmp_eNB = '/tmp/' + '/eNB_tshark' + '_' + str(run) + '_.pcap'
|
||||||
|
|
||||||
task_eNB_compile = ' ( uname -a ; date \n'
|
task_eNB_compile = ' ( uname -a ; date \n'
|
||||||
task_eNB_compile = task_eNB_compile + 'cd ' + logdirOAI5GRepo + ' ; source oaienv ; source cmake_targets/tools/build_helper \n'
|
task_eNB_compile = task_eNB_compile + 'cd ' + logdirOAI5GRepo + ' ; source oaienv ; source cmake_targets/tools/build_helper \n'
|
||||||
@@ -701,9 +712,16 @@ def handle_testcaseclass_softmodem (testcase, oldprogramList, logdirOAI5GRepo ,
|
|||||||
task_eNB = task_eNB + 'array_exec_pid+=($!) \n'
|
task_eNB = task_eNB + 'array_exec_pid+=($!) \n'
|
||||||
task_eNB = task_eNB + 'echo eNB_main_exec PID = $! \n'
|
task_eNB = task_eNB + 'echo eNB_main_exec PID = $! \n'
|
||||||
if eNB_traffic_exec != "":
|
if eNB_traffic_exec != "":
|
||||||
task_eNB = task_eNB + ' (date; ' + eNB_traffic_exec + ' ' + eNB_traffic_exec_args + ' ) > ' + logfile_traffic_eNB + ' 2>&1 & \n '
|
cmd_traffic = eNB_traffic_exec + ' ' + eNB_traffic_exec_args
|
||||||
|
if cmd_traffic.find('-c') >= 0:
|
||||||
|
cmd_traffic = cmd_traffic + ' -t ' + str(timeout_cmd - 60)
|
||||||
|
task_eNB = task_eNB + ' (date; ' + cmd_traffic + ' ) > ' + logfile_traffic_eNB + ' 2>&1 & \n'
|
||||||
task_eNB = task_eNB + 'array_exec_pid+=($!) \n'
|
task_eNB = task_eNB + 'array_exec_pid+=($!) \n'
|
||||||
task_eNB = task_eNB + 'echo eNB_traffic_exec PID = $! \n'
|
task_eNB = task_eNB + 'echo eNB_traffic_exec PID = $! \n'
|
||||||
|
|
||||||
|
task_eNB = task_eNB + ' (date; sudo rm -f ' + logfile_pcap_tmp_eNB + ' ; sudo -E tshark -i any -s 65535 -a duration:' + str(timeout_cmd-10)+ ' -w ' + logfile_pcap_tmp_eNB+ ' ; sudo -E chown ' + user + ' ' + logfile_pcap_tmp_eNB + ' ; zip -j -9 ' + logfile_pcap_zip_eNB + ' ' + logfile_pcap_tmp_eNB + ' ) > ' + logfile_tshark_eNB + ' 2>&1 & \n '
|
||||||
|
task_eNB = task_eNB + 'array_exec_pid+=($!) \n'
|
||||||
|
task_eNB = task_eNB + 'echo eNB_tshark_exec PID = $! \n'
|
||||||
#terminate the eNB test case after timeout_cmd seconds
|
#terminate the eNB test case after timeout_cmd seconds
|
||||||
task_eNB = task_eNB + finalize_deploy_script (timeout_cmd, eNB_terminate_missing_procs) + ' \n'
|
task_eNB = task_eNB + finalize_deploy_script (timeout_cmd, eNB_terminate_missing_procs) + ' \n'
|
||||||
#task_eNB = task_eNB + 'sleep ' + str(timeout_cmd) + ' \n'
|
#task_eNB = task_eNB + 'sleep ' + str(timeout_cmd) + ' \n'
|
||||||
@@ -747,7 +765,10 @@ def handle_testcaseclass_softmodem (testcase, oldprogramList, logdirOAI5GRepo ,
|
|||||||
task_UE = task_UE + 'array_exec_pid+=($!) \n'
|
task_UE = task_UE + 'array_exec_pid+=($!) \n'
|
||||||
task_UE = task_UE + 'echo UE_main_exec PID = $! \n'
|
task_UE = task_UE + 'echo UE_main_exec PID = $! \n'
|
||||||
if UE_traffic_exec != "":
|
if UE_traffic_exec != "":
|
||||||
task_UE = task_UE + ' ( date; ' + UE_traffic_exec + ' ' + UE_traffic_exec_args + ' ) >' + logfile_traffic_UE + ' 2>&1 & \n'
|
cmd_traffic = UE_traffic_exec + ' ' + UE_traffic_exec_args
|
||||||
|
if cmd_traffic.find('-c') >= 0:
|
||||||
|
cmd_traffic = cmd_traffic + ' -t ' + str(timeout_cmd - 60)
|
||||||
|
task_UE = task_UE + ' ( date; ' + cmd_traffic + ' ) >' + logfile_traffic_UE + ' 2>&1 & \n'
|
||||||
task_UE = task_UE + 'array_exec_pid+=($!) \n'
|
task_UE = task_UE + 'array_exec_pid+=($!) \n'
|
||||||
task_UE = task_UE + 'echo UE_traffic_exec PID = $! \n'
|
task_UE = task_UE + 'echo UE_traffic_exec PID = $! \n'
|
||||||
#terminate the UE test case after timeout_cmd seconds
|
#terminate the UE test case after timeout_cmd seconds
|
||||||
@@ -797,7 +818,10 @@ def handle_testcaseclass_softmodem (testcase, oldprogramList, logdirOAI5GRepo ,
|
|||||||
task_EPC = task_EPC + 'array_exec_pid+=($!) \n'
|
task_EPC = task_EPC + 'array_exec_pid+=($!) \n'
|
||||||
task_EPC = task_EPC + 'echo EPC_main_exec PID = $! \n'
|
task_EPC = task_EPC + 'echo EPC_main_exec PID = $! \n'
|
||||||
if EPC_traffic_exec != "":
|
if EPC_traffic_exec != "":
|
||||||
task_EPC = task_EPC + '( date; ' + EPC_traffic_exec + ' ' + EPC_traffic_exec_args + ' ) > ' + logfile_traffic_EPC + ' 2>&1 & \n'
|
cmd_traffic = EPC_traffic_exec + ' ' + EPC_traffic_exec_args
|
||||||
|
if cmd_traffic.find('-c') >= 0:
|
||||||
|
cmd_traffic = cmd_traffic + ' -t ' + str(timeout_cmd - 60)
|
||||||
|
task_EPC = task_EPC + '( date; ' + cmd_traffic + ' ) > ' + logfile_traffic_EPC + ' 2>&1 & \n'
|
||||||
task_EPC = task_EPC + 'array_exec_pid+=($!) \n'
|
task_EPC = task_EPC + 'array_exec_pid+=($!) \n'
|
||||||
task_EPC = task_EPC + 'echo EPC_traffic_exec PID = $! \n'
|
task_EPC = task_EPC + 'echo EPC_traffic_exec PID = $! \n'
|
||||||
#terminate the EPC test case after timeout_cmd seconds
|
#terminate the EPC test case after timeout_cmd seconds
|
||||||
@@ -861,6 +885,19 @@ def handle_testcaseclass_softmodem (testcase, oldprogramList, logdirOAI5GRepo ,
|
|||||||
thread_UE.start()
|
thread_UE.start()
|
||||||
thread_UE.join()
|
thread_UE.join()
|
||||||
|
|
||||||
|
#Now we change the permissions of the logfiles to avoid some of them being with root permissions
|
||||||
|
cmd = 'sudo -E chown -R ' + user + ' ' + logdir_eNB
|
||||||
|
res= oai_eNB.send_recv(cmd)
|
||||||
|
print "Changing permissions of logdir <" + logdir_eNB + "> in eNB machine..." + res
|
||||||
|
|
||||||
|
cmd = 'sudo -E chown -R ' + user + ' ' + logdir_UE
|
||||||
|
res= oai_UE.send_recv(cmd)
|
||||||
|
print "Changing permissions of logdir <" + logdir_UE + "> in UE machine..." + res
|
||||||
|
|
||||||
|
cmd = 'sudo -E chown -R ' + user + ' ' + logdir_EPC
|
||||||
|
res= oai_EPC.send_recv(cmd)
|
||||||
|
print "Changing permissions of logdir <" + logdir_EPC + "> in EPC machine..." + res
|
||||||
|
|
||||||
|
|
||||||
print "Copying files from EPCMachine : " + EPCMachine + "logdir_EPC = " + logdir_EPC
|
print "Copying files from EPCMachine : " + EPCMachine + "logdir_EPC = " + logdir_EPC
|
||||||
#ssh = SSHSession(EPCMachine , username=user, key_file=None, password=password)
|
#ssh = SSHSession(EPCMachine , username=user, key_file=None, password=password)
|
||||||
@@ -1019,7 +1056,8 @@ MachineListGeneric=''
|
|||||||
flag_remove_logdir=False
|
flag_remove_logdir=False
|
||||||
flag_start_testcase=False
|
flag_start_testcase=False
|
||||||
nruns_lte_softmodem=''
|
nruns_lte_softmodem=''
|
||||||
|
flag_skip_git_head_check=False
|
||||||
|
Timeout_cmd=''
|
||||||
print "Number of arguments argc = " + str(len(sys.argv))
|
print "Number of arguments argc = " + str(len(sys.argv))
|
||||||
#for index in range(1,len(sys.argv) ):
|
#for index in range(1,len(sys.argv) ):
|
||||||
# print "argv_" + str(index) + " : " + sys.argv[index]
|
# print "argv_" + str(index) + " : " + sys.argv[index]
|
||||||
@@ -1073,6 +1111,11 @@ while i < len (sys.argv):
|
|||||||
MachineListGeneric = MachineListGeneric.replace("\"","")
|
MachineListGeneric = MachineListGeneric.replace("\"","")
|
||||||
MachineListGeneric = MachineListGeneric.replace("\'","")
|
MachineListGeneric = MachineListGeneric.replace("\'","")
|
||||||
i = i +1
|
i = i +1
|
||||||
|
elif arg == '--skip-git-head-check':
|
||||||
|
flag_skip_git_head_check=True
|
||||||
|
elif arg == '--timeout_cmd':
|
||||||
|
Timeout_cmd = sys.argv[i+1]
|
||||||
|
i = i +1
|
||||||
elif arg == '-h' :
|
elif arg == '-h' :
|
||||||
print "-s: This flag *MUST* be set to start the test cases"
|
print "-s: This flag *MUST* be set to start the test cases"
|
||||||
print "-r: Remove the log directory in autotests"
|
print "-r: Remove the log directory in autotests"
|
||||||
@@ -1086,6 +1129,8 @@ while i < len (sys.argv):
|
|||||||
print "--nrun_lte_softmodem: Set the number of runs for lte-softmodem test case class"
|
print "--nrun_lte_softmodem: Set the number of runs for lte-softmodem test case class"
|
||||||
print "-MachineList : overrides the MachineList parameter in test_case_list.xml"
|
print "-MachineList : overrides the MachineList parameter in test_case_list.xml"
|
||||||
print "-MachineListGeneric : overrides the MachineListGeneric parameter in test_case_list.xml"
|
print "-MachineListGeneric : overrides the MachineListGeneric parameter in test_case_list.xml"
|
||||||
|
print "--skip-git-head-check: skip checking of GitHead remote/local branch (only for debugging)"
|
||||||
|
print "--timeout_cmd: Override the default parameter (timeout_cmd) in test_case_list.xml. This parameter is in seconds and should be > 120"
|
||||||
sys.exit()
|
sys.exit()
|
||||||
else :
|
else :
|
||||||
print "Unrecongnized Option: <" + arg + ">. Use -h to see valid options"
|
print "Unrecongnized Option: <" + arg + ">. Use -h to see valid options"
|
||||||
@@ -1186,6 +1231,7 @@ print "GitOAI5GBranch = " + GitOAI5GRepoBranch
|
|||||||
print "GitOpenaircnRepoBranch = " + GitOpenaircnRepoBranch
|
print "GitOpenaircnRepoBranch = " + GitOpenaircnRepoBranch
|
||||||
print "NFSResultsShare = " + NFSResultsShare
|
print "NFSResultsShare = " + NFSResultsShare
|
||||||
print "nruns_lte_softmodem = " + nruns_lte_softmodem
|
print "nruns_lte_softmodem = " + nruns_lte_softmodem
|
||||||
|
print "Timeout_cmd = " + Timeout_cmd
|
||||||
|
|
||||||
if GitOAI5GHeadVersion == '':
|
if GitOAI5GHeadVersion == '':
|
||||||
cmd = "git show-ref --heads -s "+ GitOAI5GRepoBranch
|
cmd = "git show-ref --heads -s "+ GitOAI5GRepoBranch
|
||||||
@@ -1289,7 +1335,10 @@ for oai in oai_list:
|
|||||||
cmd = cmd + 'git_head=${git_head[0]} \n'
|
cmd = cmd + 'git_head=${git_head[0]} \n'
|
||||||
cmd = cmd + 'echo \"GitOAI5GHeadVersion_remote = $git_head\"'
|
cmd = cmd + 'echo \"GitOAI5GHeadVersion_remote = $git_head\"'
|
||||||
cmd = cmd + 'echo \"GitOAI5GHeadVersion_local = ' + GitOAI5GHeadVersion + '\" \n'
|
cmd = cmd + 'echo \"GitOAI5GHeadVersion_local = ' + GitOAI5GHeadVersion + '\" \n'
|
||||||
cmd = cmd + 'if [ \"$git_head\" != \"'+ GitOAI5GHeadVersion + '\" ]; then echo \"error: Git openairinterface5g head version does not match\" ; fi \n'
|
if flag_skip_git_head_check==True:
|
||||||
|
cmd = cmd + 'echo \"skipping GitHead check...\" \n '
|
||||||
|
else:
|
||||||
|
cmd = cmd + 'if [ \"$git_head\" != \"'+ GitOAI5GHeadVersion + '\" ]; then echo \"error: Git openairinterface5g head version does not match\" ; fi \n'
|
||||||
cmd = cmd + 'source oaienv' + '\n'
|
cmd = cmd + 'source oaienv' + '\n'
|
||||||
cmd = cmd + 'cd ' + logdirOpenaircnRepo + '\n'
|
cmd = cmd + 'cd ' + logdirOpenaircnRepo + '\n'
|
||||||
cmd = cmd + 'git checkout ' + GitOpenaircnRepoBranch + '\n'
|
cmd = cmd + 'git checkout ' + GitOpenaircnRepoBranch + '\n'
|
||||||
@@ -1375,8 +1424,8 @@ for testcase in testcaseList:
|
|||||||
print "eNBMachine : " + eNBMachine + "UEMachine : " + UEMachine + "EPCMachine : " + EPCMachine + "MachineList : " + ','.join(MachineList)
|
print "eNBMachine : " + eNBMachine + "UEMachine : " + UEMachine + "EPCMachine : " + EPCMachine + "MachineList : " + ','.join(MachineList)
|
||||||
print "testcasename = " + testcasename + " class = " + testcaseclass
|
print "testcasename = " + testcasename + " class = " + testcaseclass
|
||||||
threadListGlobal = wait_testcaseclass_generic_threads(threadListGlobal, Timeout_execution)
|
threadListGlobal = wait_testcaseclass_generic_threads(threadListGlobal, Timeout_execution)
|
||||||
cleanOldProgramsAllMachines(oai_list, CleanUpOldProgs, CleanUpAluLteBox, ExmimoRfStop)
|
#cleanOldProgramsAllMachines(oai_list, CleanUpOldProgs, CleanUpAluLteBox, ExmimoRfStop)
|
||||||
handle_testcaseclass_softmodem (testcase, CleanUpOldProgs, logdirOAI5GRepo, logdirOpenaircnRepo, MachineList, user, pw, CleanUpAluLteBox, ExmimoRfStop, nruns_lte_softmodem )
|
handle_testcaseclass_softmodem (testcase, CleanUpOldProgs, logdirOAI5GRepo, logdirOpenaircnRepo, MachineList, user, pw, CleanUpAluLteBox, ExmimoRfStop, nruns_lte_softmodem, Timeout_cmd )
|
||||||
elif (testcaseclass == 'compilation'):
|
elif (testcaseclass == 'compilation'):
|
||||||
threadListGlobal = handle_testcaseclass_generic (testcasename, threadListGlobal, CleanUpOldProgs, logdirOAI5GRepo, MachineListGeneric, user, pw, CleanUpAluLteBox,Timeout_execution, ExmimoRfStop)
|
threadListGlobal = handle_testcaseclass_generic (testcasename, threadListGlobal, CleanUpOldProgs, logdirOAI5GRepo, MachineListGeneric, user, pw, CleanUpAluLteBox,Timeout_execution, ExmimoRfStop)
|
||||||
elif (testcaseclass == 'execution'):
|
elif (testcaseclass == 'execution'):
|
||||||
@@ -1412,7 +1461,7 @@ cmd = ' rm -fr ' + NFSTestsResultsDir + ' ; mkdir -p ' + NFSTestsResultsDir
|
|||||||
res = oai_localhost.send_recv(cmd)
|
res = oai_localhost.send_recv(cmd)
|
||||||
print "Deleting NFSTestResults Dir..." + res
|
print "Deleting NFSTestResults Dir..." + res
|
||||||
|
|
||||||
print "Copying files from GilabCI Runner Machine : " + host + "locallogdir = " + locallogdir + ", NFSTestsResultsDir = " + NFSTestsResultsDir
|
print "Copying files from GilabCI Runner Machine : " + host + " .locallogdir = " + locallogdir + ", NFSTestsResultsDir = " + NFSTestsResultsDir
|
||||||
SSHSessionWrapper('localhost', user, None, pw , NFSTestsResultsDir , locallogdir, "put_all")
|
SSHSessionWrapper('localhost', user, None, pw , NFSTestsResultsDir , locallogdir, "put_all")
|
||||||
|
|
||||||
sys.exit()
|
sys.exit()
|
||||||
|
|||||||
File diff suppressed because it is too large
Load Diff
@@ -126,8 +126,8 @@ def start_ue () :
|
|||||||
break
|
break
|
||||||
ip = IPRoute()
|
ip = IPRoute()
|
||||||
idx = ip.link_lookup(ifname=iface)[0]
|
idx = ip.link_lookup(ifname=iface)[0]
|
||||||
os.system ('route add 192.172.0.1 ppp0')
|
os.system ('route add ' + gw + ' ppp0')
|
||||||
os.system ('ping 192.172.0.1')
|
os.system ('ping ' + gw)
|
||||||
break
|
break
|
||||||
except Exception, e:
|
except Exception, e:
|
||||||
error = ' Interface ' + iface + 'does not exist...'
|
error = ' Interface ' + iface + 'does not exist...'
|
||||||
@@ -188,7 +188,10 @@ def find_usb_path(idVendor, idProduct):
|
|||||||
return tmpdir
|
return tmpdir
|
||||||
return ''
|
return ''
|
||||||
|
|
||||||
for arg in sys.argv[1:]:
|
i=1
|
||||||
|
gw='192.172.0.1'
|
||||||
|
while i < len(sys.argv):
|
||||||
|
arg=sys.argv[i]
|
||||||
if arg == '--start-ue' :
|
if arg == '--start-ue' :
|
||||||
find_open_port()
|
find_open_port()
|
||||||
print 'Using Serial port : ' + serial_port
|
print 'Using Serial port : ' + serial_port
|
||||||
@@ -199,8 +202,17 @@ for arg in sys.argv[1:]:
|
|||||||
stop_ue()
|
stop_ue()
|
||||||
elif arg == '--reset-ue' :
|
elif arg == '--reset-ue' :
|
||||||
reset_ue()
|
reset_ue()
|
||||||
|
elif arg == '-gw' :
|
||||||
|
gw = sys.argv[i+1]
|
||||||
|
i=i+1
|
||||||
|
elif arg == '-h' :
|
||||||
|
print "--reset-ue: Reset the UE on USB Bus. Similar to unplugging and plugging the UE"
|
||||||
|
print "--stop-ue: Stop the UE. Send DETACH command"
|
||||||
|
print "--start-ue: Start the UE. Send ATTACH command"
|
||||||
|
print "-gw: Specify the default gw as sometimes the gateway/route arguments are not set properly via wvdial"
|
||||||
else :
|
else :
|
||||||
print " Script called with wrong arguments, arg = " + arg
|
print " Script called with wrong arguments, arg = " + arg
|
||||||
sys.exit()
|
sys.exit()
|
||||||
|
i = i +1
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@@ -19,9 +19,11 @@ file.close()
|
|||||||
|
|
||||||
|
|
||||||
if keyword == 'mme_ip_address':
|
if keyword == 'mme_ip_address':
|
||||||
#string = (re.sub(r"mme_ip_address\s*=\s*\([^\$]+)\)\s*;\s*", r"<% tex \1 %>", t, re.M)
|
|
||||||
replacement_text = keyword + ' = ( { ' + replacement_text + ' } ) ; '
|
replacement_text = keyword + ' = ( { ' + replacement_text + ' } ) ; '
|
||||||
string = re.sub(r"mme_ip_address\s*=\s*\(([^\$]+?)\)\s*;", replacement_text, string, re.M)
|
string = re.sub(r"mme_ip_address\s*=\s*\(([^\$]+?)\)\s*;", replacement_text, string, re.M)
|
||||||
|
elif keyword == 'IPV4_LIST':
|
||||||
|
replacement_text = keyword + ' = ( ' + replacement_text + ' ) ; '
|
||||||
|
string = re.sub(r"IPV4_LIST\s*=\s*\(([^\$]+?)\)\s*;", replacement_text, string, re.M)
|
||||||
else :
|
else :
|
||||||
replacement_text = keyword + ' = ' + replacement_text + ' ; '
|
replacement_text = keyword + ' = ' + replacement_text + ' ; '
|
||||||
string = re.sub(r"%s\s*=\s*([^\$]+?)\s*;" % keyword , replacement_text, string, re.M)
|
string = re.sub(r"%s\s*=\s*([^\$]+?)\s*;" % keyword , replacement_text, string, re.M)
|
||||||
|
|||||||
@@ -36,6 +36,7 @@
|
|||||||
#include <stdlib.h>
|
#include <stdlib.h>
|
||||||
#endif
|
#endif
|
||||||
#include "PHY/defs.h"
|
#include "PHY/defs.h"
|
||||||
|
#include "assertions.h"
|
||||||
|
|
||||||
//#define cmin(a,b) ((a)<(b) ? (a) : (b))
|
//#define cmin(a,b) ((a)<(b) ? (a) : (b))
|
||||||
|
|
||||||
@@ -515,16 +516,14 @@ uint32_t lte_rate_matching_turbo(uint32_t RTC,
|
|||||||
// if (rvidx==3)
|
// if (rvidx==3)
|
||||||
// for (cnt=0;cnt<Ncb;cnt++)
|
// for (cnt=0;cnt<Ncb;cnt++)
|
||||||
// counter_buffer[rvidx][cnt]=0;
|
// counter_buffer[rvidx][cnt]=0;
|
||||||
if (Ncb<(3*(RTC<<5))) {
|
AssertFatal(Ncb>=(3*RTC<<5),"Exiting, RM condition (Ncb %d, Nir/C %d, Nsoft %d, Kw %d\n",Ncb,Nir/C,Nsoft,3*(RTC<<5));
|
||||||
msg("Exiting, RM condition (Nir %d, Nsoft %d, Kw %d\n",Nir,Nsoft,3*(RTC<<5));
|
|
||||||
return(0);
|
|
||||||
}
|
|
||||||
|
|
||||||
Gp = G/Nl/Qm;
|
Gp = G/Nl/Qm;
|
||||||
GpmodC = Gp%C;
|
GpmodC = Gp%C;
|
||||||
|
|
||||||
#ifdef RM_DEBUG
|
#ifdef RM_DEBUG
|
||||||
printf("lte_rate_matching_turbo: Kw %d, rvidx %d, G %d, Qm %d, Nl%d, r %d\n",3*(RTC<<5),rvidx, G, Qm,Nl,r);
|
printf("lte_rate_matching_turbo: Ncb %d, Kw %d, Nir/C %d, rvidx %d, G %d, Qm %d, Nl%d, r %d\n",Ncb,3*(RTC<<5),Nir/C,rvidx, G, Qm,Nl,r);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
if (r < (C-(GpmodC)))
|
if (r < (C-(GpmodC)))
|
||||||
|
|||||||
@@ -243,15 +243,16 @@ int lte_est_timing_advance(LTE_DL_FRAME_PARMS *frame_parms,
|
|||||||
|
|
||||||
int lte_est_timing_advance_pusch(PHY_VARS_eNB* phy_vars_eNB,module_id_t UE_id,uint8_t subframe);
|
int lte_est_timing_advance_pusch(PHY_VARS_eNB* phy_vars_eNB,module_id_t UE_id,uint8_t subframe);
|
||||||
|
|
||||||
void lte_eNB_I0_measurements(PHY_VARS_eNB *phy_vars_eNb,
|
void lte_eNB_I0_measurements(PHY_VARS_eNB *phy_vars_eNB,
|
||||||
|
int subframe,
|
||||||
module_id_t eNB_id,
|
module_id_t eNB_id,
|
||||||
unsigned char clear);
|
unsigned char clear);
|
||||||
|
|
||||||
void lte_eNB_I0_measurements_emul(PHY_VARS_eNB *phy_vars_eNb,
|
void lte_eNB_I0_measurements_emul(PHY_VARS_eNB *phy_vars_eNB,
|
||||||
uint8_t sect_id);
|
uint8_t sect_id);
|
||||||
|
|
||||||
|
|
||||||
void lte_eNB_srs_measurements(PHY_VARS_eNB *phy_vars_eNb,
|
void lte_eNB_srs_measurements(PHY_VARS_eNB *phy_vars_eNBy,
|
||||||
module_id_t eNB_id,
|
module_id_t eNB_id,
|
||||||
module_id_t UE_id,
|
module_id_t UE_id,
|
||||||
unsigned char init_averaging);
|
unsigned char init_averaging);
|
||||||
|
|||||||
@@ -39,57 +39,36 @@
|
|||||||
int32_t rx_power_avg_eNB[3][3];
|
int32_t rx_power_avg_eNB[3][3];
|
||||||
|
|
||||||
|
|
||||||
void lte_eNB_I0_measurements(PHY_VARS_eNB *phy_vars_eNb,
|
void lte_eNB_I0_measurements(PHY_VARS_eNB *phy_vars_eNB,
|
||||||
|
int subframe,
|
||||||
unsigned char eNB_id,
|
unsigned char eNB_id,
|
||||||
unsigned char clear)
|
unsigned char clear)
|
||||||
{
|
{
|
||||||
|
|
||||||
LTE_eNB_COMMON *eNB_common_vars = &phy_vars_eNb->lte_eNB_common_vars;
|
LTE_eNB_COMMON *eNB_common_vars = &phy_vars_eNB->lte_eNB_common_vars;
|
||||||
LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_eNb->lte_frame_parms;
|
LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_eNB->lte_frame_parms;
|
||||||
PHY_MEASUREMENTS_eNB *phy_measurements = &phy_vars_eNb->PHY_measurements_eNB[eNB_id];
|
PHY_MEASUREMENTS_eNB *phy_measurements = &phy_vars_eNB->PHY_measurements_eNB[eNB_id];
|
||||||
|
int32_t *rb_mask = phy_vars_eNB->rb_mask_ul;
|
||||||
|
|
||||||
uint32_t aarx,rx_power_correction;
|
uint32_t aarx,rx_power_correction;
|
||||||
uint32_t rb;
|
uint32_t rb;
|
||||||
int32_t *ul_ch;
|
int32_t *ul_ch;
|
||||||
int32_t n0_power_tot;
|
int32_t n0_power_tot;
|
||||||
|
int len;
|
||||||
|
int offset;
|
||||||
|
int Nsymb = (frame_parms->Ncp==NORMAL)?14:12;
|
||||||
// noise measurements
|
// noise measurements
|
||||||
// for the moment we measure the noise on the 7th OFDM symbol (in S subframe)
|
// for the moment we measure the noise on the 7th OFDM symbol (in S subframe)
|
||||||
|
|
||||||
phy_measurements->n0_power_tot = 0;
|
phy_measurements->n0_power_tot = 0;
|
||||||
|
|
||||||
/* printf("rxdataF0 %p, rxdataF1 %p\n",
|
|
||||||
(&eNB_common_vars->rxdataF[0][0][(frame_parms->ofdm_symbol_size + frame_parms->first_carrier_offset)<<1 ]),
|
|
||||||
(&eNB_common_vars->rxdataF[0][1][(frame_parms->ofdm_symbol_size + frame_parms->first_carrier_offset)<<1 ]));
|
|
||||||
*/
|
|
||||||
/*
|
|
||||||
for (i=0;i<512;i++)
|
|
||||||
printf("sector 0 antenna 0 : %d,%d\n",((short *)&eNB_common_vars->rxdataF[0][0][(19*frame_parms->ofdm_symbol_size)<<1])[i<<1],
|
|
||||||
((short *)&eNB_common_vars->rxdataF[0][0][(19*frame_parms->ofdm_symbol_size)<<1])[1+(i<<1)]);
|
|
||||||
|
|
||||||
for (i=0;i<12;i++)
|
|
||||||
// printf("sector 0 antenna 1 : %d,%d\n",((short *)&eNB_common_vars->rxdataF[0][1][(19*frame_parms->ofdm_symbol_size)<<1])[i<<1],
|
|
||||||
((short *)&eNB_common_vars->rxdataF[0][1][(19*frame_parms->ofdm_symbol_size)<<1])[1+(i<<1)]);
|
|
||||||
*/
|
|
||||||
|
|
||||||
if ( (frame_parms->ofdm_symbol_size == 128) ||
|
|
||||||
(frame_parms->ofdm_symbol_size == 512) )
|
|
||||||
rx_power_correction = 2;
|
|
||||||
else
|
|
||||||
rx_power_correction = 1;
|
|
||||||
|
|
||||||
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
|
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
|
||||||
if (clear == 1)
|
if (clear == 1)
|
||||||
phy_measurements->n0_power[aarx]=0;
|
phy_measurements->n0_power[aarx]=0;
|
||||||
|
|
||||||
#ifdef USER_MODE
|
|
||||||
phy_measurements->n0_power[aarx] = ((k1*signal_energy(&eNB_common_vars->rxdata[eNB_id][aarx][(frame_parms->samples_per_tti<<1) -frame_parms->ofdm_symbol_size],
|
phy_measurements->n0_power[aarx] = ((k1*signal_energy(&eNB_common_vars->rxdata[eNB_id][aarx][(frame_parms->samples_per_tti<<1) -frame_parms->ofdm_symbol_size],
|
||||||
frame_parms->ofdm_symbol_size)) + k2*phy_measurements->n0_power[aarx])>>10;
|
frame_parms->ofdm_symbol_size)) + k2*phy_measurements->n0_power[aarx])>>10;
|
||||||
#else
|
|
||||||
phy_measurements->n0_power[aarx] = ((k1*signal_energy(&eNB_common_vars->rxdata[eNB_id][aarx][(frame_parms->samples_per_tti<<1) -frame_parms->ofdm_symbol_size],
|
|
||||||
frame_parms->ofdm_symbol_size))+k2*phy_measurements->n0_power[aarx])>>10;
|
|
||||||
#endif
|
|
||||||
phy_measurements->n0_power[aarx] = (phy_measurements->n0_power[aarx] * 12*frame_parms->N_RB_DL)/(frame_parms->ofdm_symbol_size);
|
phy_measurements->n0_power[aarx] = (phy_measurements->n0_power[aarx] * 12*frame_parms->N_RB_DL)/(frame_parms->ofdm_symbol_size);
|
||||||
phy_measurements->n0_power_dB[aarx] = (unsigned short) dB_fixed(phy_measurements->n0_power[aarx]);
|
phy_measurements->n0_power_dB[aarx] = (unsigned short) dB_fixed(phy_measurements->n0_power[aarx]);
|
||||||
phy_measurements->n0_power_tot += phy_measurements->n0_power[aarx];
|
phy_measurements->n0_power_tot += phy_measurements->n0_power[aarx];
|
||||||
@@ -97,52 +76,49 @@ void lte_eNB_I0_measurements(PHY_VARS_eNB *phy_vars_eNb,
|
|||||||
|
|
||||||
phy_measurements->n0_power_tot_dB = (unsigned short) dB_fixed(phy_measurements->n0_power_tot);
|
phy_measurements->n0_power_tot_dB = (unsigned short) dB_fixed(phy_measurements->n0_power_tot);
|
||||||
|
|
||||||
phy_measurements->n0_power_tot_dBm = phy_measurements->n0_power_tot_dB - phy_vars_eNb->rx_total_gain_eNB_dB;
|
phy_measurements->n0_power_tot_dBm = phy_measurements->n0_power_tot_dB - phy_vars_eNB->rx_total_gain_eNB_dB;
|
||||||
// printf("n0_power %d\n",phy_measurements->n0_power_tot_dB);
|
// printf("n0_power %d\n",phy_measurements->n0_power_tot_dB);
|
||||||
|
|
||||||
|
|
||||||
for (rb=0; rb<frame_parms->N_RB_UL; rb++) {
|
for (rb=0; rb<frame_parms->N_RB_UL; rb++) {
|
||||||
|
|
||||||
n0_power_tot=0;
|
n0_power_tot=0;
|
||||||
|
if ((rb_mask[rb>>5]&(1<<(rb&31))) == 0) { // check that rb was not used in this subframe
|
||||||
|
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
|
||||||
|
|
||||||
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
|
// select the 7th symbol in an uplink subframe
|
||||||
|
offset = (frame_parms->first_carrier_offset + (rb*12))%frame_parms->ofdm_symbol_size;
|
||||||
|
offset += (7*frame_parms->ofdm_symbol_size);//(((Nsymb*subframe)+7)*frame_parms->ofdm_symbol_size);
|
||||||
|
ul_ch = &eNB_common_vars->rxdataF[eNB_id][aarx][offset];
|
||||||
|
len = 12;
|
||||||
|
// just do first half of middle PRB for odd number of PRBs
|
||||||
|
if (((frame_parms->N_RB_UL&1) == 1) &&
|
||||||
|
(rb==(frame_parms->N_RB_UL>>1))) {
|
||||||
|
len=6;
|
||||||
|
}
|
||||||
|
if (clear == 1)
|
||||||
|
phy_measurements->n0_subband_power[aarx][rb]=0;
|
||||||
|
|
||||||
|
AssertFatal(ul_ch, "RX signal buffer (freq) problem");
|
||||||
|
|
||||||
|
|
||||||
if (rb < 12)
|
phy_measurements->n0_subband_power[aarx][rb] = signal_energy_nodc(ul_ch,len);
|
||||||
// ul_ch = &eNB_common_vars->rxdataF[eNB_id][aarx][((19*(frame_parms->ofdm_symbol_size)) + frame_parms->first_carrier_offset + (rb*12))<<1];
|
//((k1*(signal_energy_nodc(ul_ch,len)))
|
||||||
ul_ch = &eNB_common_vars->rxdataF[eNB_id][aarx][((7*frame_parms->ofdm_symbol_size) + frame_parms->first_carrier_offset + (rb*12))<<1];
|
// + (k2*phy_measurements->n0_subband_power[aarx][rb]));
|
||||||
else if (rb>12)
|
|
||||||
ul_ch = &eNB_common_vars->rxdataF[eNB_id][aarx][((7*frame_parms->ofdm_symbol_size) + 6 + (rb-13)*12)<<1];
|
phy_measurements->n0_subband_power_dB[aarx][rb] = dB_fixed(phy_measurements->n0_subband_power[aarx][rb]);
|
||||||
else {
|
// printf("subframe %d (%d): eNb %d, aarx %d, rb %d len %d: energy %d (%d dB)\n",subframe,offset,eNB_id,aarx,rb,len,signal_energy_nodc(ul_ch,len),
|
||||||
ul_ch = NULL;
|
// phy_measurements->n0_subband_power_dB[aarx][rb]);
|
||||||
|
n0_power_tot += phy_measurements->n0_subband_power[aarx][rb];
|
||||||
}
|
}
|
||||||
|
|
||||||
if (clear == 1)
|
phy_measurements->n0_subband_power_tot_dB[rb] = dB_fixed(n0_power_tot);
|
||||||
phy_measurements->n0_subband_power[aarx][rb]=0;
|
phy_measurements->n0_subband_power_tot_dBm[rb] = phy_measurements->n0_subband_power_tot_dB[rb] - phy_vars_eNB->rx_total_gain_eNB_dB - dB_fixed(frame_parms->N_RB_UL);
|
||||||
|
|
||||||
if (ul_ch) {
|
|
||||||
// for (i=0;i<24;i+=2)
|
|
||||||
// printf("re %d => %d\n",i/2,ul_ch[i]);
|
|
||||||
phy_measurements->n0_subband_power[aarx][rb] = ((k1*(signal_energy_nodc(ul_ch,
|
|
||||||
24))*rx_power_correction) + (k2*phy_measurements->n0_subband_power[aarx][rb]))>>11; // 11 and 24 to compensate for repeated signal format
|
|
||||||
|
|
||||||
phy_measurements->n0_subband_power_dB[aarx][rb] = dB_fixed(phy_measurements->n0_subband_power[aarx][rb]);
|
|
||||||
// printf("eNb %d, aarx %d, rb %d : energy %d (%d dB)\n",eNB_id,aarx,rb,signal_energy_nodc(ul_ch,24), phy_measurements->n0_subband_power_dB[aarx][rb]);
|
|
||||||
n0_power_tot += phy_measurements->n0_subband_power[aarx][rb];
|
|
||||||
} else {
|
|
||||||
phy_measurements->n0_subband_power[aarx][rb] = 1;
|
|
||||||
phy_measurements->n0_subband_power_dB[aarx][rb] = -99;
|
|
||||||
n0_power_tot = 1;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
phy_measurements->n0_subband_power_tot_dB[rb] = dB_fixed(n0_power_tot);
|
|
||||||
phy_measurements->n0_subband_power_tot_dBm[rb] = phy_measurements->n0_subband_power_tot_dB[rb] - phy_vars_eNb->rx_total_gain_eNB_dB - 14;
|
|
||||||
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void lte_eNB_srs_measurements(PHY_VARS_eNB *phy_vars_eNb,
|
void lte_eNB_srs_measurements(PHY_VARS_eNB *phy_vars_eNb,
|
||||||
unsigned char eNB_id,
|
unsigned char eNB_id,
|
||||||
unsigned char UE_id,
|
unsigned char UE_id,
|
||||||
|
|||||||
@@ -2108,14 +2108,14 @@ uint8_t generate_dci_top(uint8_t num_ue_spec_dci,
|
|||||||
if (dci_alloc[i].L == (uint8_t)L) {
|
if (dci_alloc[i].L == (uint8_t)L) {
|
||||||
|
|
||||||
#ifdef DEBUG_DCI_ENCODING
|
#ifdef DEBUG_DCI_ENCODING
|
||||||
LOG_I(PHY,"Generating common DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x)\n",i,num_common_dci,dci_alloc[i].nCCE,dci_alloc[i].dci_length,1<<dci_alloc[i].L,
|
LOG_I(PHY,"Generating common DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x)\n",i,num_common_dci,dci_alloc[i].firstCCE,dci_alloc[i].dci_length,1<<dci_alloc[i].L,
|
||||||
*(unsigned int*)dci_alloc[i].dci_pdu);
|
*(unsigned int*)dci_alloc[i].dci_pdu);
|
||||||
dump_dci(frame_parms,&dci_alloc[i]);
|
dump_dci(frame_parms,&dci_alloc[i]);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
if (dci_alloc[i].nCCE>=0) {
|
if (dci_alloc[i].firstCCE>=0) {
|
||||||
e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
|
e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
|
||||||
e+(72*dci_alloc[i].nCCE),
|
e+(72*dci_alloc[i].firstCCE),
|
||||||
dci_alloc[i].dci_length,
|
dci_alloc[i].dci_length,
|
||||||
dci_alloc[i].L,
|
dci_alloc[i].L,
|
||||||
dci_alloc[i].rnti);
|
dci_alloc[i].rnti);
|
||||||
@@ -2133,9 +2133,9 @@ uint8_t generate_dci_top(uint8_t num_ue_spec_dci,
|
|||||||
dump_dci(frame_parms,&dci_alloc[i]);
|
dump_dci(frame_parms,&dci_alloc[i]);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
if (dci_alloc[i].nCCE >= 0) {
|
if (dci_alloc[i].firstCCE >= 0) {
|
||||||
e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
|
e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
|
||||||
e+(72*dci_alloc[i].nCCE),
|
e+(72*dci_alloc[i].firstCCE),
|
||||||
dci_alloc[i].dci_length,
|
dci_alloc[i].dci_length,
|
||||||
dci_alloc[i].L,
|
dci_alloc[i].L,
|
||||||
dci_alloc[i].rnti);
|
dci_alloc[i].rnti);
|
||||||
@@ -2537,13 +2537,116 @@ uint16_t get_nquad(uint8_t num_pdcch_symbols,LTE_DL_FRAME_PARMS *frame_parms,uin
|
|||||||
return(Nreg - 4 - (3*Ngroup_PHICH));
|
return(Nreg - 4 - (3*Ngroup_PHICH));
|
||||||
}
|
}
|
||||||
|
|
||||||
uint16_t get_nCCE_max(uint8_t Mod_id,uint8_t CC_id)
|
uint16_t get_nCCE_mac(uint8_t Mod_id,uint8_t CC_id,int num_pdcch_symbols,int subframe)
|
||||||
{
|
{
|
||||||
|
|
||||||
// check for eNB only !
|
// check for eNB only !
|
||||||
return(get_nCCE(3,&PHY_vars_eNB_g[Mod_id][CC_id]->lte_frame_parms,1)); // 5, 15,21
|
return(get_nCCE(num_pdcch_symbols,
|
||||||
|
&PHY_vars_eNB_g[Mod_id][CC_id]->lte_frame_parms,
|
||||||
|
get_mi(&PHY_vars_eNB_g[Mod_id][CC_id]->lte_frame_parms,subframe)));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
int get_nCCE_offset_l1(int *CCE_table,
|
||||||
|
const unsigned char L,
|
||||||
|
const int nCCE,
|
||||||
|
const int common_dci,
|
||||||
|
const unsigned short rnti,
|
||||||
|
const unsigned char subframe)
|
||||||
|
{
|
||||||
|
|
||||||
|
int search_space_free,m,nb_candidates = 0,l,i;
|
||||||
|
unsigned int Yk;
|
||||||
|
/*
|
||||||
|
printf("CCE Allocation: ");
|
||||||
|
for (i=0;i<nCCE;i++)
|
||||||
|
printf("%d.",CCE_table[i]);
|
||||||
|
printf("\n");
|
||||||
|
*/
|
||||||
|
if (common_dci == 1) {
|
||||||
|
// check CCE(0 ... L-1)
|
||||||
|
nb_candidates = (L==4) ? 4 : 2;
|
||||||
|
nb_candidates = min(nb_candidates,nCCE/L);
|
||||||
|
|
||||||
|
// printf("Common DCI nb_candidates %d, L %d\n",nb_candidates,L);
|
||||||
|
|
||||||
|
for (m = nb_candidates-1 ; m >=0 ; m--) {
|
||||||
|
|
||||||
|
search_space_free = 1;
|
||||||
|
for (l=0; l<L; l++) {
|
||||||
|
|
||||||
|
// printf("CCE_table[%d] %d\n",(m*L)+l,CCE_table[(m*L)+l]);
|
||||||
|
if (CCE_table[(m*L) + l] == 1) {
|
||||||
|
search_space_free = 0;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (search_space_free == 1) {
|
||||||
|
|
||||||
|
// printf("returning %d\n",m*L);
|
||||||
|
|
||||||
|
for (l=0; l<L; l++)
|
||||||
|
CCE_table[(m*L)+l]=1;
|
||||||
|
return(m*L);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return(-1);
|
||||||
|
|
||||||
|
} else { // Find first available in ue specific search space
|
||||||
|
// according to procedure in Section 9.1.1 of 36.213 (v. 8.6)
|
||||||
|
// compute Yk
|
||||||
|
Yk = (unsigned int)rnti;
|
||||||
|
|
||||||
|
for (i=0; i<=subframe; i++)
|
||||||
|
Yk = (Yk*39827)%65537;
|
||||||
|
|
||||||
|
Yk = Yk % (nCCE/L);
|
||||||
|
|
||||||
|
|
||||||
|
switch (L) {
|
||||||
|
case 1:
|
||||||
|
case 2:
|
||||||
|
nb_candidates = 6;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 4:
|
||||||
|
case 8:
|
||||||
|
nb_candidates = 2;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
DevParam(L, nCCE, rnti);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
LOG_D(MAC,"rnti %x, Yk = %d, nCCE %d (nCCE/L %d),nb_cand %d\n",rnti,Yk,nCCE,nCCE/L,nb_candidates);
|
||||||
|
|
||||||
|
for (m = 0 ; m < nb_candidates ; m++) {
|
||||||
|
search_space_free = 1;
|
||||||
|
|
||||||
|
for (l=0; l<L; l++) {
|
||||||
|
if (CCE_table[(((Yk+m)%(nCCE/L))*L) + l] == 1) {
|
||||||
|
search_space_free = 0;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (search_space_free == 1) {
|
||||||
|
for (l=0; l<L; l++)
|
||||||
|
CCE_table[(((Yk+m)%(nCCE/L))*L)+l]=1;
|
||||||
|
|
||||||
|
return(((Yk+m)%(nCCE/L))*L);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return(-1);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
void dci_decoding_procedure0(LTE_UE_PDCCH **lte_ue_pdcch_vars,
|
void dci_decoding_procedure0(LTE_UE_PDCCH **lte_ue_pdcch_vars,
|
||||||
int do_common,
|
int do_common,
|
||||||
uint8_t subframe,
|
uint8_t subframe,
|
||||||
@@ -2691,7 +2794,7 @@ void dci_decoding_procedure0(LTE_UE_PDCCH **lte_ue_pdcch_vars,
|
|||||||
dci_alloc[*dci_cnt].dci_length = sizeof_bits;
|
dci_alloc[*dci_cnt].dci_length = sizeof_bits;
|
||||||
dci_alloc[*dci_cnt].rnti = crc;
|
dci_alloc[*dci_cnt].rnti = crc;
|
||||||
dci_alloc[*dci_cnt].L = L;
|
dci_alloc[*dci_cnt].L = L;
|
||||||
dci_alloc[*dci_cnt].nCCE = CCEind;
|
dci_alloc[*dci_cnt].firstCCE = CCEind;
|
||||||
|
|
||||||
if (sizeof_bytes<=4) {
|
if (sizeof_bytes<=4) {
|
||||||
dci_alloc[*dci_cnt].dci_pdu[3] = dci_decoded_output[0];
|
dci_alloc[*dci_cnt].dci_pdu[3] = dci_decoded_output[0];
|
||||||
|
|||||||
@@ -453,7 +453,7 @@ uint32_t conv_1C_RIV(int32_t rballoc,uint32_t N_RB_DL) {
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
int get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) {
|
uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) {
|
||||||
|
|
||||||
int offset;
|
int offset;
|
||||||
|
|
||||||
@@ -926,10 +926,15 @@ int generate_eNB_dlsch_params_from_dci(int frame,
|
|||||||
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
|
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
|
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
|
||||||
|
|
||||||
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT6[rballoc];
|
if (vrb_type==LOCALIZED) {
|
||||||
|
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT6[rballoc];
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
LOG_E(PHY,"Distributed RB allocation not done yet\n");
|
||||||
|
mac_xface->macphy_exit("exiting");
|
||||||
|
}
|
||||||
dlsch0_harq->vrb_type = vrb_type;
|
dlsch0_harq->vrb_type = vrb_type;
|
||||||
dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rballoc];//NPRB;
|
dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rballoc];//NPRB;
|
||||||
RIV_max = RIV_max6;
|
RIV_max = RIV_max6;
|
||||||
@@ -960,7 +965,14 @@ int generate_eNB_dlsch_params_from_dci(int frame,
|
|||||||
|
|
||||||
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
|
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
|
||||||
|
|
||||||
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT25[rballoc];
|
|
||||||
|
if (vrb_type==LOCALIZED) {
|
||||||
|
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT25[rballoc];
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
LOG_E(PHY,"Distributed RB allocation not done yet\n");
|
||||||
|
mac_xface->macphy_exit("exiting");
|
||||||
|
}
|
||||||
dlsch0_harq->vrb_type = vrb_type;
|
dlsch0_harq->vrb_type = vrb_type;
|
||||||
dlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rballoc];//NPRB;
|
dlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rballoc];//NPRB;
|
||||||
RIV_max = RIV_max25;
|
RIV_max = RIV_max25;
|
||||||
@@ -987,9 +999,16 @@ int generate_eNB_dlsch_params_from_dci(int frame,
|
|||||||
}
|
}
|
||||||
|
|
||||||
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
|
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
|
||||||
|
if (vrb_type==LOCALIZED) {
|
||||||
|
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT50_0[rballoc];
|
||||||
|
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT50_1[rballoc];
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
LOG_E(PHY,"Distributed RB allocation not done yet\n");
|
||||||
|
mac_xface->macphy_exit("exiting");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT50_0[rballoc];
|
|
||||||
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT50_1[rballoc];
|
|
||||||
dlsch0_harq->vrb_type = vrb_type;
|
dlsch0_harq->vrb_type = vrb_type;
|
||||||
dlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rballoc];//NPRB;
|
dlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rballoc];//NPRB;
|
||||||
RIV_max = RIV_max50;
|
RIV_max = RIV_max50;
|
||||||
@@ -1017,10 +1036,17 @@ int generate_eNB_dlsch_params_from_dci(int frame,
|
|||||||
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
|
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
|
||||||
|
|
||||||
dlsch0_harq->vrb_type = vrb_type;
|
dlsch0_harq->vrb_type = vrb_type;
|
||||||
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT100_0[rballoc];
|
if (vrb_type==LOCALIZED) {
|
||||||
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT100_1[rballoc];
|
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT100_0[rballoc];
|
||||||
dlsch0_harq->rb_alloc[2] = localRIV2alloc_LUT100_2[rballoc];
|
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT100_1[rballoc];
|
||||||
dlsch0_harq->rb_alloc[3] = localRIV2alloc_LUT100_3[rballoc];
|
dlsch0_harq->rb_alloc[2] = localRIV2alloc_LUT100_2[rballoc];
|
||||||
|
dlsch0_harq->rb_alloc[3] = localRIV2alloc_LUT100_3[rballoc];
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
LOG_E(PHY,"Distributed RB allocation not done yet\n");
|
||||||
|
mac_xface->macphy_exit("exiting");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
dlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rballoc];//NPRB;
|
dlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rballoc];//NPRB;
|
||||||
@@ -2682,17 +2708,17 @@ int generate_eNB_dlsch_params_from_dci(int frame,
|
|||||||
#ifdef DEBUG_DCI
|
#ifdef DEBUG_DCI
|
||||||
|
|
||||||
if (dlsch0) {
|
if (dlsch0) {
|
||||||
msg("dlsch0 eNB: dlsch0 %p\n",dlsch0);
|
printf("dlsch0 eNB: dlsch0 %p\n",dlsch0);
|
||||||
msg("dlsch0 eNB: rnti %x\n",dlsch0->rnti);
|
printf("dlsch0 eNB: rnti %x\n",dlsch0->rnti);
|
||||||
msg("dlsch0 eNB: NBRB %d\n",dlsch0_harq->nb_rb);
|
printf("dlsch0 eNB: NBRB %d\n",dlsch0_harq->nb_rb);
|
||||||
msg("dlsch0 eNB: rballoc %x\n",dlsch0_harq->rb_alloc[0]);
|
printf("dlsch0 eNB: rballoc %x\n",dlsch0_harq->rb_alloc[0]);
|
||||||
msg("dlsch0 eNB: harq_pid %d\n",harq_pid);
|
printf("dlsch0 eNB: harq_pid %d\n",harq_pid);
|
||||||
msg("dlsch0 eNB: round %d\n",dlsch0_harq->round);
|
printf("dlsch0 eNB: round %d\n",dlsch0_harq->round);
|
||||||
msg("dlsch0 eNB: rvidx %d\n",dlsch0_harq->rvidx);
|
printf("dlsch0 eNB: rvidx %d\n",dlsch0_harq->rvidx);
|
||||||
msg("dlsch0 eNB: TBS %d (NPRB %d)\n",dlsch0_harq->TBS,NPRB);
|
printf("dlsch0 eNB: TBS %d (NPRB %d)\n",dlsch0_harq->TBS,NPRB);
|
||||||
msg("dlsch0 eNB: mcs %d\n",dlsch0_harq->mcs);
|
printf("dlsch0 eNB: mcs %d\n",dlsch0_harq->mcs);
|
||||||
msg("dlsch0 eNB: tpmi %d\n",tpmi);
|
printf("dlsch0 eNB: tpmi %d\n",tpmi);
|
||||||
msg("dlsch0 eNB: mimo_mode %d\n",dlsch0_harq->mimo_mode);
|
printf("dlsch0 eNB: mimo_mode %d\n",dlsch0_harq->mimo_mode);
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
@@ -5549,15 +5575,15 @@ int generate_ue_dlsch_params_from_dci(int frame,
|
|||||||
#ifdef DEBUG_DCI
|
#ifdef DEBUG_DCI
|
||||||
|
|
||||||
if (dlsch[0]) {
|
if (dlsch[0]) {
|
||||||
msg("PDSCH dlsch0 UE: rnti %x\n",dlsch[0]->rnti);
|
printf("PDSCH dlsch0 UE: rnti %x\n",dlsch[0]->rnti);
|
||||||
msg("PDSCH dlsch0 UE: NBRB %d\n",dlsch0_harq->nb_rb);
|
printf("PDSCH dlsch0 UE: NBRB %d\n",dlsch0_harq->nb_rb);
|
||||||
msg("PDSCH dlsch0 UE: rballoc %x\n",dlsch0_harq->rb_alloc[0]);
|
printf("PDSCH dlsch0 UE: rballoc %x\n",dlsch0_harq->rb_alloc_even[0]);
|
||||||
msg("PDSCH dlsch0 UE: harq_pid %d\n",harq_pid);
|
printf("PDSCH dlsch0 UE: harq_pid %d\n",harq_pid);
|
||||||
msg("PDSCH dlsch0 UE: DCINdi %d\n",dlsch0_harq->DCINdi);
|
printf("PDSCH dlsch0 UE: DCINdi %d\n",dlsch0_harq->DCINdi);
|
||||||
msg("PDSCH dlsch0 UE: rvidx %d\n",dlsch0_harq->rvidx);
|
printf("PDSCH dlsch0 UE: rvidx %d\n",dlsch0_harq->rvidx);
|
||||||
msg("PDSCH dlsch0 UE: TBS %d\n",dlsch0_harq->TBS);
|
printf("PDSCH dlsch0 UE: TBS %d\n",dlsch0_harq->TBS);
|
||||||
msg("PDSCH dlsch0 UE: mcs %d\n",dlsch0_harq->mcs);
|
printf("PDSCH dlsch0 UE: mcs %d\n",dlsch0_harq->mcs);
|
||||||
msg("PDSCH dlsch0 UE: pwr_off %d\n",dlsch0_harq->dl_power_off);
|
printf("PDSCH dlsch0 UE: pwr_off %d\n",dlsch0_harq->dl_power_off);
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@@ -273,6 +273,8 @@ typedef struct {
|
|||||||
uint8_t Mdlharq;
|
uint8_t Mdlharq;
|
||||||
/// MIMO transmission mode indicator for this sub-frame (for definition see 36-212 V8.6 2009-03, p.17)
|
/// MIMO transmission mode indicator for this sub-frame (for definition see 36-212 V8.6 2009-03, p.17)
|
||||||
uint8_t Kmimo;
|
uint8_t Kmimo;
|
||||||
|
/// Nsoft parameter related to UE Category
|
||||||
|
uint32_t Nsoft;
|
||||||
/// amplitude of PDSCH (compared to RS) in symbols without pilots
|
/// amplitude of PDSCH (compared to RS) in symbols without pilots
|
||||||
int16_t sqrt_rho_a;
|
int16_t sqrt_rho_a;
|
||||||
/// amplitude of PDSCH (compared to RS) in symbols containing pilots
|
/// amplitude of PDSCH (compared to RS) in symbols containing pilots
|
||||||
@@ -583,13 +585,13 @@ typedef struct {
|
|||||||
/// UL RSSI per receive antenna
|
/// UL RSSI per receive antenna
|
||||||
int32_t UL_rssi[NB_ANTENNAS_RX];
|
int32_t UL_rssi[NB_ANTENNAS_RX];
|
||||||
/// PUCCH1a/b power (digital linear)
|
/// PUCCH1a/b power (digital linear)
|
||||||
int32_t Po_PUCCH;
|
uint32_t Po_PUCCH;
|
||||||
/// PUCCH1a/b power (dBm)
|
/// PUCCH1a/b power (dBm)
|
||||||
int32_t Po_PUCCH_dBm;
|
int32_t Po_PUCCH_dBm;
|
||||||
/// PUCCH1 power (digital linear), conditioned on below threshold
|
/// PUCCH1 power (digital linear), conditioned on below threshold
|
||||||
int32_t Po_PUCCH1_below;
|
uint32_t Po_PUCCH1_below;
|
||||||
/// PUCCH1 power (digital linear), conditioned on above threshold
|
/// PUCCH1 power (digital linear), conditioned on above threshold
|
||||||
int32_t Po_PUCCH1_above;
|
uint32_t Po_PUCCH1_above;
|
||||||
/// Indicator that Po_PUCCH has been updated by PHY
|
/// Indicator that Po_PUCCH has been updated by PHY
|
||||||
int32_t Po_PUCCH_update;
|
int32_t Po_PUCCH_update;
|
||||||
/// DL Wideband CQI index (2 TBs)
|
/// DL Wideband CQI index (2 TBs)
|
||||||
@@ -700,6 +702,8 @@ typedef struct {
|
|||||||
uint8_t Mdlharq;
|
uint8_t Mdlharq;
|
||||||
/// MIMO transmission mode indicator for this sub-frame (for definition see 36-212 V8.6 2009-03, p.17)
|
/// MIMO transmission mode indicator for this sub-frame (for definition see 36-212 V8.6 2009-03, p.17)
|
||||||
uint8_t Kmimo;
|
uint8_t Kmimo;
|
||||||
|
/// Nsoft parameter related to UE Category
|
||||||
|
uint32_t Nsoft;
|
||||||
/// Maximum number of Turbo iterations
|
/// Maximum number of Turbo iterations
|
||||||
uint8_t max_turbo_iterations;
|
uint8_t max_turbo_iterations;
|
||||||
/// accumulated tx power adjustment for PUCCH
|
/// accumulated tx power adjustment for PUCCH
|
||||||
@@ -744,7 +748,7 @@ typedef struct {
|
|||||||
/// Aggregation level
|
/// Aggregation level
|
||||||
uint8_t L;
|
uint8_t L;
|
||||||
/// Position of first CCE of the dci
|
/// Position of first CCE of the dci
|
||||||
int nCCE;
|
int firstCCE;
|
||||||
/// flag to indicate that this is a RA response
|
/// flag to indicate that this is a RA response
|
||||||
boolean_t ra_flag;
|
boolean_t ra_flag;
|
||||||
/// rnti
|
/// rnti
|
||||||
|
|||||||
@@ -117,7 +117,7 @@ void free_eNB_dlsch(LTE_eNB_DLSCH_t *dlsch)
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,unsigned char N_RB_DL, uint8_t abstraction_flag)
|
LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,uint32_t Nsoft,unsigned char N_RB_DL, uint8_t abstraction_flag)
|
||||||
{
|
{
|
||||||
|
|
||||||
LTE_eNB_DLSCH_t *dlsch;
|
LTE_eNB_DLSCH_t *dlsch;
|
||||||
@@ -148,6 +148,7 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,unsigne
|
|||||||
bzero(dlsch,sizeof(LTE_eNB_DLSCH_t));
|
bzero(dlsch,sizeof(LTE_eNB_DLSCH_t));
|
||||||
dlsch->Kmimo = Kmimo;
|
dlsch->Kmimo = Kmimo;
|
||||||
dlsch->Mdlharq = Mdlharq;
|
dlsch->Mdlharq = Mdlharq;
|
||||||
|
dlsch->Nsoft = Nsoft;
|
||||||
|
|
||||||
for (i=0; i<10; i++)
|
for (i=0; i<10; i++)
|
||||||
dlsch->harq_ids[i] = Mdlharq;
|
dlsch->harq_ids[i] = Mdlharq;
|
||||||
@@ -400,7 +401,7 @@ int dlsch_encoding(unsigned char *a,
|
|||||||
dlsch->harq_processes[harq_pid]->w[r],
|
dlsch->harq_processes[harq_pid]->w[r],
|
||||||
dlsch->harq_processes[harq_pid]->e+r_offset,
|
dlsch->harq_processes[harq_pid]->e+r_offset,
|
||||||
dlsch->harq_processes[harq_pid]->C, // C
|
dlsch->harq_processes[harq_pid]->C, // C
|
||||||
NSOFT, // Nsoft,
|
dlsch->Nsoft, // Nsoft,
|
||||||
dlsch->Mdlharq,
|
dlsch->Mdlharq,
|
||||||
dlsch->Kmimo,
|
dlsch->Kmimo,
|
||||||
dlsch->harq_processes[harq_pid]->rvidx,
|
dlsch->harq_processes[harq_pid]->rvidx,
|
||||||
|
|||||||
@@ -81,7 +81,7 @@ void free_ue_dlsch(LTE_UE_DLSCH_t *dlsch)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
LTE_UE_DLSCH_t *new_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint8_t max_turbo_iterations,uint8_t N_RB_DL, uint8_t abstraction_flag)
|
LTE_UE_DLSCH_t *new_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t max_turbo_iterations,uint8_t N_RB_DL, uint8_t abstraction_flag)
|
||||||
{
|
{
|
||||||
|
|
||||||
LTE_UE_DLSCH_t *dlsch;
|
LTE_UE_DLSCH_t *dlsch;
|
||||||
@@ -113,6 +113,7 @@ LTE_UE_DLSCH_t *new_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint8_t max_turbo_ite
|
|||||||
memset(dlsch,0,sizeof(LTE_UE_DLSCH_t));
|
memset(dlsch,0,sizeof(LTE_UE_DLSCH_t));
|
||||||
dlsch->Kmimo = Kmimo;
|
dlsch->Kmimo = Kmimo;
|
||||||
dlsch->Mdlharq = Mdlharq;
|
dlsch->Mdlharq = Mdlharq;
|
||||||
|
dlsch->Nsoft = Nsoft;
|
||||||
dlsch->max_turbo_iterations = max_turbo_iterations;
|
dlsch->max_turbo_iterations = max_turbo_iterations;
|
||||||
|
|
||||||
for (i=0; i<Mdlharq; i++) {
|
for (i=0; i<Mdlharq; i++) {
|
||||||
@@ -353,7 +354,7 @@ uint32_t dlsch_decoding(PHY_VARS_UE *phy_vars_ue,
|
|||||||
(uint8_t*)&dummy_w[r][0],
|
(uint8_t*)&dummy_w[r][0],
|
||||||
dlsch_llr+r_offset,
|
dlsch_llr+r_offset,
|
||||||
harq_process->C,
|
harq_process->C,
|
||||||
NSOFT,
|
dlsch->Nsoft,
|
||||||
dlsch->Mdlharq,
|
dlsch->Mdlharq,
|
||||||
dlsch->Kmimo,
|
dlsch->Kmimo,
|
||||||
harq_process->rvidx,
|
harq_process->rvidx,
|
||||||
|
|||||||
@@ -662,14 +662,16 @@ int dlsch_qpsk_llr(LTE_DL_FRAME_PARMS *frame_parms,
|
|||||||
|
|
||||||
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
|
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
|
||||||
if (frame_parms->mode1_flag==0)
|
if (frame_parms->mode1_flag==0)
|
||||||
len = (nb_rb*8)- (2*pbch_pss_sss_adjust/3);
|
len = (nb_rb*8) - (2*pbch_pss_sss_adjust/3);
|
||||||
else
|
else
|
||||||
len = (nb_rb*10) - (5*pbch_pss_sss_adjust/6);
|
len = (nb_rb*10) - (5*pbch_pss_sss_adjust/6);
|
||||||
} else {
|
} else {
|
||||||
len = (nb_rb*12) - pbch_pss_sss_adjust;
|
len = (nb_rb*12) - pbch_pss_sss_adjust;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
// printf("dlsch_qpsk_llr: symbol %d,nb_rb %d, len %d,pbch_pss_sss_adjust %d\n",symbol,nb_rb,len,pbch_pss_sss_adjust);
|
// printf("dlsch_qpsk_llr: symbol %d,nb_rb %d, len %d,pbch_pss_sss_adjust %d\n",symbol,nb_rb,len,pbch_pss_sss_adjust);
|
||||||
|
|
||||||
for (i=0; i<len; i++) {
|
for (i=0; i<len; i++) {
|
||||||
*llr32 = *rxF;
|
*llr32 = *rxF;
|
||||||
// printf("llr %d : (%d,%d)\n",i,((int16_t*)llr32)[0],((int16_t*)llr32)[1]);
|
// printf("llr %d : (%d,%d)\n",i,((int16_t*)llr32)[0],((int16_t*)llr32)[1]);
|
||||||
|
|||||||
@@ -574,12 +574,18 @@ int dump_eNB_stats(PHY_VARS_eNB *phy_vars_eNB, char* buffer, int length)
|
|||||||
phy_vars_eNB->PHY_measurements_eNB[eNB].n0_power_dB[0],
|
phy_vars_eNB->PHY_measurements_eNB[eNB].n0_power_dB[0],
|
||||||
phy_vars_eNB->PHY_measurements_eNB[eNB].n0_power_dB[1]);
|
phy_vars_eNB->PHY_measurements_eNB[eNB].n0_power_dB[1]);
|
||||||
|
|
||||||
len += sprintf(&buffer[len],"[eNB PROC] Subband I0: ");
|
len += sprintf(&buffer[len],"[eNB PROC] PRB I0 (%X.%X.%X.%X): ",
|
||||||
|
phy_vars_eNB->rb_mask_ul[0],
|
||||||
|
phy_vars_eNB->rb_mask_ul[1],phy_vars_eNB->rb_mask_ul[2],phy_vars_eNB->rb_mask_ul[3]);
|
||||||
|
|
||||||
for (i=0; i<25; i++)
|
for (i=0; i<phy_vars_eNB->lte_frame_parms.N_RB_UL; i++) {
|
||||||
len += sprintf(&buffer[len],"%2d ",
|
len += sprintf(&buffer[len],"%4d ",
|
||||||
phy_vars_eNB->PHY_measurements_eNB[eNB].n0_subband_power_tot_dB[i]);
|
phy_vars_eNB->PHY_measurements_eNB[eNB].n0_subband_power_tot_dBm[i]);
|
||||||
|
if ((i>0) && ((i%25) == 0))
|
||||||
|
len += sprintf(&buffer[len],"\n ",
|
||||||
|
phy_vars_eNB->PHY_measurements_eNB[eNB].n0_subband_power_tot_dBm[i]);
|
||||||
|
|
||||||
|
}
|
||||||
len += sprintf(&buffer[len],"\n");
|
len += sprintf(&buffer[len],"\n");
|
||||||
len += sprintf(&buffer[len],"\n[eNB PROC] PERFORMANCE PARAMETERS\n");
|
len += sprintf(&buffer[len],"\n[eNB PROC] PERFORMANCE PARAMETERS\n");
|
||||||
/*
|
/*
|
||||||
@@ -635,11 +641,11 @@ int dump_eNB_stats(PHY_VARS_eNB *phy_vars_eNB, char* buffer, int length)
|
|||||||
dB_fixed(phy_vars_eNB->lte_eNB_pusch_vars[UE_id]->ulsch_power[1]),
|
dB_fixed(phy_vars_eNB->lte_eNB_pusch_vars[UE_id]->ulsch_power[1]),
|
||||||
phy_vars_eNB->eNB_UE_stats[UE_id].UL_rssi[0],
|
phy_vars_eNB->eNB_UE_stats[UE_id].UL_rssi[0],
|
||||||
phy_vars_eNB->eNB_UE_stats[UE_id].UL_rssi[1],
|
phy_vars_eNB->eNB_UE_stats[UE_id].UL_rssi[1],
|
||||||
dB_fixed(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH)-phy_vars_eNB->rx_total_gain_eNB_dB,
|
dB_fixed(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH/phy_vars_eNB->lte_frame_parms.N_RB_UL)-phy_vars_eNB->rx_total_gain_eNB_dB,
|
||||||
phy_vars_eNB->lte_frame_parms.ul_power_control_config_common.p0_NominalPUCCH,
|
phy_vars_eNB->lte_frame_parms.ul_power_control_config_common.p0_NominalPUCCH,
|
||||||
dB_fixed(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH1_below)-phy_vars_eNB->rx_total_gain_eNB_dB,
|
dB_fixed(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH1_below/phy_vars_eNB->lte_frame_parms.N_RB_UL)-phy_vars_eNB->rx_total_gain_eNB_dB,
|
||||||
dB_fixed(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH1_above)-phy_vars_eNB->rx_total_gain_eNB_dB,
|
dB_fixed(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH1_above/phy_vars_eNB->lte_frame_parms.N_RB_UL)-phy_vars_eNB->rx_total_gain_eNB_dB,
|
||||||
PUCCH1_THRES+phy_vars_eNB->PHY_measurements_eNB[0].n0_power_tot_dBm, //-dB_fixed(phy_vars_eNB->lte_frame_parms.N_RB_UL),
|
PUCCH1_THRES+phy_vars_eNB->PHY_measurements_eNB[0].n0_power_tot_dBm-dB_fixed(phy_vars_eNB->lte_frame_parms.N_RB_UL),
|
||||||
phy_vars_eNB->eNB_UE_stats[UE_id].sector);
|
phy_vars_eNB->eNB_UE_stats[UE_id].sector);
|
||||||
|
|
||||||
for(i=0; i<8; i++)
|
for(i=0; i<8; i++)
|
||||||
|
|||||||
@@ -56,15 +56,16 @@ void free_eNB_dlsch(LTE_eNB_DLSCH_t *dlsch);
|
|||||||
|
|
||||||
void clean_eNb_dlsch(LTE_eNB_DLSCH_t *dlsch, uint8_t abstraction_flag);
|
void clean_eNb_dlsch(LTE_eNB_DLSCH_t *dlsch, uint8_t abstraction_flag);
|
||||||
|
|
||||||
/** \fn new_eNB_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint8_t abstraction_flag)
|
/** \fn new_eNB_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t abstraction_flag)
|
||||||
\brief This function allocates structures for a particular DLSCH at eNB
|
\brief This function allocates structures for a particular DLSCH at eNB
|
||||||
@returns Pointer to DLSCH to be removed
|
@returns Pointer to DLSCH to be removed
|
||||||
@param Kmimo Kmimo factor from 36-212/36-213
|
@param Kmimo Kmimo factor from 36-212/36-213
|
||||||
@param Mdlharq Maximum number of HARQ rounds (36-212/36-213)
|
@param Mdlharq Maximum number of HARQ rounds (36-212/36-213)
|
||||||
|
@param Nsoft Soft-LLR buffer size from UE-Category
|
||||||
@params N_RB_DL total number of resource blocks (determine the operating BW)
|
@params N_RB_DL total number of resource blocks (determine the operating BW)
|
||||||
@param abstraction_flag Flag to indicate abstracted interface
|
@param abstraction_flag Flag to indicate abstracted interface
|
||||||
*/
|
*/
|
||||||
LTE_eNB_DLSCH_t *new_eNB_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint8_t N_RB_DL, uint8_t abstraction_flag);
|
LTE_eNB_DLSCH_t *new_eNB_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t N_RB_DL, uint8_t abstraction_flag);
|
||||||
|
|
||||||
/** \fn free_ue_dlsch(LTE_UE_DLSCH_t *dlsch)
|
/** \fn free_ue_dlsch(LTE_UE_DLSCH_t *dlsch)
|
||||||
\brief This function frees memory allocated for a particular DLSCH at UE
|
\brief This function frees memory allocated for a particular DLSCH at UE
|
||||||
@@ -72,11 +73,16 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint8_t N_RB_DL, ui
|
|||||||
*/
|
*/
|
||||||
void free_ue_dlsch(LTE_UE_DLSCH_t *dlsch);
|
void free_ue_dlsch(LTE_UE_DLSCH_t *dlsch);
|
||||||
|
|
||||||
LTE_eNB_ULSCH_t *new_eNB_ulsch(uint8_t Mdlharq,uint8_t max_turbo_iterations,uint8_t N_RB_UL, uint8_t abstraction_flag);
|
/** \fn new_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t abstraction_flag)
|
||||||
|
\brief This function allocates structures for a particular DLSCH at eNB
|
||||||
LTE_UE_DLSCH_t *new_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint8_t max_turbo_iterations,uint8_t N_RB_DL, uint8_t abstraction_flag);
|
@returns Pointer to DLSCH to be removed
|
||||||
|
@param Kmimo Kmimo factor from 36-212/36-213
|
||||||
LTE_UE_ULSCH_t *new_ue_ulsch(unsigned char Mdlharq,unsigned char N_RB_UL, uint8_t abstraction_flag);
|
@param Mdlharq Maximum number of HARQ rounds (36-212/36-213)
|
||||||
|
@param Nsoft Soft-LLR buffer size from UE-Category
|
||||||
|
@params N_RB_DL total number of resource blocks (determine the operating BW)
|
||||||
|
@param abstraction_flag Flag to indicate abstracted interface
|
||||||
|
*/
|
||||||
|
LTE_UE_DLSCH_t *new_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t max_turbo_iterations,uint8_t N_RB_DL, uint8_t abstraction_flag);
|
||||||
|
|
||||||
|
|
||||||
void clean_eNb_ulsch(LTE_eNB_ULSCH_t *ulsch, uint8_t abstraction_flag);
|
void clean_eNb_ulsch(LTE_eNB_ULSCH_t *ulsch, uint8_t abstraction_flag);
|
||||||
@@ -1233,11 +1239,20 @@ uint32_t get_TBS_DL(uint8_t mcs, uint16_t nb_rb);
|
|||||||
uint32_t get_TBS_UL(uint8_t mcs, uint16_t nb_rb);
|
uint32_t get_TBS_UL(uint8_t mcs, uint16_t nb_rb);
|
||||||
|
|
||||||
/* \brief Return bit-map of resource allocation for a given DCI rballoc (RIV format) and vrb type
|
/* \brief Return bit-map of resource allocation for a given DCI rballoc (RIV format) and vrb type
|
||||||
|
@param N_RB_DL number of PRB on DL
|
||||||
|
@param indicator for even/odd slot
|
||||||
|
@param vrb vrb index
|
||||||
|
@param Ngap Gap indicator
|
||||||
|
*/
|
||||||
|
uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap);
|
||||||
|
|
||||||
|
/* \brief Return prb for a given vrb index
|
||||||
@param vrb_type VRB type (0=localized,1=distributed)
|
@param vrb_type VRB type (0=localized,1=distributed)
|
||||||
@param rb_alloc_dci rballoc field from DCI
|
@param rb_alloc_dci rballoc field from DCI
|
||||||
*/
|
*/
|
||||||
uint32_t get_rballoc(vrb_t vrb_type,uint16_t rb_alloc_dci);
|
uint32_t get_rballoc(vrb_t vrb_type,uint16_t rb_alloc_dci);
|
||||||
|
|
||||||
|
|
||||||
/* \brief Return bit-map of resource allocation for a given DCI rballoc (RIV format) and vrb type
|
/* \brief Return bit-map of resource allocation for a given DCI rballoc (RIV format) and vrb type
|
||||||
@returns Transmission mode (1-7)
|
@returns Transmission mode (1-7)
|
||||||
*/
|
*/
|
||||||
@@ -1577,6 +1592,12 @@ uint16_t computeRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs);
|
|||||||
|
|
||||||
uint32_t pmi_extend(LTE_DL_FRAME_PARMS *frame_parms,uint8_t wideband_pmi);
|
uint32_t pmi_extend(LTE_DL_FRAME_PARMS *frame_parms,uint8_t wideband_pmi);
|
||||||
|
|
||||||
|
int get_nCCE_offset_l1(int *CCE_table,
|
||||||
|
const unsigned char L,
|
||||||
|
const int nCCE,
|
||||||
|
const int common_dci,
|
||||||
|
const unsigned short rnti,
|
||||||
|
const unsigned char subframe);
|
||||||
|
|
||||||
uint16_t get_nCCE(uint8_t num_pdcch_symbols,LTE_DL_FRAME_PARMS *frame_parms,uint8_t mi);
|
uint16_t get_nCCE(uint8_t num_pdcch_symbols,LTE_DL_FRAME_PARMS *frame_parms,uint8_t mi);
|
||||||
|
|
||||||
@@ -1584,7 +1605,7 @@ uint16_t get_nquad(uint8_t num_pdcch_symbols,LTE_DL_FRAME_PARMS *frame_parms,uin
|
|||||||
|
|
||||||
uint8_t get_mi(LTE_DL_FRAME_PARMS *frame,uint8_t subframe);
|
uint8_t get_mi(LTE_DL_FRAME_PARMS *frame,uint8_t subframe);
|
||||||
|
|
||||||
uint16_t get_nCCE_max(uint8_t Mod_id,uint8_t CC_id);
|
uint16_t get_nCCE_mac(uint8_t Mod_id,uint8_t CC_id,int num_pdcch_symbols,int subframe);
|
||||||
|
|
||||||
uint8_t get_num_pdcch_symbols(uint8_t num_dci,DCI_ALLOC_t *dci_alloc,LTE_DL_FRAME_PARMS *frame_parms,uint8_t subframe);
|
uint8_t get_num_pdcch_symbols(uint8_t num_dci,DCI_ALLOC_t *dci_alloc,LTE_DL_FRAME_PARMS *frame_parms,uint8_t subframe);
|
||||||
|
|
||||||
@@ -1637,22 +1658,22 @@ void generate_pucch_emul(PHY_VARS_UE *phy_vars_ue,
|
|||||||
uint8_t subframe);
|
uint8_t subframe);
|
||||||
|
|
||||||
|
|
||||||
int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
uint32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
||||||
PUCCH_FMT_t fmt,
|
PUCCH_FMT_t fmt,
|
||||||
uint8_t UE_id,
|
uint8_t UE_id,
|
||||||
uint16_t n1_pucch,
|
uint16_t n1_pucch,
|
||||||
uint16_t n2_pucch,
|
uint16_t n2_pucch,
|
||||||
uint8_t shortened_format,
|
uint8_t shortened_format,
|
||||||
uint8_t *payload,
|
uint8_t *payload,
|
||||||
uint8_t subframe,
|
uint8_t subframe,
|
||||||
uint8_t pucch1_thres);
|
uint8_t pucch1_thres);
|
||||||
|
|
||||||
int32_t rx_pucch_emul(PHY_VARS_eNB *phy_vars_eNB,
|
int32_t rx_pucch_emul(PHY_VARS_eNB *phy_vars_eNB,
|
||||||
uint8_t UE_index,
|
uint8_t UE_index,
|
||||||
PUCCH_FMT_t fmt,
|
PUCCH_FMT_t fmt,
|
||||||
uint8_t n1_pucch_sel,
|
uint8_t n1_pucch_sel,
|
||||||
uint8_t *payload,
|
uint8_t *payload,
|
||||||
uint8_t subframe);
|
uint8_t subframe);
|
||||||
|
|
||||||
|
|
||||||
/*!
|
/*!
|
||||||
|
|||||||
@@ -430,15 +430,15 @@ void generate_pucch_emul(PHY_VARS_UE *phy_vars_ue,
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
uint32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
||||||
PUCCH_FMT_t fmt,
|
PUCCH_FMT_t fmt,
|
||||||
uint8_t UE_id,
|
uint8_t UE_id,
|
||||||
uint16_t n1_pucch,
|
uint16_t n1_pucch,
|
||||||
uint16_t n2_pucch,
|
uint16_t n2_pucch,
|
||||||
uint8_t shortened_format,
|
uint8_t shortened_format,
|
||||||
uint8_t *payload,
|
uint8_t *payload,
|
||||||
uint8_t subframe,
|
uint8_t subframe,
|
||||||
uint8_t pucch1_thres)
|
uint8_t pucch1_thres)
|
||||||
{
|
{
|
||||||
|
|
||||||
|
|
||||||
@@ -446,11 +446,11 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
LTE_eNB_COMMON *eNB_common_vars = &phy_vars_eNB->lte_eNB_common_vars;
|
LTE_eNB_COMMON *eNB_common_vars = &phy_vars_eNB->lte_eNB_common_vars;
|
||||||
LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_eNB->lte_frame_parms;
|
LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_eNB->lte_frame_parms;
|
||||||
// PUCCH_CONFIG_DEDICATED *pucch_config_dedicated = &phy_vars_eNB->pucch_config_dedicated[UE_id];
|
// PUCCH_CONFIG_DEDICATED *pucch_config_dedicated = &phy_vars_eNB->pucch_config_dedicated[UE_id];
|
||||||
int8_t sigma2_dB = phy_vars_eNB->PHY_measurements_eNB[0].n0_power_dB[0];
|
int8_t sigma2_dB = phy_vars_eNB->PHY_measurements_eNB[0].n0_subband_power_tot_dB[6];
|
||||||
int32_t *Po_PUCCH = &(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH);
|
uint32_t *Po_PUCCH = &(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH);
|
||||||
int32_t *Po_PUCCH_dBm = &(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH_dBm);
|
int32_t *Po_PUCCH_dBm = &(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH_dBm);
|
||||||
int32_t *Po_PUCCH1_below = &(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH1_below);
|
uint32_t *Po_PUCCH1_below = &(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH1_below);
|
||||||
int32_t *Po_PUCCH1_above = &(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH1_above);
|
uint32_t *Po_PUCCH1_above = &(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH1_above);
|
||||||
int32_t *Po_PUCCH_update = &(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH_update);
|
int32_t *Po_PUCCH_update = &(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH_update);
|
||||||
uint32_t u,v,n,aa;
|
uint32_t u,v,n,aa;
|
||||||
uint32_t z[12*14];
|
uint32_t z[12*14];
|
||||||
@@ -468,7 +468,7 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
uint32_t symbol_offset;
|
uint32_t symbol_offset;
|
||||||
int16_t stat_ref_re,stat_ref_im,*cfo,chest_re,chest_im;
|
int16_t stat_ref_re,stat_ref_im,*cfo,chest_re,chest_im;
|
||||||
int32_t stat_re=0,stat_im=0;
|
int32_t stat_re=0,stat_im=0;
|
||||||
int32_t stat,stat_max=0;
|
uint32_t stat,stat_max=0;
|
||||||
|
|
||||||
uint8_t deltaPUCCH_Shift = frame_parms->pucch_config_common.deltaPUCCH_Shift;
|
uint8_t deltaPUCCH_Shift = frame_parms->pucch_config_common.deltaPUCCH_Shift;
|
||||||
uint8_t NRB2 = frame_parms->pucch_config_common.nRB_CQI;
|
uint8_t NRB2 = frame_parms->pucch_config_common.nRB_CQI;
|
||||||
@@ -478,6 +478,7 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
uint32_t u1 = (frame_parms->Nid_cell + frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[1+(subframe<<1)]) % 30;
|
uint32_t u1 = (frame_parms->Nid_cell + frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[1+(subframe<<1)]) % 30;
|
||||||
uint32_t v0=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[subframe<<1];
|
uint32_t v0=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[subframe<<1];
|
||||||
uint32_t v1=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[1+(subframe<<1)];
|
uint32_t v1=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[1+(subframe<<1)];
|
||||||
|
int chL;
|
||||||
|
|
||||||
if (first_call == 1) {
|
if (first_call == 1) {
|
||||||
for (i=0;i<10;i++) {
|
for (i=0;i<10;i++) {
|
||||||
@@ -508,6 +509,7 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
}
|
}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
if ((deltaPUCCH_Shift==0) || (deltaPUCCH_Shift>3)) {
|
if ((deltaPUCCH_Shift==0) || (deltaPUCCH_Shift>3)) {
|
||||||
LOG_E(PHY,"[eNB] rx_pucch: Illegal deltaPUCCH_shift %d (should be 1,2,3)\n",deltaPUCCH_Shift);
|
LOG_E(PHY,"[eNB] rx_pucch: Illegal deltaPUCCH_shift %d (should be 1,2,3)\n",deltaPUCCH_Shift);
|
||||||
return(-1);
|
return(-1);
|
||||||
@@ -737,30 +739,35 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
cfo = (frame_parms->Ncp==0) ? &cfo_pucch_np[14*phase] : &cfo_pucch_ep[12*phase];
|
cfo = (frame_parms->Ncp==0) ? &cfo_pucch_np[14*phase] : &cfo_pucch_ep[12*phase];
|
||||||
|
|
||||||
for (l=0; l<(nsymb>>1); l++) {
|
for (l=0; l<(nsymb>>1); l++) {
|
||||||
stat_re += ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15);
|
stat_re += (((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15))/nsymb;
|
||||||
stat_im += ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15);
|
stat_im += (((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15))/nsymb;
|
||||||
off+=2;
|
off+=2;
|
||||||
|
|
||||||
|
|
||||||
#ifdef DEBUG_PUCCH_RX
|
#ifdef DEBUG_PUCCH_RX
|
||||||
LOG_D(PHY,"[eNB] PUCCH subframe %d (%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,re,
|
LOG_D(PHY,"[eNB] PUCCH subframe %d (%d,%d,%d) => (%d,%d) x (%d,%d) : (%d,%d) , stat %d\n",subframe,phase,l,re,
|
||||||
rxcomp[aa][off],rxcomp[aa][1+off],
|
rxcomp[aa][off],rxcomp[aa][1+off],
|
||||||
cfo[l<<1],cfo[1+(l<<1)],
|
cfo[l<<1],cfo[1+(l<<1)],
|
||||||
stat_re,stat_im);
|
stat_re,stat_im,stat);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
for (l2=0,l=(nsymb>>1); l<(nsymb-1); l++,l2++) {
|
for (l2=0,l=(nsymb>>1); l<(nsymb-1); l++,l2++) {
|
||||||
stat_re += ((rxcomp[aa][off]*(int32_t)cfo[l2<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l2<<1)])>>15);
|
stat_re += (((rxcomp[aa][off]*(int32_t)cfo[l2<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l2<<1)])>>15))/nsymb;
|
||||||
stat_im += ((rxcomp[aa][off]*(int32_t)cfo[1+(l2<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l2<<1)])>>15);
|
stat_im += (((rxcomp[aa][off]*(int32_t)cfo[1+(l2<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l2<<1)])>>15))/nsymb;
|
||||||
off+=2;
|
off+=2;
|
||||||
|
|
||||||
#ifdef DEBUG_PUCCH_RX
|
#ifdef DEBUG_PUCCH_RX
|
||||||
LOG_D(PHY,"[eNB] PUCCH subframe %d (%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l2,re,
|
LOG_D(PHY,"[eNB] PUCCH subframe %d (%d,%d,%d) => (%d,%d) x (%d,%d) : (%d,%d), stat %d\n",subframe,phase,l2,re,
|
||||||
rxcomp[aa][off],rxcomp[aa][1+off],
|
rxcomp[aa][off],rxcomp[aa][1+off],
|
||||||
cfo[l2<<1],cfo[1+(l2<<1)],
|
cfo[l2<<1],cfo[1+(l2<<1)],
|
||||||
stat_re,stat_im);
|
stat_re,stat_im,stat);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
stat += (stat_re*stat_re) + (stat_im*stat_im);
|
stat += ((stat_re*stat_re) + (stat_im*stat_im));
|
||||||
|
|
||||||
} //re
|
} //re
|
||||||
} // aa
|
} // aa
|
||||||
|
|
||||||
@@ -772,16 +779,18 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
|
|
||||||
} //phase
|
} //phase
|
||||||
|
|
||||||
stat_max /= (nsymb*12); // normalize to energy per symbol and RE
|
stat_max *= nsymb; // normalize to energy per symbol
|
||||||
|
stat_max /= (frame_parms->N_RB_UL*12); //
|
||||||
#ifdef DEBUG_PUCCH_RX
|
#ifdef DEBUG_PUCCH_RX
|
||||||
LOG_D(PHY,"[eNB] PUCCH: stat %d, stat_max %d, phase_max %d\n", stat,stat_max,phase_max);
|
LOG_D(PHY,"[eNB] PUCCH: stat %d, stat_max %d, phase_max %d\n", stat,stat_max,phase_max);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef DEBUG_PUCCH_RX
|
#ifdef DEBUG_PUCCH_RX
|
||||||
LOG_D(PHY,"[eNB] PUCCH fmt0: stat_max : %d, sigma2_dB %d (%d, %d), phase_max : %d\n",dB_fixed(stat_max),sigma2_dB,phy_vars_eNB->PHY_measurements_eNB[0].n0_power_tot_dBm,pucch1_thres,phase_max);
|
LOG_I(PHY,"[eNB] PUCCH fmt1: stat_max : %d, sigma2_dB %d (%d, %d), phase_max : %d\n",dB_fixed(stat_max),sigma2_dB,phy_vars_eNB->PHY_measurements_eNB[0].n0_subband_power_tot_dBm[6],pucch1_thres,phase_max);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
phy_vars_eNB->pucch1_stats[UE_id][(subframe<<10)+phy_vars_eNB->pucch1_stats_cnt[UE_id][subframe]] = stat_max;
|
phy_vars_eNB->pucch1_stats[UE_id][(subframe<<10)+phy_vars_eNB->pucch1_stats_cnt[UE_id][subframe]] = stat_max;
|
||||||
|
phy_vars_eNB->pucch1_stats_thres[UE_id][(subframe<<10)+phy_vars_eNB->pucch1_stats_cnt[UE_id][subframe]] = sigma2_dB+pucch1_thres;
|
||||||
phy_vars_eNB->pucch1_stats_cnt[UE_id][subframe] = (phy_vars_eNB->pucch1_stats_cnt[UE_id][subframe]+1)&1023;
|
phy_vars_eNB->pucch1_stats_cnt[UE_id][subframe] = (phy_vars_eNB->pucch1_stats_cnt[UE_id][subframe]+1)&1023;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -798,13 +807,13 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
if (sigma2_dB<(dB_fixed(stat_max)-pucch1_thres)) {
|
if (sigma2_dB<(dB_fixed(stat_max)-pucch1_thres)) {
|
||||||
*payload = 1;
|
*payload = 1;
|
||||||
*Po_PUCCH1_above = ((*Po_PUCCH1_above<<9) + (stat_max<<9)+1024)>>10;
|
*Po_PUCCH1_above = ((*Po_PUCCH1_above<<9) + (stat_max<<9)+1024)>>10;
|
||||||
|
//LOG_I(PHY,"[eNB] PUCCH fmt1: stat_max : %d, sigma2_dB %d (%d, %d), phase_max : %d\n",dB_fixed(stat_max),sigma2_dB,phy_vars_eNB->PHY_measurements_eNB[0].n0_power_tot_dBm,pucch1_thres,phase_max);
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
*payload = 0;
|
*payload = 0;
|
||||||
*Po_PUCCH1_below = ((*Po_PUCCH1_below<<9) + (stat_max<<9)+1024)>>10;
|
*Po_PUCCH1_below = ((*Po_PUCCH1_below<<9) + (stat_max<<9)+1024)>>10;
|
||||||
}
|
}
|
||||||
LOG_D(PHY,"[eNB] PUCCH fmt0: stat_max : %d, sigma2_dB %d (I0 %d dBm, thres %d), Po_PUCCH1_below/above : %d / %d\n",dB_fixed(stat_max),sigma2_dB,phy_vars_eNB->PHY_measurements_eNB[0].n0_power_tot_dBm,pucch1_thres,dB_fixed(*Po_PUCCH1_below),dB_fixed(*Po_PUCCH1_above));
|
LOG_D(PHY,"[eNB] PUCCH fmt1: stat_max : %d, sigma2_dB %d (I0 %d dBm, thres %d), Po_PUCCH1_below/above : %d / %d\n",dB_fixed(stat_max),sigma2_dB,phy_vars_eNB->PHY_measurements_eNB[0].n0_subband_power_tot_dBm[6],pucch1_thres,dB_fixed(*Po_PUCCH1_below),dB_fixed(*Po_PUCCH1_above));
|
||||||
*Po_PUCCH_update = 1;
|
*Po_PUCCH_update = 1;
|
||||||
|
|
||||||
} else if ((fmt == pucch_format1a)||(fmt == pucch_format1b)) {
|
} else if ((fmt == pucch_format1a)||(fmt == pucch_format1b)) {
|
||||||
@@ -813,7 +822,7 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
LOG_I(PHY,"Doing PUCCH detection for format 1a/1b\n");
|
LOG_I(PHY,"Doing PUCCH detection for format 1a/1b\n");
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
for (phase=0; phase<7; phase++) {
|
for (phase=3;phase<4;phase++){ //phase=0; phase<7; phase++) {
|
||||||
stat=0;
|
stat=0;
|
||||||
|
|
||||||
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
|
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
|
||||||
@@ -844,6 +853,9 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
for (l2=0,l=(nsymb>>1); l<(nsymb-1); l++,l2++) {
|
for (l2=0,l=(nsymb>>1); l<(nsymb-1); l++,l2++) {
|
||||||
if ((l2<2) || ((l2>(nsymb>>1) - 3)) ) { // data symbols
|
if ((l2<2) || ((l2>(nsymb>>1) - 3)) ) { // data symbols
|
||||||
stat_re += ((rxcomp[aa][off]*(int32_t)cfo[l2<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l2<<1)])>>15);
|
stat_re += ((rxcomp[aa][off]*(int32_t)cfo[l2<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l2<<1)])>>15);
|
||||||
@@ -863,34 +875,36 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
stat += (((stat_re*stat_re)) + ((stat_im*stat_im)) +
|
|
||||||
((stat_ref_re*stat_ref_re)) + ((stat_ref_im*stat_ref_im)));
|
|
||||||
#ifdef DEBUG_PUCCH_RX
|
#ifdef DEBUG_PUCCH_RX
|
||||||
LOG_D(PHY,"aa%d re %d : phase %d : stat %d\n",aa,re,phase,stat);
|
LOG_D(PHY,"aa%d re %d : phase %d : stat %d\n",aa,re,phase,stat);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
stat += ((((stat_re*stat_re)) + ((stat_im*stat_im)) +
|
||||||
|
((stat_ref_re*stat_ref_re)) + ((stat_ref_im*stat_ref_im)))/nsymb);
|
||||||
|
|
||||||
|
|
||||||
} //re
|
} //re
|
||||||
} // aa
|
} // aa
|
||||||
|
|
||||||
#ifdef DEBUG_PUCCH_RX
|
#ifdef DEBUG_PUCCH_RX
|
||||||
LOG_I(PHY,"phase %d : stat %d\n",phase,stat);
|
LOG_I(PHY,"Format 1A: phase %d : stat %d\n",phase,stat);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
if (stat>stat_max) {
|
if (stat>stat_max) {
|
||||||
stat_max = stat;
|
stat_max = stat;
|
||||||
phase_max = phase;
|
phase_max = phase;
|
||||||
}
|
}
|
||||||
} //phase
|
} //phase
|
||||||
|
|
||||||
stat_max/=(nsymb*12); //normalize to energy per symbol and RE
|
stat_max/=(12); //normalize to energy per symbol and RE
|
||||||
#ifdef DEBUG_PUCCH_RX
|
//#ifdef DEBUG_PUCCH_RX
|
||||||
LOG_I(PHY,"[eNB] PUCCH fmt1: stat_max : %d, phase_max : %d\n",stat_max,phase_max);
|
LOG_D(PHY,"[eNB] PUCCH fmt1a/b: stat_max : %d, phase_max : %d\n",stat_max,phase_max);
|
||||||
#endif
|
//#endif
|
||||||
|
|
||||||
stat_re=0;
|
stat_re=0;
|
||||||
stat_im=0;
|
stat_im=0;
|
||||||
LOG_D(PHY,"PUCCH1A : Po_PUCCH before %d dB (%d)\n",dB_fixed(*Po_PUCCH),*Po_PUCCH);
|
LOG_D(PHY,"PUCCH1A : Po_PUCCH before %d dB (%d)\n",dB_fixed(*Po_PUCCH),*Po_PUCCH);
|
||||||
*Po_PUCCH = ((*Po_PUCCH<<9) + (stat_max<<9)+1024)>>10;
|
*Po_PUCCH = ((*Po_PUCCH>>1) + ((stat_max)>>1));
|
||||||
*Po_PUCCH_dBm = dB_fixed(*Po_PUCCH) - phy_vars_eNB->rx_total_gain_eNB_dB;
|
*Po_PUCCH_dBm = dB_fixed(*Po_PUCCH/frame_parms->N_RB_UL) - phy_vars_eNB->rx_total_gain_eNB_dB;
|
||||||
*Po_PUCCH_update = 1;
|
*Po_PUCCH_update = 1;
|
||||||
|
|
||||||
LOG_D(PHY,"PUCCH1A : stat_max %d (%d,%d,%d) => Po_PUCCH %d\n",
|
LOG_D(PHY,"PUCCH1A : stat_max %d (%d,%d,%d) => Po_PUCCH %d\n",
|
||||||
@@ -906,6 +920,8 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
|
|
||||||
*Po_PUCCH = ((*Po_PUCCH*1023) + stat_max)>>10;
|
*Po_PUCCH = ((*Po_PUCCH*1023) + stat_max)>>10;
|
||||||
|
|
||||||
|
chL = (nsymb>>1)-4;
|
||||||
|
|
||||||
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
|
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
|
||||||
for (re=0; re<12; re++) {
|
for (re=0; re<12; re++) {
|
||||||
chest_re=0;
|
chest_re=0;
|
||||||
@@ -915,8 +931,8 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
// channel estimate for first slot
|
// channel estimate for first slot
|
||||||
for (l=2; l<(nsymb>>1)-2; l++) {
|
for (l=2; l<(nsymb>>1)-2; l++) {
|
||||||
off=(re<<1) + (24*l);
|
off=(re<<1) + (24*l);
|
||||||
chest_re += ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15);
|
chest_re += (((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15))/chL;
|
||||||
chest_im += ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15);
|
chest_im += (((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15))/chL;
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef DEBUG_PUCCH_RX
|
#ifdef DEBUG_PUCCH_RX
|
||||||
@@ -928,8 +944,8 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
off=(re<<1) + (24*l);
|
off=(re<<1) + (24*l);
|
||||||
tmp_re = ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15);
|
tmp_re = ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15);
|
||||||
tmp_im = ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15);
|
tmp_im = ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15);
|
||||||
stat_re += ((tmp_re*chest_re)>>15) + ((tmp_im*chest_im)>>15);
|
stat_re += (((tmp_re*chest_re)>>15) + ((tmp_im*chest_im)>>15))/4;
|
||||||
stat_im += ((tmp_re*chest_im)>>15) - ((tmp_im*chest_re)>>15);
|
stat_im += (((tmp_re*chest_im)>>15) - ((tmp_im*chest_re)>>15))/4;
|
||||||
off+=2;
|
off+=2;
|
||||||
#ifdef DEBUG_PUCCH_RX
|
#ifdef DEBUG_PUCCH_RX
|
||||||
LOG_D(PHY,"[eNB] PUCCH subframe %d (%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,re,
|
LOG_D(PHY,"[eNB] PUCCH subframe %d (%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,re,
|
||||||
@@ -943,8 +959,8 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
off=(re<<1) + (24*l);
|
off=(re<<1) + (24*l);
|
||||||
tmp_re = ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15);
|
tmp_re = ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15);
|
||||||
tmp_im = ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15);
|
tmp_im = ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15);
|
||||||
stat_re += ((tmp_re*chest_re)>>15) + ((tmp_im*chest_im)>>15);
|
stat_re += (((tmp_re*chest_re)>>15) + ((tmp_im*chest_im)>>15)/4);
|
||||||
stat_im += ((tmp_re*chest_im)>>15) - ((tmp_im*chest_re)>>15);
|
stat_im += (((tmp_re*chest_im)>>15) - ((tmp_im*chest_re)>>15)/4);
|
||||||
off+=2;
|
off+=2;
|
||||||
#ifdef DEBUG_PUCCH_RX
|
#ifdef DEBUG_PUCCH_RX
|
||||||
LOG_D(PHY,"[eNB] PUCCH subframe %d (%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,re,
|
LOG_D(PHY,"[eNB] PUCCH subframe %d (%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,re,
|
||||||
@@ -960,8 +976,8 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
// channel estimate for second slot
|
// channel estimate for second slot
|
||||||
for (l=2; l<(nsymb>>1)-2; l++) {
|
for (l=2; l<(nsymb>>1)-2; l++) {
|
||||||
off=(re<<1) + (24*l) + (nsymb>>1)*24;
|
off=(re<<1) + (24*l) + (nsymb>>1)*24;
|
||||||
chest_re += ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15);
|
chest_re += (((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15))/chL;
|
||||||
chest_im += ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15);
|
chest_im += (((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15))/chL;
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef DEBUG_PUCCH_RX
|
#ifdef DEBUG_PUCCH_RX
|
||||||
@@ -973,8 +989,8 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
off=(re<<1) + (24*l) + (nsymb>>1)*24;
|
off=(re<<1) + (24*l) + (nsymb>>1)*24;
|
||||||
tmp_re = ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15);
|
tmp_re = ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15);
|
||||||
tmp_im = ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15);
|
tmp_im = ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15);
|
||||||
stat_re += ((tmp_re*chest_re)>>15) + ((tmp_im*chest_im)>>15);
|
stat_re += (((tmp_re*chest_re)>>15) + ((tmp_im*chest_im)>>15))/4;
|
||||||
stat_im += ((tmp_re*chest_im)>>15) - ((tmp_im*chest_re)>>15);
|
stat_im += (((tmp_re*chest_im)>>15) - ((tmp_im*chest_re)>>15))/4;
|
||||||
off+=2;
|
off+=2;
|
||||||
#ifdef DEBUG_PUCCH_RX
|
#ifdef DEBUG_PUCCH_RX
|
||||||
LOG_D(PHY,"[PHY][eNB] PUCCH subframe %d (%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,re,
|
LOG_D(PHY,"[PHY][eNB] PUCCH subframe %d (%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,re,
|
||||||
@@ -988,8 +1004,8 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
off=(re<<1) + (24*l) + (nsymb>>1)*24;
|
off=(re<<1) + (24*l) + (nsymb>>1)*24;
|
||||||
tmp_re = ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15);
|
tmp_re = ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15);
|
||||||
tmp_im = ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15);
|
tmp_im = ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15);
|
||||||
stat_re += ((tmp_re*chest_re)>>9) + ((tmp_im*chest_im)>>9);
|
stat_re += (((tmp_re*chest_re)>>15) + ((tmp_im*chest_im)>>15))/4;
|
||||||
stat_im += ((tmp_re*chest_im)>>9) - ((tmp_im*chest_re)>>9);
|
stat_im += (((tmp_re*chest_im)>>15) - ((tmp_im*chest_re)>>15))/4;
|
||||||
off+=2;
|
off+=2;
|
||||||
#ifdef DEBUG_PUCCH_RX
|
#ifdef DEBUG_PUCCH_RX
|
||||||
LOG_D(PHY,"[PHY][eNB] PUCCH subframe %d (%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,re,
|
LOG_D(PHY,"[PHY][eNB] PUCCH subframe %d (%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,re,
|
||||||
@@ -1007,13 +1023,15 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
} // aa
|
} // aa
|
||||||
|
|
||||||
#ifdef DEBUG_PUCCH_RX
|
#ifdef DEBUG_PUCCH_RX
|
||||||
LOG_D(PHY,"PUCCH 1a/b: subframe %d : stat %d,%d (pos %d)\n",subframe,stat_re,stat_im,
|
LOG_I(PHY,"PUCCH 1a/b: subframe %d : stat %d,%d (pos %d)\n",subframe,stat_re,stat_im,
|
||||||
(subframe<<10) + (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe]));
|
(subframe<<10) + (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe]));
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
((int16_t*)&phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<10) + (phy_vars_eNB->pucch1_stats_cnt[UE_id][subframe])])[0] = stat_re;
|
phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<11) + 2*(phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe])] = (stat_re);
|
||||||
((int16_t*)&phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<10) + (phy_vars_eNB->pucch1_stats_cnt[UE_id][subframe])])[1] = stat_im;
|
phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<11) + 1+2*(phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe])] = (stat_im);
|
||||||
phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe] = (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe]+1)&1023;
|
phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe] = (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe]+1)&1023;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
*payload = (stat_re<0) ? 1 : 0;
|
*payload = (stat_re<0) ? 1 : 0;
|
||||||
|
|
||||||
@@ -1021,6 +1039,11 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
*(1+payload) = (stat_im<0) ? 1 : 0;
|
*(1+payload) = (stat_im<0) ? 1 : 0;
|
||||||
} else { // insufficient energy on PUCCH so NAK
|
} else { // insufficient energy on PUCCH so NAK
|
||||||
*payload = 0;
|
*payload = 0;
|
||||||
|
((int16_t*)&phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<10) + (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe])])[0] = (int16_t)(stat_re);
|
||||||
|
((int16_t*)&phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<10) + (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe])])[1] = (int16_t)(stat_im);
|
||||||
|
phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe] = (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe]+1)&1023;
|
||||||
|
|
||||||
|
*payload = (stat_re<0) ? 1 : 0;
|
||||||
|
|
||||||
if (fmt==pucch_format1b)
|
if (fmt==pucch_format1b)
|
||||||
*(1+payload) = 0;
|
*(1+payload) = 0;
|
||||||
@@ -1054,7 +1077,7 @@ int32_t rx_pucch_emul(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (UE_id==NB_UE_INST) {
|
if (UE_id==NB_UE_INST) {
|
||||||
LOG_E(PHY,"rx_pucch_emul: FATAL, didn't find UE with rnti %x\n",rnti);
|
LOG_W(PHY,"rx_pucch_emul: Didn't find UE with rnti %x\n",rnti);
|
||||||
return(-1);
|
return(-1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1657,8 +1657,15 @@ void rx_ulsch(PHY_VARS_eNB *phy_vars_eNB,
|
|||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
for (i=0; i<frame_parms->nb_antennas_rx; i++) {
|
for (i=0; i<frame_parms->nb_antennas_rx; i++) {
|
||||||
|
/*
|
||||||
eNB_pusch_vars->ulsch_power[i] = signal_energy_nodc(eNB_pusch_vars->drs_ch_estimates[eNB_id][i],
|
eNB_pusch_vars->ulsch_power[i] = signal_energy_nodc(eNB_pusch_vars->drs_ch_estimates[eNB_id][i],
|
||||||
ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12)*rx_power_correction;
|
ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12)*rx_power_correction;
|
||||||
|
|
||||||
|
*/
|
||||||
|
|
||||||
|
eNB_pusch_vars->ulsch_power[i] = signal_energy_nodc(eNB_pusch_vars->drs_ch_estimates[eNB_id][i],
|
||||||
|
ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12);
|
||||||
|
|
||||||
#ifdef LOCALIZATION
|
#ifdef LOCALIZATION
|
||||||
eNB_pusch_vars->subcarrier_power = (int32_t *)malloc(ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12*sizeof(int32_t));
|
eNB_pusch_vars->subcarrier_power = (int32_t *)malloc(ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12*sizeof(int32_t));
|
||||||
eNB_pusch_vars->active_subcarrier = subcarrier_energy(eNB_pusch_vars->drs_ch_estimates[eNB_id][i],
|
eNB_pusch_vars->active_subcarrier = subcarrier_energy(eNB_pusch_vars->drs_ch_estimates[eNB_id][i],
|
||||||
|
|||||||
@@ -119,7 +119,7 @@ FD_lte_phy_scope_enb *create_lte_phy_scope_enb( void )
|
|||||||
fl_set_xyplot_xgrid( fdui->pusch_llr,FL_GRID_MAJOR);
|
fl_set_xyplot_xgrid( fdui->pusch_llr,FL_GRID_MAJOR);
|
||||||
|
|
||||||
// I/Q PUCCH comp (format 1)
|
// I/Q PUCCH comp (format 1)
|
||||||
fdui->pucch_comp1 = fl_add_xyplot( FL_POINTS_XYPLOT, 540, 480, 240, 100, "PUCCH I/Q of MF Output" );
|
fdui->pucch_comp1 = fl_add_xyplot( FL_POINTS_XYPLOT, 540, 480, 240, 100, "PUCCH1 Energy (SR)" );
|
||||||
fl_set_object_boxtype( fdui->pucch_comp1, FL_EMBOSSED_BOX );
|
fl_set_object_boxtype( fdui->pucch_comp1, FL_EMBOSSED_BOX );
|
||||||
fl_set_object_color( fdui->pucch_comp1, FL_BLACK, FL_YELLOW );
|
fl_set_object_color( fdui->pucch_comp1, FL_BLACK, FL_YELLOW );
|
||||||
fl_set_object_lcolor( fdui->pucch_comp1, FL_WHITE ); // Label color
|
fl_set_object_lcolor( fdui->pucch_comp1, FL_WHITE ); // Label color
|
||||||
@@ -160,7 +160,7 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
|
|||||||
int UE_id)
|
int UE_id)
|
||||||
{
|
{
|
||||||
int eNB_id = 0;
|
int eNB_id = 0;
|
||||||
int i,arx,atx,ind,k;
|
int i,i2,arx,atx,ind,k;
|
||||||
LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_enb->lte_frame_parms;
|
LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_enb->lte_frame_parms;
|
||||||
int nsymb_ce = 12*frame_parms->N_RB_UL*frame_parms->symbols_per_tti;
|
int nsymb_ce = 12*frame_parms->N_RB_UL*frame_parms->symbols_per_tti;
|
||||||
uint8_t nb_antennas_rx = frame_parms->nb_antennas_rx;
|
uint8_t nb_antennas_rx = frame_parms->nb_antennas_rx;
|
||||||
@@ -171,15 +171,17 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
|
|||||||
int16_t *pusch_llr;
|
int16_t *pusch_llr;
|
||||||
int16_t *pusch_comp;
|
int16_t *pusch_comp;
|
||||||
int32_t *pucch1_comp;
|
int32_t *pucch1_comp;
|
||||||
int16_t *pucch1ab_comp;
|
int32_t *pucch1_thres;
|
||||||
|
int32_t *pucch1ab_comp;
|
||||||
float Re,Im,ymax;
|
float Re,Im,ymax;
|
||||||
float *llr, *bit;
|
float *llr, *bit;
|
||||||
float I[nsymb_ce*2], Q[nsymb_ce*2];
|
float I[nsymb_ce*2], Q[nsymb_ce*2];
|
||||||
float I_pucch[10240],Q_pucch[10240],A_pucch[10240],B_pucch[10240];
|
float I_pucch[10240],Q_pucch[10240],A_pucch[10240],B_pucch[10240],C_pucch[10240];
|
||||||
float rxsig_t_dB[nb_antennas_rx][FRAME_LENGTH_COMPLEX_SAMPLES];
|
float rxsig_t_dB[nb_antennas_rx][FRAME_LENGTH_COMPLEX_SAMPLES];
|
||||||
float chest_t_abs[nb_antennas_rx][frame_parms->ofdm_symbol_size];
|
float chest_t_abs[nb_antennas_rx][frame_parms->ofdm_symbol_size];
|
||||||
float *chest_f_abs;
|
float *chest_f_abs;
|
||||||
float time[FRAME_LENGTH_COMPLEX_SAMPLES];
|
float time[FRAME_LENGTH_COMPLEX_SAMPLES];
|
||||||
|
float time2[2048];
|
||||||
float freq[nsymb_ce*nb_antennas_rx*nb_antennas_tx];
|
float freq[nsymb_ce*nb_antennas_rx*nb_antennas_tx];
|
||||||
int frame = phy_vars_enb->proc[0].frame_tx;
|
int frame = phy_vars_enb->proc[0].frame_tx;
|
||||||
uint32_t total_dlsch_bitrate = phy_vars_enb->total_dlsch_bitrate;
|
uint32_t total_dlsch_bitrate = phy_vars_enb->total_dlsch_bitrate;
|
||||||
@@ -206,7 +208,8 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
|
|||||||
pusch_llr = (int16_t*) phy_vars_enb->lte_eNB_pusch_vars[UE_id]->llr;
|
pusch_llr = (int16_t*) phy_vars_enb->lte_eNB_pusch_vars[UE_id]->llr;
|
||||||
pusch_comp = (int16_t*) phy_vars_enb->lte_eNB_pusch_vars[UE_id]->rxdataF_comp[eNB_id][0];
|
pusch_comp = (int16_t*) phy_vars_enb->lte_eNB_pusch_vars[UE_id]->rxdataF_comp[eNB_id][0];
|
||||||
pucch1_comp = (int32_t*) phy_vars_enb->pucch1_stats[UE_id];
|
pucch1_comp = (int32_t*) phy_vars_enb->pucch1_stats[UE_id];
|
||||||
pucch1ab_comp = (int16_t*) phy_vars_enb->pucch1ab_stats[UE_id];
|
pucch1_thres = (int32_t*) phy_vars_enb->pucch1_stats_thres[UE_id];
|
||||||
|
pucch1ab_comp = (int32_t*) phy_vars_enb->pucch1ab_stats[UE_id];
|
||||||
|
|
||||||
// Received signal in time domain of receive antenna 0
|
// Received signal in time domain of receive antenna 0
|
||||||
if (rxsig_t != NULL) {
|
if (rxsig_t != NULL) {
|
||||||
@@ -236,19 +239,21 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
|
|||||||
|
|
||||||
if (chest_t[0] !=NULL) {
|
if (chest_t[0] !=NULL) {
|
||||||
for (i=0; i<(frame_parms->ofdm_symbol_size); i++) {
|
for (i=0; i<(frame_parms->ofdm_symbol_size); i++) {
|
||||||
chest_t_abs[0][i] = 10*log10((float) (chest_t[0][2*i]*chest_t[0][2*i]+chest_t[0][2*i+1]*chest_t[0][2*i+1]));
|
i2 = (i+(frame_parms->ofdm_symbol_size>>1))%frame_parms->ofdm_symbol_size;
|
||||||
|
time2[i] = (float)(i-(frame_parms->ofdm_symbol_size>>1));
|
||||||
|
chest_t_abs[0][i] = 10*log10((float) (1+chest_t[0][2*i2]*chest_t[0][2*i2]+chest_t[0][2*i2+1]*chest_t[0][2*i2+1]));
|
||||||
|
|
||||||
if (chest_t_abs[0][i] > ymax)
|
if (chest_t_abs[0][i] > ymax)
|
||||||
ymax = chest_t_abs[0][i];
|
ymax = chest_t_abs[0][i];
|
||||||
}
|
}
|
||||||
|
|
||||||
fl_set_xyplot_data(form->chest_t,time,chest_t_abs[0],(frame_parms->ofdm_symbol_size),"","","");
|
fl_set_xyplot_data(form->chest_t,time2,chest_t_abs[0],(frame_parms->ofdm_symbol_size),"","","");
|
||||||
}
|
}
|
||||||
|
|
||||||
for (arx=1; arx<nb_antennas_rx; arx++) {
|
for (arx=1; arx<nb_antennas_rx; arx++) {
|
||||||
if (chest_t[arx] !=NULL) {
|
if (chest_t[arx] !=NULL) {
|
||||||
for (i=0; i<(frame_parms->ofdm_symbol_size>>3); i++) {
|
for (i=0; i<(frame_parms->ofdm_symbol_size>>3); i++) {
|
||||||
chest_t_abs[arx][i] = 10*log10((float) (chest_t[arx][2*i]*chest_t[arx][2*i]+chest_t[arx][2*i+1]*chest_t[arx][2*i+1]));
|
chest_t_abs[arx][i] = 10*log10((float) (1+chest_t[arx][2*i]*chest_t[arx][2*i]+chest_t[arx][2*i+1]*chest_t[arx][2*i+1]));
|
||||||
|
|
||||||
if (chest_t_abs[arx][i] > ymax)
|
if (chest_t_abs[arx][i] > ymax)
|
||||||
ymax = chest_t_abs[arx][i];
|
ymax = chest_t_abs[arx][i];
|
||||||
@@ -337,16 +342,20 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
|
|||||||
// PUSCH I/Q of MF Output
|
// PUSCH I/Q of MF Output
|
||||||
if (pucch1ab_comp!=NULL) {
|
if (pucch1ab_comp!=NULL) {
|
||||||
for (ind=0; ind<10240; ind++) {
|
for (ind=0; ind<10240; ind++) {
|
||||||
I_pucch[ind] = pucch1ab_comp[2*ind];
|
|
||||||
Q_pucch[ind] = pucch1ab_comp[2*ind+1];
|
I_pucch[ind] = (float)pucch1ab_comp[2*(ind)];
|
||||||
|
Q_pucch[ind] = (float)pucch1ab_comp[2*(ind)+1];
|
||||||
A_pucch[ind] = 10*log10(pucch1_comp[ind]);
|
A_pucch[ind] = 10*log10(pucch1_comp[ind]);
|
||||||
B_pucch[ind] = ind;
|
B_pucch[ind] = ind;
|
||||||
|
C_pucch[ind] = (float)pucch1_thres[ind];
|
||||||
}
|
}
|
||||||
fl_set_xyplot_data(form->pucch_comp,I_pucch,Q_pucch,10240,"","","");
|
fl_set_xyplot_data(form->pucch_comp,I_pucch,Q_pucch,10240,"","","");
|
||||||
fl_set_xyplot_data(form->pucch_comp1,B_pucch,A_pucch,1024,"","","");
|
fl_set_xyplot_data(form->pucch_comp1,B_pucch,A_pucch,1024,"","","");
|
||||||
fl_set_xyplot_xbounds(form->pucch_comp,-200,200);
|
fl_add_xyplot_overlay(form->pucch_comp1,1,B_pucch,C_pucch,1024,FL_RED);
|
||||||
fl_set_xyplot_ybounds(form->pucch_comp,-100,100);
|
fl_set_xyplot_ybounds(form->pucch_comp,-5000,5000);
|
||||||
fl_set_xyplot_ybounds(form->pucch_comp1,10,40);
|
fl_set_xyplot_xbounds(form->pucch_comp,-5000,5000);
|
||||||
|
|
||||||
|
fl_set_xyplot_ybounds(form->pucch_comp1,20,80);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
+4
-1
@@ -313,6 +313,8 @@ typedef struct PHY_VARS_eNB_s {
|
|||||||
struct PhysicalConfigDedicated *physicalConfigDedicated[NUMBER_OF_UE_MAX];
|
struct PhysicalConfigDedicated *physicalConfigDedicated[NUMBER_OF_UE_MAX];
|
||||||
|
|
||||||
|
|
||||||
|
uint32_t rb_mask_ul[4];
|
||||||
|
|
||||||
/// Information regarding TM5
|
/// Information regarding TM5
|
||||||
MU_MIMO_mode mu_mimo_mode[NUMBER_OF_UE_MAX];
|
MU_MIMO_mode mu_mimo_mode[NUMBER_OF_UE_MAX];
|
||||||
|
|
||||||
@@ -378,8 +380,9 @@ typedef struct PHY_VARS_eNB_s {
|
|||||||
|
|
||||||
int32_t pucch1_stats_cnt[NUMBER_OF_UE_MAX][10];
|
int32_t pucch1_stats_cnt[NUMBER_OF_UE_MAX][10];
|
||||||
int32_t pucch1_stats[NUMBER_OF_UE_MAX][10*1024];
|
int32_t pucch1_stats[NUMBER_OF_UE_MAX][10*1024];
|
||||||
|
int32_t pucch1_stats_thres[NUMBER_OF_UE_MAX][10*1024];
|
||||||
int32_t pucch1ab_stats_cnt[NUMBER_OF_UE_MAX][10];
|
int32_t pucch1ab_stats_cnt[NUMBER_OF_UE_MAX][10];
|
||||||
int32_t pucch1ab_stats[NUMBER_OF_UE_MAX][10*1024];
|
int32_t pucch1ab_stats[NUMBER_OF_UE_MAX][2*10*1024];
|
||||||
|
|
||||||
#if ENABLE_RAL
|
#if ENABLE_RAL
|
||||||
hash_table_t *ral_thresholds_timed;
|
hash_table_t *ral_thresholds_timed;
|
||||||
|
|||||||
@@ -346,13 +346,12 @@ typedef struct {
|
|||||||
#define NUMBER_OF_SUBBANDS_MAX 13
|
#define NUMBER_OF_SUBBANDS_MAX 13
|
||||||
#define NUMBER_OF_HARQ_PID_MAX 8
|
#define NUMBER_OF_HARQ_PID_MAX 8
|
||||||
|
|
||||||
#if defined(CBMIMO1) || defined(EXMIMO) || defined(OAI_USRP)
|
|
||||||
#define MAX_FRAME_NUMBER 0x400
|
#define MAX_FRAME_NUMBER 0x400
|
||||||
|
#if defined(CBMIMO1) || defined(EXMIMO) || defined(OAI_USRP)
|
||||||
#define NUMBER_OF_eNB_MAX 1
|
#define NUMBER_OF_eNB_MAX 1
|
||||||
#define NUMBER_OF_UE_MAX 4
|
#define NUMBER_OF_UE_MAX 4
|
||||||
#define NUMBER_OF_CONNECTED_eNB_MAX 3
|
#define NUMBER_OF_CONNECTED_eNB_MAX 3
|
||||||
#else
|
#else
|
||||||
#define MAX_FRAME_NUMBER 0xFFFF
|
|
||||||
#ifdef LARGE_SCALE
|
#ifdef LARGE_SCALE
|
||||||
#define NUMBER_OF_eNB_MAX 2
|
#define NUMBER_OF_eNB_MAX 2
|
||||||
#define NUMBER_OF_UE_MAX 120
|
#define NUMBER_OF_UE_MAX 120
|
||||||
@@ -477,13 +476,13 @@ typedef struct {
|
|||||||
//! estimated avg noise power (dB)
|
//! estimated avg noise power (dB)
|
||||||
short n0_power_tot_dBm;
|
short n0_power_tot_dBm;
|
||||||
//! estimated avg noise power per RB per RX ant (lin)
|
//! estimated avg noise power per RB per RX ant (lin)
|
||||||
unsigned short n0_subband_power[NB_ANTENNAS_RX][25];
|
unsigned short n0_subband_power[NB_ANTENNAS_RX][100];
|
||||||
//! estimated avg noise power per RB per RX ant (dB)
|
//! estimated avg noise power per RB per RX ant (dB)
|
||||||
unsigned short n0_subband_power_dB[NB_ANTENNAS_RX][25];
|
unsigned short n0_subband_power_dB[NB_ANTENNAS_RX][100];
|
||||||
//! estimated avg noise power per RB (dB)
|
//! estimated avg noise power per RB (dB)
|
||||||
short n0_subband_power_tot_dB[25];
|
short n0_subband_power_tot_dB[100];
|
||||||
//! estimated avg noise power per RB (dBm)
|
//! estimated avg noise power per RB (dBm)
|
||||||
short n0_subband_power_tot_dBm[25];
|
short n0_subband_power_tot_dBm[100];
|
||||||
// eNB measurements (per user)
|
// eNB measurements (per user)
|
||||||
//! estimated received spatial signal power (linear)
|
//! estimated received spatial signal power (linear)
|
||||||
unsigned int rx_spatial_power[NUMBER_OF_UE_MAX][2][2];
|
unsigned int rx_spatial_power[NUMBER_OF_UE_MAX][2][2];
|
||||||
@@ -503,13 +502,13 @@ typedef struct {
|
|||||||
/// Wideband CQI (sum of all RX antennas, in dB)
|
/// Wideband CQI (sum of all RX antennas, in dB)
|
||||||
char wideband_cqi_tot[NUMBER_OF_UE_MAX];
|
char wideband_cqi_tot[NUMBER_OF_UE_MAX];
|
||||||
/// Subband CQI per RX antenna and RB (= SINR)
|
/// Subband CQI per RX antenna and RB (= SINR)
|
||||||
int subband_cqi[NUMBER_OF_UE_MAX][NB_ANTENNAS_RX][25];
|
int subband_cqi[NUMBER_OF_UE_MAX][NB_ANTENNAS_RX][100];
|
||||||
/// Total Subband CQI and RB (= SINR)
|
/// Total Subband CQI and RB (= SINR)
|
||||||
int subband_cqi_tot[NUMBER_OF_UE_MAX][25];
|
int subband_cqi_tot[NUMBER_OF_UE_MAX][100];
|
||||||
/// Subband CQI in dB and RB (= SINR dB)
|
/// Subband CQI in dB and RB (= SINR dB)
|
||||||
int subband_cqi_dB[NUMBER_OF_UE_MAX][NB_ANTENNAS_RX][25];
|
int subband_cqi_dB[NUMBER_OF_UE_MAX][NB_ANTENNAS_RX][100];
|
||||||
/// Total Subband CQI and RB
|
/// Total Subband CQI and RB
|
||||||
int subband_cqi_tot_dB[NUMBER_OF_UE_MAX][25];
|
int subband_cqi_tot_dB[NUMBER_OF_UE_MAX][100];
|
||||||
|
|
||||||
} PHY_MEASUREMENTS_eNB;
|
} PHY_MEASUREMENTS_eNB;
|
||||||
|
|
||||||
|
|||||||
@@ -399,7 +399,6 @@ uint32_t pdcch_alloc2ul_frame(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame, ui
|
|||||||
|
|
||||||
uint16_t get_Np(uint8_t N_RB_DL,uint8_t nCCE,uint8_t plus1);
|
uint16_t get_Np(uint8_t N_RB_DL,uint8_t nCCE,uint8_t plus1);
|
||||||
|
|
||||||
int get_nCCE_offset(unsigned char L, int nCCE, int common_dci, unsigned short rnti, unsigned char subframe);
|
|
||||||
|
|
||||||
void put_harq_pid_in_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid);
|
void put_harq_pid_in_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid);
|
||||||
void remove_harq_pid_from_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid);
|
void remove_harq_pid_from_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid);
|
||||||
|
|||||||
@@ -405,8 +405,8 @@ uint8_t get_ack(LTE_DL_FRAME_PARMS *frame_parms,
|
|||||||
|
|
||||||
if (harq_ack[0].send_harq_status == 1)
|
if (harq_ack[0].send_harq_status == 1)
|
||||||
o_ACK[1] = harq_ack[0].ack;
|
o_ACK[1] = harq_ack[0].ack;
|
||||||
} else if (harq_ack[8].send_harq_status == 1)
|
} else if (harq_ack[0].send_harq_status == 1)
|
||||||
o_ACK[0] = harq_ack[8].ack;
|
o_ACK[0] = harq_ack[0].ack;
|
||||||
|
|
||||||
status = harq_ack[9].send_harq_status + (harq_ack[0].send_harq_status<<1);
|
status = harq_ack[9].send_harq_status + (harq_ack[0].send_harq_status<<1);
|
||||||
//printf("Subframe 4, TDD config 3: harq_ack[9] = %d,harq_ack[0] = %d\n",harq_ack[9].ack,harq_ack[0].ack);
|
//printf("Subframe 4, TDD config 3: harq_ack[9] = %d,harq_ack[0] = %d\n",harq_ack[9].ack,harq_ack[0].ack);
|
||||||
|
|||||||
@@ -104,7 +104,6 @@ extern uint8_t smbv_frame_cnt;
|
|||||||
#ifdef DIAG_PHY
|
#ifdef DIAG_PHY
|
||||||
extern int rx_sig_fifo;
|
extern int rx_sig_fifo;
|
||||||
#endif
|
#endif
|
||||||
static unsigned char I0_clear = 1;
|
|
||||||
|
|
||||||
uint8_t is_SR_subframe(PHY_VARS_eNB *phy_vars_eNB,uint8_t UE_id,uint8_t sched_subframe)
|
uint8_t is_SR_subframe(PHY_VARS_eNB *phy_vars_eNB,uint8_t UE_id,uint8_t sched_subframe)
|
||||||
{
|
{
|
||||||
@@ -322,100 +321,6 @@ int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16
|
|||||||
return(0);
|
return(0);
|
||||||
}
|
}
|
||||||
|
|
||||||
int CCE_table[800];
|
|
||||||
|
|
||||||
void init_nCCE_table(void)
|
|
||||||
{
|
|
||||||
memset(CCE_table,0,800*sizeof(int));
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
int get_nCCE_offset(const unsigned char L, const int nCCE, const int common_dci, const unsigned short rnti, const unsigned char subframe)
|
|
||||||
{
|
|
||||||
|
|
||||||
int search_space_free,m,nb_candidates = 0,l,i;
|
|
||||||
unsigned int Yk;
|
|
||||||
|
|
||||||
/*
|
|
||||||
printf("CCE Allocation: ");
|
|
||||||
for (i=0;i<nCCE;i++)
|
|
||||||
printf("%d.",CCE_table[i]);
|
|
||||||
printf("\n");
|
|
||||||
*/
|
|
||||||
if (common_dci == 1) {
|
|
||||||
// check CCE(0 ... L-1)
|
|
||||||
nb_candidates = (L==4) ? 4 : 2;
|
|
||||||
nb_candidates = min(nb_candidates,nCCE/L);
|
|
||||||
|
|
||||||
for (m = nb_candidates-1 ; m >=0 ; m--) {
|
|
||||||
search_space_free = 1;
|
|
||||||
for (l=0; l<L; l++) {
|
|
||||||
if (CCE_table[(m*L) + l] == 1) {
|
|
||||||
search_space_free = 0;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (search_space_free == 1) {
|
|
||||||
for (l=0; l<L; l++)
|
|
||||||
CCE_table[(m*L)+l]=1;
|
|
||||||
return(m*L);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
return(-1);
|
|
||||||
|
|
||||||
} else { // Find first available in ue specific search space
|
|
||||||
// according to procedure in Section 9.1.1 of 36.213 (v. 8.6)
|
|
||||||
// compute Yk
|
|
||||||
Yk = (unsigned int)rnti;
|
|
||||||
|
|
||||||
for (i=0; i<=subframe; i++)
|
|
||||||
Yk = (Yk*39827)%65537;
|
|
||||||
|
|
||||||
Yk = Yk % (nCCE/L);
|
|
||||||
|
|
||||||
|
|
||||||
switch (L) {
|
|
||||||
case 1:
|
|
||||||
case 2:
|
|
||||||
nb_candidates = 6;
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 4:
|
|
||||||
case 8:
|
|
||||||
nb_candidates = 2;
|
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
|
||||||
DevParam(L, nCCE, rnti);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
// LOG_I(PHY,"rnti %x, Yk = %d, nCCE %d (nCCE/L %d),nb_cand %d\n",rnti,Yk,nCCE,nCCE/L,nb_candidates);
|
|
||||||
|
|
||||||
for (m = 0 ; m < nb_candidates ; m++) {
|
|
||||||
search_space_free = 1;
|
|
||||||
|
|
||||||
for (l=0; l<L; l++) {
|
|
||||||
if (CCE_table[(((Yk+m)%(nCCE/L))*L) + l] == 1) {
|
|
||||||
search_space_free = 0;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (search_space_free == 1) {
|
|
||||||
for (l=0; l<L; l++)
|
|
||||||
CCE_table[(((Yk+m)%(nCCE/L))*L)+l]=1;
|
|
||||||
|
|
||||||
return(((Yk+m)%(nCCE/L))*L);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
return(-1);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
int16_t get_target_pusch_rx_power(const module_id_t module_idP, const uint8_t CC_id)
|
int16_t get_target_pusch_rx_power(const module_id_t module_idP, const uint8_t CC_id)
|
||||||
{
|
{
|
||||||
//return PHY_vars_eNB_g[module_idP][CC_id]->PHY_measurements_eNB[0].n0_power_tot_dBm;
|
//return PHY_vars_eNB_g[module_idP][CC_id]->PHY_measurements_eNB[0].n0_power_tot_dBm;
|
||||||
@@ -501,6 +406,7 @@ void phy_procedures_eNB_S_RX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars
|
|||||||
|
|
||||||
if (abstraction_flag == 0) {
|
if (abstraction_flag == 0) {
|
||||||
lte_eNB_I0_measurements(phy_vars_eNB,
|
lte_eNB_I0_measurements(phy_vars_eNB,
|
||||||
|
subframe,
|
||||||
0,
|
0,
|
||||||
phy_vars_eNB->first_run_I0_measurements);
|
phy_vars_eNB->first_run_I0_measurements);
|
||||||
}
|
}
|
||||||
@@ -514,8 +420,6 @@ void phy_procedures_eNB_S_RX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
if (I0_clear == 1)
|
|
||||||
I0_clear = 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -1838,15 +1742,18 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
|
|||||||
phy_vars_eNB->dlsch_eNB[i][0]->subframe_tx[subframe] = 0;
|
phy_vars_eNB->dlsch_eNB[i][0]->subframe_tx[subframe] = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
init_nCCE_table();
|
// init_nCCE_table();
|
||||||
|
|
||||||
num_pdcch_symbols = get_num_pdcch_symbols(DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci,
|
num_pdcch_symbols = DCI_pdu->num_pdcch_symbols;
|
||||||
DCI_pdu->dci_alloc,
|
/*get_num_pdcch_symbols(DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci,
|
||||||
&phy_vars_eNB->lte_frame_parms,
|
DCI_pdu->dci_alloc,
|
||||||
subframe);
|
&phy_vars_eNB->lte_frame_parms,
|
||||||
|
subframe);*/
|
||||||
|
/*
|
||||||
DCI_pdu->nCCE = get_nCCE(num_pdcch_symbols,
|
DCI_pdu->nCCE = get_nCCE(num_pdcch_symbols,
|
||||||
&phy_vars_eNB->lte_frame_parms,
|
&phy_vars_eNB->lte_frame_parms,
|
||||||
get_mi(&phy_vars_eNB->lte_frame_parms,subframe));
|
get_mi(&phy_vars_eNB->lte_frame_parms,subframe));*/
|
||||||
|
|
||||||
LOG_D(PHY,"num_pdcch_symbols %"PRIu8", nCCE %u (dci commond %"PRIu8", dci uespec %"PRIu8"\n",num_pdcch_symbols,DCI_pdu->nCCE,
|
LOG_D(PHY,"num_pdcch_symbols %"PRIu8", nCCE %u (dci commond %"PRIu8", dci uespec %"PRIu8"\n",num_pdcch_symbols,DCI_pdu->nCCE,
|
||||||
DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci);
|
DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci);
|
||||||
|
|
||||||
@@ -1862,6 +1769,7 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
for (i=0; i<DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci ; i++) {
|
for (i=0; i<DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci ; i++) {
|
||||||
|
LOG_D(PHY,"[eNB] Subframe %d: DCI %d/%d : rnti %x, CCEind %d\n",subframe,i,DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci,DCI_pdu->dci_alloc[i].rnti,DCI_pdu->dci_alloc[i].firstCCE);
|
||||||
#ifdef DEBUG_PHY_PROC
|
#ifdef DEBUG_PHY_PROC
|
||||||
|
|
||||||
if (DCI_pdu->dci_alloc[i].rnti != SI_RNTI) {
|
if (DCI_pdu->dci_alloc[i].rnti != SI_RNTI) {
|
||||||
@@ -1889,28 +1797,21 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
|
|||||||
phy_vars_eNB->eNB_UE_stats[0].DL_pmi_single);
|
phy_vars_eNB->eNB_UE_stats[0].DL_pmi_single);
|
||||||
|
|
||||||
|
|
||||||
int result = get_nCCE_offset(1<<DCI_pdu->dci_alloc[i].L, DCI_pdu->nCCE, 1, SI_RNTI, subframe);
|
phy_vars_eNB->dlsch_eNB_SI->nCCE[subframe] = DCI_pdu->dci_alloc[i].firstCCE;
|
||||||
phy_vars_eNB->dlsch_eNB_SI->nCCE[subframe] = result;
|
|
||||||
|
|
||||||
if (result == -1) {
|
LOG_T(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for common DCI (SI) => %"PRIu8"/%u\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,
|
||||||
// FIXME what happens to phy_vars_eNB->dlsch_eNB_SI->nCCE[subframe]?
|
phy_vars_eNB->dlsch_eNB_SI->nCCE[subframe],DCI_pdu->nCCE);
|
||||||
LOG_E(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : No available CCE resources for common DCI (SI)!!!\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe);
|
|
||||||
} else {
|
|
||||||
LOG_T(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for common DCI (SI) => %"PRIu8"/%u\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,
|
|
||||||
phy_vars_eNB->dlsch_eNB_SI->nCCE[subframe],DCI_pdu->nCCE);
|
|
||||||
|
|
||||||
#if defined(SMBV) && !defined(EXMIMO)
|
#if defined(SMBV) && !defined(EXMIMO)
|
||||||
|
|
||||||
// configure SI DCI
|
// configure SI DCI
|
||||||
if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
|
if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
|
||||||
msg("[SMBV] Frame %3d, SI in SF %d DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
|
msg("[SMBV] Frame %3d, SI in SF %d DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
|
||||||
smbv_configure_common_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), "SI", &DCI_pdu->dci_alloc[i], i);
|
smbv_configure_common_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), "SI", &DCI_pdu->dci_alloc[i], i);
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
|
|
||||||
DCI_pdu->dci_alloc[i].nCCE = phy_vars_eNB->dlsch_eNB_SI->nCCE[subframe];
|
#endif
|
||||||
|
|
||||||
|
|
||||||
} else if (DCI_pdu->dci_alloc[i].ra_flag == 1) {
|
} else if (DCI_pdu->dci_alloc[i].ra_flag == 1) {
|
||||||
#ifdef DEBUG_PHY_PROC
|
#ifdef DEBUG_PHY_PROC
|
||||||
@@ -1931,28 +1832,20 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
|
|||||||
|
|
||||||
// mac_xface->macphy_exit("Transmitted RAR, exiting\n");
|
// mac_xface->macphy_exit("Transmitted RAR, exiting\n");
|
||||||
|
|
||||||
int result = get_nCCE_offset(1<<DCI_pdu->dci_alloc[i].L, DCI_pdu->nCCE, 1, DCI_pdu->dci_alloc[i].rnti, subframe);
|
|
||||||
phy_vars_eNB->dlsch_eNB_ra->nCCE[subframe] = result;
|
|
||||||
|
|
||||||
if (result == -1) {
|
phy_vars_eNB->dlsch_eNB_ra->nCCE[subframe] = DCI_pdu->dci_alloc[i].firstCCE;
|
||||||
// FIXME what happens to phy_vars_eNB->dlsch_eNB_ra->nCCE[subframe]?
|
|
||||||
LOG_E(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : No available CCE resources for common DCI (RA) !!!\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe);
|
LOG_D(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for common DCI (RA) => %"PRIu8"/%u\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,
|
||||||
} else {
|
phy_vars_eNB->dlsch_eNB_ra->nCCE[subframe],DCI_pdu->nCCE);
|
||||||
LOG_D(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for common DCI (RA) => %"PRIu8"/%u\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,
|
|
||||||
phy_vars_eNB->dlsch_eNB_ra->nCCE[subframe],DCI_pdu->nCCE);
|
|
||||||
#if defined(SMBV) && !defined(EXMIMO)
|
#if defined(SMBV) && !defined(EXMIMO)
|
||||||
|
|
||||||
// configure RA DCI
|
// configure RA DCI
|
||||||
if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
|
if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
|
||||||
msg("[SMBV] Frame %3d, RA in SF %d DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
|
msg("[SMBV] Frame %3d, RA in SF %d DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
|
||||||
smbv_configure_common_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), "RA", &DCI_pdu->dci_alloc[i], i);
|
smbv_configure_common_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), "RA", &DCI_pdu->dci_alloc[i], i);
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
DCI_pdu->dci_alloc[i].nCCE = phy_vars_eNB->dlsch_eNB_ra->nCCE[subframe];
|
#endif
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1993,30 +1886,22 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
|
|||||||
LOG_D(PHY,"[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d subframe %d: Generated dlsch params\n",
|
LOG_D(PHY,"[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d subframe %d: Generated dlsch params\n",
|
||||||
phy_vars_eNB->Mod_id,DCI_pdu->dci_alloc[i].rnti,phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->current_harq_pid,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe);
|
phy_vars_eNB->Mod_id,DCI_pdu->dci_alloc[i].rnti,phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->current_harq_pid,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe);
|
||||||
|
|
||||||
int result = get_nCCE_offset(1<<DCI_pdu->dci_alloc[i].L, DCI_pdu->nCCE, 0, DCI_pdu->dci_alloc[i].rnti, subframe);
|
|
||||||
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nCCE[subframe] = result;
|
|
||||||
|
|
||||||
if (result == -1) {
|
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nCCE[subframe] = DCI_pdu->dci_alloc[i].firstCCE;
|
||||||
// FIXME what happens to phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nCCE[subframe]?
|
|
||||||
LOG_E(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : No available CCE resources for UE spec DCI (PDSCH %"PRIx16") !!!\n",
|
LOG_D(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for ue DCI (PDSCH %"PRIx16") => %"PRIu8"/%u\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,
|
||||||
phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,DCI_pdu->dci_alloc[i].rnti);
|
DCI_pdu->dci_alloc[i].rnti,phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nCCE[subframe],DCI_pdu->nCCE);
|
||||||
} else {
|
|
||||||
LOG_D(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for ue DCI (PDSCH %"PRIx16") => %"PRIu8"/%u\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,
|
|
||||||
DCI_pdu->dci_alloc[i].rnti,phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nCCE[subframe],DCI_pdu->nCCE);
|
|
||||||
|
|
||||||
#if defined(SMBV) && !defined(EXMIMO)
|
#if defined(SMBV) && !defined(EXMIMO)
|
||||||
DCI_pdu->dci_alloc[i].nCCE = phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nCCE[subframe];
|
|
||||||
|
|
||||||
// configure UE-spec DCI
|
// configure UE-spec DCI
|
||||||
if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
|
if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
|
||||||
msg("[SMBV] Frame %3d, PDSCH in SF %d DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
|
msg("[SMBV] Frame %3d, PDSCH in SF %d DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
|
||||||
smbv_configure_ue_spec_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), UE_id+1, &DCI_pdu->dci_alloc[i], i);
|
smbv_configure_ue_spec_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), UE_id+1, &DCI_pdu->dci_alloc[i], i);
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
}
|
|
||||||
|
|
||||||
DCI_pdu->dci_alloc[i].nCCE = phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nCCE[subframe];
|
|
||||||
#ifdef DEBUG_PHY_PROC
|
#ifdef DEBUG_PHY_PROC
|
||||||
//if (phy_vars_eNB->proc[sched_subframe].frame_tx%100 == 0)
|
//if (phy_vars_eNB->proc[sched_subframe].frame_tx%100 == 0)
|
||||||
LOG_D(PHY,"[eNB %"PRIu8"][DCI][PDSCH %"PRIx16"] Frame %d subframe %d UE_id %"PRId8" Generated DCI format %d, aggregation %d\n",
|
LOG_D(PHY,"[eNB %"PRIu8"][DCI][PDSCH %"PRIx16"] Frame %d subframe %d UE_id %"PRId8" Generated DCI format %d, aggregation %d\n",
|
||||||
@@ -2094,29 +1979,21 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
|
|||||||
CBA_RNTI,
|
CBA_RNTI,
|
||||||
0); // do_srs
|
0); // do_srs
|
||||||
|
|
||||||
if ((DCI_pdu->dci_alloc[i].nCCE=get_nCCE_offset(1<<DCI_pdu->dci_alloc[i].L,
|
LOG_T(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resources for UE spec DCI (PUSCH %"PRIx16") => %d/%u\n",
|
||||||
DCI_pdu->nCCE,
|
phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,DCI_pdu->dci_alloc[i].rnti,
|
||||||
0,
|
DCI_pdu->dci_alloc[i].firstCCE,DCI_pdu->nCCE);
|
||||||
DCI_pdu->dci_alloc[i].rnti,
|
|
||||||
subframe)) == -1) {
|
|
||||||
LOG_E(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : No available CCE resources (%u) for UE spec DCI (PUSCH %"PRIx16") !!!\n",
|
|
||||||
phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,DCI_pdu->nCCE,DCI_pdu->dci_alloc[i].rnti);
|
|
||||||
} else {
|
|
||||||
LOG_T(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resources for UE spec DCI (PUSCH %"PRIx16") => %d/%u\n",
|
|
||||||
phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,DCI_pdu->dci_alloc[i].rnti,
|
|
||||||
DCI_pdu->dci_alloc[i].nCCE,DCI_pdu->nCCE);
|
|
||||||
|
|
||||||
#if defined(SMBV) && !defined(EXMIMO)
|
#if defined(SMBV) && !defined(EXMIMO)
|
||||||
|
|
||||||
// configure UE-spec DCI for UL Grant
|
// configure UE-spec DCI for UL Grant
|
||||||
if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
|
if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
|
||||||
msg("[SMBV] Frame %3d, SF %d UL DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
|
msg("[SMBV] Frame %3d, SF %d UL DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
|
||||||
smbv_configure_ue_spec_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), UE_id+1, &DCI_pdu->dci_alloc[i], i);
|
smbv_configure_ue_spec_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), UE_id+1, &DCI_pdu->dci_alloc[i], i);
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef DEBUG_PHY_PROC
|
#ifdef DEBUG_PHY_PROC
|
||||||
LOG_D(PHY,"[eNB %"PRIu8"][PUSCH %"PRIu8"] frame %d subframe %d Setting subframe_scheduling_flag for UE %"PRIu32" harq_pid %"PRIu8" (ul subframe %"PRIu8")\n",
|
LOG_D(PHY,"[eNB %"PRIu8"][PUSCH %"PRIu8"] frame %d subframe %d Setting subframe_scheduling_flag for UE %"PRIu32" harq_pid %"PRIu8" (ul subframe %"PRIu8")\n",
|
||||||
@@ -2147,13 +2024,13 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (abstraction_flag == 0) {
|
if (abstraction_flag == 0) {
|
||||||
#ifdef DEBUG_PHY_PROC
|
//#ifdef DEBUG_PHY_PROC
|
||||||
|
|
||||||
if (DCI_pdu->Num_ue_spec_dci+DCI_pdu->Num_common_dci > 0)
|
if (DCI_pdu->Num_ue_spec_dci+DCI_pdu->Num_common_dci > 0)
|
||||||
LOG_D(PHY,"[eNB %"PRIu8"] Frame %d, subframe %d: Calling generate_dci_top (pdcch) (common %"PRIu8",ue_spec %"PRIu8")\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx, subframe,
|
LOG_D(PHY,"[eNB %"PRIu8"] Frame %d, subframe %d: Calling generate_dci_top (pdcch) (common %"PRIu8",ue_spec %"PRIu8")\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx, subframe,
|
||||||
DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci);
|
DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci);
|
||||||
|
|
||||||
#endif
|
//#endif
|
||||||
|
|
||||||
// for (sect_id=0;sect_id<number_of_cards;sect_id++)
|
// for (sect_id=0;sect_id<number_of_cards;sect_id++)
|
||||||
num_pdcch_symbols = generate_dci_top(DCI_pdu->Num_ue_spec_dci,
|
num_pdcch_symbols = generate_dci_top(DCI_pdu->Num_ue_spec_dci,
|
||||||
@@ -2436,7 +2313,7 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
|
|||||||
input_buffer_length = phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->TBS/8;
|
input_buffer_length = phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->TBS/8;
|
||||||
|
|
||||||
|
|
||||||
#ifdef DEBUG_PHY_PROC
|
//#ifdef DEBUG_PHY_PROC
|
||||||
LOG_D(PHY,
|
LOG_D(PHY,
|
||||||
"[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %"PRIu16", G %d, nb_rb %"PRIu16", mcs %"PRIu8", pmi_alloc %"PRIx16", rv %"PRIu8" (round %"PRIu8")\n",
|
"[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %"PRIu16", G %d, nb_rb %"PRIu16", mcs %"PRIu8", pmi_alloc %"PRIx16", rv %"PRIu8" (round %"PRIu8")\n",
|
||||||
phy_vars_eNB->Mod_id, phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->rnti,harq_pid,
|
phy_vars_eNB->Mod_id, phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->rnti,harq_pid,
|
||||||
@@ -2452,7 +2329,7 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
|
|||||||
pmi2hex_2Ar1(phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->pmi_alloc),
|
pmi2hex_2Ar1(phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->pmi_alloc),
|
||||||
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->rvidx,
|
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->rvidx,
|
||||||
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->round);
|
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->round);
|
||||||
#endif
|
//#endif
|
||||||
#if defined(MESSAGE_CHART_GENERATOR_PHY)
|
#if defined(MESSAGE_CHART_GENERATOR_PHY)
|
||||||
MSC_LOG_TX_MESSAGE(
|
MSC_LOG_TX_MESSAGE(
|
||||||
MSC_PHY_ENB,MSC_PHY_UE,
|
MSC_PHY_ENB,MSC_PHY_UE,
|
||||||
@@ -3245,7 +3122,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
int16_t n1_pucch0,n1_pucch1,n1_pucch2,n1_pucch3;
|
int16_t n1_pucch0,n1_pucch1,n1_pucch2,n1_pucch3;
|
||||||
uint8_t do_SR = 0;
|
uint8_t do_SR = 0;
|
||||||
uint8_t pucch_sel = 0;
|
uint8_t pucch_sel = 0;
|
||||||
int32_t metric0=0,metric1=0;
|
int32_t metric0=0,metric1=0,metric0_SR=0;
|
||||||
ANFBmode_t bundling_flag;
|
ANFBmode_t bundling_flag;
|
||||||
PUCCH_FMT_t format;
|
PUCCH_FMT_t format;
|
||||||
uint8_t nPRS;
|
uint8_t nPRS;
|
||||||
@@ -3274,6 +3151,11 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
phy_vars_eNB->lte_frame_parms.samples_per_tti);
|
phy_vars_eNB->lte_frame_parms.samples_per_tti);
|
||||||
#endif
|
#endif
|
||||||
*/
|
*/
|
||||||
|
phy_vars_eNB->rb_mask_ul[0]=0;
|
||||||
|
phy_vars_eNB->rb_mask_ul[1]=0;
|
||||||
|
phy_vars_eNB->rb_mask_ul[2]=0;
|
||||||
|
phy_vars_eNB->rb_mask_ul[3]=0;
|
||||||
|
|
||||||
if (abstraction_flag == 0) {
|
if (abstraction_flag == 0) {
|
||||||
remove_7_5_kHz(phy_vars_eNB,subframe<<1);
|
remove_7_5_kHz(phy_vars_eNB,subframe<<1);
|
||||||
remove_7_5_kHz(phy_vars_eNB,(subframe<<1)+1);
|
remove_7_5_kHz(phy_vars_eNB,(subframe<<1)+1);
|
||||||
@@ -3422,6 +3304,12 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
pusch_active = 1;
|
pusch_active = 1;
|
||||||
round = phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->round;
|
round = phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->round;
|
||||||
|
|
||||||
|
for (int rb=0;
|
||||||
|
rb<=phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->nb_rb;
|
||||||
|
rb++) {
|
||||||
|
int rb2 = rb+phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->first_rb;
|
||||||
|
phy_vars_eNB->rb_mask_ul[rb2>>5] |= (1<<(rb2&31));
|
||||||
|
}
|
||||||
#ifdef DEBUG_PHY_PROC
|
#ifdef DEBUG_PHY_PROC
|
||||||
LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d Scheduling PUSCH/ULSCH Reception for rnti %x (UE_id %d)\n",
|
LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d Scheduling PUSCH/ULSCH Reception for rnti %x (UE_id %d)\n",
|
||||||
phy_vars_eNB->Mod_id,harq_pid,
|
phy_vars_eNB->Mod_id,harq_pid,
|
||||||
@@ -3463,7 +3351,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef DEBUG_PHY_PROC
|
//#ifdef DEBUG_PHY_PROC
|
||||||
LOG_D(PHY,
|
LOG_D(PHY,
|
||||||
"[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, first_rb %d, nb_rb %d, mcs %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, nprs %d), O_ACK %d \n",
|
"[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, first_rb %d, nb_rb %d, mcs %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, nprs %d), O_ACK %d \n",
|
||||||
phy_vars_eNB->Mod_id,harq_pid,frame,subframe,
|
phy_vars_eNB->Mod_id,harq_pid,frame,subframe,
|
||||||
@@ -3480,7 +3368,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
phy_vars_eNB->lte_frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift,
|
phy_vars_eNB->lte_frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift,
|
||||||
nPRS,
|
nPRS,
|
||||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->O_ACK);
|
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->O_ACK);
|
||||||
#endif
|
//#endif
|
||||||
start_meas(&phy_vars_eNB->ulsch_demodulation_stats);
|
start_meas(&phy_vars_eNB->ulsch_demodulation_stats);
|
||||||
|
|
||||||
if (abstraction_flag==0) {
|
if (abstraction_flag==0) {
|
||||||
@@ -3526,7 +3414,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
#endif
|
#endif
|
||||||
stop_meas(&phy_vars_eNB->ulsch_decoding_stats);
|
stop_meas(&phy_vars_eNB->ulsch_decoding_stats);
|
||||||
|
|
||||||
#ifdef DEBUG_PHY_PROC
|
//#ifdef DEBUG_PHY_PROC
|
||||||
LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) RSSI (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d\n",
|
LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) RSSI (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d\n",
|
||||||
phy_vars_eNB->Mod_id,harq_pid,
|
phy_vars_eNB->Mod_id,harq_pid,
|
||||||
frame,subframe,
|
frame,subframe,
|
||||||
@@ -3540,7 +3428,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->o_ACK[0],
|
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->o_ACK[0],
|
||||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->o_ACK[1],
|
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->o_ACK[1],
|
||||||
ret);
|
ret);
|
||||||
#endif //DEBUG_PHY_PROC
|
//#endif //DEBUG_PHY_PROC
|
||||||
/*
|
/*
|
||||||
if ((two_ues_connected==1) && (phy_vars_eNB->cooperation_flag==2)) {
|
if ((two_ues_connected==1) && (phy_vars_eNB->cooperation_flag==2)) {
|
||||||
for (j=0;j<phy_vars_eNB->lte_frame_parms.nb_antennas_rx;j++) {
|
for (j=0;j<phy_vars_eNB->lte_frame_parms.nb_antennas_rx;j++) {
|
||||||
@@ -3742,6 +3630,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
for (j=0; j<phy_vars_eNB->lte_frame_parms.nb_antennas_rx; j++)
|
for (j=0; j<phy_vars_eNB->lte_frame_parms.nb_antennas_rx; j++)
|
||||||
//this is the RSSI per RB
|
//this is the RSSI per RB
|
||||||
phy_vars_eNB->eNB_UE_stats[i].UL_rssi[j] =
|
phy_vars_eNB->eNB_UE_stats[i].UL_rssi[j] =
|
||||||
|
|
||||||
dB_fixed(phy_vars_eNB->lte_eNB_pusch_vars[i]->ulsch_power[j]*
|
dB_fixed(phy_vars_eNB->lte_eNB_pusch_vars[i]->ulsch_power[j]*
|
||||||
(phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->nb_rb*12)/
|
(phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->nb_rb*12)/
|
||||||
phy_vars_eNB->lte_frame_parms.ofdm_symbol_size) -
|
phy_vars_eNB->lte_frame_parms.ofdm_symbol_size) -
|
||||||
@@ -3749,6 +3638,11 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
hundred_times_log10_NPRB[phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->nb_rb-1]/100 -
|
hundred_times_log10_NPRB[phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->nb_rb-1]/100 -
|
||||||
get_hundred_times_delta_IF_eNB(phy_vars_eNB,i,harq_pid, 0)/100;
|
get_hundred_times_delta_IF_eNB(phy_vars_eNB,i,harq_pid, 0)/100;
|
||||||
|
|
||||||
|
/*
|
||||||
|
dB_fixed(phy_vars_eNB->lte_eNB_pusch_vars[i]->ulsch_power[j]*phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->nb_rb) -
|
||||||
|
phy_vars_eNB->rx_total_gain_eNB_dB -
|
||||||
|
hundred_times_log10_NPRB[phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->nb_rb-1]/100 -
|
||||||
|
get_hundred_times_delta_IF_eNB(phy_vars_eNB,i,harq_pid, 0)/100;*/
|
||||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->phich_active = 1;
|
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->phich_active = 1;
|
||||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->phich_ACK = 1;
|
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->phich_ACK = 1;
|
||||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->round = 0;
|
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->round = 0;
|
||||||
@@ -3756,11 +3650,11 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
|
|
||||||
if (phy_vars_eNB->ulsch_eNB[i]->Msg3_flag == 1) {
|
if (phy_vars_eNB->ulsch_eNB[i]->Msg3_flag == 1) {
|
||||||
#ifdef OPENAIR2
|
#ifdef OPENAIR2
|
||||||
#ifdef DEBUG_PHY_PROC
|
//#ifdef DEBUG_PHY_PROC
|
||||||
LOG_I(PHY,"[eNB %d][RAPROC] Frame %d Terminating ra_proc for harq %d, UE %d\n",
|
LOG_I(PHY,"[eNB %d][RAPROC] Frame %d Terminating ra_proc for harq %d, UE %d\n",
|
||||||
phy_vars_eNB->Mod_id,
|
phy_vars_eNB->Mod_id,
|
||||||
frame,harq_pid,i);
|
frame,harq_pid,i);
|
||||||
#endif
|
//#endif
|
||||||
mac_xface->rx_sdu(phy_vars_eNB->Mod_id,
|
mac_xface->rx_sdu(phy_vars_eNB->Mod_id,
|
||||||
phy_vars_eNB->CC_id,
|
phy_vars_eNB->CC_id,
|
||||||
frame,subframe,
|
frame,subframe,
|
||||||
@@ -3770,7 +3664,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
harq_pid,
|
harq_pid,
|
||||||
&phy_vars_eNB->ulsch_eNB[i]->Msg3_flag);
|
&phy_vars_eNB->ulsch_eNB[i]->Msg3_flag);
|
||||||
|
|
||||||
// false msg3 detection by MAC: empty PDU
|
// one-shot msg3 detection by MAC: empty PDU (e.g. CRNTI)
|
||||||
if (phy_vars_eNB->ulsch_eNB[i]->Msg3_flag == 0 ) {
|
if (phy_vars_eNB->ulsch_eNB[i]->Msg3_flag == 0 ) {
|
||||||
phy_vars_eNB->eNB_UE_stats[i].mode = PRACH;
|
phy_vars_eNB->eNB_UE_stats[i].mode = PRACH;
|
||||||
mac_xface->cancel_ra_proc(phy_vars_eNB->Mod_id,
|
mac_xface->cancel_ra_proc(phy_vars_eNB->Mod_id,
|
||||||
@@ -3793,9 +3687,9 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
phy_vars_eNB->eNB_UE_stats[i].mode = PUSCH;
|
phy_vars_eNB->eNB_UE_stats[i].mode = PUSCH;
|
||||||
phy_vars_eNB->ulsch_eNB[i]->Msg3_flag = 0;
|
phy_vars_eNB->ulsch_eNB[i]->Msg3_flag = 0;
|
||||||
|
|
||||||
#ifdef DEBUG_PHY_PROC
|
//#ifdef DEBUG_PHY_PROC
|
||||||
LOG_D(PHY,"[eNB %d][RAPROC] Frame %d : RX Subframe %d Setting UE %d mode to PUSCH\n",phy_vars_eNB->Mod_id,frame,subframe,i);
|
LOG_D(PHY,"[eNB %d][RAPROC] Frame %d : RX Subframe %d Setting UE %d mode to PUSCH\n",phy_vars_eNB->Mod_id,frame,subframe,i);
|
||||||
#endif //DEBUG_PHY_PROC
|
//#endif //DEBUG_PHY_PROC
|
||||||
|
|
||||||
for (k=0; k<8; k++) { //harq_processes
|
for (k=0; k<8; k++) { //harq_processes
|
||||||
for (j=0; j<phy_vars_eNB->dlsch_eNB[i][0]->Mdlharq; j++) {
|
for (j=0; j<phy_vars_eNB->dlsch_eNB[i][0]->Mdlharq; j++) {
|
||||||
@@ -3942,28 +3836,56 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
} else {
|
} else {
|
||||||
// otherwise we have some PUCCH detection to do
|
// otherwise we have some PUCCH detection to do
|
||||||
|
|
||||||
|
// Null out PUCCH PRBs for noise measurement
|
||||||
|
switch(phy_vars_eNB->lte_frame_parms.N_RB_UL) {
|
||||||
|
case 6:
|
||||||
|
phy_vars_eNB->rb_mask_ul[0] |= (0x1 | (1<<5)); //position 5
|
||||||
|
break;
|
||||||
|
case 15:
|
||||||
|
phy_vars_eNB->rb_mask_ul[0] |= (0x1 | (1<<14)); // position 14
|
||||||
|
break;
|
||||||
|
case 25:
|
||||||
|
phy_vars_eNB->rb_mask_ul[0] |= (0x1 | (1<<24)); // position 24
|
||||||
|
break;
|
||||||
|
case 50:
|
||||||
|
phy_vars_eNB->rb_mask_ul[0] |= 0x1;
|
||||||
|
phy_vars_eNB->rb_mask_ul[1] |= (1<<17); // position 49 (49-32)
|
||||||
|
break;
|
||||||
|
case 75:
|
||||||
|
phy_vars_eNB->rb_mask_ul[0] |= 0x1;
|
||||||
|
phy_vars_eNB->rb_mask_ul[2] |= (1<<10); // position 74 (74-64)
|
||||||
|
break;
|
||||||
|
case 100:
|
||||||
|
phy_vars_eNB->rb_mask_ul[0] |= 0x1;
|
||||||
|
phy_vars_eNB->rb_mask_ul[3] |= (1<<3); // position 99 (99-96)
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
LOG_E(PHY,"Unknown number for N_RB_UL %d\n",phy_vars_eNB->lte_frame_parms.N_RB_UL);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
if (do_SR == 1) {
|
if (do_SR == 1) {
|
||||||
phy_vars_eNB->eNB_UE_stats[i].sr_total++;
|
phy_vars_eNB->eNB_UE_stats[i].sr_total++;
|
||||||
|
|
||||||
if (abstraction_flag == 0)
|
if (abstraction_flag == 0)
|
||||||
metric0 = rx_pucch(phy_vars_eNB,
|
metric0_SR = rx_pucch(phy_vars_eNB,
|
||||||
pucch_format1,
|
pucch_format1,
|
||||||
i,
|
i,
|
||||||
phy_vars_eNB->scheduling_request_config[i].sr_PUCCH_ResourceIndex,
|
phy_vars_eNB->scheduling_request_config[i].sr_PUCCH_ResourceIndex,
|
||||||
0, // n2_pucch
|
0, // n2_pucch
|
||||||
1, // shortened format
|
0, // shortened format, should be use_srs flag, later
|
||||||
&SR_payload,
|
&SR_payload,
|
||||||
subframe,
|
subframe,
|
||||||
PUCCH1_THRES);
|
PUCCH1_THRES);
|
||||||
|
|
||||||
#ifdef PHY_ABSTRACTION
|
#ifdef PHY_ABSTRACTION
|
||||||
else {
|
else {
|
||||||
metric0 = rx_pucch_emul(phy_vars_eNB,
|
metric0_SR = rx_pucch_emul(phy_vars_eNB,
|
||||||
i,
|
i,
|
||||||
pucch_format1,
|
pucch_format1,
|
||||||
0,
|
0,
|
||||||
&SR_payload,
|
&SR_payload,
|
||||||
sched_subframe);
|
sched_subframe);
|
||||||
LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d Checking SR (UE SR %d/%d)\n",phy_vars_eNB->Mod_id,
|
LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d Checking SR (UE SR %d/%d)\n",phy_vars_eNB->Mod_id,
|
||||||
phy_vars_eNB->ulsch_eNB[i]->rnti,frame,subframe,SR_payload,phy_vars_eNB->scheduling_request_config[i].sr_PUCCH_ResourceIndex);
|
phy_vars_eNB->ulsch_eNB[i]->rnti,frame,subframe,SR_payload,phy_vars_eNB->scheduling_request_config[i].sr_PUCCH_ResourceIndex);
|
||||||
}
|
}
|
||||||
@@ -3999,20 +3921,35 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
if ((n1_pucch0==-1) && (n1_pucch1==-1)) { // just check for SR
|
if ((n1_pucch0==-1) && (n1_pucch1==-1)) { // just check for SR
|
||||||
} else if (phy_vars_eNB->lte_frame_parms.frame_type==FDD) { // FDD
|
} else if (phy_vars_eNB->lte_frame_parms.frame_type==FDD) { // FDD
|
||||||
// if SR was detected, use the n1_pucch from SR, else use n1_pucch0
|
// if SR was detected, use the n1_pucch from SR, else use n1_pucch0
|
||||||
n1_pucch0 = (SR_payload==1) ? phy_vars_eNB->scheduling_request_config[i].sr_PUCCH_ResourceIndex:n1_pucch0;
|
// n1_pucch0 = (SR_payload==1) ? phy_vars_eNB->scheduling_request_config[i].sr_PUCCH_ResourceIndex:n1_pucch0;
|
||||||
|
|
||||||
LOG_D(PHY,"Demodulating PUCCH for ACK/NAK: n1_pucch0 %d (%d), SR_payload %d\n",n1_pucch0,phy_vars_eNB->scheduling_request_config[i].sr_PUCCH_ResourceIndex,SR_payload);
|
LOG_D(PHY,"Demodulating PUCCH for ACK/NAK: n1_pucch0 %d (%d), SR_payload %d\n",n1_pucch0,phy_vars_eNB->scheduling_request_config[i].sr_PUCCH_ResourceIndex,SR_payload);
|
||||||
|
|
||||||
if (abstraction_flag == 0)
|
if (abstraction_flag == 0) {
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
metric0 = rx_pucch(phy_vars_eNB,
|
metric0 = rx_pucch(phy_vars_eNB,
|
||||||
pucch_format1a,
|
pucch_format1a,
|
||||||
i,
|
i,
|
||||||
(uint16_t)n1_pucch0,
|
(uint16_t)n1_pucch0,
|
||||||
0, //n2_pucch
|
0, //n2_pucch
|
||||||
1, // shortened format
|
0, // shortened format
|
||||||
pucch_payload0,
|
pucch_payload0,
|
||||||
subframe,
|
subframe,
|
||||||
PUCCH1a_THRES);
|
PUCCH1a_THRES);
|
||||||
|
|
||||||
|
if (metric0 < metric0_SR)
|
||||||
|
metric0=rx_pucch(phy_vars_eNB,
|
||||||
|
pucch_format1a,
|
||||||
|
i,
|
||||||
|
phy_vars_eNB->scheduling_request_config[i].sr_PUCCH_ResourceIndex,
|
||||||
|
0, //n2_pucch
|
||||||
|
0, // shortened format
|
||||||
|
pucch_payload0,
|
||||||
|
subframe,
|
||||||
|
PUCCH1a_THRES);
|
||||||
|
}
|
||||||
else {
|
else {
|
||||||
#ifdef PHY_ABSTRACTION
|
#ifdef PHY_ABSTRACTION
|
||||||
metric0 = rx_pucch_emul(phy_vars_eNB,i,
|
metric0 = rx_pucch_emul(phy_vars_eNB,i,
|
||||||
@@ -4064,15 +4001,15 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
if (abstraction_flag == 0)
|
if (abstraction_flag == 0)
|
||||||
metric0 = rx_pucch(phy_vars_eNB,
|
metric0_SR = rx_pucch(phy_vars_eNB,
|
||||||
format,
|
format,
|
||||||
i,
|
i,
|
||||||
phy_vars_eNB->scheduling_request_config[i].sr_PUCCH_ResourceIndex,
|
phy_vars_eNB->scheduling_request_config[i].sr_PUCCH_ResourceIndex,
|
||||||
0, //n2_pucch
|
0, //n2_pucch
|
||||||
1, // shortened format
|
0, // shortened format
|
||||||
pucch_payload0,
|
pucch_payload0,
|
||||||
subframe,
|
subframe,
|
||||||
PUCCH1a_THRES);
|
PUCCH1a_THRES);
|
||||||
else {
|
else {
|
||||||
#ifdef PHY_ABSTRACTION
|
#ifdef PHY_ABSTRACTION
|
||||||
metric0 = rx_pucch_emul(phy_vars_eNB,i,
|
metric0 = rx_pucch_emul(phy_vars_eNB,i,
|
||||||
@@ -4100,7 +4037,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
i,
|
i,
|
||||||
(uint16_t)n1_pucch0,
|
(uint16_t)n1_pucch0,
|
||||||
0, // n2_pucch
|
0, // n2_pucch
|
||||||
1, // shortened format
|
0, // shortened format
|
||||||
pucch_payload0,
|
pucch_payload0,
|
||||||
subframe,
|
subframe,
|
||||||
PUCCH1a_THRES);
|
PUCCH1a_THRES);
|
||||||
@@ -4123,7 +4060,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
i,
|
i,
|
||||||
(uint16_t)n1_pucch1,
|
(uint16_t)n1_pucch1,
|
||||||
0, //n2_pucch
|
0, //n2_pucch
|
||||||
1, // shortened format
|
0, // shortened format
|
||||||
pucch_payload1,
|
pucch_payload1,
|
||||||
subframe,
|
subframe,
|
||||||
PUCCH1a_THRES);
|
PUCCH1a_THRES);
|
||||||
@@ -4366,13 +4303,15 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
|
|
||||||
} // loop i=0 ... NUMBER_OF_UE_MAX-1
|
} // loop i=0 ... NUMBER_OF_UE_MAX-1
|
||||||
|
|
||||||
if (pusch_active == 0) {
|
// if (pusch_active == 0) {
|
||||||
if (abstraction_flag == 0) {
|
if (abstraction_flag == 0) {
|
||||||
// LOG_D(PHY,"[eNB] Frame %d, subframe %d Doing I0_measurements\n",
|
// LOG_D(PHY,"[eNB] Frame %d, subframe %d Doing I0_measurements\n",
|
||||||
// (((subframe)==9)?-1:0) + phy_vars_eNB->proc[sched_subframe].frame_tx,subframe);
|
// (((subframe)==9)?-1:0) + phy_vars_eNB->proc[sched_subframe].frame_tx,subframe);
|
||||||
lte_eNB_I0_measurements(phy_vars_eNB,
|
lte_eNB_I0_measurements(phy_vars_eNB,
|
||||||
|
subframe,
|
||||||
0,
|
0,
|
||||||
phy_vars_eNB->first_run_I0_measurements);
|
phy_vars_eNB->first_run_I0_measurements);
|
||||||
|
phy_vars_eNB->first_run_I0_measurements = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef PHY_ABSTRACTION
|
#ifdef PHY_ABSTRACTION
|
||||||
@@ -4384,9 +4323,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
if (I0_clear == 1)
|
//}
|
||||||
I0_clear = 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef EMOS
|
#ifdef EMOS
|
||||||
phy_procedures_emos_eNB_RX(subframe,phy_vars_eNB);
|
phy_procedures_emos_eNB_RX(subframe,phy_vars_eNB);
|
||||||
@@ -4625,11 +4562,11 @@ void phy_procedures_eNB_lte(unsigned char subframe,PHY_VARS_eNB **phy_vars_eNB,u
|
|||||||
phy_vars_eNB[CC_id]->proc[subframe].frame_tx++;
|
phy_vars_eNB[CC_id]->proc[subframe].frame_tx++;
|
||||||
phy_vars_eNB[CC_id]->proc[subframe].frame_rx++;
|
phy_vars_eNB[CC_id]->proc[subframe].frame_rx++;
|
||||||
|
|
||||||
if (phy_vars_eNB[CC_id]->proc[subframe].frame_tx==MAX_FRAME_NUMBER) // defined in impl_defs_top.h
|
if (phy_vars_eNB[CC_id]->proc[subframe].frame_tx>=MAX_FRAME_NUMBER) // defined in impl_defs_top.h
|
||||||
phy_vars_eNB[CC_id]->proc[subframe].frame_tx=0;
|
phy_vars_eNB[CC_id]->proc[subframe].frame_tx-=MAX_FRAME_NUMBER;
|
||||||
|
|
||||||
if (phy_vars_eNB[CC_id]->proc[subframe].frame_rx==MAX_FRAME_NUMBER)
|
if (phy_vars_eNB[CC_id]->proc[subframe].frame_rx>=MAX_FRAME_NUMBER)
|
||||||
phy_vars_eNB[CC_id]->proc[subframe].frame_rx=0;
|
phy_vars_eNB[CC_id]->proc[subframe].frame_rx-=MAX_FRAME_NUMBER;
|
||||||
}
|
}
|
||||||
|
|
||||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_LTE,0);
|
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_LTE,0);
|
||||||
|
|||||||
@@ -168,7 +168,7 @@ void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe)
|
|||||||
1,
|
1,
|
||||||
phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->num_pdcch_symbols,
|
phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->num_pdcch_symbols,
|
||||||
phy_vars_ue->frame_rx,subframe);
|
phy_vars_ue->frame_rx,subframe);
|
||||||
LOG_I(PHY,"[UE %d] Dumping dlsch_SI : ofdm_symbol_size %d, nsymb %d, nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n",
|
LOG_D(PHY,"[UE %d] Dumping dlsch_SI : ofdm_symbol_size %d, nsymb %d, nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n",
|
||||||
phy_vars_ue->Mod_id,
|
phy_vars_ue->Mod_id,
|
||||||
phy_vars_ue->lte_frame_parms.ofdm_symbol_size,
|
phy_vars_ue->lte_frame_parms.ofdm_symbol_size,
|
||||||
nsymb,
|
nsymb,
|
||||||
@@ -2063,9 +2063,9 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
|
|||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef DEBUG_PHY_PROC
|
//#ifdef DEBUG_PHY_PROC
|
||||||
LOG_D(PHY,"[UE %d] Frame %d, slot %d, Mode %s: DCI found %i\n",phy_vars_ue->Mod_id,frame_rx,slot_rx,mode_string[phy_vars_ue->UE_mode[eNB_id]],dci_cnt);
|
LOG_D(PHY,"[UE %d] Frame %d, slot %d, Mode %s: DCI found %i\n",phy_vars_ue->Mod_id,frame_rx,slot_rx,mode_string[phy_vars_ue->UE_mode[eNB_id]],dci_cnt);
|
||||||
#endif
|
//#endif
|
||||||
|
|
||||||
phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->dci_received += dci_cnt;
|
phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->dci_received += dci_cnt;
|
||||||
/*
|
/*
|
||||||
@@ -2103,10 +2103,10 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
|
|||||||
|
|
||||||
#ifdef DEBUG_PHY_PROC
|
#ifdef DEBUG_PHY_PROC
|
||||||
|
|
||||||
if (subframe_rx == 9) { //( frame_rx % 100 == 0) {
|
// if (subframe_rx == 9) { //( frame_rx % 100 == 0) {
|
||||||
LOG_D(PHY,"frame %d, subframe %d, rnti %x: dci %d/%d\n",frame_rx,subframe_rx,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,i,dci_cnt);
|
LOG_D(PHY,"frame %d, subframe %d, rnti %x: dci %d/%d\n",frame_rx,subframe_rx,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,i,dci_cnt);
|
||||||
//dump_dci(&phy_vars_ue->lte_frame_parms, &dci_alloc_rx[i]);
|
//dump_dci(&phy_vars_ue->lte_frame_parms, &dci_alloc_rx[i]);
|
||||||
}
|
// }
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
@@ -2446,7 +2446,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
|
|||||||
else
|
else
|
||||||
openair_daq_vars.use_ia_receiver = (openair_daq_vars.use_ia_receiver+1)%3;
|
openair_daq_vars.use_ia_receiver = (openair_daq_vars.use_ia_receiver+1)%3;
|
||||||
|
|
||||||
LOG_I(PHY,"[MYEMOS] frame %d, IA receiver %d, MCS %d, bitrate %d\n",
|
LOG_D(PHY,"[MYEMOS] frame %d, IA receiver %d, MCS %d, bitrate %d\n",
|
||||||
frame_rx,
|
frame_rx,
|
||||||
openair_daq_vars.use_ia_receiver,
|
openair_daq_vars.use_ia_receiver,
|
||||||
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[phy_vars_ue->dlsch_ue[eNB_id][0]->current_harq_pid]->mcs,
|
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[phy_vars_ue->dlsch_ue[eNB_id][0]->current_harq_pid]->mcs,
|
||||||
@@ -2624,13 +2624,13 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
|
|||||||
|
|
||||||
phy_vars_ue->dlsch_ue[eNB_id][0]->active = 0;
|
phy_vars_ue->dlsch_ue[eNB_id][0]->active = 0;
|
||||||
|
|
||||||
#ifdef DEBUG_PHY_PROC
|
//#ifdef DEBUG_PHY_PROC
|
||||||
LOG_D(PHY,"[UE %d][PDSCH %x/%d] Frame %d subframe %d Scheduling DLSCH decoding\n",
|
LOG_D(PHY,"[UE %d][PDSCH %x/%d] Frame %d subframe %d Scheduling DLSCH decoding\n",
|
||||||
phy_vars_ue->Mod_id,
|
phy_vars_ue->Mod_id,
|
||||||
phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
|
phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
|
||||||
harq_pid,
|
harq_pid,
|
||||||
(subframe_prev == 9) ? (frame_rx-1) : frame_rx,subframe_prev);
|
(subframe_prev == 9) ? (frame_rx-1) : frame_rx,subframe_prev);
|
||||||
#endif
|
//#endif
|
||||||
|
|
||||||
if (phy_vars_ue->dlsch_ue[eNB_id][0]) {
|
if (phy_vars_ue->dlsch_ue[eNB_id][0]) {
|
||||||
if (abstraction_flag == 0) {
|
if (abstraction_flag == 0) {
|
||||||
@@ -2676,17 +2676,18 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
|
|||||||
if (ret == (1+phy_vars_ue->dlsch_ue[eNB_id][0]->max_turbo_iterations)) {
|
if (ret == (1+phy_vars_ue->dlsch_ue[eNB_id][0]->max_turbo_iterations)) {
|
||||||
phy_vars_ue->dlsch_errors[eNB_id]++;
|
phy_vars_ue->dlsch_errors[eNB_id]++;
|
||||||
|
|
||||||
#ifdef DEBUG_PHY_PROC
|
//#ifdef DEBUG_PHY_PROC
|
||||||
LOG_D(PHY,"[UE %d][PDSCH %x/%d] Frame %d subframe %d DLSCH in error (rv %d,mcs %d)\n",
|
LOG_D(PHY,"[UE %d][PDSCH %x/%d] Frame %d subframe %d DLSCH in error (rv %d,mcs %d,TBS %d)\n",
|
||||||
phy_vars_ue->Mod_id,phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
|
phy_vars_ue->Mod_id,phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
|
||||||
harq_pid,frame_rx,subframe_prev,
|
harq_pid,frame_rx,subframe_prev,
|
||||||
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->rvidx,
|
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->rvidx,
|
||||||
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->mcs);
|
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->mcs,
|
||||||
|
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->TBS);
|
||||||
|
|
||||||
// if (abstraction_flag ==0 )
|
// if (abstraction_flag ==0 )
|
||||||
//dump_dlsch(phy_vars_ue,eNB_id,subframe_prev,harq_pid);
|
dump_dlsch(phy_vars_ue,eNB_id,subframe_prev,harq_pid);
|
||||||
//mac_xface->macphy_exit("");
|
mac_xface->macphy_exit("");
|
||||||
#endif
|
//#endif
|
||||||
} else {
|
} else {
|
||||||
LOG_D(PHY,"[UE %d][PDSCH %x/%d] Frame %d subframe %d (slot_rx %d): Received DLSCH (rv %d,mcs %d,TBS %d)\n",
|
LOG_D(PHY,"[UE %d][PDSCH %x/%d] Frame %d subframe %d (slot_rx %d): Received DLSCH (rv %d,mcs %d,TBS %d)\n",
|
||||||
phy_vars_ue->Mod_id,phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
|
phy_vars_ue->Mod_id,phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
|
||||||
@@ -2801,7 +2802,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
|
|||||||
frame_rx,subframe_prev);
|
frame_rx,subframe_prev);
|
||||||
|
|
||||||
#ifdef DEBUG_PHY_PROC
|
#ifdef DEBUG_PHY_PROC
|
||||||
LOG_I(PHY,"Decoding DLSCH_SI : rb_alloc %x : nb_rb %d G %d TBS %d, num_pdcch_sym %d\n",phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->rb_alloc_even[0],
|
LOG_D(PHY,"Decoding DLSCH_SI : rb_alloc %x : nb_rb %d G %d TBS %d, num_pdcch_sym %d\n",phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->rb_alloc_even[0],
|
||||||
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->nb_rb,
|
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->nb_rb,
|
||||||
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->G,
|
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->G,
|
||||||
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS,
|
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS,
|
||||||
@@ -2849,7 +2850,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
|
|||||||
if (ret == (1+phy_vars_ue->dlsch_ue_SI[eNB_id]->max_turbo_iterations)) {
|
if (ret == (1+phy_vars_ue->dlsch_ue_SI[eNB_id]->max_turbo_iterations)) {
|
||||||
phy_vars_ue->dlsch_SI_errors[eNB_id]++;
|
phy_vars_ue->dlsch_SI_errors[eNB_id]++;
|
||||||
#ifdef DEBUG_PHY_PROC
|
#ifdef DEBUG_PHY_PROC
|
||||||
LOG_I(PHY,"[UE %d] Frame %d, subframe %d, received SI in error (TBS %d, mcs %d, rvidx %d, rballoc %X.%X.%X.%X\n",
|
LOG_D(PHY,"[UE %d] Frame %d, subframe %d, received SI in error (TBS %d, mcs %d, rvidx %d, rballoc %X.%X.%X.%X\n",
|
||||||
phy_vars_ue->Mod_id,
|
phy_vars_ue->Mod_id,
|
||||||
frame_rx,
|
frame_rx,
|
||||||
subframe_prev,
|
subframe_prev,
|
||||||
@@ -3282,7 +3283,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (is_pmch_subframe((subframe_rx==9?-1:0)+frame_rx,subframe_rx,&phy_vars_ue->lte_frame_parms)) {
|
if (is_pmch_subframe((subframe_rx==9?-1:0)+frame_rx,subframe_rx,&phy_vars_ue->lte_frame_parms)) {
|
||||||
LOG_I(PHY,"ue calling pmch subframe ..\n ");
|
LOG_D(PHY,"ue calling pmch subframe ..\n ");
|
||||||
|
|
||||||
if ((slot_rx%2)==1) {
|
if ((slot_rx%2)==1) {
|
||||||
LOG_D(PHY,"[UE %d] Frame %d, subframe %d: Querying for PMCH demodulation(%d)\n",
|
LOG_D(PHY,"[UE %d] Frame %d, subframe %d: Querying for PMCH demodulation(%d)\n",
|
||||||
@@ -3430,7 +3431,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
|
|||||||
phy_vars_rn->sync_area[subframe_rx] = sync_area; // this could also go the harq data struct
|
phy_vars_rn->sync_area[subframe_rx] = sync_area; // this could also go the harq data struct
|
||||||
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->TBS = phy_vars_ue->dlsch_ue_MCH[0]->harq_processes[0]->TBS;
|
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->TBS = phy_vars_ue->dlsch_ue_MCH[0]->harq_processes[0]->TBS;
|
||||||
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->mcs = phy_vars_ue->dlsch_ue_MCH[0]->harq_processes[0]->mcs;
|
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->mcs = phy_vars_ue->dlsch_ue_MCH[0]->harq_processes[0]->mcs;
|
||||||
LOG_I(PHY,"[RN/UE %d] Frame %d subframe %d: store the MCH PDU for MBSFN sync area %d (MCS %d, TBS %d)\n",
|
LOG_D(PHY,"[RN/UE %d] Frame %d subframe %d: store the MCH PDU for MBSFN sync area %d (MCS %d, TBS %d)\n",
|
||||||
phy_vars_ue->Mod_id, frame_rx,subframe_rx,sync_area,
|
phy_vars_ue->Mod_id, frame_rx,subframe_rx,sync_area,
|
||||||
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->mcs,
|
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->mcs,
|
||||||
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->TBS>>3);
|
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->TBS>>3);
|
||||||
|
|||||||
@@ -184,15 +184,15 @@ int main(int argc, char **argv)
|
|||||||
unsigned int ret;
|
unsigned int ret;
|
||||||
unsigned int coded_bits_per_codeword=0,nsymb,dci_cnt,tbs=0;
|
unsigned int coded_bits_per_codeword=0,nsymb,dci_cnt,tbs=0;
|
||||||
|
|
||||||
unsigned int tx_lev=0,tx_lev_dB=0,trials,errs[4]= {0,0,0,0},errs2[4]= {0,0,0,0},round_trials[4]= {0,0,0,0},dci_errors=0,dlsch_active=0,num_layers;
|
unsigned int tx_lev=0,tx_lev_dB=0,trials,errs[4]= {0,0,0,0},errs2[4]= {0,0,0,0},round_trials[4]= {0,0,0,0},dci_errors=0,dlsch_active=0;//,num_layers;
|
||||||
int re_allocated;
|
int re_allocated;
|
||||||
char fname[32],vname[32];
|
char fname[32],vname[32];
|
||||||
FILE *bler_fd;
|
FILE *bler_fd;
|
||||||
char bler_fname[256];
|
char bler_fname[256];
|
||||||
FILE *time_meas_fd;
|
FILE *time_meas_fd;
|
||||||
char time_meas_fname[256];
|
char time_meas_fname[256];
|
||||||
FILE *tikz_fd;
|
// FILE *tikz_fd;
|
||||||
char tikz_fname[256];
|
// char tikz_fname[256];
|
||||||
|
|
||||||
FILE *input_trch_fd=NULL;
|
FILE *input_trch_fd=NULL;
|
||||||
unsigned char input_trch_file=0;
|
unsigned char input_trch_file=0;
|
||||||
@@ -218,7 +218,7 @@ int main(int argc, char **argv)
|
|||||||
uint8_t rx_sample_offset = 0;
|
uint8_t rx_sample_offset = 0;
|
||||||
//char stats_buffer[4096];
|
//char stats_buffer[4096];
|
||||||
//int len;
|
//int len;
|
||||||
uint8_t num_rounds = 4,fix_rounds=0;
|
uint8_t num_rounds = 4;//,fix_rounds=0;
|
||||||
uint8_t subframe=7;
|
uint8_t subframe=7;
|
||||||
int u;
|
int u;
|
||||||
int n=0;
|
int n=0;
|
||||||
@@ -232,8 +232,8 @@ int main(int argc, char **argv)
|
|||||||
|
|
||||||
// void *data;
|
// void *data;
|
||||||
// int ii;
|
// int ii;
|
||||||
int bler;
|
// int bler;
|
||||||
double blerr[4],uncoded_ber,avg_ber;
|
double blerr[4],uncoded_ber;//,avg_ber;
|
||||||
short *uncoded_ber_bit=NULL;
|
short *uncoded_ber_bit=NULL;
|
||||||
uint8_t N_RB_DL=25,osf=1;
|
uint8_t N_RB_DL=25,osf=1;
|
||||||
frame_t frame_type = FDD;
|
frame_t frame_type = FDD;
|
||||||
@@ -248,7 +248,7 @@ int main(int argc, char **argv)
|
|||||||
int common_flag=0,TPC=0;
|
int common_flag=0,TPC=0;
|
||||||
|
|
||||||
double cpu_freq_GHz;
|
double cpu_freq_GHz;
|
||||||
time_stats_t ts;//,sts,usts;
|
// time_stats_t ts;//,sts,usts;
|
||||||
int avg_iter,iter_trials;
|
int avg_iter,iter_trials;
|
||||||
int rballocset=0;
|
int rballocset=0;
|
||||||
int print_perf=0;
|
int print_perf=0;
|
||||||
@@ -262,17 +262,24 @@ int main(int argc, char **argv)
|
|||||||
int TB0_active = 1;
|
int TB0_active = 1;
|
||||||
uint32_t perfect_ce = 0;
|
uint32_t perfect_ce = 0;
|
||||||
|
|
||||||
LTE_DL_UE_HARQ_t *dlsch0_ue_harq;
|
// LTE_DL_UE_HARQ_t *dlsch0_ue_harq;
|
||||||
LTE_DL_eNB_HARQ_t *dlsch0_eNB_harq;
|
// LTE_DL_eNB_HARQ_t *dlsch0_eNB_harq;
|
||||||
uint8_t Kmimo;
|
uint8_t Kmimo;
|
||||||
FILE *proc_fd = NULL;
|
uint8_t ue_category=4;
|
||||||
char buf[64];
|
uint32_t Nsoft;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
int CCE_table[800];
|
||||||
|
|
||||||
int threequarter_fs=0;
|
int threequarter_fs=0;
|
||||||
|
|
||||||
opp_enabled=1; // to enable the time meas
|
opp_enabled=1; // to enable the time meas
|
||||||
|
|
||||||
#if defined(__arm__)
|
#if defined(__arm__)
|
||||||
|
FILE *proc_fd = NULL;
|
||||||
|
char buf[64];
|
||||||
|
|
||||||
proc_fd = fopen("/sys/devices/system/cpu/cpu4/cpufreq/cpuinfo_cur_freq", "r");
|
proc_fd = fopen("/sys/devices/system/cpu/cpu4/cpufreq/cpuinfo_cur_freq", "r");
|
||||||
if(!proc_fd)
|
if(!proc_fd)
|
||||||
printf("cannot open /sys/devices/system/cpu/cpu4/cpufreq/cpuinfo_cur_freq");
|
printf("cannot open /sys/devices/system/cpu/cpu4/cpufreq/cpuinfo_cur_freq");
|
||||||
@@ -295,7 +302,7 @@ int main(int argc, char **argv)
|
|||||||
// default parameters
|
// default parameters
|
||||||
n_frames = 1000;
|
n_frames = 1000;
|
||||||
snr0 = 0;
|
snr0 = 0;
|
||||||
num_layers = 1;
|
// num_layers = 1;
|
||||||
perfect_ce = 0;
|
perfect_ce = 0;
|
||||||
|
|
||||||
while ((c = getopt (argc, argv, "ahdpZDe:Em:n:o:s:f:t:c:g:r:F:x:y:z:AM:N:I:i:O:R:S:C:T:b:u:v:w:B:PLl:Y")) != -1) {
|
while ((c = getopt (argc, argv, "ahdpZDe:Em:n:o:s:f:t:c:g:r:F:x:y:z:AM:N:I:i:O:R:S:C:T:b:u:v:w:B:PLl:Y")) != -1) {
|
||||||
@@ -478,14 +485,12 @@ int main(int argc, char **argv)
|
|||||||
case 'N':
|
case 'N':
|
||||||
channel_model=AWGN;
|
channel_model=AWGN;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
msg("Unsupported channel model!\n");
|
msg("Unsupported channel model!\n");
|
||||||
exit(-1);
|
exit(-1);
|
||||||
}
|
}
|
||||||
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 'R':
|
case 'R':
|
||||||
num_rounds=atoi(optarg);
|
num_rounds=atoi(optarg);
|
||||||
break;
|
break;
|
||||||
@@ -915,10 +920,27 @@ int main(int argc, char **argv)
|
|||||||
else
|
else
|
||||||
Kmimo=1;
|
Kmimo=1;
|
||||||
|
|
||||||
|
switch (ue_category) {
|
||||||
|
case 1:
|
||||||
|
Nsoft = 250368;
|
||||||
|
break;
|
||||||
|
case 2:
|
||||||
|
case 3:
|
||||||
|
Nsoft = 1237248;
|
||||||
|
break;
|
||||||
|
case 4:
|
||||||
|
Nsoft = 1827072;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
printf("Unsupported UE category %d\n",ue_category);
|
||||||
|
exit(-1);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
for (k=0; k<n_users; k++) {
|
for (k=0; k<n_users; k++) {
|
||||||
// Create transport channel structures for 2 transport blocks (MIMO)
|
// Create transport channel structures for 2 transport blocks (MIMO)
|
||||||
for (i=0; i<2; i++) {
|
for (i=0; i<2; i++) {
|
||||||
PHY_vars_eNB->dlsch_eNB[k][i] = new_eNB_dlsch(Kmimo,8,N_RB_DL,0);
|
PHY_vars_eNB->dlsch_eNB[k][i] = new_eNB_dlsch(Kmimo,8,Nsoft,N_RB_DL,0);
|
||||||
|
|
||||||
if (!PHY_vars_eNB->dlsch_eNB[k][i]) {
|
if (!PHY_vars_eNB->dlsch_eNB[k][i]) {
|
||||||
printf("Can't get eNB dlsch structures\n");
|
printf("Can't get eNB dlsch structures\n");
|
||||||
@@ -930,7 +952,7 @@ int main(int argc, char **argv)
|
|||||||
}
|
}
|
||||||
|
|
||||||
for (i=0; i<2; i++) {
|
for (i=0; i<2; i++) {
|
||||||
PHY_vars_UE->dlsch_ue[0][i] = new_ue_dlsch(Kmimo,8,MAX_TURBO_ITERATIONS,N_RB_DL,0);
|
PHY_vars_UE->dlsch_ue[0][i] = new_ue_dlsch(Kmimo,8,Nsoft,MAX_TURBO_ITERATIONS,N_RB_DL,0);
|
||||||
|
|
||||||
if (!PHY_vars_UE->dlsch_ue[0][i]) {
|
if (!PHY_vars_UE->dlsch_ue[0][i]) {
|
||||||
printf("Can't get ue dlsch structures\n");
|
printf("Can't get ue dlsch structures\n");
|
||||||
@@ -941,7 +963,7 @@ int main(int argc, char **argv)
|
|||||||
}
|
}
|
||||||
|
|
||||||
// structure for SIC at UE
|
// structure for SIC at UE
|
||||||
PHY_vars_UE->dlsch_eNB[0] = new_eNB_dlsch(Kmimo,8,N_RB_DL,0);
|
PHY_vars_UE->dlsch_eNB[0] = new_eNB_dlsch(Kmimo,8,Nsoft,N_RB_DL,0);
|
||||||
|
|
||||||
if (DLSCH_alloc_pdu2_1E[0].tpmi == 5) {
|
if (DLSCH_alloc_pdu2_1E[0].tpmi == 5) {
|
||||||
|
|
||||||
@@ -1228,7 +1250,7 @@ int main(int argc, char **argv)
|
|||||||
dci_alloc[num_dci].L = 1;
|
dci_alloc[num_dci].L = 1;
|
||||||
dci_alloc[num_dci].rnti = SI_RNTI;
|
dci_alloc[num_dci].rnti = SI_RNTI;
|
||||||
dci_alloc[num_dci].format = format1A;
|
dci_alloc[num_dci].format = format1A;
|
||||||
dci_alloc[num_dci].nCCE = 0;
|
dci_alloc[num_dci].firstCCE = 0;
|
||||||
dump_dci(&PHY_vars_eNB->lte_frame_parms,&dci_alloc[num_dci]);
|
dump_dci(&PHY_vars_eNB->lte_frame_parms,&dci_alloc[num_dci]);
|
||||||
|
|
||||||
printf("Generating dlsch params for user %d\n",k);
|
printf("Generating dlsch params for user %d\n",k);
|
||||||
@@ -1535,7 +1557,7 @@ int main(int argc, char **argv)
|
|||||||
dci_alloc[num_dci].L = 1;
|
dci_alloc[num_dci].L = 1;
|
||||||
dci_alloc[num_dci].rnti = SI_RNTI;
|
dci_alloc[num_dci].rnti = SI_RNTI;
|
||||||
dci_alloc[num_dci].format = format1A;
|
dci_alloc[num_dci].format = format1A;
|
||||||
dci_alloc[num_dci].nCCE = 0;
|
dci_alloc[num_dci].firstCCE = 0;
|
||||||
dump_dci(&PHY_vars_eNB->lte_frame_parms,&dci_alloc[num_dci]);
|
dump_dci(&PHY_vars_eNB->lte_frame_parms,&dci_alloc[num_dci]);
|
||||||
|
|
||||||
printf("Generating dlsch params for user %d\n",k);
|
printf("Generating dlsch params for user %d\n",k);
|
||||||
@@ -1843,7 +1865,7 @@ int main(int argc, char **argv)
|
|||||||
dci_alloc[num_dci].L = 1;
|
dci_alloc[num_dci].L = 1;
|
||||||
dci_alloc[num_dci].rnti = SI_RNTI;
|
dci_alloc[num_dci].rnti = SI_RNTI;
|
||||||
dci_alloc[num_dci].format = format1A;
|
dci_alloc[num_dci].format = format1A;
|
||||||
dci_alloc[num_dci].nCCE = 0;
|
dci_alloc[num_dci].firstCCE = 0;
|
||||||
dump_dci(&PHY_vars_eNB->lte_frame_parms,&dci_alloc[num_dci]);
|
dump_dci(&PHY_vars_eNB->lte_frame_parms,&dci_alloc[num_dci]);
|
||||||
|
|
||||||
printf("Generating dlsch params for user %d\n",k);
|
printf("Generating dlsch params for user %d\n",k);
|
||||||
@@ -1874,7 +1896,7 @@ int main(int argc, char **argv)
|
|||||||
dci_alloc[num_dci].L = 1;
|
dci_alloc[num_dci].L = 1;
|
||||||
dci_alloc[num_dci].rnti = n_rnti+k;
|
dci_alloc[num_dci].rnti = n_rnti+k;
|
||||||
dci_alloc[num_dci].format = format1E_2A_M10PRB;
|
dci_alloc[num_dci].format = format1E_2A_M10PRB;
|
||||||
dci_alloc[num_dci].nCCE = 4*k;
|
dci_alloc[num_dci].firstCCE = 4*k;
|
||||||
printf("Generating dlsch params for user %d\n",k);
|
printf("Generating dlsch params for user %d\n",k);
|
||||||
generate_eNB_dlsch_params_from_dci(0,
|
generate_eNB_dlsch_params_from_dci(0,
|
||||||
subframe,
|
subframe,
|
||||||
@@ -1919,17 +1941,20 @@ int main(int argc, char **argv)
|
|||||||
if (n_frames==1) printf("%d\n",numCCE);
|
if (n_frames==1) printf("%d\n",numCCE);
|
||||||
|
|
||||||
// apply RNTI-based nCCE allocation
|
// apply RNTI-based nCCE allocation
|
||||||
|
memset(CCE_table,0,800*sizeof(int));
|
||||||
|
|
||||||
for (i=num_common_dci; i<num_dci; i++) {
|
for (i=num_common_dci; i<num_dci; i++) {
|
||||||
|
|
||||||
dci_alloc[i].nCCE = get_nCCE_offset(1<<dci_alloc[i].L,
|
dci_alloc[i].firstCCE = get_nCCE_offset_l1(CCE_table,
|
||||||
numCCE,
|
1<<dci_alloc[i].L,
|
||||||
(dci_alloc[i].rnti==SI_RNTI)? 1 : 0,
|
numCCE,
|
||||||
dci_alloc[i].rnti,
|
(dci_alloc[i].rnti==SI_RNTI)? 1 : 0,
|
||||||
subframe);
|
dci_alloc[i].rnti,
|
||||||
|
subframe);
|
||||||
|
|
||||||
if (n_frames==1)
|
if (n_frames==1)
|
||||||
printf("dci %d: rnti %x, format %d : nCCE %d/%d\n",i,dci_alloc[i].rnti, dci_alloc[i].format,
|
printf("dci %d: rnti %x, format %d : nCCE %d/%d\n",i,dci_alloc[i].rnti, dci_alloc[i].format,
|
||||||
dci_alloc[i].nCCE,numCCE);
|
dci_alloc[i].firstCCE,numCCE);
|
||||||
}
|
}
|
||||||
|
|
||||||
for (k=0; k<n_users; k++) {
|
for (k=0; k<n_users; k++) {
|
||||||
@@ -2012,7 +2037,7 @@ int main(int argc, char **argv)
|
|||||||
round_trials[3] = 0;
|
round_trials[3] = 0;
|
||||||
|
|
||||||
dci_errors=0;
|
dci_errors=0;
|
||||||
avg_ber = 0;
|
// avg_ber = 0;
|
||||||
|
|
||||||
round=0;
|
round=0;
|
||||||
avg_iter = 0;
|
avg_iter = 0;
|
||||||
|
|||||||
@@ -56,15 +56,15 @@ PHY_VARS_UE *PHY_vars_UE;
|
|||||||
|
|
||||||
#define UL_RB_ALLOC 0x1ff;
|
#define UL_RB_ALLOC 0x1ff;
|
||||||
#define CCCH_RB_ALLOC computeRIV(PHY_vars_eNB->lte_frame_parms.N_RB_UL,0,2)
|
#define CCCH_RB_ALLOC computeRIV(PHY_vars_eNB->lte_frame_parms.N_RB_UL,0,2)
|
||||||
#define DLSCH_RB_ALLOC 0x1fbf // igore DC component,RB13
|
#define DLSCH_RB_ALLOC ((uint16_t)0x1fbf) // igore DC component,RB13
|
||||||
|
|
||||||
DCI_PDU DCI_pdu;
|
DCI_PDU DCI_pdu;
|
||||||
|
|
||||||
DCI_PDU *get_dci(LTE_DL_FRAME_PARMS *lte_frame_parms,uint8_t log2L, uint8_t log2Lcommon, uint8_t format_selector, uint32_t rnti)
|
DCI_PDU *get_dci(LTE_DL_FRAME_PARMS *lte_frame_parms,uint8_t log2L, uint8_t log2Lcommon, uint8_t format_selector, uint32_t rnti)
|
||||||
{
|
{
|
||||||
uint8_t BCCH_alloc_pdu[8];
|
uint32_t BCCH_alloc_pdu[2];
|
||||||
uint8_t DLSCH_alloc_pdu[8];
|
uint32_t DLSCH_alloc_pdu[2];
|
||||||
uint8_t UL_alloc_pdu[8];
|
uint32_t UL_alloc_pdu[2];
|
||||||
|
|
||||||
int i;
|
int i;
|
||||||
int dci_length_bytes,dci_length;
|
int dci_length_bytes,dci_length;
|
||||||
@@ -370,25 +370,29 @@ DCI_PDU *get_dci(LTE_DL_FRAME_PARMS *lte_frame_parms,uint8_t log2L, uint8_t log2
|
|||||||
DCI_pdu.dci_alloc[0].ra_flag = 0;
|
DCI_pdu.dci_alloc[0].ra_flag = 0;
|
||||||
memcpy((void*)&DCI_pdu.dci_alloc[0].dci_pdu[0], &BCCH_alloc_pdu[0], BCCH_pdu_size_bytes);
|
memcpy((void*)&DCI_pdu.dci_alloc[0].dci_pdu[0], &BCCH_alloc_pdu[0], BCCH_pdu_size_bytes);
|
||||||
DCI_pdu.Num_common_dci++;
|
DCI_pdu.Num_common_dci++;
|
||||||
/*
|
if (lte_frame_parms->N_RB_DL >= 25) {
|
||||||
// add ue specific dci
|
// add ue specific dci
|
||||||
DCI_pdu.dci_alloc[1].dci_length = dci_length;
|
DCI_pdu.dci_alloc[1].dci_length = dci_length;
|
||||||
DCI_pdu.dci_alloc[1].L = log2L;
|
DCI_pdu.dci_alloc[1].L = log2L;
|
||||||
DCI_pdu.dci_alloc[1].rnti = rnti;
|
DCI_pdu.dci_alloc[1].rnti = rnti;
|
||||||
DCI_pdu.dci_alloc[1].format = format1;
|
DCI_pdu.dci_alloc[1].format = format1;
|
||||||
DCI_pdu.dci_alloc[1].ra_flag = 0;
|
DCI_pdu.dci_alloc[1].ra_flag = 0;
|
||||||
memcpy((void*)&DCI_pdu.dci_alloc[1].dci_pdu[0], &DLSCH_alloc_pdu[0], dci_length_bytes);
|
memcpy((void*)&DCI_pdu.dci_alloc[1].dci_pdu[0], &DLSCH_alloc_pdu[0], dci_length_bytes);
|
||||||
DCI_pdu.Num_ue_spec_dci++;
|
DCI_pdu.Num_ue_spec_dci++;
|
||||||
|
|
||||||
|
if (lte_frame_parms->N_RB_DL >= 50) {
|
||||||
|
DCI_pdu.dci_alloc[2].dci_length = UL_pdu_size_bits;
|
||||||
|
DCI_pdu.dci_alloc[2].L = log2L;
|
||||||
|
DCI_pdu.dci_alloc[2].rnti = rnti;
|
||||||
|
DCI_pdu.dci_alloc[2].format = format0;
|
||||||
|
DCI_pdu.dci_alloc[2].ra_flag = 0;
|
||||||
|
memcpy((void*)&DCI_pdu.dci_alloc[0].dci_pdu[0], &UL_alloc_pdu[0], UL_pdu_size_bytes);
|
||||||
|
DCI_pdu.Num_ue_spec_dci++;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
DCI_pdu.dci_alloc[0].dci_length = UL_pdu_size_bits;
|
|
||||||
DCI_pdu.dci_alloc[0].L = log2L;
|
|
||||||
DCI_pdu.dci_alloc[0].rnti = rnti;
|
|
||||||
DCI_pdu.dci_alloc[0].format = format0;
|
|
||||||
DCI_pdu.dci_alloc[0].ra_flag = 0;
|
|
||||||
memcpy((void*)&DCI_pdu.dci_alloc[0].dci_pdu[0], &UL_alloc_pdu[0], UL_pdu_size_bytes);
|
|
||||||
DCI_pdu.Num_ue_spec_dci++;
|
|
||||||
*/
|
|
||||||
DCI_pdu.nCCE = 0;
|
DCI_pdu.nCCE = 0;
|
||||||
|
|
||||||
for (i=0; i<DCI_pdu.Num_common_dci+DCI_pdu.Num_ue_spec_dci; i++) {
|
for (i=0; i<DCI_pdu.Num_common_dci+DCI_pdu.Num_ue_spec_dci; i++) {
|
||||||
@@ -431,10 +435,8 @@ int main(int argc, char **argv)
|
|||||||
uint8_t dci_cnt=0;
|
uint8_t dci_cnt=0;
|
||||||
LTE_DL_FRAME_PARMS *frame_parms;
|
LTE_DL_FRAME_PARMS *frame_parms;
|
||||||
uint8_t log2L=2, log2Lcommon=2, format_selector=0;
|
uint8_t log2L=2, log2Lcommon=2, format_selector=0;
|
||||||
uint8_t numCCE,nCCE_max,common_active=0,ul_active=0,dl_active=0;
|
uint8_t numCCE,common_active=0,ul_active=0,dl_active=0;
|
||||||
uint32_t rv;
|
|
||||||
|
|
||||||
DCI_format_t format = format1;
|
|
||||||
uint32_t n_trials_common=0,n_trials_ul=0,n_trials_dl=0,false_detection_cnt=0;
|
uint32_t n_trials_common=0,n_trials_ul=0,n_trials_dl=0,false_detection_cnt=0;
|
||||||
uint8_t common_rx,ul_rx,dl_rx;
|
uint8_t common_rx,ul_rx,dl_rx;
|
||||||
uint8_t tdd_config=3;
|
uint8_t tdd_config=3;
|
||||||
@@ -448,19 +450,19 @@ int main(int argc, char **argv)
|
|||||||
|
|
||||||
DCI_ALLOC_t dci_alloc_rx[8];
|
DCI_ALLOC_t dci_alloc_rx[8];
|
||||||
|
|
||||||
void* dlsch_pdu = NULL;
|
int ret;
|
||||||
// int ret;
|
|
||||||
|
|
||||||
uint8_t harq_pid;
|
uint8_t harq_pid;
|
||||||
uint8_t phich_ACK;
|
uint8_t phich_ACK;
|
||||||
|
|
||||||
uint8_t num_phich_interf = 0;
|
uint8_t num_phich_interf = 0;
|
||||||
lte_frame_type_t frame_type=TDD;
|
lte_frame_type_t frame_type=TDD;
|
||||||
int re_offset;
|
// int re_offset;
|
||||||
uint32_t *txptr;
|
// uint32_t *txptr;
|
||||||
int aarx;
|
int aarx;
|
||||||
int k;
|
int k;
|
||||||
uint32_t perfect_ce = 0;
|
uint32_t perfect_ce = 0;
|
||||||
|
int CCE_table[800];
|
||||||
|
|
||||||
number_of_cards = 1;
|
number_of_cards = 1;
|
||||||
openair_daq_vars.rx_rf_mode = 1;
|
openair_daq_vars.rx_rf_mode = 1;
|
||||||
@@ -785,7 +787,7 @@ int main(int argc, char **argv)
|
|||||||
i=0;
|
i=0;
|
||||||
|
|
||||||
while (!feof(input_fd)) {
|
while (!feof(input_fd)) {
|
||||||
fscanf(input_fd,"%s %s",input_val_str,input_val_str2);//&input_val1,&input_val2);
|
ret=fscanf(input_fd,"%s %s",input_val_str,input_val_str2);//&input_val1,&input_val2);
|
||||||
|
|
||||||
if ((i%4)==0) {
|
if ((i%4)==0) {
|
||||||
((short*)txdata[0])[i/2] = (short)((1<<15)*strtod(input_val_str,NULL));
|
((short*)txdata[0])[i/2] = (short)((1<<15)*strtod(input_val_str,NULL));
|
||||||
@@ -812,7 +814,7 @@ int main(int argc, char **argv)
|
|||||||
|
|
||||||
PHY_vars_UE->UE_mode[0] = PUSCH;
|
PHY_vars_UE->UE_mode[0] = PUSCH;
|
||||||
|
|
||||||
nCCE_max = get_nCCE(3,&PHY_vars_eNB->lte_frame_parms,get_mi(&PHY_vars_eNB->lte_frame_parms,0));
|
// nCCE_max = get_nCCE(3,&PHY_vars_eNB->lte_frame_parms,get_mi(&PHY_vars_eNB->lte_frame_parms,0));
|
||||||
//printf("nCCE_max %d\n",nCCE_max);
|
//printf("nCCE_max %d\n",nCCE_max);
|
||||||
|
|
||||||
//printf("num_phich interferers %d\n",num_phich_interf);
|
//printf("num_phich interferers %d\n",num_phich_interf);
|
||||||
@@ -864,55 +866,62 @@ int main(int argc, char **argv)
|
|||||||
numCCE=0;
|
numCCE=0;
|
||||||
n_trials_common++;
|
n_trials_common++;
|
||||||
common_active = 1;
|
common_active = 1;
|
||||||
n_trials_ul++;
|
if (PHY_vars_eNB->lte_frame_parms.N_RB_DL >= 50) {
|
||||||
ul_active = 1;
|
n_trials_ul++;
|
||||||
n_trials_dl++;
|
ul_active = 1;
|
||||||
dl_active = 1;
|
}
|
||||||
|
if (PHY_vars_eNB->lte_frame_parms.N_RB_DL >= 25) {
|
||||||
|
n_trials_dl++;
|
||||||
|
dl_active = 1;
|
||||||
|
}
|
||||||
|
|
||||||
init_nCCE_table();
|
|
||||||
num_pdcch_symbols = get_num_pdcch_symbols(DCI_pdu.Num_common_dci+DCI_pdu.Num_ue_spec_dci,
|
num_pdcch_symbols = get_num_pdcch_symbols(DCI_pdu.Num_common_dci+DCI_pdu.Num_ue_spec_dci,
|
||||||
DCI_pdu.dci_alloc, frame_parms, subframe);
|
DCI_pdu.dci_alloc, frame_parms, subframe);
|
||||||
DCI_pdu.nCCE = get_nCCE(num_pdcch_symbols,&PHY_vars_eNB->lte_frame_parms,get_mi(&PHY_vars_eNB->lte_frame_parms,subframe));
|
numCCE = get_nCCE(num_pdcch_symbols,&PHY_vars_eNB->lte_frame_parms,get_mi(&PHY_vars_eNB->lte_frame_parms,subframe));
|
||||||
|
|
||||||
if (n_frames==1) {
|
if (n_frames==1) {
|
||||||
printf("num_dci %d, num_pddch_symbols %d, nCCE %d\n",
|
printf("num_dci %d, num_pddch_symbols %d, nCCE %d\n",
|
||||||
DCI_pdu.Num_common_dci+DCI_pdu.Num_ue_spec_dci,
|
DCI_pdu.Num_common_dci+DCI_pdu.Num_ue_spec_dci,
|
||||||
num_pdcch_symbols,
|
num_pdcch_symbols,numCCE);
|
||||||
DCI_pdu.nCCE);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
// apply RNTI-based nCCE allocation
|
// apply RNTI-based nCCE allocation
|
||||||
|
memset(CCE_table,0,800*sizeof(int));
|
||||||
|
|
||||||
for (i = 0; i < DCI_pdu.Num_common_dci + DCI_pdu.Num_ue_spec_dci; i++) {
|
for (i = 0; i < DCI_pdu.Num_common_dci + DCI_pdu.Num_ue_spec_dci; i++) {
|
||||||
// SI RNTI
|
// SI RNTI
|
||||||
if (DCI_pdu.dci_alloc[i].rnti == SI_RNTI) {
|
if (DCI_pdu.dci_alloc[i].rnti == SI_RNTI) {
|
||||||
DCI_pdu.dci_alloc[i].nCCE = get_nCCE_offset(1<<DCI_pdu.dci_alloc[i].L,
|
DCI_pdu.dci_alloc[i].firstCCE = get_nCCE_offset_l1(CCE_table,
|
||||||
DCI_pdu.nCCE,
|
1<<DCI_pdu.dci_alloc[i].L,
|
||||||
1,
|
numCCE,
|
||||||
SI_RNTI,
|
1,
|
||||||
subframe);
|
SI_RNTI,
|
||||||
|
subframe);
|
||||||
}
|
}
|
||||||
// RA RNTI
|
// RA RNTI
|
||||||
else if (DCI_pdu.dci_alloc[i].ra_flag == 1) {
|
else if (DCI_pdu.dci_alloc[i].ra_flag == 1) {
|
||||||
DCI_pdu.dci_alloc[i].nCCE = get_nCCE_offset(1<<DCI_pdu.dci_alloc[i].L,
|
DCI_pdu.dci_alloc[i].firstCCE = get_nCCE_offset_l1(CCE_table,
|
||||||
DCI_pdu.nCCE,
|
1<<DCI_pdu.dci_alloc[i].L,
|
||||||
1,
|
numCCE,
|
||||||
DCI_pdu.dci_alloc[i].rnti,
|
1,
|
||||||
subframe);
|
DCI_pdu.dci_alloc[i].rnti,
|
||||||
|
subframe);
|
||||||
}
|
}
|
||||||
// C RNTI
|
// C RNTI
|
||||||
else {
|
else {
|
||||||
DCI_pdu.dci_alloc[i].nCCE = get_nCCE_offset(1<<DCI_pdu.dci_alloc[i].L,
|
DCI_pdu.dci_alloc[i].firstCCE = get_nCCE_offset_l1(CCE_table,
|
||||||
DCI_pdu.nCCE,
|
1<<DCI_pdu.dci_alloc[i].L,
|
||||||
0,
|
numCCE,
|
||||||
DCI_pdu.dci_alloc[i].rnti,
|
0,
|
||||||
subframe);
|
DCI_pdu.dci_alloc[i].rnti,
|
||||||
|
subframe);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (n_frames==1)
|
if (n_frames==1)
|
||||||
printf("dci %d: rnti 0x%x, format %d, L %d, nCCE %d/%d dci_length %d\n",i,DCI_pdu.dci_alloc[i].rnti, DCI_pdu.dci_alloc[i].format,
|
printf("dci %d: rnti 0x%x, format %d, L %d, nCCE %d/%d dci_length %d\n",i,DCI_pdu.dci_alloc[i].rnti, DCI_pdu.dci_alloc[i].format,
|
||||||
DCI_pdu.dci_alloc[i].L, DCI_pdu.dci_alloc[i].nCCE, DCI_pdu.nCCE, DCI_pdu.dci_alloc[i].dci_length);
|
DCI_pdu.dci_alloc[i].L, DCI_pdu.dci_alloc[i].firstCCE, numCCE, DCI_pdu.dci_alloc[i].dci_length);
|
||||||
|
|
||||||
if (DCI_pdu.dci_alloc[i].nCCE==-1)
|
if (DCI_pdu.dci_alloc[i].firstCCE==-1)
|
||||||
exit(-1);
|
exit(-1);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -946,7 +955,7 @@ int main(int argc, char **argv)
|
|||||||
|
|
||||||
generate_phich_top(PHY_vars_eNB,
|
generate_phich_top(PHY_vars_eNB,
|
||||||
subframe,AMP,0,0);
|
subframe,AMP,0,0);
|
||||||
/*
|
|
||||||
// generate 3 interfering PHICH
|
// generate 3 interfering PHICH
|
||||||
if (num_phich_interf>0) {
|
if (num_phich_interf>0) {
|
||||||
PHY_vars_eNB->ulsch_eNB[0]->harq_processes[harq_pid]->first_rb = 4;
|
PHY_vars_eNB->ulsch_eNB[0]->harq_processes[harq_pid]->first_rb = 4;
|
||||||
@@ -973,7 +982,7 @@ int main(int argc, char **argv)
|
|||||||
}
|
}
|
||||||
|
|
||||||
PHY_vars_eNB->ulsch_eNB[0]->harq_processes[harq_pid]->first_rb = 0;
|
PHY_vars_eNB->ulsch_eNB[0]->harq_processes[harq_pid]->first_rb = 0;
|
||||||
*/
|
|
||||||
}
|
}
|
||||||
|
|
||||||
// write_output("pilotsF.m","rsF",txdataF[0],lte_PHY_vars_eNB->lte_frame_parms.ofdm_symbol_size,1,1);
|
// write_output("pilotsF.m","rsF",txdataF[0],lte_PHY_vars_eNB->lte_frame_parms.ofdm_symbol_size,1,1);
|
||||||
@@ -1153,7 +1162,7 @@ int main(int argc, char **argv)
|
|||||||
|
|
||||||
for (i = 0; i < dci_cnt; i++)
|
for (i = 0; i < dci_cnt; i++)
|
||||||
printf("dci %d: rnti 0x%x, format %d, L %d, nCCE %d/%d dci_length %d\n",i, dci_alloc_rx[i].rnti, dci_alloc_rx[i].format,
|
printf("dci %d: rnti 0x%x, format %d, L %d, nCCE %d/%d dci_length %d\n",i, dci_alloc_rx[i].rnti, dci_alloc_rx[i].format,
|
||||||
dci_alloc_rx[i].L, dci_alloc_rx[i].nCCE, numCCE, dci_alloc_rx[i].dci_length);
|
dci_alloc_rx[i].L, dci_alloc_rx[i].firstCCE, numCCE, dci_alloc_rx[i].dci_length);
|
||||||
}
|
}
|
||||||
|
|
||||||
for (i=0; i<dci_cnt; i++) {
|
for (i=0; i<dci_cnt; i++) {
|
||||||
@@ -1228,8 +1237,8 @@ int main(int argc, char **argv)
|
|||||||
} //trials
|
} //trials
|
||||||
|
|
||||||
printf("SNR %f : n_errors_common = %d/%d (%e)\n", SNR,n_errors_common,n_trials_common,(double)n_errors_common/n_trials_common);
|
printf("SNR %f : n_errors_common = %d/%d (%e)\n", SNR,n_errors_common,n_trials_common,(double)n_errors_common/n_trials_common);
|
||||||
printf("SNR %f : n_errors_ul = %d/%d (%e)\n", SNR,n_errors_ul,n_trials_ul,(double)n_errors_ul/n_trials_ul);
|
if (ul_active==1) printf("SNR %f : n_errors_ul = %d/%d (%e)\n", SNR,n_errors_ul,n_trials_ul,(double)n_errors_ul/n_trials_ul);
|
||||||
printf("SNR %f : n_errors_dl = %d/%d (%e)\n", SNR,n_errors_dl,n_trials_dl,(double)n_errors_dl/n_trials_dl);
|
if (dl_active==1) printf("SNR %f : n_errors_dl = %d/%d (%e)\n", SNR,n_errors_dl,n_trials_dl,(double)n_errors_dl/n_trials_dl);
|
||||||
printf("SNR %f : n_errors_cfi = %d/%d (%e)\n", SNR,n_errors_cfi,trial,(double)n_errors_cfi/trial);
|
printf("SNR %f : n_errors_cfi = %d/%d (%e)\n", SNR,n_errors_cfi,trial,(double)n_errors_cfi/trial);
|
||||||
printf("SNR %f : n_errors_hi = %d/%d (%e)\n", SNR,n_errors_hi,trial,(double)n_errors_hi/trial);
|
printf("SNR %f : n_errors_hi = %d/%d (%e)\n", SNR,n_errors_hi,trial,(double)n_errors_hi/trial);
|
||||||
|
|
||||||
|
|||||||
@@ -192,7 +192,7 @@ int main(int argc, char **argv)
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
msg("Unsupported channel model!\n");
|
printf("Unsupported channel model!\n");
|
||||||
exit(-1);
|
exit(-1);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -204,13 +204,13 @@ int main(int argc, char **argv)
|
|||||||
|
|
||||||
case 's':
|
case 's':
|
||||||
snr0 = atof(optarg);
|
snr0 = atof(optarg);
|
||||||
msg("Setting SNR0 to %f\n",snr0);
|
printf("Setting SNR0 to %f\n",snr0);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 'S':
|
case 'S':
|
||||||
snr1 = atof(optarg);
|
snr1 = atof(optarg);
|
||||||
snr1set=1;
|
snr1set=1;
|
||||||
msg("Setting SNR1 to %f\n",snr1);
|
printf("Setting SNR1 to %f\n",snr1);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 'p':
|
case 'p':
|
||||||
@@ -233,7 +233,7 @@ int main(int argc, char **argv)
|
|||||||
if ((transmission_mode!=1) &&
|
if ((transmission_mode!=1) &&
|
||||||
(transmission_mode!=2) &&
|
(transmission_mode!=2) &&
|
||||||
(transmission_mode!=6)) {
|
(transmission_mode!=6)) {
|
||||||
msg("Unsupported transmission mode %d\n",transmission_mode);
|
printf("Unsupported transmission mode %d\n",transmission_mode);
|
||||||
exit(-1);
|
exit(-1);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -243,7 +243,7 @@ int main(int argc, char **argv)
|
|||||||
n_tx=atoi(optarg);
|
n_tx=atoi(optarg);
|
||||||
|
|
||||||
if ((n_tx==0) || (n_tx>2)) {
|
if ((n_tx==0) || (n_tx>2)) {
|
||||||
msg("Unsupported number of tx antennas %d\n",n_tx);
|
printf("Unsupported number of tx antennas %d\n",n_tx);
|
||||||
exit(-1);
|
exit(-1);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -253,7 +253,7 @@ int main(int argc, char **argv)
|
|||||||
n_rx=atoi(optarg);
|
n_rx=atoi(optarg);
|
||||||
|
|
||||||
if ((n_rx==0) || (n_rx>2)) {
|
if ((n_rx==0) || (n_rx>2)) {
|
||||||
msg("Unsupported number of rx antennas %d\n",n_rx);
|
printf("Unsupported number of rx antennas %d\n",n_rx);
|
||||||
exit(-1);
|
exit(-1);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -367,7 +367,7 @@ int main(int argc, char **argv)
|
|||||||
|
|
||||||
|
|
||||||
|
|
||||||
msg("[SIM] Using SCM/101\n");
|
printf("[SIM] Using SCM/101\n");
|
||||||
UE2eNB = new_channel_desc_scm(PHY_vars_eNB->lte_frame_parms.nb_antennas_tx,
|
UE2eNB = new_channel_desc_scm(PHY_vars_eNB->lte_frame_parms.nb_antennas_tx,
|
||||||
PHY_vars_UE->lte_frame_parms.nb_antennas_rx,
|
PHY_vars_UE->lte_frame_parms.nb_antennas_rx,
|
||||||
channel_model,
|
channel_model,
|
||||||
@@ -379,7 +379,7 @@ int main(int argc, char **argv)
|
|||||||
|
|
||||||
|
|
||||||
if (UE2eNB==NULL) {
|
if (UE2eNB==NULL) {
|
||||||
msg("Problem generating channel model. Exiting.\n");
|
printf("Problem generating channel model. Exiting.\n");
|
||||||
exit(-1);
|
exit(-1);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -407,7 +407,7 @@ int main(int argc, char **argv)
|
|||||||
PHY_vars_UE->lte_frame_parms.pucch_config_common.nRB_CQI = 0;
|
PHY_vars_UE->lte_frame_parms.pucch_config_common.nRB_CQI = 0;
|
||||||
PHY_vars_UE->lte_frame_parms.pucch_config_common.nCS_AN = 0;
|
PHY_vars_UE->lte_frame_parms.pucch_config_common.nCS_AN = 0;
|
||||||
|
|
||||||
pucch_payload = 1;
|
pucch_payload = 0;
|
||||||
|
|
||||||
generate_pucch(PHY_vars_UE->lte_ue_common_vars.txdataF,
|
generate_pucch(PHY_vars_UE->lte_ue_common_vars.txdataF,
|
||||||
frame_parms,
|
frame_parms,
|
||||||
@@ -550,9 +550,7 @@ int main(int argc, char **argv)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
lte_eNB_I0_measurements(PHY_vars_eNB,
|
|
||||||
0,
|
|
||||||
1);
|
|
||||||
|
|
||||||
for (i=0; i<2*nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES; i++) {
|
for (i=0; i<2*nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES; i++) {
|
||||||
for (aa=0; aa<PHY_vars_eNB->lte_frame_parms.nb_antennas_rx; aa++) {
|
for (aa=0; aa<PHY_vars_eNB->lte_frame_parms.nb_antennas_rx; aa++) {
|
||||||
@@ -600,6 +598,10 @@ int main(int argc, char **argv)
|
|||||||
|
|
||||||
// if (sig == 1)
|
// if (sig == 1)
|
||||||
// printf("*");
|
// printf("*");
|
||||||
|
lte_eNB_I0_measurements(PHY_vars_eNB,
|
||||||
|
subframe,
|
||||||
|
0,
|
||||||
|
1);
|
||||||
PHY_vars_eNB->PHY_measurements_eNB[0].n0_power_tot_dB = N0;//(int8_t)(sigma2_dB-10*log10(PHY_vars_eNB->lte_frame_parms.ofdm_symbol_size/(12*NB_RB)));
|
PHY_vars_eNB->PHY_measurements_eNB[0].n0_power_tot_dB = N0;//(int8_t)(sigma2_dB-10*log10(PHY_vars_eNB->lte_frame_parms.ofdm_symbol_size/(12*NB_RB)));
|
||||||
stat = rx_pucch(PHY_vars_eNB,
|
stat = rx_pucch(PHY_vars_eNB,
|
||||||
pucch_format,
|
pucch_format,
|
||||||
|
|||||||
@@ -97,7 +97,7 @@ int main(int argc, char **argv)
|
|||||||
|
|
||||||
int aarx,aatx;
|
int aarx,aatx;
|
||||||
double channelx,channely;
|
double channelx,channely;
|
||||||
double sigma2, sigma2_dB=10,SNR,SNR2,snr0=-2.0,snr1,SNRmeas,rate,saving_bler;
|
double sigma2, sigma2_dB=10,SNR,SNR2,snr0=-2.0,snr1,SNRmeas,rate,saving_bler=0;
|
||||||
double input_snr_step=.2,snr_int=30;
|
double input_snr_step=.2,snr_int=30;
|
||||||
double blerr;
|
double blerr;
|
||||||
|
|
||||||
@@ -126,7 +126,7 @@ int main(int argc, char **argv)
|
|||||||
unsigned int coded_bits_per_codeword,nsymb;
|
unsigned int coded_bits_per_codeword,nsymb;
|
||||||
int subframe=3;
|
int subframe=3;
|
||||||
unsigned int tx_lev=0,tx_lev_dB,trials,errs[4]= {0,0,0,0},round_trials[4]= {0,0,0,0};
|
unsigned int tx_lev=0,tx_lev_dB,trials,errs[4]= {0,0,0,0},round_trials[4]= {0,0,0,0};
|
||||||
uint8_t transmission_mode=1,n_rx=1,n_tx=1;
|
uint8_t transmission_mode=1,n_rx=1;
|
||||||
|
|
||||||
FILE *bler_fd=NULL;
|
FILE *bler_fd=NULL;
|
||||||
char bler_fname[512];
|
char bler_fname[512];
|
||||||
@@ -341,10 +341,6 @@ int main(int argc, char **argv)
|
|||||||
exit(-1);
|
exit(-1);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (transmission_mode>1) {
|
|
||||||
n_tx = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 'y':
|
case 'y':
|
||||||
@@ -645,8 +641,8 @@ int main(int argc, char **argv)
|
|||||||
|
|
||||||
// Create transport channel structures for 2 transport blocks (MIMO)
|
// Create transport channel structures for 2 transport blocks (MIMO)
|
||||||
for (i=0; i<2; i++) {
|
for (i=0; i<2; i++) {
|
||||||
PHY_vars_eNB->dlsch_eNB[0][i] = new_eNB_dlsch(1,8,N_RB_DL,0);
|
PHY_vars_eNB->dlsch_eNB[0][i] = new_eNB_dlsch(1,8,1827072,N_RB_DL,0);
|
||||||
PHY_vars_UE->dlsch_ue[0][i] = new_ue_dlsch(1,8,MAX_TURBO_ITERATIONS,N_RB_DL,0);
|
PHY_vars_UE->dlsch_ue[0][i] = new_ue_dlsch(1,8,1827072,MAX_TURBO_ITERATIONS,N_RB_DL,0);
|
||||||
|
|
||||||
if (!PHY_vars_eNB->dlsch_eNB[0][i]) {
|
if (!PHY_vars_eNB->dlsch_eNB[0][i]) {
|
||||||
printf("Can't get eNB dlsch structures\n");
|
printf("Can't get eNB dlsch structures\n");
|
||||||
@@ -849,11 +845,11 @@ int main(int argc, char **argv)
|
|||||||
|
|
||||||
|
|
||||||
harq_pid = subframe2harq_pid(&PHY_vars_UE->lte_frame_parms,PHY_vars_UE->frame_tx,subframe);
|
harq_pid = subframe2harq_pid(&PHY_vars_UE->lte_frame_parms,PHY_vars_UE->frame_tx,subframe);
|
||||||
|
input_buffer_length = PHY_vars_UE->ulsch_ue[0]->harq_processes[harq_pid]->TBS/8;
|
||||||
|
input_buffer = (unsigned char *)malloc(input_buffer_length+4);
|
||||||
// printf("UL frame %d/subframe %d, harq_pid %d\n",PHY_vars_UE->frame,subframe,harq_pid);
|
// printf("UL frame %d/subframe %d, harq_pid %d\n",PHY_vars_UE->frame,subframe,harq_pid);
|
||||||
if (input_fdUL == NULL) {
|
if (input_fdUL == NULL) {
|
||||||
input_buffer_length = PHY_vars_UE->ulsch_ue[0]->harq_processes[harq_pid]->TBS/8;
|
|
||||||
input_buffer = (unsigned char *)malloc(input_buffer_length+4);
|
|
||||||
|
|
||||||
if (n_frames == 1) {
|
if (n_frames == 1) {
|
||||||
trch_out_fdUL= fopen("ulsch_trchUL.txt","w");
|
trch_out_fdUL= fopen("ulsch_trchUL.txt","w");
|
||||||
@@ -875,7 +871,7 @@ int main(int argc, char **argv)
|
|||||||
i=0;
|
i=0;
|
||||||
|
|
||||||
while (!feof(input_fdUL)) {
|
while (!feof(input_fdUL)) {
|
||||||
fscanf(input_fdUL,"%s %s",input_val_str,input_val_str2);//&input_val1,&input_val2);
|
ret=fscanf(input_fdUL,"%s %s",input_val_str,input_val_str2);//&input_val1,&input_val2);
|
||||||
|
|
||||||
if ((i%4)==0) {
|
if ((i%4)==0) {
|
||||||
((short*)txdata[0])[i/2] = (short)((1<<15)*strtod(input_val_str,NULL));
|
((short*)txdata[0])[i/2] = (short)((1<<15)*strtod(input_val_str,NULL));
|
||||||
@@ -1205,6 +1201,7 @@ int main(int argc, char **argv)
|
|||||||
start_meas(&PHY_vars_eNB->phy_proc_rx);
|
start_meas(&PHY_vars_eNB->phy_proc_rx);
|
||||||
start_meas(&PHY_vars_eNB->ofdm_demod_stats);
|
start_meas(&PHY_vars_eNB->ofdm_demod_stats);
|
||||||
lte_eNB_I0_measurements(PHY_vars_eNB,
|
lte_eNB_I0_measurements(PHY_vars_eNB,
|
||||||
|
subframe,
|
||||||
0,
|
0,
|
||||||
1);
|
1);
|
||||||
|
|
||||||
|
|||||||
@@ -163,7 +163,13 @@ typedef uint32_t mbms_session_id_t;
|
|||||||
typedef uint16_t mbms_service_id_t;
|
typedef uint16_t mbms_service_id_t;
|
||||||
typedef uint16_t rnti_t;
|
typedef uint16_t rnti_t;
|
||||||
typedef uint8_t rrc_enb_index_t;
|
typedef uint8_t rrc_enb_index_t;
|
||||||
|
typedef uint8_t mme_code_t;
|
||||||
|
typedef uint32_t m_tmsi_t;
|
||||||
|
|
||||||
|
//Random UE identity length = 40 bits
|
||||||
|
#if ! defined(NOT_A_RANDOM_UE_IDENTITY)
|
||||||
|
#define NOT_A_RANDOM_UE_IDENTITY (uint64_t)0xFFFFFFFF
|
||||||
|
#endif
|
||||||
#if ! defined(NOT_A_RNTI)
|
#if ! defined(NOT_A_RNTI)
|
||||||
#define NOT_A_RNTI (rnti_t)0
|
#define NOT_A_RNTI (rnti_t)0
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@@ -251,7 +251,8 @@ typedef struct {
|
|||||||
typedef struct {
|
typedef struct {
|
||||||
uint8_t Num_ue_spec_dci ;
|
uint8_t Num_ue_spec_dci ;
|
||||||
uint8_t Num_common_dci ;
|
uint8_t Num_common_dci ;
|
||||||
unsigned int nCCE;
|
uint32_t nCCE;
|
||||||
|
uint32_t num_pdcch_symbols;
|
||||||
DCI_ALLOC_t dci_alloc[NUM_DCI_MAX] ;
|
DCI_ALLOC_t dci_alloc[NUM_DCI_MAX] ;
|
||||||
} DCI_PDU;
|
} DCI_PDU;
|
||||||
/*! \brief CCCH payload */
|
/*! \brief CCCH payload */
|
||||||
@@ -735,7 +736,8 @@ typedef struct {
|
|||||||
uint8_t dl_pow_off[MAX_NUM_CCs];
|
uint8_t dl_pow_off[MAX_NUM_CCs];
|
||||||
uint16_t pre_nb_available_rbs[MAX_NUM_CCs];
|
uint16_t pre_nb_available_rbs[MAX_NUM_CCs];
|
||||||
unsigned char rballoc_sub_UE[MAX_NUM_CCs][N_RBG_MAX];
|
unsigned char rballoc_sub_UE[MAX_NUM_CCs][N_RBG_MAX];
|
||||||
|
uint16_t ta_timer;
|
||||||
|
int16_t ta_update;
|
||||||
} UE_sched_ctrl;
|
} UE_sched_ctrl;
|
||||||
/*! \brief eNB template for the Random access information */
|
/*! \brief eNB template for the Random access information */
|
||||||
typedef struct {
|
typedef struct {
|
||||||
@@ -765,8 +767,6 @@ typedef struct {
|
|||||||
uint8_t Msg3_subframe;
|
uint8_t Msg3_subframe;
|
||||||
/// Flag to indicate the eNB should generate Msg4 upon reception of SDU from RRC. This is triggered by first ULSCH reception at eNB for new user.
|
/// Flag to indicate the eNB should generate Msg4 upon reception of SDU from RRC. This is triggered by first ULSCH reception at eNB for new user.
|
||||||
uint8_t generate_Msg4;
|
uint8_t generate_Msg4;
|
||||||
/// Flag to indicate the eNB should generate the DCI for Msg4, after getting the SDU from RRC.
|
|
||||||
uint8_t generate_Msg4_dci;
|
|
||||||
/// Flag to indicate that eNB is waiting for ACK that UE has received Msg3.
|
/// Flag to indicate that eNB is waiting for ACK that UE has received Msg3.
|
||||||
uint8_t wait_ack_Msg4;
|
uint8_t wait_ack_Msg4;
|
||||||
/// UE RNTI allocated during RAR
|
/// UE RNTI allocated during RAR
|
||||||
@@ -835,8 +835,8 @@ typedef struct {
|
|||||||
/// Outgoing CCCH pdu for PHY
|
/// Outgoing CCCH pdu for PHY
|
||||||
CCCH_PDU CCCH_pdu;
|
CCCH_PDU CCCH_pdu;
|
||||||
RA_TEMPLATE RA_template[NB_RA_PROC_MAX];
|
RA_TEMPLATE RA_template[NB_RA_PROC_MAX];
|
||||||
/// BCCH active flag
|
/// VRB map for common channels
|
||||||
uint8_t bcch_active;
|
uint8_t vrb_map[100];
|
||||||
/// MBSFN SubframeConfig
|
/// MBSFN SubframeConfig
|
||||||
struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[8];
|
struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[8];
|
||||||
/// number of subframe allocation pattern available for MBSFN sync area
|
/// number of subframe allocation pattern available for MBSFN sync area
|
||||||
@@ -883,9 +883,11 @@ typedef struct {
|
|||||||
/// Common cell resources
|
/// Common cell resources
|
||||||
COMMON_channels_t common_channels[MAX_NUM_CCs];
|
COMMON_channels_t common_channels[MAX_NUM_CCs];
|
||||||
UE_list_t UE_list;
|
UE_list_t UE_list;
|
||||||
|
|
||||||
///subband bitmap configuration
|
///subband bitmap configuration
|
||||||
SBMAP_CONF sbmap_conf;
|
SBMAP_CONF sbmap_conf;
|
||||||
|
/// CCE table used to build DCI scheduling information
|
||||||
|
int CCE_table[MAX_NUM_CCs][800];
|
||||||
/// active flag for Other lcid
|
/// active flag for Other lcid
|
||||||
// uint8_t lcid_active[NB_RB_MAX];
|
// uint8_t lcid_active[NB_RB_MAX];
|
||||||
/// eNB stats
|
/// eNB stats
|
||||||
|
|||||||
@@ -77,13 +77,13 @@
|
|||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, frame_t frameP, sub_frame_t subframeP) //, int calibration_flag) {
|
void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, frame_t frameP, sub_frame_t subframeP) //, int calibration_flag) {
|
||||||
{
|
{
|
||||||
|
|
||||||
unsigned int nprb[MAX_NUM_CCs];
|
|
||||||
unsigned int nCCE[MAX_NUM_CCs];
|
|
||||||
int mbsfn_status[MAX_NUM_CCs];
|
int mbsfn_status[MAX_NUM_CCs];
|
||||||
uint32_t RBalloc[MAX_NUM_CCs];
|
|
||||||
protocol_ctxt_t ctxt;
|
protocol_ctxt_t ctxt;
|
||||||
#ifdef EXMIMO
|
#ifdef EXMIMO
|
||||||
int ret;
|
int ret;
|
||||||
@@ -106,10 +106,11 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
|
|
||||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||||
DCI_pdu[CC_id] = &eNB_mac_inst[module_idP].common_channels[CC_id].DCI_pdu;
|
DCI_pdu[CC_id] = &eNB_mac_inst[module_idP].common_channels[CC_id].DCI_pdu;
|
||||||
nCCE[CC_id]=0;
|
DCI_pdu[CC_id]->nCCE=0;
|
||||||
nprb[CC_id]=0;
|
DCI_pdu[CC_id]->num_pdcch_symbols=1;
|
||||||
RBalloc[CC_id]=0;
|
|
||||||
mbsfn_status[CC_id]=0;
|
mbsfn_status[CC_id]=0;
|
||||||
|
// clear vrb_map
|
||||||
|
memset(eNB_mac_inst[module_idP].common_channels[CC_id].vrb_map,0,100);
|
||||||
}
|
}
|
||||||
|
|
||||||
// refresh UE list based on UEs dropped by PHY in previous subframe
|
// refresh UE list based on UEs dropped by PHY in previous subframe
|
||||||
@@ -186,7 +187,7 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||||
DCI_pdu[CC_id]->Num_common_dci = 0;
|
DCI_pdu[CC_id]->Num_common_dci = 0;
|
||||||
DCI_pdu[CC_id]->Num_ue_spec_dci = 0;
|
DCI_pdu[CC_id]->Num_ue_spec_dci = 0;
|
||||||
eNB_mac_inst[module_idP].common_channels[CC_id].bcch_active = 0;
|
|
||||||
|
|
||||||
#ifdef Rel10
|
#ifdef Rel10
|
||||||
eNB_mac_inst[module_idP].common_channels[CC_id].mcch_active =0;
|
eNB_mac_inst[module_idP].common_channels[CC_id].mcch_active =0;
|
||||||
@@ -194,6 +195,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
|
|
||||||
eNB_mac_inst[module_idP].frame = frameP;
|
eNB_mac_inst[module_idP].frame = frameP;
|
||||||
eNB_mac_inst[module_idP].subframe = subframeP;
|
eNB_mac_inst[module_idP].subframe = subframeP;
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
//if (subframeP%5 == 0)
|
//if (subframeP%5 == 0)
|
||||||
@@ -238,19 +241,20 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
// Schedule ULSCH for FDD or subframeP 4 (TDD config 0,3,6)
|
// Schedule ULSCH for FDD or subframeP 4 (TDD config 0,3,6)
|
||||||
// Schedule Normal DLSCH
|
// Schedule Normal DLSCH
|
||||||
|
|
||||||
schedule_RA(module_idP,frameP,subframeP,2,nprb,nCCE);
|
|
||||||
|
schedule_RA(module_idP,frameP,subframeP,2);
|
||||||
|
|
||||||
|
|
||||||
if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD
|
if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD
|
||||||
schedule_ulsch(module_idP,frameP,cooperation_flag,0,4,nCCE);//,calibration_flag);
|
schedule_ulsch(module_idP,frameP,cooperation_flag,0,4);//,calibration_flag);
|
||||||
} else if ((mac_xface->lte_frame_parms->tdd_config == TDD) || //TDD
|
} else if ((mac_xface->lte_frame_parms->tdd_config == TDD) || //TDD
|
||||||
(mac_xface->lte_frame_parms->tdd_config == 3) ||
|
(mac_xface->lte_frame_parms->tdd_config == 3) ||
|
||||||
(mac_xface->lte_frame_parms->tdd_config == 6)) {
|
(mac_xface->lte_frame_parms->tdd_config == 6)) {
|
||||||
//schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,4,nCCE);//,calibration_flag);
|
//schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,4);//,calibration_flag);
|
||||||
}
|
}
|
||||||
|
|
||||||
// schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,1,mbsfn_status);
|
|
||||||
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@@ -262,22 +266,22 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
switch (mac_xface->lte_frame_parms->tdd_config) {
|
switch (mac_xface->lte_frame_parms->tdd_config) {
|
||||||
case 0:
|
case 0:
|
||||||
case 1:
|
case 1:
|
||||||
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,7,nCCE);
|
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,7);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 6:
|
case 6:
|
||||||
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,8,nCCE);
|
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,8);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
} else { //FDD
|
} else { //FDD
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ulsch(module_idP,frameP,cooperation_flag,1,5);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
schedule_ulsch(module_idP,frameP,cooperation_flag,1,5,nCCE);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
}
|
}
|
||||||
|
|
||||||
break;
|
break;
|
||||||
@@ -287,9 +291,9 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
// TDD, nothing
|
// TDD, nothing
|
||||||
// FDD, normal UL/DLSCH
|
// FDD, normal UL/DLSCH
|
||||||
if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD
|
if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ulsch(module_idP,frameP,cooperation_flag,2,6);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
schedule_ulsch(module_idP,frameP,cooperation_flag,2,6,nCCE);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
}
|
}
|
||||||
|
|
||||||
break;
|
break;
|
||||||
@@ -302,22 +306,22 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
if (mac_xface->lte_frame_parms->frame_type == TDD) {
|
if (mac_xface->lte_frame_parms->frame_type == TDD) {
|
||||||
switch (mac_xface->lte_frame_parms->tdd_config) {
|
switch (mac_xface->lte_frame_parms->tdd_config) {
|
||||||
case 2:
|
case 2:
|
||||||
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,7,nCCE);
|
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,7);
|
||||||
|
|
||||||
// no break here!
|
// no break here!
|
||||||
case 5:
|
case 5:
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
} else { //FDD
|
} else { //FDD
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
|
||||||
schedule_ulsch(module_idP,frameP,cooperation_flag,3,7,nCCE);
|
|
||||||
|
|
||||||
|
schedule_ulsch(module_idP,frameP,cooperation_flag,3,7);
|
||||||
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
}
|
}
|
||||||
|
|
||||||
break;
|
break;
|
||||||
@@ -330,8 +334,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
if (mac_xface->lte_frame_parms->frame_type == 1) { // TDD
|
if (mac_xface->lte_frame_parms->frame_type == 1) { // TDD
|
||||||
switch (mac_xface->lte_frame_parms->tdd_config) {
|
switch (mac_xface->lte_frame_parms->tdd_config) {
|
||||||
case 1:
|
case 1:
|
||||||
// schedule_RA(module_idP,frameP,subframeP,nprb,nCCE);
|
// schedule_RA(module_idP,frameP,subframeP);
|
||||||
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,8,nCCE);
|
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,8);
|
||||||
|
|
||||||
// no break here!
|
// no break here!
|
||||||
case 2:
|
case 2:
|
||||||
@@ -341,8 +345,9 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
|
|
||||||
// no break here!
|
// no break here!
|
||||||
case 5:
|
case 5:
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,1,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
@@ -350,11 +355,11 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD
|
if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD
|
||||||
// schedule_RA(module_idP,frameP, subframeP, 0, nprb, nCCE);
|
|
||||||
// schedule_ulsch(module_idP, frameP, cooperation_flag, 4, 8, nCCE);
|
|
||||||
schedule_ue_spec(module_idP, frameP, subframeP, nprb, nCCE, mbsfn_status);
|
|
||||||
fill_DLSCH_dci(module_idP, frameP, subframeP, RBalloc, 1, mbsfn_status);
|
|
||||||
|
|
||||||
|
// schedule_RA(module_idP,frameP, subframeP, 0);
|
||||||
|
schedule_ulsch(module_idP, frameP, cooperation_flag, 4, 8);
|
||||||
|
schedule_ue_spec(module_idP, frameP, subframeP, mbsfn_status);
|
||||||
|
fill_DLSCH_dci(module_idP, frameP, subframeP, mbsfn_status);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -365,21 +370,21 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
// TDD Config 0,6 ULSCH for subframes 9,3 resp.
|
// TDD Config 0,6 ULSCH for subframes 9,3 resp.
|
||||||
// TDD normal DLSCH
|
// TDD normal DLSCH
|
||||||
// FDD normal UL/DLSCH
|
// FDD normal UL/DLSCH
|
||||||
schedule_SI(module_idP,frameP,nprb,nCCE);
|
schedule_SI(module_idP,frameP,subframeP);
|
||||||
|
|
||||||
//schedule_RA(module_idP,frameP,subframeP,5,nprb,nCCE);
|
//schedule_RA(module_idP,frameP,subframeP,5);
|
||||||
if (mac_xface->lte_frame_parms->frame_type == FDD) {
|
if (mac_xface->lte_frame_parms->frame_type == FDD) {
|
||||||
schedule_RA(module_idP,frameP,subframeP,1,nprb,nCCE);
|
schedule_RA(module_idP,frameP,subframeP,1);
|
||||||
// schedule_ulsch(module_idP,frameP,cooperation_flag,5,9,nCCE);
|
schedule_ulsch(module_idP,frameP,cooperation_flag,5,9);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,1,mbsfn_status);
|
schedule_ue_spec(module_idP, frameP, subframeP, mbsfn_status);
|
||||||
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
} else if ((mac_xface->lte_frame_parms->tdd_config == 0) || // TDD Config 0
|
} else if ((mac_xface->lte_frame_parms->tdd_config == 0) || // TDD Config 0
|
||||||
(mac_xface->lte_frame_parms->tdd_config == 6)) { // TDD Config 6
|
(mac_xface->lte_frame_parms->tdd_config == 6)) { // TDD Config 6
|
||||||
//schedule_ulsch(module_idP,cooperation_flag,subframeP,nCCE);
|
//schedule_ulsch(module_idP,cooperation_flag,subframeP);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
} else {
|
} else {
|
||||||
//schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
}
|
}
|
||||||
|
|
||||||
break;
|
break;
|
||||||
@@ -395,36 +400,36 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
case 1:
|
case 1:
|
||||||
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,2,nCCE);
|
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,2);
|
||||||
// schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
// schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 6:
|
case 6:
|
||||||
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3,nCCE);
|
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3);
|
||||||
// schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
// schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 5:
|
case 5:
|
||||||
schedule_RA(module_idP,frameP,subframeP,2,nprb,nCCE);
|
schedule_RA(module_idP,frameP,subframeP,2);
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,1,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 3:
|
case 3:
|
||||||
case 4:
|
case 4:
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
} else { //FDD
|
} else { //FDD
|
||||||
// schedule_ulsch(module_idP,frameP,cooperation_flag,6,0,nCCE);
|
// schedule_ulsch(module_idP,frameP,cooperation_flag,6,0);
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
}
|
}
|
||||||
|
|
||||||
break;
|
break;
|
||||||
@@ -437,23 +442,23 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
switch (mac_xface->lte_frame_parms->tdd_config) {
|
switch (mac_xface->lte_frame_parms->tdd_config) {
|
||||||
case 3:
|
case 3:
|
||||||
case 4:
|
case 4:
|
||||||
schedule_RA(module_idP,frameP,subframeP,3,nprb,nCCE); // 3 = Msg3 subframeP, not
|
schedule_RA(module_idP,frameP,subframeP,3); // 3 = Msg3 subframeP, not
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,1,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 5:
|
case 5:
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
} else { //FDD
|
} else { //FDD
|
||||||
//schedule_ulsch(module_idP,frameP,cooperation_flag,7,1,nCCE);
|
//schedule_ulsch(module_idP,frameP,cooperation_flag,7,1);
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
}
|
}
|
||||||
|
|
||||||
break;
|
break;
|
||||||
@@ -470,19 +475,19 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
case 4:
|
case 4:
|
||||||
case 5:
|
case 5:
|
||||||
|
|
||||||
// schedule_RA(module_idP,subframeP,nprb,nCCE);
|
// schedule_RA(module_idP,subframeP);
|
||||||
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,2,nCCE);
|
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,2);
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
} else { //FDD
|
} else { //FDD
|
||||||
//schedule_ulsch(module_idP,frameP,cooperation_flag,8,2,nCCE);
|
//schedule_ulsch(module_idP,frameP,cooperation_flag,8,2);
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
}
|
}
|
||||||
|
|
||||||
break;
|
break;
|
||||||
@@ -493,51 +498,53 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
if (mac_xface->lte_frame_parms->frame_type == TDD) {
|
if (mac_xface->lte_frame_parms->frame_type == TDD) {
|
||||||
switch (mac_xface->lte_frame_parms->tdd_config) {
|
switch (mac_xface->lte_frame_parms->tdd_config) {
|
||||||
case 1:
|
case 1:
|
||||||
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3,nCCE);
|
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3);
|
||||||
schedule_RA(module_idP,frameP,subframeP,7,nprb,nCCE); // 7 = Msg3 subframeP, not
|
schedule_RA(module_idP,frameP,subframeP,7); // 7 = Msg3 subframeP, not
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,1,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 3:
|
case 3:
|
||||||
case 4:
|
case 4:
|
||||||
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3,nCCE);
|
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3);
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 6:
|
case 6:
|
||||||
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,4,nCCE);
|
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,4);
|
||||||
//schedule_RA(module_idP,frameP,subframeP,nprb,nCCE);
|
//schedule_RA(module_idP,frameP,subframeP);
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 2:
|
case 2:
|
||||||
case 5:
|
case 5:
|
||||||
//schedule_RA(module_idP,frameP,subframeP,nprb,nCCE);
|
//schedule_RA(module_idP,frameP,subframeP);
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
} else { //FDD
|
} else { //FDD
|
||||||
// schedule_ulsch(module_idP,frameP,cooperation_flag,9,3,nCCE);
|
// schedule_ulsch(module_idP,frameP,cooperation_flag,9,3);
|
||||||
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
|
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
|
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||||
}
|
}
|
||||||
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
LOG_D(MAC,"FrameP %d, subframeP %d : Scheduling CCEs\n",frameP,subframeP);
|
||||||
DCI_pdu[CC_id]->nCCE = nCCE[CC_id];
|
|
||||||
}
|
|
||||||
|
|
||||||
LOG_D(MAC,"frameP %d, subframeP %d nCCE %d\n",frameP,subframeP,nCCE[0]);
|
// Allocate CCEs for good after scheduling is done
|
||||||
|
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++)
|
||||||
|
allocate_CCEs(module_idP,CC_id,subframeP,0);
|
||||||
|
|
||||||
|
LOG_D(MAC,"frameP %d, subframeP %d\n",frameP,subframeP);
|
||||||
|
|
||||||
stop_meas(&eNB_mac_inst[module_idP].eNB_scheduler);
|
stop_meas(&eNB_mac_inst[module_idP].eNB_scheduler);
|
||||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT);
|
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT);
|
||||||
|
|||||||
@@ -68,7 +68,8 @@
|
|||||||
|
|
||||||
#include "SIMULATION/TOOLS/defs.h" // for taus
|
#include "SIMULATION/TOOLS/defs.h" // for taus
|
||||||
|
|
||||||
void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,unsigned char Msg3_subframe,unsigned int *nprb,unsigned int *nCCE)
|
|
||||||
|
void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,unsigned char Msg3_subframe)
|
||||||
{
|
{
|
||||||
|
|
||||||
int CC_id;
|
int CC_id;
|
||||||
@@ -76,34 +77,195 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
|||||||
|
|
||||||
|
|
||||||
RA_TEMPLATE *RA_template;
|
RA_TEMPLATE *RA_template;
|
||||||
unsigned char i;//,harq_pid,round;
|
unsigned char i,harq_pid,round;
|
||||||
int16_t rrc_sdu_length;
|
int16_t rrc_sdu_length;
|
||||||
unsigned char lcid,offset;
|
unsigned char lcid,offset;
|
||||||
module_id_t UE_id= UE_INDEX_INVALID;
|
module_id_t UE_id= UE_INDEX_INVALID;
|
||||||
unsigned short TBsize = -1;
|
unsigned short TBsize = -1;
|
||||||
unsigned short msg4_padding,msg4_post_padding,msg4_header;
|
unsigned short msg4_padding,msg4_post_padding,msg4_header;
|
||||||
|
uint8_t *vrb_map;
|
||||||
|
int first_rb;
|
||||||
|
int rballoc[MAX_NUM_CCs];
|
||||||
|
DCI_PDU *DCI_pdu;
|
||||||
|
|
||||||
start_meas(&eNB->schedule_ra);
|
start_meas(&eNB->schedule_ra);
|
||||||
|
|
||||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||||
|
|
||||||
RA_template = (RA_TEMPLATE *)&eNB->common_channels[CC_id].RA_template[0];
|
|
||||||
|
vrb_map = eNB->common_channels[CC_id].vrb_map;
|
||||||
|
DCI_pdu = &eNB->common_channels[CC_id].DCI_pdu;
|
||||||
|
|
||||||
for (i=0; i<NB_RA_PROC_MAX; i++) {
|
for (i=0; i<NB_RA_PROC_MAX; i++) {
|
||||||
|
|
||||||
if (RA_template[i].RA_active == TRUE) {
|
RA_template = (RA_TEMPLATE *)&eNB->common_channels[CC_id].RA_template[i];
|
||||||
|
|
||||||
|
if (RA_template->RA_active == TRUE) {
|
||||||
|
|
||||||
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d RA %d is active (generate RAR %d, generate_Msg4 %d, wait_ack_Msg4 %d, rnti %x)\n",
|
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d RA %d is active (generate RAR %d, generate_Msg4 %d, wait_ack_Msg4 %d, rnti %x)\n",
|
||||||
module_idP,CC_id,i,RA_template[i].generate_rar,RA_template[i].generate_Msg4,RA_template[i].wait_ack_Msg4, RA_template[i].rnti);
|
module_idP,CC_id,i,RA_template->generate_rar,RA_template->generate_Msg4,RA_template->wait_ack_Msg4, RA_template->rnti);
|
||||||
|
|
||||||
if (RA_template[i].generate_rar == 1) {
|
if (RA_template->generate_rar == 1) {
|
||||||
nprb[CC_id]= nprb[CC_id] + 3;
|
|
||||||
nCCE[CC_id] = nCCE[CC_id] + 4;
|
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generating RAR DCI (proc %d), RA_active %d format 1A (%d,%d))\n",
|
||||||
RA_template[i].Msg3_subframe=Msg3_subframe;
|
module_idP, CC_id, frameP, subframeP,i,
|
||||||
} else if (RA_template[i].generate_Msg4 == 1) {
|
RA_template->RA_active,
|
||||||
|
RA_template->RA_dci_fmt1,
|
||||||
|
RA_template->RA_dci_size_bits1);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
|
||||||
|
switch(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
||||||
|
case 6:
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 25:
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 50:
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 100:
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
switch(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
||||||
|
case 6:
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 25:
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_UL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 50:
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 100:
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!CCE_allocation_infeasible(module_idP,CC_id,1,subframeP,2,RA_template->RA_rnti)) {
|
||||||
|
add_common_dci(DCI_pdu,
|
||||||
|
(void*)&RA_template->RA_alloc_pdu1[0],
|
||||||
|
RA_template->RA_rnti,
|
||||||
|
RA_template->RA_dci_size_bytes1,
|
||||||
|
2,
|
||||||
|
RA_template->RA_dci_size_bits1,
|
||||||
|
RA_template->RA_dci_fmt1,
|
||||||
|
1);
|
||||||
|
|
||||||
|
RA_template->Msg3_subframe=Msg3_subframe;
|
||||||
|
}
|
||||||
|
} else if (RA_template->generate_Msg4 == 1) {
|
||||||
|
|
||||||
// check for Msg4 Message
|
// check for Msg4 Message
|
||||||
UE_id = find_UE_id(module_idP,RA_template[i].rnti);
|
UE_id = find_UE_id(module_idP,RA_template->rnti);
|
||||||
|
|
||||||
if (Is_rrc_registered == 1) {
|
if (Is_rrc_registered == 1) {
|
||||||
|
|
||||||
@@ -131,7 +293,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
|||||||
|
|
||||||
if (rrc_sdu_length>0) {
|
if (rrc_sdu_length>0) {
|
||||||
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Generating Msg4 with RRC Piggyback (RA proc %d, RNTI %x)\n",
|
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Generating Msg4 with RRC Piggyback (RA proc %d, RNTI %x)\n",
|
||||||
module_idP, CC_id, frameP, subframeP,i,RA_template[i].rnti);
|
module_idP, CC_id, frameP, subframeP,i,RA_template->rnti);
|
||||||
|
|
||||||
//msg("[MAC][eNB %d][RAPROC] Frame %d, subframeP %d: Received %d bytes for Msg4: \n",module_idP,frameP,subframeP,rrc_sdu_length);
|
//msg("[MAC][eNB %d][RAPROC] Frame %d, subframeP %d: Received %d bytes for Msg4: \n",module_idP,frameP,subframeP,rrc_sdu_length);
|
||||||
// for (j=0;j<rrc_sdu_length;j++)
|
// for (j=0;j<rrc_sdu_length;j++)
|
||||||
@@ -140,6 +302,21 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
|||||||
// msg("[MAC][eNB] Frame %d, subframeP %d: Generated DLSCH (Msg4) DCI, format 1A, for UE %d\n",frameP, subframeP,UE_id);
|
// msg("[MAC][eNB] Frame %d, subframeP %d: Generated DLSCH (Msg4) DCI, format 1A, for UE %d\n",frameP, subframeP,UE_id);
|
||||||
// Schedule Reflection of Connection request
|
// Schedule Reflection of Connection request
|
||||||
|
|
||||||
|
/*
|
||||||
|
// randomize frequency allocation for RA
|
||||||
|
while (1) {
|
||||||
|
first_rb = (unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));
|
||||||
|
|
||||||
|
if ((vrb_map[first_rb] != 1) && (vrb_map[first_rb+3] != 1))
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
*/
|
||||||
|
first_rb=0;
|
||||||
|
|
||||||
|
vrb_map[first_rb] = 1;
|
||||||
|
vrb_map[first_rb+1] = 1;
|
||||||
|
vrb_map[first_rb+2] = 1;
|
||||||
|
vrb_map[first_rb+3] = 1;
|
||||||
|
|
||||||
|
|
||||||
// Compute MCS for 3 PRB
|
// Compute MCS for 3 PRB
|
||||||
@@ -149,273 +326,406 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
|||||||
|
|
||||||
switch (mac_xface->lte_frame_parms->N_RB_DL) {
|
switch (mac_xface->lte_frame_parms->N_RB_DL) {
|
||||||
case 6:
|
case 6:
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
||||||
|
|
||||||
if ((rrc_sdu_length+msg4_header) <= 22) {
|
if ((rrc_sdu_length+msg4_header) <= 22) {
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
|
||||||
TBsize = 22;
|
TBsize = 22;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
|
||||||
TBsize = 28;
|
TBsize = 28;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
|
||||||
TBsize = 32;
|
TBsize = 32;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
|
||||||
TBsize = 41;
|
TBsize = 41;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
|
||||||
TBsize = 49;
|
TBsize = 49;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
|
||||||
TBsize = 57;
|
TBsize = 57;
|
||||||
}
|
}
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||||
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 25:
|
case 25:
|
||||||
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
||||||
|
|
||||||
if ((rrc_sdu_length+msg4_header) <= 22) {
|
if ((rrc_sdu_length+msg4_header) <= 22) {
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
|
||||||
TBsize = 22;
|
TBsize = 22;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
|
||||||
TBsize = 28;
|
TBsize = 28;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
|
||||||
TBsize = 32;
|
TBsize = 32;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
|
||||||
TBsize = 41;
|
TBsize = 41;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
|
||||||
TBsize = 49;
|
TBsize = 49;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
|
||||||
TBsize = 57;
|
TBsize = 57;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 50:
|
case 50:
|
||||||
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
||||||
|
|
||||||
if ((rrc_sdu_length+msg4_header) <= 22) {
|
if ((rrc_sdu_length+msg4_header) <= 22) {
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
|
||||||
TBsize = 22;
|
TBsize = 22;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
|
||||||
TBsize = 28;
|
TBsize = 28;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
|
||||||
TBsize = 32;
|
TBsize = 32;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
|
||||||
TBsize = 41;
|
TBsize = 41;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
|
||||||
TBsize = 49;
|
TBsize = 49;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
|
||||||
TBsize = 57;
|
TBsize = 57;
|
||||||
}
|
}
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||||
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 100:
|
case 100:
|
||||||
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
||||||
|
|
||||||
if ((rrc_sdu_length+msg4_header) <= 22) {
|
if ((rrc_sdu_length+msg4_header) <= 22) {
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
|
||||||
TBsize = 22;
|
TBsize = 22;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
|
||||||
TBsize = 28;
|
TBsize = 28;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
|
||||||
TBsize = 32;
|
TBsize = 32;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
|
||||||
TBsize = 41;
|
TBsize = 41;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
|
||||||
TBsize = 49;
|
TBsize = 49;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
|
||||||
TBsize = 57;
|
TBsize = 57;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
} else { // FDD DCI
|
} else { // FDD DCI
|
||||||
switch (mac_xface->lte_frame_parms->N_RB_DL) {
|
switch (mac_xface->lte_frame_parms->N_RB_DL) {
|
||||||
case 6:
|
case 6:
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
||||||
|
|
||||||
if ((rrc_sdu_length+msg4_header) <= 22) {
|
if ((rrc_sdu_length+msg4_header) <= 22) {
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
|
||||||
TBsize = 22;
|
TBsize = 22;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
|
||||||
TBsize = 28;
|
TBsize = 28;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
|
||||||
TBsize = 32;
|
TBsize = 32;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
|
||||||
TBsize = 41;
|
TBsize = 41;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
|
||||||
TBsize = 49;
|
TBsize = 49;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
|
||||||
TBsize = 57;
|
TBsize = 57;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 25:
|
case 25:
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
||||||
|
|
||||||
if ((rrc_sdu_length+msg4_header) <= 22) {
|
if ((rrc_sdu_length+msg4_header) <= 22) {
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
|
||||||
TBsize = 22;
|
TBsize = 22;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
|
||||||
TBsize = 28;
|
TBsize = 28;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
|
||||||
TBsize = 32;
|
TBsize = 32;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
|
||||||
TBsize = 41;
|
TBsize = 41;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
|
||||||
TBsize = 49;
|
TBsize = 49;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
|
||||||
TBsize = 57;
|
TBsize = 57;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 50:
|
case 50:
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
||||||
|
|
||||||
if ((rrc_sdu_length+msg4_header) <= 22) {
|
if ((rrc_sdu_length+msg4_header) <= 22) {
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
|
||||||
TBsize = 22;
|
TBsize = 22;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
|
||||||
TBsize = 28;
|
TBsize = 28;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
|
||||||
TBsize = 32;
|
TBsize = 32;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
|
||||||
TBsize = 41;
|
TBsize = 41;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
|
||||||
TBsize = 49;
|
TBsize = 49;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
|
||||||
TBsize = 57;
|
TBsize = 57;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||||
|
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 100:
|
case 100:
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
||||||
|
|
||||||
if ((rrc_sdu_length+msg4_header) <= 22) {
|
if ((rrc_sdu_length+msg4_header) <= 22) {
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
|
||||||
TBsize = 22;
|
TBsize = 22;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
} else if ((rrc_sdu_length+msg4_header) <= 28) {
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
|
||||||
TBsize = 28;
|
TBsize = 28;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
} else if ((rrc_sdu_length+msg4_header) <= 32) {
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
|
||||||
TBsize = 32;
|
TBsize = 32;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
} else if ((rrc_sdu_length+msg4_header) <= 41) {
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
|
||||||
TBsize = 41;
|
TBsize = 41;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
} else if ((rrc_sdu_length+msg4_header) <= 49) {
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
|
||||||
TBsize = 49;
|
TBsize = 49;
|
||||||
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
} else if ((rrc_sdu_length+msg4_header) <= 57) {
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
|
||||||
TBsize = 57;
|
TBsize = 57;
|
||||||
}
|
}
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||||
|
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
RA_template[i].generate_Msg4=0;
|
if (!CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,2,RA_template->rnti)) {
|
||||||
RA_template[i].generate_Msg4_dci=1;
|
add_ue_spec_dci(DCI_pdu,
|
||||||
RA_template[i].wait_ack_Msg4=1;
|
(void*)&RA_template->RA_alloc_pdu2[0],
|
||||||
RA_template[i].RA_active = FALSE;
|
RA_template->rnti,
|
||||||
lcid=0;
|
RA_template->RA_dci_size_bytes2,
|
||||||
|
2,
|
||||||
|
RA_template->RA_dci_size_bits2,
|
||||||
|
RA_template->RA_dci_fmt2,
|
||||||
|
0);
|
||||||
|
|
||||||
if ((TBsize - rrc_sdu_length - msg4_header) <= 2) {
|
RA_template->generate_Msg4=0;
|
||||||
msg4_padding = TBsize - rrc_sdu_length - msg4_header;
|
RA_template->wait_ack_Msg4=1;
|
||||||
msg4_post_padding = 0;
|
RA_template->RA_active = FALSE;
|
||||||
} else {
|
lcid=0;
|
||||||
msg4_padding = 0;
|
|
||||||
msg4_post_padding = TBsize - rrc_sdu_length - msg4_header -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d subframeP %d Msg4 : TBS %d, sdu_len %d, msg4_header %d, msg4_padding %d, msg4_post_padding %d\n",
|
if ((TBsize - rrc_sdu_length - msg4_header) <= 2) {
|
||||||
module_idP,CC_id,frameP,subframeP,TBsize,rrc_sdu_length,msg4_header,msg4_padding,msg4_post_padding);
|
msg4_padding = TBsize - rrc_sdu_length - msg4_header;
|
||||||
DevAssert( UE_id != UE_INDEX_INVALID ); // FIXME not sure how to gracefully return
|
msg4_post_padding = 0;
|
||||||
offset = generate_dlsch_header((unsigned char*)eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0],
|
} else {
|
||||||
1, //num_sdus
|
msg4_padding = 0;
|
||||||
(unsigned short*)&rrc_sdu_length, //
|
msg4_post_padding = TBsize - rrc_sdu_length - msg4_header -1;
|
||||||
&lcid, // sdu_lcid
|
}
|
||||||
255, // no drx
|
|
||||||
0, // no timing advance
|
|
||||||
RA_template[i].cont_res_id, // contention res id
|
|
||||||
msg4_padding, // no padding
|
|
||||||
msg4_post_padding);
|
|
||||||
|
|
||||||
memcpy((void*)&eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0][(unsigned char)offset],
|
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d subframeP %d Msg4 : TBS %d, sdu_len %d, msg4_header %d, msg4_padding %d, msg4_post_padding %d\n",
|
||||||
&eNB->common_channels[CC_id].CCCH_pdu.payload[0],
|
module_idP,CC_id,frameP,subframeP,TBsize,rrc_sdu_length,msg4_header,msg4_padding,msg4_post_padding);
|
||||||
rrc_sdu_length);
|
DevAssert( UE_id != UE_INDEX_INVALID ); // FIXME not sure how to gracefully return
|
||||||
|
offset = generate_dlsch_header((unsigned char*)eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0],
|
||||||
|
1, //num_sdus
|
||||||
|
(unsigned short*)&rrc_sdu_length, //
|
||||||
|
&lcid, // sdu_lcid
|
||||||
|
255, // no drx
|
||||||
|
0, // no timing advance
|
||||||
|
RA_template->cont_res_id, // contention res id
|
||||||
|
msg4_padding, // no padding
|
||||||
|
msg4_post_padding);
|
||||||
|
|
||||||
if (opt_enabled==1) {
|
memcpy((void*)&eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0][(unsigned char)offset],
|
||||||
trace_pdu(1, (uint8_t *)eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0],
|
&eNB->common_channels[CC_id].CCCH_pdu.payload[0],
|
||||||
rrc_sdu_length, UE_id, 3, UE_RNTI(module_idP, UE_id),
|
rrc_sdu_length);
|
||||||
eNB->subframe,0,0);
|
|
||||||
LOG_D(OPT,"[eNB %d][DLSCH] CC_id %d Frame %d trace pdu for rnti %x with size %d\n",
|
|
||||||
module_idP, CC_id, frameP, UE_RNTI(module_idP,UE_id), rrc_sdu_length);
|
|
||||||
}
|
|
||||||
|
|
||||||
nprb[CC_id]= nprb[CC_id] + 3;
|
if (opt_enabled==1) {
|
||||||
nCCE[CC_id] = nCCE[CC_id] + 4;
|
trace_pdu(1, (uint8_t *)eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0],
|
||||||
}
|
rrc_sdu_length, UE_id, 3, UE_RNTI(module_idP, UE_id),
|
||||||
|
eNB->subframe,0,0);
|
||||||
|
LOG_D(OPT,"[eNB %d][DLSCH] CC_id %d Frame %d trace pdu for rnti %x with size %d\n",
|
||||||
|
module_idP, CC_id, frameP, UE_RNTI(module_idP,UE_id), rrc_sdu_length);
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
//try here
|
//try here
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
} else if (RA_template->wait_ack_Msg4==1) {
|
||||||
else if (eNB_mac_inst[module_idP][CC_id].RA_template[i].wait_ack_Msg4==1) {
|
// check HARQ status and retransmit if necessary
|
||||||
// check HARQ status and retransmit if necessary
|
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Checking if Msg4 was acknowledged: \n",
|
||||||
LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, subframeP %d: Checking if Msg4 was acknowledged :\n",module_idP,frameP,subframeP);
|
module_idP,CC_id,frameP,subframeP);
|
||||||
// Get candidate harq_pid from PHY
|
// Get candidate harq_pid from PHY
|
||||||
mac_xface->get_ue_active_harq_pid(module_idP,eNB_mac_inst[module_idP][CC_id].RA_template[i].rnti,subframeP,&harq_pid,&round,0);
|
mac_xface->get_ue_active_harq_pid(module_idP,CC_id,RA_template->rnti,frameP,subframeP,&harq_pid,&round,0);
|
||||||
if (round>0) {
|
|
||||||
*nprb= (*nprb) + 3;
|
if (round>0) {
|
||||||
*nCCE = (*nCCE) + 4;
|
//RA_template->wait_ack_Msg4++;
|
||||||
}
|
// we have to schedule a retransmission
|
||||||
}
|
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
|
||||||
*/
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
||||||
|
} else {
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
// randomize frequency allocation for RA
|
||||||
|
while (1) {
|
||||||
|
first_rb = (unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));
|
||||||
|
|
||||||
|
if ((vrb_map[first_rb] != 1) && (vrb_map[first_rb+3] != 1))
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
*/
|
||||||
|
first_rb=0;
|
||||||
|
vrb_map[first_rb] = 1;
|
||||||
|
vrb_map[first_rb+1] = 1;
|
||||||
|
vrb_map[first_rb+2] = 1;
|
||||||
|
vrb_map[first_rb+3] = 1;
|
||||||
|
|
||||||
|
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_UL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||||
|
} else {
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_UL,first_rb,4);
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||||
|
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,2,RA_template->rnti)) {
|
||||||
|
add_ue_spec_dci(DCI_pdu,
|
||||||
|
(void*)&RA_template->RA_alloc_pdu2[0],
|
||||||
|
RA_template->rnti,
|
||||||
|
RA_template->RA_dci_size_bytes2,
|
||||||
|
2,
|
||||||
|
RA_template->RA_dci_size_bits2,
|
||||||
|
RA_template->RA_dci_fmt2,
|
||||||
|
0);
|
||||||
|
}
|
||||||
|
LOG_W(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Msg4 not acknowledged, adding ue specific dci (rnti %x) for RA (Msg4 Retransmission)\n",
|
||||||
|
module_idP,CC_id,frameP,subframeP,RA_template->rnti);
|
||||||
|
} else {
|
||||||
|
/* msg4 not received
|
||||||
|
if ((round == 0) && (RA_template->wait_ack_Msg4>1){
|
||||||
|
remove UE instance across all the layers: mac_xface->cancel_RA();
|
||||||
|
}
|
||||||
|
*/
|
||||||
|
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d : Msg4 acknowledged\n",module_idP,CC_id,frameP,subframeP);
|
||||||
|
RA_template->wait_ack_Msg4=0;
|
||||||
|
RA_template->RA_active=FALSE;
|
||||||
|
UE_id = find_UE_id(module_idP,RA_template->rnti);
|
||||||
|
DevAssert( UE_id != -1 );
|
||||||
|
eNB_mac_inst[module_idP].UE_list.UE_template[UE_PCCID(module_idP,UE_id)][UE_id].configured=TRUE;
|
||||||
|
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
} // for i=0 .. N_RA_PROC-1
|
||||||
}
|
} // CC_id
|
||||||
|
|
||||||
stop_meas(&eNB->schedule_ra);
|
stop_meas(&eNB->schedule_ra);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -72,9 +72,8 @@ void
|
|||||||
schedule_SI(
|
schedule_SI(
|
||||||
module_id_t module_idP,
|
module_id_t module_idP,
|
||||||
frame_t frameP,
|
frame_t frameP,
|
||||||
unsigned int* nprbP,
|
sub_frame_t subframeP)
|
||||||
unsigned int* nCCEP
|
|
||||||
)
|
|
||||||
//------------------------------------------------------------------------------
|
//------------------------------------------------------------------------------
|
||||||
{
|
{
|
||||||
|
|
||||||
@@ -85,12 +84,19 @@ schedule_SI(
|
|||||||
void *BCCH_alloc_pdu;
|
void *BCCH_alloc_pdu;
|
||||||
int CC_id;
|
int CC_id;
|
||||||
eNB_MAC_INST *eNB = &eNB_mac_inst[module_idP];
|
eNB_MAC_INST *eNB = &eNB_mac_inst[module_idP];
|
||||||
|
uint8_t *vrb_map;
|
||||||
|
int first_rb;
|
||||||
|
int rballoc[MAX_NUM_CCs];
|
||||||
|
int sizeof1A_bytes,sizeof1A_bits;
|
||||||
|
DCI_PDU *DCI_pdu;
|
||||||
|
|
||||||
start_meas(&eNB->schedule_si);
|
start_meas(&eNB->schedule_si);
|
||||||
|
|
||||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||||
|
|
||||||
BCCH_alloc_pdu=(void*)&eNB->common_channels[CC_id].BCCH_alloc_pdu;
|
BCCH_alloc_pdu = (void*)&eNB->common_channels[CC_id].BCCH_alloc_pdu;
|
||||||
|
DCI_pdu = (void*)&eNB->common_channels[CC_id].DCI_pdu;
|
||||||
|
vrb_map = (void*)&eNB->common_channels[CC_id].vrb_map;
|
||||||
|
|
||||||
bcch_sdu_length = mac_rrc_data_req(module_idP,
|
bcch_sdu_length = mac_rrc_data_req(module_idP,
|
||||||
CC_id,
|
CC_id,
|
||||||
@@ -104,7 +110,41 @@ schedule_SI(
|
|||||||
if (bcch_sdu_length > 0) {
|
if (bcch_sdu_length > 0) {
|
||||||
LOG_D(MAC,"[eNB %d] Frame %d : BCCH->DLSCH CC_id %d, Received %d bytes \n",module_idP,frameP,CC_id,bcch_sdu_length);
|
LOG_D(MAC,"[eNB %d] Frame %d : BCCH->DLSCH CC_id %d, Received %d bytes \n",module_idP,frameP,CC_id,bcch_sdu_length);
|
||||||
|
|
||||||
|
// Allocate 4 PRBs in a random location
|
||||||
|
/*
|
||||||
|
while (1) {
|
||||||
|
first_rb = (unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));
|
||||||
|
if ((vrb_map[first_rb] != 1) &&
|
||||||
|
(vrb_map[first_rb+1] != 1) &&
|
||||||
|
(vrb_map[first_rb+2] != 1) &&
|
||||||
|
(vrb_map[first_rb+3] != 1))
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
*/
|
||||||
|
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
||||||
|
case 6:
|
||||||
|
first_rb = 0;
|
||||||
|
break;
|
||||||
|
case 15:
|
||||||
|
first_rb = 6;
|
||||||
|
break;
|
||||||
|
case 25:
|
||||||
|
first_rb = 11;
|
||||||
|
break;
|
||||||
|
case 50:
|
||||||
|
first_rb = 23;
|
||||||
|
break;
|
||||||
|
case 100:
|
||||||
|
first_rb = 48;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
vrb_map[first_rb] = 1;
|
||||||
|
vrb_map[first_rb+1] = 1;
|
||||||
|
vrb_map[first_rb+2] = 1;
|
||||||
|
vrb_map[first_rb+3] = 1;
|
||||||
|
|
||||||
|
// Get MCS for length of SI
|
||||||
if (bcch_sdu_length <= (mac_xface->get_TBS_DL(0,3))) {
|
if (bcch_sdu_length <= (mac_xface->get_TBS_DL(0,3))) {
|
||||||
mcs=0;
|
mcs=0;
|
||||||
} else if (bcch_sdu_length <= (mac_xface->get_TBS_DL(1,3))) {
|
} else if (bcch_sdu_length <= (mac_xface->get_TBS_DL(1,3))) {
|
||||||
@@ -125,46 +165,153 @@ schedule_SI(
|
|||||||
mcs=8;
|
mcs=8;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
|
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
|
||||||
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
||||||
case 6:
|
case 6:
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
|
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||||
|
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
|
||||||
|
sizeof1A_bytes = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
|
||||||
|
sizeof1A_bits = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 25:
|
case 25:
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
|
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||||
break;
|
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||||
|
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
|
||||||
|
sizeof1A_bytes = sizeof(DCI1A_5MHz_TDD_1_6_t);
|
||||||
|
sizeof1A_bits = sizeof_DCI1A_5MHz_TDD_1_6_t;
|
||||||
|
break;
|
||||||
|
|
||||||
case 50:
|
case 50:
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
|
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||||
|
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
|
||||||
|
sizeof1A_bytes = sizeof(DCI1A_10MHz_TDD_1_6_t);
|
||||||
|
sizeof1A_bits = sizeof_DCI1A_10MHz_TDD_1_6_t;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 100:
|
case 100:
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
|
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||||
break;
|
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||||
|
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
|
||||||
|
sizeof1A_bytes = sizeof(DCI1A_20MHz_TDD_1_6_t);
|
||||||
|
sizeof1A_bits = sizeof_DCI1A_20MHz_TDD_1_6_t;
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
} else {
|
} else {
|
||||||
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
||||||
case 6:
|
case 6:
|
||||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
|
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||||
|
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
|
||||||
|
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
|
||||||
|
sizeof1A_bytes = sizeof(DCI1A_1_5MHz_FDD_t);
|
||||||
|
sizeof1A_bits = sizeof_DCI1A_1_5MHz_FDD_t;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 25:
|
case 25:
|
||||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
|
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||||
|
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
|
||||||
|
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||||
|
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||||
|
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
|
||||||
|
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||||
|
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||||
|
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
|
||||||
|
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
|
||||||
|
sizeof1A_bytes = sizeof(DCI1A_5MHz_FDD_t);
|
||||||
|
sizeof1A_bits = sizeof_DCI1A_5MHz_FDD_t;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 50:
|
case 50:
|
||||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
|
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||||
|
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
|
||||||
|
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||||
|
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||||
|
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
|
||||||
|
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||||
|
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||||
|
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
|
||||||
|
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
|
||||||
|
sizeof1A_bytes = sizeof(DCI1A_10MHz_FDD_t);
|
||||||
|
sizeof1A_bits = sizeof_DCI1A_10MHz_FDD_t;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 100:
|
case 100:
|
||||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
|
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||||
break;
|
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
||||||
|
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
|
||||||
|
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||||
|
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||||
|
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
|
||||||
|
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||||
|
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||||
|
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
|
||||||
|
|
||||||
|
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
|
||||||
|
sizeof1A_bytes = sizeof(DCI1A_20MHz_FDD_t);
|
||||||
|
sizeof1A_bits = sizeof_DCI1A_20MHz_FDD_t;
|
||||||
|
break;
|
||||||
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (!CCE_allocation_infeasible(module_idP,CC_id,1,subframeP,2,SI_RNTI)) {
|
||||||
|
add_common_dci(DCI_pdu,
|
||||||
|
BCCH_alloc_pdu,
|
||||||
|
SI_RNTI,
|
||||||
|
sizeof1A_bytes,
|
||||||
|
2,
|
||||||
|
sizeof1A_bits,
|
||||||
|
format1A,0);
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
LOG_E(MAC,"[eNB %d] CCid %d Frame %d, subframe %d : Cannot add DCI 1A for SI\n",module_idP, CC_id,frameP,subframeP);
|
||||||
|
}
|
||||||
|
|
||||||
if (opt_enabled == 1) {
|
if (opt_enabled == 1) {
|
||||||
trace_pdu(1,
|
trace_pdu(1,
|
||||||
&eNB->common_channels[CC_id].BCCH_pdu.payload[0],
|
&eNB->common_channels[CC_id].BCCH_pdu.payload[0],
|
||||||
@@ -194,17 +341,13 @@ schedule_SI(
|
|||||||
mac_xface->get_TBS_DL(mcs,3));
|
mac_xface->get_TBS_DL(mcs,3));
|
||||||
}
|
}
|
||||||
|
|
||||||
eNB->common_channels[CC_id].bcch_active=1;
|
|
||||||
nprbP[CC_id]=3;
|
|
||||||
nCCEP[CC_id]=4;
|
|
||||||
eNB->eNB_stats[CC_id].total_num_bcch_pdu+=1;
|
eNB->eNB_stats[CC_id].total_num_bcch_pdu+=1;
|
||||||
eNB->eNB_stats[CC_id].bcch_buffer=bcch_sdu_length;
|
eNB->eNB_stats[CC_id].bcch_buffer=bcch_sdu_length;
|
||||||
eNB->eNB_stats[CC_id].total_bcch_buffer+=bcch_sdu_length;
|
eNB->eNB_stats[CC_id].total_bcch_buffer+=bcch_sdu_length;
|
||||||
eNB->eNB_stats[CC_id].bcch_mcs=mcs;
|
eNB->eNB_stats[CC_id].bcch_mcs=mcs;
|
||||||
} else {
|
} else {
|
||||||
eNB->common_channels[CC_id].bcch_active=0;
|
|
||||||
nprbP[CC_id]=0;
|
|
||||||
nCCEP[CC_id]=0;
|
|
||||||
//LOG_D(MAC,"[eNB %d] Frame %d : BCCH not active \n",Mod_id,frame);
|
//LOG_D(MAC,"[eNB %d] Frame %d : BCCH not active \n",Mod_id,frame);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -422,16 +422,13 @@ schedule_ue_spec(
|
|||||||
module_id_t module_idP,
|
module_id_t module_idP,
|
||||||
frame_t frameP,
|
frame_t frameP,
|
||||||
sub_frame_t subframeP,
|
sub_frame_t subframeP,
|
||||||
unsigned int *nb_rb_used0,
|
int* mbsfn_flag
|
||||||
unsigned int *nCCE_used,
|
|
||||||
int* mbsfn_flag
|
|
||||||
)
|
)
|
||||||
//------------------------------------------------------------------------------
|
//------------------------------------------------------------------------------
|
||||||
{
|
{
|
||||||
|
|
||||||
uint8_t CC_id;
|
uint8_t CC_id;
|
||||||
int UE_id;
|
int UE_id;
|
||||||
uint16_t nCCE[MAX_NUM_CCs];
|
|
||||||
int N_RBG[MAX_NUM_CCs];
|
int N_RBG[MAX_NUM_CCs];
|
||||||
unsigned char aggregation;
|
unsigned char aggregation;
|
||||||
mac_rlc_status_resp_t rlc_status;
|
mac_rlc_status_resp_t rlc_status;
|
||||||
@@ -450,7 +447,6 @@ schedule_ue_spec(
|
|||||||
// uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
|
// uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
|
||||||
int mcs;
|
int mcs;
|
||||||
uint16_t min_rb_unit[MAX_NUM_CCs];
|
uint16_t min_rb_unit[MAX_NUM_CCs];
|
||||||
short ta_update = 0;
|
|
||||||
eNB_MAC_INST *eNB = &eNB_mac_inst[module_idP];
|
eNB_MAC_INST *eNB = &eNB_mac_inst[module_idP];
|
||||||
UE_list_t *UE_list = &eNB->UE_list;
|
UE_list_t *UE_list = &eNB->UE_list;
|
||||||
LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
|
LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
|
||||||
@@ -459,6 +455,7 @@ schedule_ue_spec(
|
|||||||
int32_t tpc=1;
|
int32_t tpc=1;
|
||||||
static int32_t tpc_accumulated=0;
|
static int32_t tpc_accumulated=0;
|
||||||
UE_sched_ctrl *ue_sched_ctl;
|
UE_sched_ctrl *ue_sched_ctl;
|
||||||
|
int i;
|
||||||
|
|
||||||
if (UE_list->head==-1) {
|
if (UE_list->head==-1) {
|
||||||
return;
|
return;
|
||||||
@@ -473,15 +470,18 @@ schedule_ue_spec(
|
|||||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||||
min_rb_unit[CC_id]=get_min_rb_unit(module_idP,CC_id);
|
min_rb_unit[CC_id]=get_min_rb_unit(module_idP,CC_id);
|
||||||
frame_parms[CC_id] = mac_xface->get_lte_frame_parms(module_idP,CC_id);
|
frame_parms[CC_id] = mac_xface->get_lte_frame_parms(module_idP,CC_id);
|
||||||
total_nb_available_rb[CC_id] = frame_parms[CC_id]->N_RB_DL - nb_rb_used0[CC_id];
|
// get number of PRBs less those used by common channels
|
||||||
nCCE[CC_id] = mac_xface->get_nCCE_max(module_idP,CC_id) - nCCE_used[CC_id];
|
total_nb_available_rb[CC_id] = frame_parms[CC_id]->N_RB_DL;
|
||||||
|
for (i=0;i<frame_parms[CC_id]->N_RB_DL;i++)
|
||||||
|
if (eNB->common_channels[CC_id].vrb_map[i]!=0)
|
||||||
|
total_nb_available_rb[CC_id]--;
|
||||||
|
|
||||||
N_RBG[CC_id] = frame_parms[CC_id]->N_RBG;
|
N_RBG[CC_id] = frame_parms[CC_id]->N_RBG;
|
||||||
|
|
||||||
// store the global enb stats:
|
// store the global enb stats:
|
||||||
eNB->eNB_stats[CC_id].num_dlactive_UEs = UE_list->num_UEs;
|
eNB->eNB_stats[CC_id].num_dlactive_UEs = UE_list->num_UEs;
|
||||||
eNB->eNB_stats[CC_id].available_prbs = total_nb_available_rb[CC_id];
|
eNB->eNB_stats[CC_id].available_prbs = total_nb_available_rb[CC_id];
|
||||||
eNB->eNB_stats[CC_id].total_available_prbs += total_nb_available_rb[CC_id];
|
eNB->eNB_stats[CC_id].total_available_prbs += total_nb_available_rb[CC_id];
|
||||||
eNB->eNB_stats[CC_id].available_ncces = nCCE[CC_id];
|
|
||||||
eNB->eNB_stats[CC_id].dlsch_bytes_tx=0;
|
eNB->eNB_stats[CC_id].dlsch_bytes_tx=0;
|
||||||
eNB->eNB_stats[CC_id].dlsch_pdus_tx=0;
|
eNB->eNB_stats[CC_id].dlsch_pdus_tx=0;
|
||||||
}
|
}
|
||||||
@@ -523,9 +523,11 @@ schedule_ue_spec(
|
|||||||
continue_flag=1;
|
continue_flag=1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((ue_sched_ctl->pre_nb_available_rbs[CC_id] == 0) || (nCCE[CC_id] < (1<<aggregation))) {
|
if ((ue_sched_ctl->pre_nb_available_rbs[CC_id] == 0) || // no RBs allocated
|
||||||
|
CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,aggregation,rnti)
|
||||||
|
) {
|
||||||
LOG_D(MAC,"[eNB %d] Frame %d : no RB allocated for UE %d on CC_id %d: continue \n",
|
LOG_D(MAC,"[eNB %d] Frame %d : no RB allocated for UE %d on CC_id %d: continue \n",
|
||||||
module_idP, frameP, UE_id, CC_id, nb_rb_used0[CC_id], ue_sched_ctl->pre_nb_available_rbs[CC_id], nCCE[CC_id], aggregation);
|
module_idP, frameP, UE_id, CC_id);
|
||||||
//if(mac_xface->get_transmission_mode(module_idP,rnti)==5)
|
//if(mac_xface->get_transmission_mode(module_idP,rnti)==5)
|
||||||
continue_flag=1; //to next user (there might be rbs availiable for other UEs in TM5
|
continue_flag=1; //to next user (there might be rbs availiable for other UEs in TM5
|
||||||
// else
|
// else
|
||||||
@@ -540,7 +542,6 @@ schedule_ue_spec(
|
|||||||
UE_list);
|
UE_list);
|
||||||
// update UL DAI after DLSCH scheduling
|
// update UL DAI after DLSCH scheduling
|
||||||
set_ul_DAI(module_idP,UE_id,CC_id,frameP,subframeP,frame_parms);
|
set_ul_DAI(module_idP,UE_id,CC_id,frameP,subframeP,frame_parms);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
if (continue_flag == 1 ) {
|
if (continue_flag == 1 ) {
|
||||||
@@ -587,11 +588,10 @@ schedule_ue_spec(
|
|||||||
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = 0;
|
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
LOG_D(MAC,"[eNB %d] Frame %d: Scheduling UE %d on CC_id %d (rnti %x, harq_pid %d, round %d, rb %d, cqi %d, mcs %d, ncc %d, rrc %d)\n",
|
LOG_D(MAC,"[eNB %d] Frame %d: Scheduling UE %d on CC_id %d (rnti %x, harq_pid %d, round %d, rb %d, cqi %d, mcs %d, rrc %d)\n",
|
||||||
module_idP, frameP, UE_id,CC_id,rnti,harq_pid, round,nb_available_rb,
|
module_idP, frameP, UE_id,CC_id,rnti,harq_pid, round,nb_available_rb,
|
||||||
eNB_UE_stats->DL_cqi[0], eNB_UE_stats->dlsch_mcs1,
|
eNB_UE_stats->DL_cqi[0], eNB_UE_stats->dlsch_mcs1,
|
||||||
nCCE[CC_id],
|
UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status);
|
||||||
UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status);
|
|
||||||
|
|
||||||
|
|
||||||
// Note this code is for a specific DCI format
|
// Note this code is for a specific DCI format
|
||||||
@@ -641,8 +641,6 @@ schedule_ue_spec(
|
|||||||
|
|
||||||
nb_available_rb -= nb_rb;
|
nb_available_rb -= nb_rb;
|
||||||
aggregation = process_ue_cqi(module_idP,UE_id);
|
aggregation = process_ue_cqi(module_idP,UE_id);
|
||||||
nCCE[CC_id]-=(1<<aggregation); // adjust the remaining nCCE
|
|
||||||
nCCE_used[CC_id] += (1<<aggregation);
|
|
||||||
|
|
||||||
|
|
||||||
PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = nb_rb;
|
PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = nb_rb;
|
||||||
@@ -789,7 +787,6 @@ schedule_ue_spec(
|
|||||||
UE_list->eNB_UE_stats[CC_id][UE_id].num_retransmission+=1;
|
UE_list->eNB_UE_stats[CC_id][UE_id].num_retransmission+=1;
|
||||||
UE_list->eNB_UE_stats[CC_id][UE_id].rbs_used_retx=nb_rb;
|
UE_list->eNB_UE_stats[CC_id][UE_id].rbs_used_retx=nb_rb;
|
||||||
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used_retx+=nb_rb;
|
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used_retx+=nb_rb;
|
||||||
UE_list->eNB_UE_stats[CC_id][UE_id].ncce_used_retx=nCCE[CC_id];
|
|
||||||
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1=eNB_UE_stats->dlsch_mcs1;
|
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1=eNB_UE_stats->dlsch_mcs1;
|
||||||
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs2=eNB_UE_stats->dlsch_mcs1;
|
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs2=eNB_UE_stats->dlsch_mcs1;
|
||||||
} else {
|
} else {
|
||||||
@@ -806,29 +803,7 @@ schedule_ue_spec(
|
|||||||
// check first for RLC data on DCCH
|
// check first for RLC data on DCCH
|
||||||
// add the length for all the control elements (timing adv, drx, etc) : header + payload
|
// add the length for all the control elements (timing adv, drx, etc) : header + payload
|
||||||
|
|
||||||
//#ifndef EXMIMO_IOT
|
ta_len = (ue_sched_ctl->ta_update!=0) ? 2 : 0;
|
||||||
// to be checked by RK, NN, FK
|
|
||||||
uint8_t update_TA=4;
|
|
||||||
|
|
||||||
switch (frame_parms[CC_id]->N_RB_DL) {
|
|
||||||
case 6:
|
|
||||||
update_TA = 1;
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 25:
|
|
||||||
update_TA = 4;
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 50:
|
|
||||||
update_TA = 8;
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 100:
|
|
||||||
update_TA = 16;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
ta_len = ((eNB_UE_stats->timing_advance_update/update_TA)!=0) ? 2 : 0;
|
|
||||||
|
|
||||||
header_len_dcch = 2; // 2 bytes DCCH SDU subheader
|
header_len_dcch = 2; // 2 bytes DCCH SDU subheader
|
||||||
|
|
||||||
@@ -1076,11 +1051,6 @@ schedule_ue_spec(
|
|||||||
post_padding = TBS - sdu_length_total - header_len_dcch - header_len_dtch - ta_len ; // 1 is for the postpadding header
|
post_padding = TBS - sdu_length_total - header_len_dcch - header_len_dtch - ta_len ; // 1 is for the postpadding header
|
||||||
}
|
}
|
||||||
|
|
||||||
//#ifndef EXMIMO_IOT
|
|
||||||
ta_update = eNB_UE_stats->timing_advance_update/update_TA;
|
|
||||||
/*#else
|
|
||||||
ta_update = 0;
|
|
||||||
#endif*/
|
|
||||||
|
|
||||||
offset = generate_dlsch_header((unsigned char*)UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0],
|
offset = generate_dlsch_header((unsigned char*)UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0],
|
||||||
// offset = generate_dlsch_header((unsigned char*)eNB_mac_inst[0].DLSCH_pdu[0][0].payload[0],
|
// offset = generate_dlsch_header((unsigned char*)eNB_mac_inst[0].DLSCH_pdu[0][0].payload[0],
|
||||||
@@ -1088,17 +1058,17 @@ schedule_ue_spec(
|
|||||||
sdu_lengths, //
|
sdu_lengths, //
|
||||||
sdu_lcids,
|
sdu_lcids,
|
||||||
255, // no drx
|
255, // no drx
|
||||||
ta_update, // timing advance
|
ue_sched_ctl->ta_update, // timing advance
|
||||||
NULL, // contention res id
|
NULL, // contention res id
|
||||||
padding,
|
padding,
|
||||||
post_padding);
|
post_padding);
|
||||||
|
|
||||||
//#ifdef DEBUG_eNB_SCHEDULER
|
//#ifdef DEBUG_eNB_SCHEDULER
|
||||||
if (ta_update) {
|
if (ue_sched_ctl->ta_update) {
|
||||||
LOG_I(MAC,
|
LOG_I(MAC,
|
||||||
"[eNB %d][DLSCH] Frame %d Generate header for UE_id %d on CC_id %d: sdu_length_total %d, num_sdus %d, sdu_lengths[0] %d, sdu_lcids[0] %d => payload offset %d,timing advance value : %d, padding %d,post_padding %d,(mcs %d, TBS %d, nb_rb %d),header_dcch %d, header_dtch %d\n",
|
"[eNB %d][DLSCH] Frame %d Generate header for UE_id %d on CC_id %d: sdu_length_total %d, num_sdus %d, sdu_lengths[0] %d, sdu_lcids[0] %d => payload offset %d,timing advance value : %d, padding %d,post_padding %d,(mcs %d, TBS %d, nb_rb %d),header_dcch %d, header_dtch %d\n",
|
||||||
module_idP,frameP, UE_id, CC_id, sdu_length_total,num_sdus,sdu_lengths[0],sdu_lcids[0],offset,
|
module_idP,frameP, UE_id, CC_id, sdu_length_total,num_sdus,sdu_lengths[0],sdu_lcids[0],offset,
|
||||||
ta_update,padding,post_padding,mcs,TBS,nb_rb,header_len_dcch,header_len_dtch);
|
ue_sched_ctl->ta_update,padding,post_padding,mcs,TBS,nb_rb,header_len_dcch,header_len_dtch);
|
||||||
}
|
}
|
||||||
|
|
||||||
//#endif
|
//#endif
|
||||||
@@ -1130,8 +1100,6 @@ schedule_ue_spec(
|
|||||||
}
|
}
|
||||||
|
|
||||||
aggregation = process_ue_cqi(module_idP,UE_id);
|
aggregation = process_ue_cqi(module_idP,UE_id);
|
||||||
nCCE[CC_id]-=(1<<aggregation); // adjust the remaining nCCE
|
|
||||||
nCCE_used[CC_id]+=(1<<aggregation); // adjust the remaining nCCE
|
|
||||||
UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid] = nb_rb;
|
UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid] = nb_rb;
|
||||||
|
|
||||||
add_ue_dlsch_info(module_idP,
|
add_ue_dlsch_info(module_idP,
|
||||||
@@ -1145,7 +1113,6 @@ schedule_ue_spec(
|
|||||||
|
|
||||||
UE_list->eNB_UE_stats[CC_id][UE_id].rbs_used = nb_rb;
|
UE_list->eNB_UE_stats[CC_id][UE_id].rbs_used = nb_rb;
|
||||||
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used += nb_rb;
|
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used += nb_rb;
|
||||||
UE_list->eNB_UE_stats[CC_id][UE_id].ncce_used = nCCE[CC_id];
|
|
||||||
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1=eNB_UE_stats->dlsch_mcs1;
|
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1=eNB_UE_stats->dlsch_mcs1;
|
||||||
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs2=mcs;
|
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs2=mcs;
|
||||||
UE_list->eNB_UE_stats[CC_id][UE_id].TBS = TBS;
|
UE_list->eNB_UE_stats[CC_id][UE_id].TBS = TBS;
|
||||||
@@ -1166,7 +1133,7 @@ schedule_ue_spec(
|
|||||||
// this is the normalized RX power
|
// this is the normalized RX power
|
||||||
eNB_UE_stats = mac_xface->get_eNB_UE_stats(module_idP,CC_id,rnti);
|
eNB_UE_stats = mac_xface->get_eNB_UE_stats(module_idP,CC_id,rnti);
|
||||||
normalized_rx_power = eNB_UE_stats->Po_PUCCH_dBm;
|
normalized_rx_power = eNB_UE_stats->Po_PUCCH_dBm;
|
||||||
target_rx_power = mac_xface->get_target_pucch_rx_power(module_idP,CC_id) + 10;
|
target_rx_power = mac_xface->get_target_pucch_rx_power(module_idP,CC_id) + 20;
|
||||||
|
|
||||||
// this assumes accumulated tpc
|
// this assumes accumulated tpc
|
||||||
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
|
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
|
||||||
@@ -1178,6 +1145,7 @@ schedule_ue_spec(
|
|||||||
|
|
||||||
UE_list->UE_template[CC_id][UE_id].pucch_tpc_tx_frame=frameP;
|
UE_list->UE_template[CC_id][UE_id].pucch_tpc_tx_frame=frameP;
|
||||||
UE_list->UE_template[CC_id][UE_id].pucch_tpc_tx_subframe=subframeP;
|
UE_list->UE_template[CC_id][UE_id].pucch_tpc_tx_subframe=subframeP;
|
||||||
|
|
||||||
if (normalized_rx_power>(target_rx_power+1)) {
|
if (normalized_rx_power>(target_rx_power+1)) {
|
||||||
tpc = 0; //-1
|
tpc = 0; //-1
|
||||||
tpc_accumulated--;
|
tpc_accumulated--;
|
||||||
@@ -1187,9 +1155,11 @@ schedule_ue_spec(
|
|||||||
} else {
|
} else {
|
||||||
tpc = 1; //0
|
tpc = 1; //0
|
||||||
}
|
}
|
||||||
LOG_D(MAC,"[eNB %d] DLSCH scheduler: frame %d, subframe %d, harq_pid %d, tpc %d, accumulated %d, normalized/target rx power %d/%d\n",
|
/*
|
||||||
|
LOG_I(MAC,"[eNB %d] DLSCH scheduler: frame %d, subframe %d, harq_pid %d, tpc %d, accumulated %d, normalized/target rx power %d/%d\n",
|
||||||
module_idP,frameP, subframeP,harq_pid,tpc,
|
module_idP,frameP, subframeP,harq_pid,tpc,
|
||||||
tpc_accumulated,normalized_rx_power,target_rx_power);
|
tpc_accumulated,normalized_rx_power,target_rx_power);*/
|
||||||
|
|
||||||
} // Po_PUCCH has been updated
|
} // Po_PUCCH has been updated
|
||||||
else {
|
else {
|
||||||
tpc = 1; //0
|
tpc = 1; //0
|
||||||
@@ -1495,10 +1465,9 @@ schedule_ue_spec(
|
|||||||
if (frame_parms[CC_id]->frame_type == TDD) {
|
if (frame_parms[CC_id]->frame_type == TDD) {
|
||||||
set_ul_DAI(module_idP,UE_id,CC_id,frameP,subframeP,frame_parms);
|
set_ul_DAI(module_idP,UE_id,CC_id,frameP,subframeP,frame_parms);
|
||||||
}
|
}
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
//printf("MAC nCCE : %d\n",*nCCE_used);
|
} // UE_id loop
|
||||||
|
} // CC_id loop
|
||||||
|
|
||||||
|
|
||||||
stop_meas(&eNB->schedule_dlsch);
|
stop_meas(&eNB->schedule_dlsch);
|
||||||
@@ -1509,13 +1478,11 @@ schedule_ue_spec(
|
|||||||
//------------------------------------------------------------------------------
|
//------------------------------------------------------------------------------
|
||||||
void
|
void
|
||||||
fill_DLSCH_dci(
|
fill_DLSCH_dci(
|
||||||
module_id_t module_idP,
|
module_id_t module_idP,
|
||||||
frame_t frameP,
|
frame_t frameP,
|
||||||
sub_frame_t subframeP,
|
sub_frame_t subframeP,
|
||||||
uint32_t* RBallocP,
|
int* mbsfn_flagP
|
||||||
uint8_t RA_scheduledP,
|
)
|
||||||
int* mbsfn_flagP
|
|
||||||
)
|
|
||||||
//------------------------------------------------------------------------------
|
//------------------------------------------------------------------------------
|
||||||
{
|
{
|
||||||
|
|
||||||
@@ -1523,10 +1490,9 @@ fill_DLSCH_dci(
|
|||||||
int UE_id = -1;
|
int UE_id = -1;
|
||||||
uint8_t first_rb,nb_rb=3;
|
uint8_t first_rb,nb_rb=3;
|
||||||
rnti_t rnti;
|
rnti_t rnti;
|
||||||
unsigned char vrb_map[100];
|
unsigned char *vrb_map;
|
||||||
uint8_t rballoc_sub[25];
|
uint8_t rballoc_sub[25];
|
||||||
//uint8_t number_of_subbands=13;
|
//uint8_t number_of_subbands=13;
|
||||||
uint32_t *rballoc=RBallocP;
|
|
||||||
|
|
||||||
unsigned char round;
|
unsigned char round;
|
||||||
unsigned char harq_pid;
|
unsigned char harq_pid;
|
||||||
@@ -1549,597 +1515,7 @@ fill_DLSCH_dci(
|
|||||||
if (mbsfn_flagP[CC_id]>0)
|
if (mbsfn_flagP[CC_id]>0)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
DCI_pdu = &eNB->common_channels[CC_id].DCI_pdu;
|
DCI_pdu = &eNB->common_channels[CC_id].DCI_pdu;
|
||||||
BCCH_alloc_pdu=(void*)&eNB->common_channels[CC_id].BCCH_alloc_pdu;
|
|
||||||
// clear vrb_map
|
|
||||||
memset(vrb_map,0,100);
|
|
||||||
|
|
||||||
|
|
||||||
// SI DLSCH
|
|
||||||
// printf("BCCH check\n");
|
|
||||||
if (eNB->common_channels[CC_id].bcch_active == 1) {
|
|
||||||
eNB->common_channels[CC_id].bcch_active = 0;
|
|
||||||
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d subframeP %d: BCCH active\n", module_idP, CC_id, frameP, subframeP);
|
|
||||||
// randomize frequency allocation for SI
|
|
||||||
first_rb = 10;//(unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));
|
|
||||||
|
|
||||||
/* Where is this from, should be removed!!!!
|
|
||||||
|
|
||||||
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
|
|
||||||
|
|
||||||
}
|
|
||||||
else {
|
|
||||||
BCCH_alloc_pdu_fdd.rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(BCCH_alloc_pdu_fdd.vrb_type,BCCH_alloc_pdu_fdd.rballoc);
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
vrb_map[first_rb] = 1;
|
|
||||||
vrb_map[first_rb+1] = 1;
|
|
||||||
vrb_map[first_rb+2] = 1;
|
|
||||||
vrb_map[first_rb+3] = 1;
|
|
||||||
|
|
||||||
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
|
|
||||||
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
|
||||||
case 6:
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
|
|
||||||
add_common_dci(DCI_pdu,
|
|
||||||
BCCH_alloc_pdu,
|
|
||||||
SI_RNTI,
|
|
||||||
sizeof(DCI1A_1_5MHz_TDD_1_6_t),
|
|
||||||
2,
|
|
||||||
sizeof_DCI1A_1_5MHz_TDD_1_6_t,
|
|
||||||
format1A,0);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 25:
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
|
|
||||||
add_common_dci(DCI_pdu,
|
|
||||||
BCCH_alloc_pdu,
|
|
||||||
SI_RNTI,
|
|
||||||
sizeof(DCI1A_5MHz_TDD_1_6_t),
|
|
||||||
2,
|
|
||||||
sizeof_DCI1A_5MHz_TDD_1_6_t,
|
|
||||||
format1A,0);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 50:
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
|
|
||||||
add_common_dci(DCI_pdu,
|
|
||||||
BCCH_alloc_pdu,
|
|
||||||
SI_RNTI,
|
|
||||||
sizeof(DCI1A_10MHz_TDD_1_6_t),
|
|
||||||
2,
|
|
||||||
sizeof_DCI1A_10MHz_TDD_1_6_t,
|
|
||||||
format1A,0);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 100:
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
|
|
||||||
add_common_dci(DCI_pdu,
|
|
||||||
BCCH_alloc_pdu,
|
|
||||||
SI_RNTI,
|
|
||||||
sizeof(DCI1A_20MHz_TDD_1_6_t),
|
|
||||||
2,
|
|
||||||
sizeof_DCI1A_20MHz_TDD_1_6_t,
|
|
||||||
format1A,0);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
|
||||||
case 6:
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
|
|
||||||
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
|
|
||||||
add_common_dci(DCI_pdu,
|
|
||||||
BCCH_alloc_pdu,
|
|
||||||
SI_RNTI,
|
|
||||||
sizeof(DCI1A_1_5MHz_FDD_t),
|
|
||||||
2,
|
|
||||||
sizeof_DCI1A_1_5MHz_FDD_t,
|
|
||||||
format1A,0);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 25:
|
|
||||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
|
|
||||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
|
||||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
|
|
||||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
|
|
||||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
|
||||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
|
|
||||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
|
|
||||||
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
|
|
||||||
add_common_dci(DCI_pdu,
|
|
||||||
BCCH_alloc_pdu,
|
|
||||||
SI_RNTI,
|
|
||||||
sizeof(DCI1A_5MHz_FDD_t),
|
|
||||||
2,
|
|
||||||
sizeof_DCI1A_5MHz_FDD_t,
|
|
||||||
format1A,0);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 50:
|
|
||||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
|
|
||||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
|
||||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
|
|
||||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
|
|
||||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
|
||||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
|
|
||||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
|
|
||||||
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
|
|
||||||
add_common_dci(DCI_pdu,
|
|
||||||
BCCH_alloc_pdu,
|
|
||||||
SI_RNTI,
|
|
||||||
sizeof(DCI1A_10MHz_FDD_t),
|
|
||||||
2,
|
|
||||||
sizeof_DCI1A_10MHz_FDD_t,
|
|
||||||
format1A,0);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 100:
|
|
||||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
|
|
||||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
|
||||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
|
|
||||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
|
|
||||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
|
||||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
|
|
||||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
|
|
||||||
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
|
|
||||||
add_common_dci(DCI_pdu,
|
|
||||||
BCCH_alloc_pdu,
|
|
||||||
SI_RNTI,
|
|
||||||
sizeof(DCI1A_20MHz_FDD_t),
|
|
||||||
2,
|
|
||||||
sizeof_DCI1A_20MHz_FDD_t,
|
|
||||||
format1A,0);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (RA_scheduledP == 1) {
|
|
||||||
for (i=0; i<NB_RA_PROC_MAX; i++) {
|
|
||||||
|
|
||||||
RA_template = &eNB->common_channels[CC_id].RA_template[i];
|
|
||||||
|
|
||||||
if (RA_template->generate_rar == 1) {
|
|
||||||
|
|
||||||
//FK: postponed to fill_rar
|
|
||||||
//RA_template->generate_rar = 0;
|
|
||||||
|
|
||||||
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generating RAR DCI (proc %d), RA_active %d format 1A (%d,%d))\n",
|
|
||||||
module_idP, CC_id, frameP, subframeP,i,
|
|
||||||
RA_template->RA_active,
|
|
||||||
RA_template->RA_dci_fmt1,
|
|
||||||
RA_template->RA_dci_size_bits1);
|
|
||||||
|
|
||||||
// randomize frequency allocation for RA
|
|
||||||
while (1) {
|
|
||||||
first_rb = (unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));
|
|
||||||
|
|
||||||
if ((vrb_map[first_rb] != 1) && (vrb_map[first_rb+3] != 1))
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
vrb_map[first_rb] = 1;
|
|
||||||
vrb_map[first_rb+1] = 1;
|
|
||||||
vrb_map[first_rb+2] = 1;
|
|
||||||
vrb_map[first_rb+3] = 1;
|
|
||||||
|
|
||||||
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
|
|
||||||
switch(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
|
||||||
case 6:
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 25:
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 50:
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 100:
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
switch(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
|
||||||
case 6:
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 25:
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_UL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 50:
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 100:
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
add_common_dci(DCI_pdu,
|
|
||||||
(void*)&RA_template->RA_alloc_pdu1[0],
|
|
||||||
RA_template->RA_rnti,
|
|
||||||
RA_template->RA_dci_size_bytes1,
|
|
||||||
2,
|
|
||||||
RA_template->RA_dci_size_bits1,
|
|
||||||
RA_template->RA_dci_fmt1,
|
|
||||||
1);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d: Adding common dci for RA%d (RAR) RA_active %d\n",
|
|
||||||
module_idP,CC_id,frameP,i, RA_template->RA_active);
|
|
||||||
}
|
|
||||||
|
|
||||||
if (RA_template->generate_Msg4_dci == 1) {
|
|
||||||
|
|
||||||
// randomize frequency allocation for RA
|
|
||||||
while (1) {
|
|
||||||
first_rb = (unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));
|
|
||||||
|
|
||||||
if ((vrb_map[first_rb] != 1) && (vrb_map[first_rb+3] != 1))
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
vrb_map[first_rb] = 1;
|
|
||||||
vrb_map[first_rb+1] = 1;
|
|
||||||
vrb_map[first_rb+2] = 1;
|
|
||||||
vrb_map[first_rb+3] = 1;
|
|
||||||
|
|
||||||
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
|
|
||||||
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
|
||||||
case 6:
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
|
||||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 25:
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 50:
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
|
||||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 100:
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
|
||||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
|
||||||
|
|
||||||
case 6:
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
|
||||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 25:
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 50:
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
|
||||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 100:
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
|
||||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
add_ue_spec_dci(DCI_pdu,
|
|
||||||
(void*)&RA_template->RA_alloc_pdu2[0],
|
|
||||||
RA_template->rnti,
|
|
||||||
RA_template->RA_dci_size_bytes2,
|
|
||||||
1,
|
|
||||||
RA_template->RA_dci_size_bits2,
|
|
||||||
RA_template->RA_dci_fmt2,
|
|
||||||
0);
|
|
||||||
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Adding ue specific dci (rnti %x) for Msg4\n",
|
|
||||||
module_idP,CC_id,frameP,subframeP,RA_template->rnti);
|
|
||||||
RA_template->generate_Msg4_dci=0;
|
|
||||||
|
|
||||||
} else if (RA_template->wait_ack_Msg4==1) {
|
|
||||||
// check HARQ status and retransmit if necessary
|
|
||||||
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Checking if Msg4 was acknowledged: \n",
|
|
||||||
module_idP,CC_id,frameP,subframeP);
|
|
||||||
// Get candidate harq_pid from PHY
|
|
||||||
mac_xface->get_ue_active_harq_pid(module_idP,CC_id,RA_template->rnti,frameP,subframeP,&harq_pid,&round,0);
|
|
||||||
|
|
||||||
if (round>0) {
|
|
||||||
//RA_template->wait_ack_Msg4++;
|
|
||||||
// we have to schedule a retransmission
|
|
||||||
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
|
||||||
} else {
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
|
||||||
}
|
|
||||||
|
|
||||||
// randomize frequency allocation for RA
|
|
||||||
while (1) {
|
|
||||||
first_rb = (unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));
|
|
||||||
|
|
||||||
if ((vrb_map[first_rb] != 1) && (vrb_map[first_rb+3] != 1))
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
vrb_map[first_rb] = 1;
|
|
||||||
vrb_map[first_rb+1] = 1;
|
|
||||||
vrb_map[first_rb+2] = 1;
|
|
||||||
vrb_map[first_rb+3] = 1;
|
|
||||||
|
|
||||||
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_UL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
|
||||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
|
||||||
} else {
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_UL,first_rb,4);
|
|
||||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
|
||||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
|
||||||
}
|
|
||||||
|
|
||||||
add_ue_spec_dci(DCI_pdu,
|
|
||||||
(void*)&RA_template->RA_alloc_pdu2[0],
|
|
||||||
RA_template->rnti,
|
|
||||||
RA_template->RA_dci_size_bytes2,
|
|
||||||
2,
|
|
||||||
RA_template->RA_dci_size_bits2,
|
|
||||||
RA_template->RA_dci_fmt2,
|
|
||||||
0);
|
|
||||||
LOG_W(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Msg4 not acknowledged, adding ue specific dci (rnti %x) for RA (Msg4 Retransmission)\n",
|
|
||||||
module_idP,CC_id,frameP,subframeP,RA_template->rnti);
|
|
||||||
} else {
|
|
||||||
/* msg4 not received
|
|
||||||
if ((round == 0) && (RA_template->wait_ack_Msg4>1){
|
|
||||||
remove UE instance across all the layers: mac_xface->cancel_RA();
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d : Msg4 acknowledged\n",module_idP,CC_id,frameP,subframeP);
|
|
||||||
RA_template->wait_ack_Msg4=0;
|
|
||||||
RA_template->RA_active=FALSE;
|
|
||||||
UE_id = find_UE_id(module_idP,RA_template->rnti);
|
|
||||||
DevAssert( UE_id != -1 );
|
|
||||||
eNB_mac_inst[module_idP].UE_list.UE_template[UE_PCCID(module_idP,UE_id)][UE_id].configured=TRUE;
|
|
||||||
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
} // RA is scheduled in this subframeP
|
|
||||||
|
|
||||||
|
|
||||||
// UE specific DCIs
|
// UE specific DCIs
|
||||||
@@ -2161,11 +1537,6 @@ fill_DLSCH_dci(
|
|||||||
/// Synchronizing rballoc with rballoc_sub
|
/// Synchronizing rballoc with rballoc_sub
|
||||||
for(i=0; i<PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RBG; i++) {
|
for(i=0; i<PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RBG; i++) {
|
||||||
rballoc_sub[i] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][i];
|
rballoc_sub[i] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][i];
|
||||||
|
|
||||||
if(rballoc_sub[i] == 1) {
|
|
||||||
rballoc[CC_id] |= (0x0001<<i); // TO be FIXED!!!!!!
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
switch(mac_xface->get_transmission_mode(module_idP,CC_id,rnti)) {
|
switch(mac_xface->get_transmission_mode(module_idP,CC_id,rnti)) {
|
||||||
@@ -2174,7 +1545,7 @@ fill_DLSCH_dci(
|
|||||||
case 1:
|
case 1:
|
||||||
|
|
||||||
case 2:
|
case 2:
|
||||||
LOG_D(MAC,"[eNB %d] CC_id %d Adding UE %d spec DCI for %d PRBS (rb alloc: %x) \n",module_idP, CC_id, UE_id, nb_rb,rballoc);
|
LOG_D(MAC,"[eNB %d] CC_id %d Adding UE %d spec DCI for %d PRBS \n",module_idP, CC_id, UE_id, nb_rb);
|
||||||
|
|
||||||
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
|
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
|
||||||
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
||||||
@@ -2267,7 +1638,7 @@ fill_DLSCH_dci(
|
|||||||
|
|
||||||
case 3:
|
case 3:
|
||||||
LOG_D(MAC,"[eNB %d] CC_id %d Adding Format 2A UE %d spec DCI for %d PRBS (rb alloc: %x) \n",
|
LOG_D(MAC,"[eNB %d] CC_id %d Adding Format 2A UE %d spec DCI for %d PRBS (rb alloc: %x) \n",
|
||||||
module_idP, CC_id, UE_id, nb_rb,rballoc);
|
module_idP, CC_id, UE_id, nb_rb);
|
||||||
|
|
||||||
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
|
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
|
||||||
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
||||||
|
|||||||
@@ -267,6 +267,7 @@ int add_new_ue(module_id_t mod_idP, int cc_idP, rnti_t rntiP,int harq_pidP)
|
|||||||
UE_list->ordered_ULCCids[0][UE_id] = cc_idP;
|
UE_list->ordered_ULCCids[0][UE_id] = cc_idP;
|
||||||
UE_list->num_UEs++;
|
UE_list->num_UEs++;
|
||||||
UE_list->active[UE_id] = TRUE;
|
UE_list->active[UE_id] = TRUE;
|
||||||
|
memset((void*)&UE_list->UE_sched_ctrl[UE_id],0,sizeof(UE_sched_ctrl));
|
||||||
|
|
||||||
for (j=0; j<8; j++) {
|
for (j=0; j<8; j++) {
|
||||||
UE_list->UE_template[cc_idP][UE_id].oldNDI[j] = (j==0)?1:0; // 1 because first transmission is with format1A (Msg4) for harq_pid 0
|
UE_list->UE_template[cc_idP][UE_id].oldNDI[j] = (j==0)?1:0; // 1 because first transmission is with format1A (Msg4) for harq_pid 0
|
||||||
@@ -879,3 +880,230 @@ int get_nb_subband(void)
|
|||||||
return nb_sb;
|
return nb_sb;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void init_CCE_table(int module_idP,int CC_idP)
|
||||||
|
{
|
||||||
|
memset(eNB_mac_inst[module_idP].CCE_table[CC_idP],0,800*sizeof(int));
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
int get_nCCE_offset(int *CCE_table,
|
||||||
|
const unsigned char L,
|
||||||
|
const int nCCE,
|
||||||
|
const int common_dci,
|
||||||
|
const unsigned short rnti,
|
||||||
|
const unsigned char subframe)
|
||||||
|
{
|
||||||
|
|
||||||
|
int search_space_free,m,nb_candidates = 0,l,i;
|
||||||
|
unsigned int Yk;
|
||||||
|
/*
|
||||||
|
printf("CCE Allocation: ");
|
||||||
|
for (i=0;i<nCCE;i++)
|
||||||
|
printf("%d.",CCE_table[i]);
|
||||||
|
printf("\n");
|
||||||
|
*/
|
||||||
|
if (common_dci == 1) {
|
||||||
|
// check CCE(0 ... L-1)
|
||||||
|
nb_candidates = (L==4) ? 4 : 2;
|
||||||
|
nb_candidates = min(nb_candidates,nCCE/L);
|
||||||
|
|
||||||
|
// printf("Common DCI nb_candidates %d, L %d\n",nb_candidates,L);
|
||||||
|
|
||||||
|
for (m = nb_candidates-1 ; m >=0 ; m--) {
|
||||||
|
|
||||||
|
search_space_free = 1;
|
||||||
|
for (l=0; l<L; l++) {
|
||||||
|
|
||||||
|
// printf("CCE_table[%d] %d\n",(m*L)+l,CCE_table[(m*L)+l]);
|
||||||
|
if (CCE_table[(m*L) + l] == 1) {
|
||||||
|
search_space_free = 0;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (search_space_free == 1) {
|
||||||
|
|
||||||
|
// printf("returning %d\n",m*L);
|
||||||
|
|
||||||
|
for (l=0; l<L; l++)
|
||||||
|
CCE_table[(m*L)+l]=1;
|
||||||
|
return(m*L);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return(-1);
|
||||||
|
|
||||||
|
} else { // Find first available in ue specific search space
|
||||||
|
// according to procedure in Section 9.1.1 of 36.213 (v. 8.6)
|
||||||
|
// compute Yk
|
||||||
|
Yk = (unsigned int)rnti;
|
||||||
|
|
||||||
|
for (i=0; i<=subframe; i++)
|
||||||
|
Yk = (Yk*39827)%65537;
|
||||||
|
|
||||||
|
Yk = Yk % (nCCE/L);
|
||||||
|
|
||||||
|
|
||||||
|
switch (L) {
|
||||||
|
case 1:
|
||||||
|
case 2:
|
||||||
|
nb_candidates = 6;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 4:
|
||||||
|
case 8:
|
||||||
|
nb_candidates = 2;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
DevParam(L, nCCE, rnti);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
LOG_D(MAC,"rnti %x, Yk = %d, nCCE %d (nCCE/L %d),nb_cand %d\n",rnti,Yk,nCCE,nCCE/L,nb_candidates);
|
||||||
|
|
||||||
|
for (m = 0 ; m < nb_candidates ; m++) {
|
||||||
|
search_space_free = 1;
|
||||||
|
|
||||||
|
for (l=0; l<L; l++) {
|
||||||
|
if (CCE_table[(((Yk+m)%(nCCE/L))*L) + l] == 1) {
|
||||||
|
search_space_free = 0;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (search_space_free == 1) {
|
||||||
|
for (l=0; l<L; l++)
|
||||||
|
CCE_table[(((Yk+m)%(nCCE/L))*L)+l]=1;
|
||||||
|
|
||||||
|
return(((Yk+m)%(nCCE/L))*L);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return(-1);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// Allocate the CCEs
|
||||||
|
int allocate_CCEs(int module_idP,
|
||||||
|
int CC_idP,
|
||||||
|
int subframeP,
|
||||||
|
int test_onlyP) {
|
||||||
|
|
||||||
|
|
||||||
|
int *CCE_table = eNB_mac_inst[module_idP].CCE_table[CC_idP];
|
||||||
|
DCI_PDU *DCI_pdu = &eNB_mac_inst[module_idP].common_channels[CC_idP].DCI_pdu;
|
||||||
|
int nCCE_max = mac_xface->get_nCCE_max(module_idP,CC_idP,DCI_pdu->num_pdcch_symbols,subframeP);
|
||||||
|
int fCCE;
|
||||||
|
int i,j;
|
||||||
|
int allocation_is_feasible = 1;
|
||||||
|
DCI_ALLOC_t *dci_alloc;
|
||||||
|
|
||||||
|
|
||||||
|
LOG_D(MAC,"Allocate CCEs subframe %d, test %d : (common %d,uspec %d)\n",subframeP,test_onlyP,DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci);
|
||||||
|
|
||||||
|
init_CCE_table(module_idP,CC_idP);
|
||||||
|
DCI_pdu->nCCE=0;
|
||||||
|
|
||||||
|
while (allocation_is_feasible == 1) {
|
||||||
|
|
||||||
|
for (i=0;i<DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci;i++) {
|
||||||
|
dci_alloc = &DCI_pdu->dci_alloc[i];
|
||||||
|
LOG_D(MAC,"Trying to allocate DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
|
||||||
|
i,DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci,
|
||||||
|
DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci,
|
||||||
|
dci_alloc->rnti,1<<dci_alloc->L,
|
||||||
|
DCI_pdu->nCCE,nCCE_max,DCI_pdu->num_pdcch_symbols);
|
||||||
|
|
||||||
|
if (DCI_pdu->nCCE + (1<<dci_alloc->L) > nCCE_max) {
|
||||||
|
if (DCI_pdu->num_pdcch_symbols == 3)
|
||||||
|
allocation_is_feasible = 0;
|
||||||
|
else {
|
||||||
|
DCI_pdu->num_pdcch_symbols++;
|
||||||
|
nCCE_max = mac_xface->get_nCCE_max(module_idP,CC_idP,DCI_pdu->num_pdcch_symbols,subframeP);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
else { // number of CCEs left can potentially hold this allocation
|
||||||
|
if ((fCCE = get_nCCE_offset(CCE_table,
|
||||||
|
1<<(dci_alloc->L),
|
||||||
|
nCCE_max,
|
||||||
|
(i<DCI_pdu->Num_common_dci) ? 1 : 0,
|
||||||
|
dci_alloc->rnti,
|
||||||
|
subframeP))>=0) {// the allocation is feasible, rnti rule passes
|
||||||
|
|
||||||
|
LOG_D(MAC,"Allocating at nCCE %d\n",fCCE);
|
||||||
|
if (test_onlyP == 0) {
|
||||||
|
DCI_pdu->nCCE += (1<<dci_alloc->L);
|
||||||
|
dci_alloc->firstCCE=fCCE;
|
||||||
|
LOG_D(MAC,"Allocate CCEs subframe %d, test %d\n",subframeP,test_onlyP);
|
||||||
|
}
|
||||||
|
} // fCCE>=0
|
||||||
|
else {
|
||||||
|
if (DCI_pdu->num_pdcch_symbols == 3) {
|
||||||
|
allocation_is_feasible = 0;
|
||||||
|
LOG_I(MAC,"subframe %d: Dropping Allocation for RNTI %x\n",
|
||||||
|
subframeP,dci_alloc->rnti);
|
||||||
|
for (j=0;j<=i;j++){
|
||||||
|
|
||||||
|
LOG_I(MAC,"DCI %d/%d (%d,%d) : rnti %x dci format %d, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
|
||||||
|
i,DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci,
|
||||||
|
DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci,
|
||||||
|
DCI_pdu->dci_alloc[j].rnti,DCI_pdu->dci_alloc[j].format,
|
||||||
|
1<<DCI_pdu->dci_alloc[j].L,
|
||||||
|
DCI_pdu->nCCE,nCCE_max,DCI_pdu->num_pdcch_symbols);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
DCI_pdu->num_pdcch_symbols++;
|
||||||
|
nCCE_max = mac_xface->get_nCCE_max(module_idP,CC_idP,DCI_pdu->num_pdcch_symbols,subframeP);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
} // fCCE==-1
|
||||||
|
} // nCCE <= nCCE_max
|
||||||
|
} // for i = 0 ... num_dcis
|
||||||
|
if (allocation_is_feasible==1)
|
||||||
|
return (0);
|
||||||
|
} // allocation_is_feasible == 1
|
||||||
|
|
||||||
|
return(-1);
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
boolean_t CCE_allocation_infeasible(int module_idP,
|
||||||
|
int CC_idP,
|
||||||
|
int common_flag,
|
||||||
|
int subframe,
|
||||||
|
int aggregation,
|
||||||
|
int rnti) {
|
||||||
|
|
||||||
|
|
||||||
|
DCI_PDU *DCI_pdu = &eNB_mac_inst[module_idP].common_channels[CC_idP].DCI_pdu;
|
||||||
|
DCI_ALLOC_t *dci_alloc;
|
||||||
|
int ret;
|
||||||
|
boolean_t res=FALSE;
|
||||||
|
|
||||||
|
if (common_flag==1) {
|
||||||
|
DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci].rnti = rnti;
|
||||||
|
DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci].L = aggregation;
|
||||||
|
DCI_pdu->Num_common_dci++;
|
||||||
|
ret = allocate_CCEs(module_idP,CC_idP,subframe,1);
|
||||||
|
if (ret==-1)
|
||||||
|
res = TRUE;
|
||||||
|
DCI_pdu->Num_common_dci--;
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci].rnti = rnti;
|
||||||
|
DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci].L = aggregation;
|
||||||
|
DCI_pdu->Num_ue_spec_dci++;
|
||||||
|
ret = allocate_CCEs(module_idP,CC_idP,subframe,1);
|
||||||
|
if (ret==-1)
|
||||||
|
res = TRUE;
|
||||||
|
DCI_pdu->Num_ue_spec_dci--;
|
||||||
|
}
|
||||||
|
return(res);
|
||||||
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -88,6 +88,7 @@ void rx_sdu(
|
|||||||
int ii,j;
|
int ii,j;
|
||||||
eNB_MAC_INST *eNB = &eNB_mac_inst[enb_mod_idP];
|
eNB_MAC_INST *eNB = &eNB_mac_inst[enb_mod_idP];
|
||||||
UE_list_t *UE_list= &eNB->UE_list;
|
UE_list_t *UE_list= &eNB->UE_list;
|
||||||
|
int crnti_rx=0;
|
||||||
|
|
||||||
start_meas(&eNB->rx_ulsch_sdu);
|
start_meas(&eNB->rx_ulsch_sdu);
|
||||||
|
|
||||||
@@ -126,13 +127,11 @@ void rx_sdu(
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
case CRNTI:
|
case CRNTI:
|
||||||
LOG_D(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d (ce %d/%d): Received CRNTI %2.2x%2.2x\n",
|
|
||||||
enb_mod_idP, CC_idP, rx_ces[i], i,num_ce, payload_ptr[0], payload_ptr[1]);
|
|
||||||
UE_id = find_UE_id(enb_mod_idP,(((uint16_t)payload_ptr[0])<<8) + payload_ptr[1]);
|
UE_id = find_UE_id(enb_mod_idP,(((uint16_t)payload_ptr[0])<<8) + payload_ptr[1]);
|
||||||
LOG_I(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d : CRNTI %x (UE_id %d) in Msg3\n",enb_mod_idP, CC_idP, rx_ces[i], (((uint16_t)payload_ptr[0])<<8) + payload_ptr[1],UE_id);
|
LOG_I(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d (ce %d/%d): CRNTI %x (UE_id %d) in Msg3\n",enb_mod_idP, CC_idP, rx_ces[i], i,num_ce,(((uint16_t)payload_ptr[0])<<8) + payload_ptr[1],UE_id);
|
||||||
|
crnti_rx=1;
|
||||||
payload_ptr+=2;
|
payload_ptr+=2;
|
||||||
/* we don't process this CE yet */
|
|
||||||
if (msg3_flagP != NULL) {
|
if (msg3_flagP != NULL) {
|
||||||
*msg3_flagP = 0;
|
*msg3_flagP = 0;
|
||||||
}
|
}
|
||||||
@@ -146,6 +145,9 @@ void rx_sdu(
|
|||||||
LOG_D(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d : Received short BSR LCGID = %u bsr = %d\n",
|
LOG_D(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d : Received short BSR LCGID = %u bsr = %d\n",
|
||||||
enb_mod_idP, CC_idP, rx_ces[i], lcgid, payload_ptr[0] & 0x3f);
|
enb_mod_idP, CC_idP, rx_ces[i], lcgid, payload_ptr[0] & 0x3f);
|
||||||
|
|
||||||
|
if (crnti_rx==1)
|
||||||
|
LOG_I(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d : Received short BSR LCGID = %u bsr = %d\n",
|
||||||
|
enb_mod_idP, CC_idP, rx_ces[i], lcgid, payload_ptr[0] & 0x3f);
|
||||||
if (UE_id != -1) {
|
if (UE_id != -1) {
|
||||||
|
|
||||||
UE_list->UE_template[CC_idP][UE_id].bsr_info[lcgid] = (payload_ptr[0] & 0x3f);
|
UE_list->UE_template[CC_idP][UE_id].bsr_info[lcgid] = (payload_ptr[0] & 0x3f);
|
||||||
@@ -177,6 +179,15 @@ void rx_sdu(
|
|||||||
UE_list->UE_template[CC_idP][UE_id].bsr_info[LCGID1],
|
UE_list->UE_template[CC_idP][UE_id].bsr_info[LCGID1],
|
||||||
UE_list->UE_template[CC_idP][UE_id].bsr_info[LCGID2],
|
UE_list->UE_template[CC_idP][UE_id].bsr_info[LCGID2],
|
||||||
UE_list->UE_template[CC_idP][UE_id].bsr_info[LCGID3]);
|
UE_list->UE_template[CC_idP][UE_id].bsr_info[LCGID3]);
|
||||||
|
if (crnti_rx==1)
|
||||||
|
LOG_I(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d: Received long BSR LCGID0 = %u LCGID1 = "
|
||||||
|
"%u LCGID2 = %u LCGID3 = %u\n",
|
||||||
|
enb_mod_idP, CC_idP,
|
||||||
|
rx_ces[i],
|
||||||
|
UE_list->UE_template[CC_idP][UE_id].bsr_info[LCGID0],
|
||||||
|
UE_list->UE_template[CC_idP][UE_id].bsr_info[LCGID1],
|
||||||
|
UE_list->UE_template[CC_idP][UE_id].bsr_info[LCGID2],
|
||||||
|
UE_list->UE_template[CC_idP][UE_id].bsr_info[LCGID3]);
|
||||||
|
|
||||||
if (UE_list->UE_template[CC_idP][UE_id].bsr_info[LCGID0] == 0 ) {
|
if (UE_list->UE_template[CC_idP][UE_id].bsr_info[LCGID0] == 0 ) {
|
||||||
UE_list->UE_template[CC_idP][UE_id].ul_buffer_creation_time[LCGID0]=0;
|
UE_list->UE_template[CC_idP][UE_id].ul_buffer_creation_time[LCGID0]=0;
|
||||||
@@ -223,7 +234,7 @@ void rx_sdu(
|
|||||||
payload_ptr[0],payload_ptr[1],payload_ptr[2],payload_ptr[3],payload_ptr[4], payload_ptr[5], rntiP);
|
payload_ptr[0],payload_ptr[1],payload_ptr[2],payload_ptr[3],payload_ptr[4], payload_ptr[5], rntiP);
|
||||||
|
|
||||||
for (ii=0; ii<NB_RA_PROC_MAX; ii++) {
|
for (ii=0; ii<NB_RA_PROC_MAX; ii++) {
|
||||||
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %p Checking proc %d : rnti (%x, %x), active %d\n",
|
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Checking proc %d : rnti (%x, %x), active %d\n",
|
||||||
enb_mod_idP, CC_idP, ii,
|
enb_mod_idP, CC_idP, ii,
|
||||||
eNB->common_channels[CC_idP].RA_template[ii].rnti, rntiP,
|
eNB->common_channels[CC_idP].RA_template[ii].rnti, rntiP,
|
||||||
eNB->common_channels[CC_idP].RA_template[ii].RA_active);
|
eNB->common_channels[CC_idP].RA_template[ii].RA_active);
|
||||||
@@ -236,7 +247,7 @@ void rx_sdu(
|
|||||||
if (UE_id < 0) {
|
if (UE_id < 0) {
|
||||||
memcpy(&eNB->common_channels[CC_idP].RA_template[ii].cont_res_id[0],payload_ptr,6);
|
memcpy(&eNB->common_channels[CC_idP].RA_template[ii].cont_res_id[0],payload_ptr,6);
|
||||||
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d CCCH: Received Msg3: length %d, offset %d\n",
|
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d CCCH: Received Msg3: length %d, offset %d\n",
|
||||||
enb_mod_idP,CC_idP,frameP,rx_lengths[ii],payload_ptr-sduP);
|
enb_mod_idP,CC_idP,frameP,rx_lengths[i],payload_ptr-sduP);
|
||||||
|
|
||||||
if ((UE_id=add_new_ue(enb_mod_idP,CC_idP,eNB->common_channels[CC_idP].RA_template[ii].rnti,harq_pidP)) == -1 ) {
|
if ((UE_id=add_new_ue(enb_mod_idP,CC_idP,eNB->common_channels[CC_idP].RA_template[ii].rnti,harq_pidP)) == -1 ) {
|
||||||
mac_xface->macphy_exit("[MAC][eNB] Max user count reached\n");
|
mac_xface->macphy_exit("[MAC][eNB] Max user count reached\n");
|
||||||
@@ -246,7 +257,7 @@ void rx_sdu(
|
|||||||
enb_mod_idP,CC_idP,frameP,eNB->common_channels[CC_idP].RA_template[ii].rnti,UE_id);
|
enb_mod_idP,CC_idP,frameP,eNB->common_channels[CC_idP].RA_template[ii].rnti,UE_id);
|
||||||
} else {
|
} else {
|
||||||
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d CCCH: Received Msg3 from already registered UE %d: length %d, offset %d\n",
|
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d CCCH: Received Msg3 from already registered UE %d: length %d, offset %d\n",
|
||||||
enb_mod_idP,CC_idP,frameP,UE_id,rx_lengths[ii],payload_ptr-sduP);
|
enb_mod_idP,CC_idP,frameP,UE_id,rx_lengths[i],payload_ptr-sduP);
|
||||||
// kill RA procedure
|
// kill RA procedure
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -258,7 +269,7 @@ void rx_sdu(
|
|||||||
rntiP,
|
rntiP,
|
||||||
CCCH,
|
CCCH,
|
||||||
(uint8_t*)payload_ptr,
|
(uint8_t*)payload_ptr,
|
||||||
rx_lengths[ii],
|
rx_lengths[i],
|
||||||
ENB_FLAG_YES,
|
ENB_FLAG_YES,
|
||||||
enb_mod_idP,
|
enb_mod_idP,
|
||||||
0);
|
0);
|
||||||
@@ -297,17 +308,17 @@ void rx_sdu(
|
|||||||
enb_mod_idP,CC_idP,frameP, rx_lengths[i], UE_id, rx_lcids[i]);
|
enb_mod_idP,CC_idP,frameP, rx_lengths[i], UE_id, rx_lcids[i]);
|
||||||
|
|
||||||
mac_rlc_data_ind(
|
mac_rlc_data_ind(
|
||||||
enb_mod_idP,
|
enb_mod_idP,
|
||||||
rntiP,
|
rntiP,
|
||||||
enb_mod_idP,
|
enb_mod_idP,
|
||||||
frameP,
|
frameP,
|
||||||
ENB_FLAG_YES,
|
ENB_FLAG_YES,
|
||||||
MBMS_FLAG_NO,
|
MBMS_FLAG_NO,
|
||||||
rx_lcids[i],
|
rx_lcids[i],
|
||||||
(char *)payload_ptr,
|
(char *)payload_ptr,
|
||||||
rx_lengths[i],
|
rx_lengths[i],
|
||||||
1,
|
1,
|
||||||
NULL);//(unsigned int*)crc_status);
|
NULL);//(unsigned int*)crc_status);
|
||||||
UE_list->eNB_UE_stats[CC_idP][UE_id].num_pdu_rx[rx_lcids[i]]+=1;
|
UE_list->eNB_UE_stats[CC_idP][UE_id].num_pdu_rx[rx_lcids[i]]+=1;
|
||||||
UE_list->eNB_UE_stats[CC_idP][UE_id].num_bytes_rx[rx_lcids[i]]+=rx_lengths[i];
|
UE_list->eNB_UE_stats[CC_idP][UE_id].num_bytes_rx[rx_lcids[i]]+=rx_lengths[i];
|
||||||
}
|
}
|
||||||
@@ -596,12 +607,14 @@ unsigned char *parse_ulsch_header(unsigned char *mac_header,
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void schedule_ulsch(module_id_t module_idP, frame_t frameP,unsigned char cooperation_flag,sub_frame_t subframeP, unsigned char sched_subframe,
|
void schedule_ulsch(module_id_t module_idP,
|
||||||
unsigned int *nCCE) //,int calibration_flag) {
|
frame_t frameP,
|
||||||
{
|
unsigned char cooperation_flag,
|
||||||
|
sub_frame_t subframeP,
|
||||||
|
unsigned char sched_subframe) {
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
unsigned int nCCE_available[MAX_NUM_CCs];
|
|
||||||
uint16_t first_rb[MAX_NUM_CCs],i;
|
uint16_t first_rb[MAX_NUM_CCs],i;
|
||||||
int CC_id;
|
int CC_id;
|
||||||
eNB_MAC_INST *eNB=&eNB_mac_inst[module_idP];
|
eNB_MAC_INST *eNB=&eNB_mac_inst[module_idP];
|
||||||
@@ -612,7 +625,6 @@ void schedule_ulsch(module_id_t module_idP, frame_t frameP,unsigned char coopera
|
|||||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||||
|
|
||||||
first_rb[CC_id] = 1;
|
first_rb[CC_id] = 1;
|
||||||
nCCE_available[CC_id] = mac_xface->get_nCCE_max(module_idP,CC_id) - nCCE[CC_id];
|
|
||||||
|
|
||||||
// UE data info;
|
// UE data info;
|
||||||
// check which UE has data to transmit
|
// check which UE has data to transmit
|
||||||
@@ -644,10 +656,10 @@ void schedule_ulsch(module_id_t module_idP, frame_t frameP,unsigned char coopera
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
schedule_ulsch_rnti(module_idP, cooperation_flag, frameP, subframeP, sched_subframe, nCCE, nCCE_available, first_rb);
|
schedule_ulsch_rnti(module_idP, cooperation_flag, frameP, subframeP, sched_subframe,first_rb);
|
||||||
|
|
||||||
#ifdef CBA
|
#ifdef CBA
|
||||||
schedule_ulsch_cba_rnti(module_idP, cooperation_flag, frameP, subframeP, sched_subframe, nCCE, nCCE_available, first_rb);
|
schedule_ulsch_cba_rnti(module_idP, cooperation_flag, frameP, subframeP, sched_subframe, first_rb);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
@@ -662,8 +674,6 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
|||||||
frame_t frameP,
|
frame_t frameP,
|
||||||
sub_frame_t subframeP,
|
sub_frame_t subframeP,
|
||||||
unsigned char sched_subframe,
|
unsigned char sched_subframe,
|
||||||
unsigned int *nCCE,
|
|
||||||
unsigned int *nCCE_available,
|
|
||||||
uint16_t *first_rb)
|
uint16_t *first_rb)
|
||||||
{
|
{
|
||||||
|
|
||||||
@@ -697,8 +707,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
|||||||
frameP,
|
frameP,
|
||||||
subframeP,
|
subframeP,
|
||||||
first_rb,
|
first_rb,
|
||||||
aggregation,
|
aggregation);
|
||||||
nCCE);
|
|
||||||
|
|
||||||
// LOG_I(MAC,"exiting ulsch preprocesor\n");
|
// LOG_I(MAC,"exiting ulsch preprocesor\n");
|
||||||
|
|
||||||
@@ -729,11 +738,12 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
|||||||
continue; // mac_xface->macphy_exit("[MAC][eNB] Cannot find eNB_UE_stats\n");
|
continue; // mac_xface->macphy_exit("[MAC][eNB] Cannot find eNB_UE_stats\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
if (nCCE_available[CC_id] < (1<<aggregation)) {
|
if (CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,aggregation,rnti)) {
|
||||||
LOG_W(MAC,"[eNB %d] frame %d subframe %d, UE %d CC %d: not enough nCCE (%d)\n", module_idP,frameP,subframeP,UE_id,CC_id,nCCE_available[CC_id]);
|
LOG_W(MAC,"[eNB %d] frame %d subframe %d, UE %d/%x CC %d: not enough nCCE\n", module_idP,frameP,subframeP,UE_id,rnti,CC_id);
|
||||||
continue; // break;
|
continue; // break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// printf("UE %d/%x is feasible, mode %s\n",UE_id,rnti,mode_string[eNB_UE_stats->mode]);
|
||||||
|
|
||||||
if (eNB_UE_stats->mode == PUSCH) { // ue has a ulsch channel
|
if (eNB_UE_stats->mode == PUSCH) { // ue has a ulsch channel
|
||||||
|
|
||||||
@@ -747,9 +757,10 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
|||||||
//should we continue or set harq_pid to 0?
|
//should we continue or set harq_pid to 0?
|
||||||
continue;
|
continue;
|
||||||
} else
|
} else
|
||||||
LOG_T(MAC,"[eNB %d] Frame %d, subframeP %d, UE %d CC %d : got harq pid %d round %d (nCCE %d, rnti %x,mode %s)\n",
|
LOG_T(MAC,"[eNB %d] Frame %d, subframeP %d, UE %d CC %d : got harq pid %d round %d (rnti %x,mode %s)\n",
|
||||||
module_idP,frameP,subframeP,UE_id,CC_id, harq_pid, round,nCCE[CC_id],rnti,mode_string[eNB_UE_stats->mode]);
|
module_idP,frameP,subframeP,UE_id,CC_id, harq_pid, round,rnti,mode_string[eNB_UE_stats->mode]);
|
||||||
|
|
||||||
|
//#undef EXMIMO_IOT
|
||||||
#ifndef EXMIMO_IOT
|
#ifndef EXMIMO_IOT
|
||||||
|
|
||||||
if (((UE_is_to_be_scheduled(module_idP,CC_id,UE_id)>0)) || (round>0) || ((frameP%10)==0))
|
if (((UE_is_to_be_scheduled(module_idP,CC_id,UE_id)>0)) || (round>0) || ((frameP%10)==0))
|
||||||
@@ -1088,9 +1099,6 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
|||||||
subframeP,
|
subframeP,
|
||||||
S_UL_SCHEDULED);
|
S_UL_SCHEDULED);
|
||||||
|
|
||||||
nCCE[CC_id] = nCCE[CC_id] + (1<<aggregation);
|
|
||||||
nCCE_available[CC_id] = mac_xface->get_nCCE_max(module_idP,CC_id) - nCCE[CC_id];
|
|
||||||
|
|
||||||
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generated ULSCH DCI for next UE_id %d, format 0\n", module_idP,CC_id,frameP,subframeP,UE_id);
|
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generated ULSCH DCI for next UE_id %d, format 0\n", module_idP,CC_id,frameP,subframeP,UE_id);
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
dump_dci(frame_parms, &DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci-1]);
|
dump_dci(frame_parms, &DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci-1]);
|
||||||
@@ -1103,8 +1111,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
|||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CBA
|
#ifdef CBA
|
||||||
void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_flag, frame_t frameP, sub_frame_t subframeP, unsigned char sched_subframe, unsigned int *nCCE,
|
void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_flag, frame_t frameP, sub_frame_t subframeP, unsigned char sched_subframe, uint16_t *first_rb)
|
||||||
unsigned int *nCCE_available, uint16_t *first_rb)
|
|
||||||
{
|
{
|
||||||
|
|
||||||
eNB_MAC_INST *eNB = &eNB_mac_inst[module_idP];
|
eNB_MAC_INST *eNB = &eNB_mac_inst[module_idP];
|
||||||
@@ -1163,11 +1170,11 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
|
|||||||
// cba group template uses the exisitng UE template, and thus if a UE
|
// cba group template uses the exisitng UE template, and thus if a UE
|
||||||
// is scheduled, the correspodning group can't be used for CBA
|
// is scheduled, the correspodning group can't be used for CBA
|
||||||
// this can be fixed later
|
// this can be fixed later
|
||||||
if ((total_groups > 0) && (nCCE[CC_id] == 0)) {
|
if (total_groups > 0) {
|
||||||
DCI_pdu = &eNB_mac_inst[module_idP].common_channels[CC_id].DCI_pdu;
|
DCI_pdu = &eNB_mac_inst[module_idP].common_channels[CC_id].DCI_pdu;
|
||||||
|
|
||||||
for (cba_group=0;
|
for (cba_group=0;
|
||||||
(cba_group<total_groups) && (nCCE_available[CC_id]* (total_cba_resources+1) > (1<<aggregation));
|
(cba_group<total_groups) > (1<<aggregation));
|
||||||
cba_group++) {
|
cba_group++) {
|
||||||
// equal weight
|
// equal weight
|
||||||
//weight[cba_group] = floor(total_UEs/active_groups);//find_num_active_UEs_in_cbagroup(module_idP, cba_group);
|
//weight[cba_group] = floor(total_UEs/active_groups);//find_num_active_UEs_in_cbagroup(module_idP, cba_group);
|
||||||
@@ -1255,13 +1262,6 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
|
|||||||
// phase 2 reduce the number of cba allocations among the groups
|
// phase 2 reduce the number of cba allocations among the groups
|
||||||
cba_group=0;
|
cba_group=0;
|
||||||
|
|
||||||
while (nCCE[CC_id] + (1<<aggregation) * total_cba_resources >= nCCE_available[CC_id]) {
|
|
||||||
num_cba_resources[cba_group%total_groups]--;
|
|
||||||
total_cba_resources--;
|
|
||||||
// LOG_N(MAC,"reducing num cba resources to %d for group %d \n", num_cba_resources[cba_group%total_groups], cba_group%total_groups );
|
|
||||||
cba_group++;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (total_cba_resources <= 0) {
|
if (total_cba_resources <= 0) {
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
@@ -1279,11 +1279,11 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
|
|||||||
for (cba_group=0; cba_group<total_groups; cba_group++) {
|
for (cba_group=0; cba_group<total_groups; cba_group++) {
|
||||||
|
|
||||||
LOG_N(MAC,
|
LOG_N(MAC,
|
||||||
"[eNB %d] CC_id %d Frame %d, subframe %d: cba group %d active_ues %d total groups %d mcs %d, available/required rb (%d/%d), num resources %d, ncce (%d/%d required %d \n",
|
"[eNB %d] CC_id %d Frame %d, subframe %d: cba group %d active_ues %d total groups %d mcs %d, available/required rb (%d/%d), num resources %d, ncce required %d \n",
|
||||||
module_idP, CC_id, frameP, subframeP, cba_group,active_UEs[cba_group],total_groups,
|
module_idP, CC_id, frameP, subframeP, cba_group,active_UEs[cba_group],total_groups,
|
||||||
mcs[cba_group], available_rbs,required_rbs[cba_group],
|
mcs[cba_group], available_rbs,required_rbs[cba_group],
|
||||||
num_cba_resources[cba_group],
|
num_cba_resources[cba_group],
|
||||||
nCCE[CC_id],nCCE_available[CC_id],(1<<aggregation) * num_cba_resources[cba_group]);
|
(1<<aggregation) * num_cba_resources[cba_group]);
|
||||||
|
|
||||||
for (cba_resources=0; cba_resources < num_cba_resources[cba_group]; cba_resources++) {
|
for (cba_resources=0; cba_resources < num_cba_resources[cba_group]; cba_resources++) {
|
||||||
rb_table_index =0;
|
rb_table_index =0;
|
||||||
@@ -1309,10 +1309,10 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
|
|||||||
|
|
||||||
first_rb[CC_id]+=rb_table[rb_table_index];
|
first_rb[CC_id]+=rb_table[rb_table_index];
|
||||||
LOG_N(MAC,
|
LOG_N(MAC,
|
||||||
"[eNB %d] CC_id %d Frame %d, subframeP %d: schedule CBA access %d rnti %x, total/required/allocated/remaining rbs (%d/%d/%d/%d), mcs %d, rballoc %d, nCCE (%d/%d)\n",
|
"[eNB %d] CC_id %d Frame %d, subframeP %d: schedule CBA access %d rnti %x, total/required/allocated/remaining rbs (%d/%d/%d/%d), mcs %d, rballoc %d\n",
|
||||||
module_idP, CC_id, frameP, subframeP, cba_group,eNB_mac_inst[module_idP].common_channels[CC_id].cba_rnti[cba_group],
|
module_idP, CC_id, frameP, subframeP, cba_group,eNB_mac_inst[module_idP].common_channels[CC_id].cba_rnti[cba_group],
|
||||||
available_rbs, required_rbs[cba_group], allocated_rbs, remaining_rbs,
|
available_rbs, required_rbs[cba_group], allocated_rbs, remaining_rbs,
|
||||||
mcs[cba_group],rballoc,nCCE_available[CC_id],nCCE[CC_id]);
|
mcs[cba_group],rballoc);
|
||||||
|
|
||||||
switch (frame_parms->N_RB_UL) {
|
switch (frame_parms->N_RB_UL) {
|
||||||
case 6:
|
case 6:
|
||||||
@@ -1425,8 +1425,6 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
nCCE[CC_id] = nCCE[CC_id] + (1<<aggregation) ;
|
|
||||||
nCCE_available[CC_id] = mac_xface->get_nCCE_max(module_idP,CC_id) - nCCE[CC_id];
|
|
||||||
// break;// for the moment only schedule one
|
// break;// for the moment only schedule one
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -468,6 +468,7 @@ int l2_init(LTE_DL_FRAME_PARMS *frame_parms,int eMBMS_active, char *uecap_xer,ui
|
|||||||
mac_xface->get_transmission_mode = get_transmission_mode;
|
mac_xface->get_transmission_mode = get_transmission_mode;
|
||||||
mac_xface->get_rballoc = get_rballoc;
|
mac_xface->get_rballoc = get_rballoc;
|
||||||
mac_xface->get_nb_rb = conv_nprb;
|
mac_xface->get_nb_rb = conv_nprb;
|
||||||
|
mac_xface->get_prb = get_prb;
|
||||||
// mac_xface->get_SB_size = Get_SB_size;
|
// mac_xface->get_SB_size = Get_SB_size;
|
||||||
mac_xface->get_subframe_direction = get_subframe_direction;
|
mac_xface->get_subframe_direction = get_subframe_direction;
|
||||||
mac_xface->Msg3_transmitted = Msg3_tx;
|
mac_xface->Msg3_transmitted = Msg3_tx;
|
||||||
@@ -507,7 +508,7 @@ int l2_init(LTE_DL_FRAME_PARMS *frame_parms,int eMBMS_active, char *uecap_xer,ui
|
|||||||
mac_xface->computeRIV = computeRIV;
|
mac_xface->computeRIV = computeRIV;
|
||||||
mac_xface->get_TBS_DL = get_TBS_DL;
|
mac_xface->get_TBS_DL = get_TBS_DL;
|
||||||
mac_xface->get_TBS_UL = get_TBS_UL;
|
mac_xface->get_TBS_UL = get_TBS_UL;
|
||||||
mac_xface->get_nCCE_max = get_nCCE_max;
|
mac_xface->get_nCCE_max = get_nCCE_mac;
|
||||||
mac_xface->get_nCCE_offset = get_nCCE_offset;
|
mac_xface->get_nCCE_offset = get_nCCE_offset;
|
||||||
mac_xface->get_ue_mode = get_ue_mode;
|
mac_xface->get_ue_mode = get_ue_mode;
|
||||||
mac_xface->phy_config_sib1_eNB = phy_config_sib1_eNB;
|
mac_xface->phy_config_sib1_eNB = phy_config_sib1_eNB;
|
||||||
|
|||||||
@@ -176,6 +176,7 @@ void assign_rbs_required (module_id_t Mod_id,
|
|||||||
eNB_UE_stats[CC_id]->DL_cqi[0], MIN_CQI_VALUE, MAX_CQI_VALUE);
|
eNB_UE_stats[CC_id]->DL_cqi[0], MIN_CQI_VALUE, MAX_CQI_VALUE);
|
||||||
*/
|
*/
|
||||||
eNB_UE_stats[CC_id]->dlsch_mcs1=cqi_to_mcs[eNB_UE_stats[CC_id]->DL_cqi[0]];
|
eNB_UE_stats[CC_id]->dlsch_mcs1=cqi_to_mcs[eNB_UE_stats[CC_id]->DL_cqi[0]];
|
||||||
|
|
||||||
eNB_UE_stats[CC_id]->dlsch_mcs1 = cmin(eNB_UE_stats[CC_id]->dlsch_mcs1,openair_daq_vars.target_ue_dl_mcs);
|
eNB_UE_stats[CC_id]->dlsch_mcs1 = cmin(eNB_UE_stats[CC_id]->dlsch_mcs1,openair_daq_vars.target_ue_dl_mcs);
|
||||||
|
|
||||||
}
|
}
|
||||||
@@ -729,38 +730,123 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#define SF05_LIMIT 1
|
||||||
|
|
||||||
void dlsch_scheduler_pre_processor_reset (int module_idP,
|
void dlsch_scheduler_pre_processor_reset (int module_idP,
|
||||||
int UE_id,
|
int UE_id,
|
||||||
uint8_t CC_id,
|
uint8_t CC_id,
|
||||||
int frameP,
|
int frameP,
|
||||||
int subframeP,
|
int subframeP,
|
||||||
int N_RBG,
|
int N_RBG,
|
||||||
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
|
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
|
||||||
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
|
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
|
||||||
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
|
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
|
||||||
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX])
|
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX])
|
||||||
|
|
||||||
{
|
{
|
||||||
int i;
|
int i,j;
|
||||||
UE_list_t *UE_list=&eNB_mac_inst[module_idP].UE_list;
|
UE_list_t *UE_list=&eNB_mac_inst[module_idP].UE_list;
|
||||||
UE_sched_ctrl *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
|
UE_sched_ctrl *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
|
||||||
rnti_t rnti = UE_RNTI(module_idP,UE_id);
|
rnti_t rnti = UE_RNTI(module_idP,UE_id);
|
||||||
|
uint8_t *vrb_map = &eNB_mac_inst[module_idP].common_channels[CC_id].vrb_map;
|
||||||
|
int RBGsize = PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL/N_RBG;
|
||||||
|
#ifdef SF05_LIMIT
|
||||||
|
int subframe05_limit=0;
|
||||||
|
int sf05_upper=-1,sf05_lower=-1;
|
||||||
|
#endif
|
||||||
|
LTE_eNB_UE_stats *eNB_UE_stats = mac_xface->get_eNB_UE_stats(module_idP,CC_id,rnti);
|
||||||
// initialize harq_pid and round
|
// initialize harq_pid and round
|
||||||
mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,
|
mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,
|
||||||
frameP,subframeP,
|
frameP,subframeP,
|
||||||
&ue_sched_ctl->harq_pid[CC_id],
|
&ue_sched_ctl->harq_pid[CC_id],
|
||||||
&ue_sched_ctl->round[CC_id],
|
&ue_sched_ctl->round[CC_id],
|
||||||
0);
|
0);
|
||||||
|
if (ue_sched_ctl->ta_timer == 0) {
|
||||||
|
|
||||||
|
// WE SHOULD PROTECT the eNB_UE_stats with a mutex here ...
|
||||||
|
|
||||||
|
ue_sched_ctl->ta_timer = 20; // wait 20 subframes before taking TA measurement from PHY
|
||||||
|
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
|
||||||
|
case 6:
|
||||||
|
ue_sched_ctl->ta_update = eNB_UE_stats->timing_advance_update;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 15:
|
||||||
|
ue_sched_ctl->ta_update = eNB_UE_stats->timing_advance_update/2;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 25:
|
||||||
|
ue_sched_ctl->ta_update = eNB_UE_stats->timing_advance_update/4;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 50:
|
||||||
|
ue_sched_ctl->ta_update = eNB_UE_stats->timing_advance_update/8;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 75:
|
||||||
|
ue_sched_ctl->ta_update = eNB_UE_stats->timing_advance_update/12;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 100:
|
||||||
|
ue_sched_ctl->ta_update = eNB_UE_stats->timing_advance_update/16;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
// clear the update in case PHY does not have a new measurement after timer expiry
|
||||||
|
eNB_UE_stats->timing_advance_update = 0;
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
ue_sched_ctl->ta_timer--;
|
||||||
|
ue_sched_ctl->ta_update =0; // don't trigger a timing advance command
|
||||||
|
}
|
||||||
nb_rbs_required[CC_id][UE_id]=0;
|
nb_rbs_required[CC_id][UE_id]=0;
|
||||||
ue_sched_ctl->pre_nb_available_rbs[CC_id] = 0;
|
ue_sched_ctl->pre_nb_available_rbs[CC_id] = 0;
|
||||||
ue_sched_ctl->dl_pow_off[CC_id] = 2;
|
ue_sched_ctl->dl_pow_off[CC_id] = 2;
|
||||||
nb_rbs_required_remaining[CC_id][UE_id] = 0;
|
nb_rbs_required_remaining[CC_id][UE_id] = 0;
|
||||||
|
|
||||||
|
#ifdef SF05_LIMIT
|
||||||
|
switch (N_RBG) {
|
||||||
|
case 6:
|
||||||
|
sf05_lower=0;
|
||||||
|
sf05_upper=5;
|
||||||
|
break;
|
||||||
|
case 8:
|
||||||
|
sf05_lower=2;
|
||||||
|
sf05_upper=5;
|
||||||
|
break;
|
||||||
|
case 13:
|
||||||
|
sf05_lower=4;
|
||||||
|
sf05_upper=7;
|
||||||
|
break;
|
||||||
|
case 17:
|
||||||
|
sf05_lower=7;
|
||||||
|
sf05_upper=9;
|
||||||
|
break;
|
||||||
|
case 25:
|
||||||
|
sf05_lower=11;
|
||||||
|
sf05_upper=13;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
// Initialize Subbands according to VRB map
|
||||||
for (i=0; i<N_RBG; i++) {
|
for (i=0; i<N_RBG; i++) {
|
||||||
ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 0;
|
ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 0;
|
||||||
rballoc_sub[CC_id][i] = 0;
|
rballoc_sub[CC_id][i] = 0;
|
||||||
|
#ifdef SF05_LIMIT
|
||||||
|
// for avoiding 6+ PRBs around DC in subframe 0-5 (avoid excessive errors)
|
||||||
|
|
||||||
|
if ((subframeP==0 || subframeP==5) &&
|
||||||
|
(i>=sf05_lower && i<=sf05_upper))
|
||||||
|
rballoc_sub[CC_id][i]=1;
|
||||||
|
#endif
|
||||||
|
// for SI-RNTI,RA-RNTI and P-RNTI allocations
|
||||||
|
for (j=0;j<RBGsize;j++) {
|
||||||
|
if (vrb_map[j+(i*RBGsize)]!=0) {
|
||||||
|
rballoc_sub[CC_id][i] = 1;
|
||||||
|
LOG_D(MAC,"Frame %d, subframe %d : vrb %d allocated\n",frameP,subframeP,j+(i*RBGsize));
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
LOG_D(MAC,"Frame %d Subframe %d CC_id %d RBG %i : rb_alloc %d\n",frameP,subframeP,CC_id,i,rballoc_sub[CC_id][i]);
|
||||||
MIMO_mode_indicator[CC_id][i] = 2;
|
MIMO_mode_indicator[CC_id][i] = 2;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -828,8 +914,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|||||||
int frameP,
|
int frameP,
|
||||||
sub_frame_t subframeP,
|
sub_frame_t subframeP,
|
||||||
uint16_t *first_rb,
|
uint16_t *first_rb,
|
||||||
uint8_t aggregation,
|
uint8_t aggregation)
|
||||||
uint32_t *nCCE)
|
|
||||||
{
|
{
|
||||||
|
|
||||||
int16_t i;
|
int16_t i;
|
||||||
@@ -839,7 +924,6 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|||||||
int16_t total_remaining_rbs[MAX_NUM_CCs];
|
int16_t total_remaining_rbs[MAX_NUM_CCs];
|
||||||
uint16_t max_num_ue_to_be_scheduled=0,total_ue_count=0;
|
uint16_t max_num_ue_to_be_scheduled=0,total_ue_count=0;
|
||||||
rnti_t rnti= -1;
|
rnti_t rnti= -1;
|
||||||
uint32_t nCCE_to_be_used[MAX_NUM_CCs];
|
|
||||||
UE_list_t *UE_list = &eNB_mac_inst[module_idP].UE_list;
|
UE_list_t *UE_list = &eNB_mac_inst[module_idP].UE_list;
|
||||||
UE_TEMPLATE *UE_template = 0;
|
UE_TEMPLATE *UE_template = 0;
|
||||||
LTE_DL_FRAME_PARMS *frame_parms = 0;
|
LTE_DL_FRAME_PARMS *frame_parms = 0;
|
||||||
@@ -860,7 +944,6 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|||||||
// we need to distribute RBs among UEs
|
// we need to distribute RBs among UEs
|
||||||
// step1: reset the vars
|
// step1: reset the vars
|
||||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||||
nCCE_to_be_used[CC_id]= nCCE[CC_id];
|
|
||||||
total_allocated_rbs[CC_id]=0;
|
total_allocated_rbs[CC_id]=0;
|
||||||
total_remaining_rbs[CC_id]=0;
|
total_remaining_rbs[CC_id]=0;
|
||||||
average_rbs_per_user[CC_id]=0;
|
average_rbs_per_user[CC_id]=0;
|
||||||
@@ -894,11 +977,13 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|||||||
if (UE_template->pre_allocated_nb_rb_ul > 0) {
|
if (UE_template->pre_allocated_nb_rb_ul > 0) {
|
||||||
total_ue_count+=1;
|
total_ue_count+=1;
|
||||||
}
|
}
|
||||||
|
/*
|
||||||
if((mac_xface->get_nCCE_max(module_idP,CC_id) - nCCE_to_be_used[CC_id]) > (1<<aggregation)) {
|
if((mac_xface->get_nCCE_max(module_idP,CC_id,3,subframeP) - nCCE_to_be_used[CC_id]) > (1<<aggregation)) {
|
||||||
nCCE_to_be_used[CC_id] = nCCE_to_be_used[CC_id] + (1<<aggregation);
|
nCCE_to_be_used[CC_id] = nCCE_to_be_used[CC_id] + (1<<aggregation);
|
||||||
max_num_ue_to_be_scheduled+=1;
|
max_num_ue_to_be_scheduled+=1;
|
||||||
}
|
}*/
|
||||||
|
|
||||||
|
max_num_ue_to_be_scheduled+=1;
|
||||||
|
|
||||||
if (total_ue_count == 0) {
|
if (total_ue_count == 0) {
|
||||||
average_rbs_per_user[CC_id] = 0;
|
average_rbs_per_user[CC_id] = 0;
|
||||||
|
|||||||
+32
-22
@@ -47,26 +47,23 @@ void add_ue_spec_dci(DCI_PDU *DCI_pdu,void *pdu,rnti_t rnti,unsigned char dci_si
|
|||||||
|
|
||||||
//LG commented cause compilation error for RT eNB extern inline unsigned int taus(void);
|
//LG commented cause compilation error for RT eNB extern inline unsigned int taus(void);
|
||||||
|
|
||||||
/** \fn void schedule_RA(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,uint8_t Msg3_subframe,unsigned int *nprb,unsigned int *nCCE);
|
/** \fn void schedule_RA(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,uint8_t Msg3_subframe,unsigned int *nprb);
|
||||||
\brief First stage of Random-Access Scheduling. Loops over the RA_templates and checks if RAR, Msg3 or its retransmission are to be scheduled in the subframe. It returns the total number of PRB used for RA SDUs. For Msg3 it retrieves the L3msg from RRC and fills the appropriate buffers. For the others it just computes the number of PRBs. Each DCI uses 3 PRBs (format 1A)
|
\brief First stage of Random-Access Scheduling. Loops over the RA_templates and checks if RAR, Msg3 or its retransmission are to be scheduled in the subframe. It returns the total number of PRB used for RA SDUs. For Msg3 it retrieves the L3msg from RRC and fills the appropriate buffers. For the others it just computes the number of PRBs. Each DCI uses 3 PRBs (format 1A)
|
||||||
for the message.
|
for the message.
|
||||||
@param Mod_id Instance ID of eNB
|
@param Mod_id Instance ID of eNB
|
||||||
@param frame Frame index
|
@param frame Frame index
|
||||||
@param subframe Subframe number on which to act
|
@param subframe Subframe number on which to act
|
||||||
@param nprb Pointer to current PRB count
|
|
||||||
@param nCCE Pointer to current nCCE count
|
|
||||||
*/
|
*/
|
||||||
void schedule_RA(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,uint8_t Msg3_subframe,unsigned int *nprb,unsigned int *nCCE);
|
void schedule_RA(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,uint8_t Msg3_subframe);
|
||||||
|
|
||||||
/** \brief First stage of SI Scheduling. Gets a SI SDU from RRC if available and computes the MCS required to transport it as a function of the SDU length. It assumes a length less than or equal to 64 bytes (MCS 6, 3 PRBs).
|
/** \brief First stage of SI Scheduling. Gets a SI SDU from RRC if available and computes the MCS required to transport it as a function of the SDU length. It assumes a length less than or equal to 64 bytes (MCS 6, 3 PRBs).
|
||||||
@param Mod_id Instance ID of eNB
|
@param Mod_id Instance ID of eNB
|
||||||
@param frame Frame index
|
@param frame Frame index
|
||||||
@param subframe Subframe number on which to act
|
@param subframe Subframe number on which to act
|
||||||
@param Msg3_subframe Subframe where Msg3 will be transmitted
|
@param Msg3_subframe Subframe where Msg3 will be transmitted
|
||||||
@param nprb Pointer to current PRB count
|
|
||||||
@param nCCE Pointer to current nCCE count
|
|
||||||
*/
|
*/
|
||||||
void schedule_SI(module_id_t module_idP,frame_t frameP,unsigned int *nprb,unsigned int *nCCE);
|
void schedule_SI(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP);
|
||||||
|
|
||||||
/** \brief MBMS scheduling: Checking the position for MBSFN subframes. Create MSI, transfer MCCH from RRC to MAC, transfer MTCHs from RLC to MAC. Multiplexing MSI,MCCH&MTCHs. Return 1 if there are MBSFN data being allocated, otherwise return 0;
|
/** \brief MBMS scheduling: Checking the position for MBSFN subframes. Create MSI, transfer MCCH from RRC to MAC, transfer MTCHs from RLC to MAC. Multiplexing MSI,MCCH&MTCHs. Return 1 if there are MBSFN data being allocated, otherwise return 0;
|
||||||
@param Mod_id Instance ID of eNB
|
@param Mod_id Instance ID of eNB
|
||||||
@@ -95,49 +92,41 @@ int8_t ue_get_mbsfn_sf_alloction (module_id_t module_idP, uint8_t mbsfn_sync_are
|
|||||||
@param frame Frame index
|
@param frame Frame index
|
||||||
@param subframe Subframe number on which to act
|
@param subframe Subframe number on which to act
|
||||||
@param sched_subframe Subframe number where PUSCH is transmitted (for DAI lookup)
|
@param sched_subframe Subframe number where PUSCH is transmitted (for DAI lookup)
|
||||||
@param nCCE Pointer to current nCCE count
|
|
||||||
*/
|
*/
|
||||||
void schedule_ulsch(module_id_t module_idP,frame_t frameP,unsigned char cooperation_flag,sub_frame_t subframe,unsigned char sched_subframe,unsigned int *nCCE);
|
void schedule_ulsch(module_id_t module_idP,frame_t frameP,unsigned char cooperation_flag,sub_frame_t subframe,unsigned char sched_subframe);
|
||||||
|
|
||||||
/** \brief ULSCH Scheduling per RNTI
|
/** \brief ULSCH Scheduling per RNTI
|
||||||
@param Mod_id Instance ID of eNB
|
@param Mod_id Instance ID of eNB
|
||||||
@param frame Frame index
|
@param frame Frame index
|
||||||
@param subframe Subframe number on which to act
|
@param subframe Subframe number on which to act
|
||||||
@param sched_subframe Subframe number where PUSCH is transmitted (for DAI lookup)
|
@param sched_subframe Subframe number where PUSCH is transmitted (for DAI lookup)
|
||||||
@param nCCE Pointer to current nCCE count
|
|
||||||
*/
|
*/
|
||||||
void schedule_ulsch_rnti(module_id_t module_idP, unsigned char cooperation_flag, frame_t frameP, sub_frame_t subframe, unsigned char sched_subframe, unsigned int *nCCE, unsigned int *nCCE_available,
|
void schedule_ulsch_rnti(module_id_t module_idP, unsigned char cooperation_flag, frame_t frameP, sub_frame_t subframe, unsigned char sched_subframe, uint16_t *first_rb);
|
||||||
uint16_t *first_rb);
|
|
||||||
|
|
||||||
/** \brief ULSCH Scheduling for CBA RNTI
|
/** \brief ULSCH Scheduling for CBA RNTI
|
||||||
@param Mod_id Instance ID of eNB
|
@param Mod_id Instance ID of eNB
|
||||||
@param frame Frame index
|
@param frame Frame index
|
||||||
@param subframe Subframe number on which to act
|
@param subframe Subframe number on which to act
|
||||||
@param sched_subframe Subframe number where PUSCH is transmitted (for DAI lookup)
|
@param sched_subframe Subframe number where PUSCH is transmitted (for DAI lookup)
|
||||||
@param nCCE Pointer to current nCCE count
|
|
||||||
*/
|
*/
|
||||||
void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_flag, frame_t frameP, sub_frame_t subframe, unsigned char sched_subframe, unsigned int *nCCE,
|
void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_flag, frame_t frameP, sub_frame_t subframe, unsigned char sched_subframe, uint16_t *first_rb);
|
||||||
unsigned int *nCCE_available, uint16_t *first_rb);
|
|
||||||
|
|
||||||
/** \brief Second stage of DLSCH scheduling, after schedule_SI, schedule_RA and schedule_dlsch have been called. This routine first allocates random frequency assignments for SI and RA SDUs using distributed VRB allocations and adds the corresponding DCI SDU to the DCI buffer for PHY. It then loops over the UE specific DCIs previously allocated and fills in the remaining DCI fields related to frequency allocation. It assumes localized allocation of type 0 (DCI.rah=0). The allocation is done for tranmission modes 1,2,4.
|
/** \brief Second stage of DLSCH scheduling, after schedule_SI, schedule_RA and schedule_dlsch have been called. This routine first allocates random frequency assignments for SI and RA SDUs using distributed VRB allocations and adds the corresponding DCI SDU to the DCI buffer for PHY. It then loops over the UE specific DCIs previously allocated and fills in the remaining DCI fields related to frequency allocation. It assumes localized allocation of type 0 (DCI.rah=0). The allocation is done for tranmission modes 1,2,4.
|
||||||
@param Mod_id Instance of eNB
|
@param Mod_id Instance of eNB
|
||||||
@param frame Frame index
|
@param frame Frame index
|
||||||
@param subframe Index of subframe
|
@param subframe Index of subframe
|
||||||
@param rballoc Bitmask for allowable subband allocations
|
|
||||||
@param RA_scheduled RA was scheduled in this subframe
|
|
||||||
@param mbsfn_flag Indicates that this subframe is for MCH/MCCH
|
@param mbsfn_flag Indicates that this subframe is for MCH/MCCH
|
||||||
*/
|
*/
|
||||||
void fill_DLSCH_dci(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,uint32_t *rballoc,uint8_t RA_scheduled,int *mbsfn_flag);
|
void fill_DLSCH_dci(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,int *mbsfn_flag);
|
||||||
|
|
||||||
/** \brief UE specific DLSCH scheduling. Retrieves next ue to be schduled from round-robin scheduler and gets the appropriate harq_pid for the subframe from PHY. If the process is active and requires a retransmission, it schedules the retransmission with the same PRB count and MCS as the first transmission. Otherwise it consults RLC for DCCH/DTCH SDUs (status with maximum number of available PRBS), builds the MAC header (timing advance sent by default) and copies
|
/** \brief UE specific DLSCH scheduling. Retrieves next ue to be schduled from round-robin scheduler and gets the appropriate harq_pid for the subframe from PHY. If the process is active and requires a retransmission, it schedules the retransmission with the same PRB count and MCS as the first transmission. Otherwise it consults RLC for DCCH/DTCH SDUs (status with maximum number of available PRBS), builds the MAC header (timing advance sent by default) and copies
|
||||||
@param Mod_id Instance ID of eNB
|
@param Mod_id Instance ID of eNB
|
||||||
@param frame Frame index
|
@param frame Frame index
|
||||||
@param subframe Subframe on which to act
|
@param subframe Subframe on which to act
|
||||||
@param nb_rb_used0 Number of PRB used by SI/RA
|
|
||||||
@param nCCE_used Number of CCE used by SI/RA
|
|
||||||
@param mbsfn_flag Indicates that MCH/MCCH is in this subframe
|
@param mbsfn_flag Indicates that MCH/MCCH is in this subframe
|
||||||
*/
|
*/
|
||||||
void schedule_ue_spec(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,unsigned int *nb_rb_used0,unsigned int *nCCE_used,int *mbsfn_flag);
|
void schedule_ue_spec(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,int *mbsfn_flag);
|
||||||
|
|
||||||
/** \brief Function for UE/PHY to compute PUSCH transmit power in power-control procedure.
|
/** \brief Function for UE/PHY to compute PUSCH transmit power in power-control procedure.
|
||||||
@param Mod_id Module id of UE
|
@param Mod_id Module id of UE
|
||||||
@@ -312,6 +301,27 @@ uint8_t process_ue_cqi (module_id_t module_idP, int UE_id);
|
|||||||
|
|
||||||
int8_t find_active_UEs_with_traffic(module_id_t module_idP);
|
int8_t find_active_UEs_with_traffic(module_id_t module_idP);
|
||||||
|
|
||||||
|
void init_CCE_table(int module_idP,int CC_idP);
|
||||||
|
|
||||||
|
int get_nCCE_offset(int *CCE_table,
|
||||||
|
const unsigned char L,
|
||||||
|
const int nCCE,
|
||||||
|
const int common_dci,
|
||||||
|
const unsigned short rnti,
|
||||||
|
const unsigned char subframe);
|
||||||
|
|
||||||
|
int allocate_CCEs(int module_idP,
|
||||||
|
int CC_idP,
|
||||||
|
int subframe,
|
||||||
|
int test_only);
|
||||||
|
|
||||||
|
boolean_t CCE_allocation_infeasible(int module_idP,
|
||||||
|
int CC_idP,
|
||||||
|
int common_flag,
|
||||||
|
int subframe,
|
||||||
|
int aggregation,
|
||||||
|
int rnti);
|
||||||
|
|
||||||
void set_ue_dai(sub_frame_t subframeP,
|
void set_ue_dai(sub_frame_t subframeP,
|
||||||
uint8_t tdd_config,
|
uint8_t tdd_config,
|
||||||
int UE_id,
|
int UE_id,
|
||||||
@@ -492,7 +502,7 @@ int UE_PCCID(module_id_t mod_idP,int ue_idP);
|
|||||||
rnti_t UE_RNTI(module_id_t mod_idP, int ue_idP);
|
rnti_t UE_RNTI(module_id_t mod_idP, int ue_idP);
|
||||||
|
|
||||||
|
|
||||||
void ulsch_scheduler_pre_processor(module_id_t module_idP, int frameP, sub_frame_t subframeP, uint16_t *first_rb, uint8_t aggregattion, uint32_t *nCCE);
|
void ulsch_scheduler_pre_processor(module_id_t module_idP, int frameP, sub_frame_t subframeP, uint16_t *first_rb, uint8_t aggregattion);
|
||||||
void store_ulsch_buffer(module_id_t module_idP, int frameP, sub_frame_t subframeP);
|
void store_ulsch_buffer(module_id_t module_idP, int frameP, sub_frame_t subframeP);
|
||||||
void sort_ue_ul (module_id_t module_idP,int frameP, sub_frame_t subframeP);
|
void sort_ue_ul (module_id_t module_idP,int frameP, sub_frame_t subframeP);
|
||||||
void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subframeP,uint16_t *first_rb);
|
void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subframeP,uint16_t *first_rb);
|
||||||
|
|||||||
@@ -238,14 +238,17 @@ typedef struct {
|
|||||||
int (*get_ue_active_harq_pid)(module_id_t Mod_id, uint8_t CC_id,rnti_t rnti, int frame, uint8_t subframe, uint8_t *harq_pid, uint8_t *round, uint8_t ul_flag);
|
int (*get_ue_active_harq_pid)(module_id_t Mod_id, uint8_t CC_id,rnti_t rnti, int frame, uint8_t subframe, uint8_t *harq_pid, uint8_t *round, uint8_t ul_flag);
|
||||||
|
|
||||||
/// Function to retrieve number of CCE
|
/// Function to retrieve number of CCE
|
||||||
uint16_t (*get_nCCE_max)(module_id_t Mod_id,uint8_t CC_id);
|
uint16_t (*get_nCCE_max)(module_id_t Mod_id,uint8_t CC_id,int num_pdcch_symbols,int subframe);
|
||||||
|
|
||||||
|
|
||||||
/// Function to get the CCE offset
|
|
||||||
int (*get_nCCE_offset)(unsigned char L, int nCCE, int common_dci, unsigned short rnti, unsigned char subframe);
|
int (*get_nCCE_offset)(unsigned char L, int nCCE, int common_dci, unsigned short rnti, unsigned char subframe);
|
||||||
|
|
||||||
/// Function to retrieve number of PRB in an rb_alloc
|
/// Function to retrieve number of PRB in an rb_alloc
|
||||||
uint32_t (*get_nb_rb)(uint8_t ra_header, uint32_t rb_alloc, int n_rb_dl);
|
uint32_t (*get_nb_rb)(uint8_t ra_header, uint32_t rb_alloc, int n_rb_dl);
|
||||||
|
|
||||||
|
/// Function to convert VRB to PRB for distributed allocation
|
||||||
|
int (*get_prb)(int N_RB_DL,int odd_slot,int vrb,int Ngap);
|
||||||
|
|
||||||
/// Function to retrieve transmission mode for UE
|
/// Function to retrieve transmission mode for UE
|
||||||
uint8_t (*get_transmission_mode)(module_id_t Mod_id,uint8_t CC_id,rnti_t rnti);
|
uint8_t (*get_transmission_mode)(module_id_t Mod_id,uint8_t CC_id,rnti_t rnti);
|
||||||
|
|
||||||
@@ -312,8 +315,9 @@ typedef struct {
|
|||||||
|
|
||||||
/// get the delta TF for Uplink Power Control Calculation
|
/// get the delta TF for Uplink Power Control Calculation
|
||||||
int16_t (*get_hundred_times_delta_TF) (module_id_t module_idP, uint8_t CC_id, rnti_t rnti, uint8_t harq_pid);
|
int16_t (*get_hundred_times_delta_TF) (module_id_t module_idP, uint8_t CC_id, rnti_t rnti, uint8_t harq_pid);
|
||||||
/// get target uplink received power
|
/// get target PUSCH received power
|
||||||
int16_t (*get_target_pusch_rx_power) (module_id_t module_idP, uint8_t CC_id);
|
int16_t (*get_target_pusch_rx_power) (module_id_t module_idP, uint8_t CC_id);
|
||||||
|
/// get target PUSCH received power
|
||||||
int16_t (*get_target_pucch_rx_power) (module_id_t module_idP, uint8_t CC_id);
|
int16_t (*get_target_pucch_rx_power) (module_id_t module_idP, uint8_t CC_id);
|
||||||
|
|
||||||
unsigned char is_cluster_head;
|
unsigned char is_cluster_head;
|
||||||
|
|||||||
@@ -2110,6 +2110,67 @@ do_RRCConnectionReestablishmentReject(
|
|||||||
return((enc_rval.encoded+7)/8);
|
return((enc_rval.encoded+7)/8);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
uint8_t
|
||||||
|
do_RRCConnectionReject(
|
||||||
|
uint8_t Mod_id,
|
||||||
|
uint8_t* const buffer)
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
{
|
||||||
|
|
||||||
|
asn_enc_rval_t enc_rval;
|
||||||
|
|
||||||
|
DL_CCCH_Message_t dl_ccch_msg;
|
||||||
|
RRCConnectionReject_t *rrcConnectionReject;
|
||||||
|
|
||||||
|
memset((void *)&dl_ccch_msg,0,sizeof(DL_CCCH_Message_t));
|
||||||
|
dl_ccch_msg.message.present = DL_CCCH_MessageType_PR_c1;
|
||||||
|
dl_ccch_msg.message.choice.c1.present = DL_CCCH_MessageType__c1_PR_rrcConnectionReject;
|
||||||
|
rrcConnectionReject = &dl_ccch_msg.message.choice.c1.choice.rrcConnectionReject;
|
||||||
|
|
||||||
|
// RRCConnectionReject
|
||||||
|
rrcConnectionReject->criticalExtensions.present = RRCConnectionReject__criticalExtensions_PR_c1;
|
||||||
|
rrcConnectionReject->criticalExtensions.choice.c1.present = RRCConnectionReject__criticalExtensions__c1_PR_rrcConnectionReject_r8;
|
||||||
|
/* let's put a wait time of 1s for the moment */
|
||||||
|
rrcConnectionReject->criticalExtensions.choice.c1.choice.rrcConnectionReject_r8.waitTime = 1;
|
||||||
|
|
||||||
|
#ifdef XER_PRINT
|
||||||
|
xer_fprint(stdout, &asn_DEF_DL_CCCH_Message, (void*)&dl_ccch_msg);
|
||||||
|
#endif
|
||||||
|
enc_rval = uper_encode_to_buffer(&asn_DEF_DL_CCCH_Message,
|
||||||
|
(void*)&dl_ccch_msg,
|
||||||
|
buffer,
|
||||||
|
100);
|
||||||
|
AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %ld)!\n",
|
||||||
|
enc_rval.failed_type->name, enc_rval.encoded);
|
||||||
|
|
||||||
|
#if defined(ENABLE_ITTI)
|
||||||
|
# if !defined(DISABLE_XER_SPRINT)
|
||||||
|
{
|
||||||
|
char message_string[20000];
|
||||||
|
size_t message_string_size;
|
||||||
|
|
||||||
|
if ((message_string_size = xer_sprint(message_string, sizeof(message_string), &asn_DEF_DL_CCCH_Message, (void *) &dl_ccch_msg)) > 0) {
|
||||||
|
MessageDef *msg_p;
|
||||||
|
|
||||||
|
msg_p = itti_alloc_new_message_sized (TASK_RRC_ENB, RRC_DL_CCCH, message_string_size + sizeof (IttiMsgText));
|
||||||
|
msg_p->ittiMsg.rrc_dl_ccch.size = message_string_size;
|
||||||
|
memcpy(&msg_p->ittiMsg.rrc_dl_ccch.text, message_string, message_string_size);
|
||||||
|
|
||||||
|
itti_send_msg_to_task(TASK_UNKNOWN, Mod_id, msg_p);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
# endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef USER_MODE
|
||||||
|
LOG_D(RRC,"RRCConnectionReject Encoded %d bits (%d bytes)\n",
|
||||||
|
enc_rval.encoded,(enc_rval.encoded+7)/8);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
return((enc_rval.encoded+7)/8);
|
||||||
|
}
|
||||||
|
|
||||||
uint8_t do_RRCConnectionRelease(
|
uint8_t do_RRCConnectionRelease(
|
||||||
uint8_t Mod_id,
|
uint8_t Mod_id,
|
||||||
uint8_t *buffer,
|
uint8_t *buffer,
|
||||||
|
|||||||
@@ -218,6 +218,16 @@ do_RRCConnectionReestablishmentReject(
|
|||||||
uint8_t Mod_id,
|
uint8_t Mod_id,
|
||||||
uint8_t* const buffer);
|
uint8_t* const buffer);
|
||||||
|
|
||||||
|
/**
|
||||||
|
\brief Generate an RRCConnectionReject DL-CCCH-Message (eNB).
|
||||||
|
@param Mod_id Module ID of eNB
|
||||||
|
@param buffer Pointer to PER-encoded ASN.1 description of DL-CCCH-Message PDU
|
||||||
|
@returns Size of encoded bit stream in bytes*/
|
||||||
|
uint8_t
|
||||||
|
do_RRCConnectionReject(
|
||||||
|
uint8_t Mod_id,
|
||||||
|
uint8_t* const buffer);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
\brief Generate an RRCConnectionRequest UL-CCCH-Message (UE) based on random string or S-TMSI. This
|
\brief Generate an RRCConnectionRequest UL-CCCH-Message (UE) based on random string or S-TMSI. This
|
||||||
routine only generates an mo-data establishment cause.
|
routine only generates an mo-data establishment cause.
|
||||||
|
|||||||
@@ -212,9 +212,9 @@ typedef struct UE_RRC_INFO_s {
|
|||||||
} __attribute__ ((__packed__)) UE_RRC_INFO;
|
} __attribute__ ((__packed__)) UE_RRC_INFO;
|
||||||
|
|
||||||
typedef struct UE_S_TMSI_s {
|
typedef struct UE_S_TMSI_s {
|
||||||
uint8_t presence;
|
boolean_t presence;
|
||||||
uint8_t mme_code;
|
mme_code_t mme_code;
|
||||||
uint32_t m_tmsi;
|
m_tmsi_t m_tmsi;
|
||||||
} __attribute__ ((__packed__)) UE_S_TMSI;
|
} __attribute__ ((__packed__)) UE_S_TMSI;
|
||||||
|
|
||||||
#if defined(ENABLE_ITTI)
|
#if defined(ENABLE_ITTI)
|
||||||
|
|||||||
+121
-60
@@ -540,8 +540,8 @@ rrc_eNB_get_next_transaction_identifier(
|
|||||||
|
|
||||||
|
|
||||||
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
||||||
// return 1 if there is already an UE with ue_identityP, 0 otherwise
|
// return the ue context if there is already an UE with ue_identityP, NULL otherwise
|
||||||
static int
|
static struct rrc_eNB_ue_context_s*
|
||||||
rrc_eNB_ue_context_random_exist(
|
rrc_eNB_ue_context_random_exist(
|
||||||
const protocol_ctxt_t* const ctxt_pP,
|
const protocol_ctxt_t* const ctxt_pP,
|
||||||
const uint64_t ue_identityP
|
const uint64_t ue_identityP
|
||||||
@@ -551,9 +551,28 @@ rrc_eNB_ue_context_random_exist(
|
|||||||
struct rrc_eNB_ue_context_s* ue_context_p = NULL;
|
struct rrc_eNB_ue_context_s* ue_context_p = NULL;
|
||||||
RB_FOREACH(ue_context_p, rrc_ue_tree_s, &(eNB_rrc_inst[ctxt_pP->module_id].rrc_ue_head)) {
|
RB_FOREACH(ue_context_p, rrc_ue_tree_s, &(eNB_rrc_inst[ctxt_pP->module_id].rrc_ue_head)) {
|
||||||
if (ue_context_p->ue_context.random_ue_identity == ue_identityP)
|
if (ue_context_p->ue_context.random_ue_identity == ue_identityP)
|
||||||
return 1;
|
return ue_context_p;
|
||||||
}
|
}
|
||||||
return 0;
|
return NULL;
|
||||||
|
}
|
||||||
|
//-----------------------------------------------------------------------------
|
||||||
|
// return the ue context if there is already an UE with the same S-TMSI(MMEC+M-TMSI), NULL otherwise
|
||||||
|
static struct rrc_eNB_ue_context_s*
|
||||||
|
rrc_eNB_ue_context_stmsi_exist(
|
||||||
|
const protocol_ctxt_t* const ctxt_pP,
|
||||||
|
const mme_code_t mme_codeP,
|
||||||
|
const m_tmsi_t m_tmsiP
|
||||||
|
)
|
||||||
|
//-----------------------------------------------------------------------------
|
||||||
|
{
|
||||||
|
struct rrc_eNB_ue_context_s* ue_context_p = NULL;
|
||||||
|
RB_FOREACH(ue_context_p, rrc_ue_tree_s, &(eNB_rrc_inst[ctxt_pP->module_id].rrc_ue_head)) {
|
||||||
|
if (ue_context_p->ue_context.Initialue_identity_s_TMSI.presence == TRUE)
|
||||||
|
if (ue_context_p->ue_context.Initialue_identity_s_TMSI.m_tmsi == m_tmsiP)
|
||||||
|
if (ue_context_p->ue_context.Initialue_identity_s_TMSI.mme_code == mme_codeP)
|
||||||
|
return ue_context_p;
|
||||||
|
}
|
||||||
|
return NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
||||||
@@ -963,6 +982,49 @@ rrc_eNB_generate_UECapabilityEnquiry(
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//-----------------------------------------------------------------------------
|
||||||
|
void
|
||||||
|
rrc_eNB_generate_RRCConnectionReject(
|
||||||
|
const protocol_ctxt_t* const ctxt_pP,
|
||||||
|
rrc_eNB_ue_context_t* const ue_context_pP,
|
||||||
|
const int CC_id
|
||||||
|
)
|
||||||
|
//-----------------------------------------------------------------------------
|
||||||
|
{
|
||||||
|
#ifdef RRC_MSG_PRINT
|
||||||
|
int cnt;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
eNB_rrc_inst[ctxt_pP->module_id].carrier[CC_id].Srb0.Tx_buffer.payload_size =
|
||||||
|
do_RRCConnectionReject(ctxt_pP->module_id,
|
||||||
|
(uint8_t*) eNB_rrc_inst[ctxt_pP->module_id].carrier[CC_id].Srb0.Tx_buffer.Payload);
|
||||||
|
|
||||||
|
#ifdef RRC_MSG_PRINT
|
||||||
|
LOG_F(RRC,"[MSG] RRCConnectionReject\n");
|
||||||
|
|
||||||
|
for (cnt = 0; cnt < eNB_rrc_inst[ctxt_pP->module_id].carrier[CC_id].Srb0.Tx_buffer.payload_size; cnt++) {
|
||||||
|
LOG_F(RRC,"%02x ", ((uint8_t*)eNB_rrc_inst[ctxt_pP->module_id].Srb0.Tx_buffer.Payload)[cnt]);
|
||||||
|
}
|
||||||
|
|
||||||
|
LOG_F(RRC,"\n");
|
||||||
|
#endif
|
||||||
|
|
||||||
|
MSC_LOG_TX_MESSAGE(
|
||||||
|
MSC_RRC_ENB,
|
||||||
|
MSC_RRC_UE,
|
||||||
|
eNB_rrc_inst[ctxt_pP->module_id].carrier[CC_id].Srb0.Tx_buffer.Header,
|
||||||
|
eNB_rrc_inst[ctxt_pP->module_id].carrier[CC_id].Srb0.Tx_buffer.payload_size,
|
||||||
|
MSC_AS_TIME_FMT" RRCConnectionReject UE %x size %u",
|
||||||
|
MSC_AS_TIME_ARGS(ctxt_pP),
|
||||||
|
ue_context_pP == NULL ? -1 : ue_context_pP->ue_context.rnti,
|
||||||
|
eNB_rrc_inst[ctxt_pP->module_id].carrier[CC_id].Srb0.Tx_buffer.payload_size);
|
||||||
|
|
||||||
|
LOG_I(RRC,
|
||||||
|
PROTOCOL_RRC_CTXT_UE_FMT" [RAPROC] Logical Channel DL-CCCH, Generating RRCConnectionReject (bytes %d)\n",
|
||||||
|
PROTOCOL_RRC_CTXT_UE_ARGS(ctxt_pP),
|
||||||
|
eNB_rrc_inst[ctxt_pP->module_id].carrier[CC_id].Srb0.Tx_buffer.payload_size);
|
||||||
|
}
|
||||||
|
|
||||||
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
||||||
void
|
void
|
||||||
rrc_eNB_generate_RRCConnectionReestablishmentReject(
|
rrc_eNB_generate_RRCConnectionReestablishmentReject(
|
||||||
@@ -3627,23 +3689,62 @@ rrc_eNB_decode_ccch(
|
|||||||
} else {
|
} else {
|
||||||
rrcConnectionRequest = &ul_ccch_msg->message.choice.c1.choice.rrcConnectionRequest.criticalExtensions.choice.rrcConnectionRequest_r8;
|
rrcConnectionRequest = &ul_ccch_msg->message.choice.c1.choice.rrcConnectionRequest.criticalExtensions.choice.rrcConnectionRequest_r8;
|
||||||
{
|
{
|
||||||
AssertFatal(rrcConnectionRequest->ue_Identity.present == InitialUE_Identity_PR_randomValue,
|
if (InitialUE_Identity_PR_randomValue == rrcConnectionRequest->ue_Identity.present) {
|
||||||
"unsupported InitialUE-Identity in RRCConnectionRequest");
|
AssertFatal(rrcConnectionRequest->ue_Identity.choice.randomValue.size == 5,
|
||||||
AssertFatal(rrcConnectionRequest->ue_Identity.choice.randomValue.size == 5,
|
"wrong InitialUE-Identity randomValue size, expected 5, provided %d",
|
||||||
"wrong InitialUE-Identity randomValue size, expected 5, provided %d",
|
rrcConnectionRequest->ue_Identity.choice.randomValue.size);
|
||||||
rrcConnectionRequest->ue_Identity.choice.randomValue.size);
|
memcpy(((uint8_t*) & random_value) + 3,
|
||||||
memcpy(((uint8_t*) & random_value) + 3,
|
rrcConnectionRequest->ue_Identity.choice.randomValue.buf,
|
||||||
rrcConnectionRequest->ue_Identity.choice.randomValue.buf,
|
rrcConnectionRequest->ue_Identity.choice.randomValue.size);
|
||||||
rrcConnectionRequest->ue_Identity.choice.randomValue.size);
|
/* if there is already a registered UE (with another RNTI) with this random_value,
|
||||||
/* if there is already a registered UE (with another RNTI) with this random_value,
|
* the current one must be removed from MAC/PHY (zombie UE)
|
||||||
* the current one must be removed from MAC/PHY (zombie UE)
|
*/
|
||||||
*/
|
if ((ue_context_p = rrc_eNB_ue_context_random_exist(ctxt_pP, random_value))) {
|
||||||
if (rrc_eNB_ue_context_random_exist(ctxt_pP, random_value)) {
|
#warning "TODO: random_exist: remove UE from MAC/PHY (how?)"
|
||||||
AssertFatal(0 == 1, "TODO: remove UE fro MAC/PHY (how?)");
|
// AssertFatal(0 == 1, "TODO: remove UE from MAC/PHY (how?)");
|
||||||
ue_context_p = NULL;
|
ue_context_p = NULL;
|
||||||
|
} else {
|
||||||
|
ue_context_p = rrc_eNB_get_next_free_ue_context(ctxt_pP, random_value);
|
||||||
|
}
|
||||||
|
} else if (InitialUE_Identity_PR_s_TMSI == rrcConnectionRequest->ue_Identity.present) {
|
||||||
|
/* Save s-TMSI */
|
||||||
|
S_TMSI_t s_TMSI = rrcConnectionRequest->ue_Identity.choice.s_TMSI;
|
||||||
|
mme_code_t mme_code = BIT_STRING_to_uint8(&s_TMSI.mmec);
|
||||||
|
m_tmsi_t m_tmsi = BIT_STRING_to_uint32(&s_TMSI.m_TMSI);
|
||||||
|
random_value = (((uint64_t)mme_code) << 32) | m_tmsi;
|
||||||
|
if ((ue_context_p = rrc_eNB_ue_context_stmsi_exist(ctxt_pP, mme_code, m_tmsi))) {
|
||||||
|
#warning "TODO: stmsi_exist: remove UE from MAC/PHY (how?)"
|
||||||
|
// AssertFatal(0 == 1, "TODO: remove UE from MAC/PHY (how?)");
|
||||||
|
ue_context_p = NULL;
|
||||||
|
} else {
|
||||||
|
ue_context_p = rrc_eNB_get_next_free_ue_context(ctxt_pP, NOT_A_RANDOM_UE_IDENTITY);
|
||||||
|
}
|
||||||
|
ue_context_p->ue_context.Initialue_identity_s_TMSI.presence = TRUE;
|
||||||
|
ue_context_p->ue_context.Initialue_identity_s_TMSI.mme_code = mme_code;
|
||||||
|
ue_context_p->ue_context.Initialue_identity_s_TMSI.m_tmsi = m_tmsi;
|
||||||
|
|
||||||
|
MSC_LOG_RX_MESSAGE(
|
||||||
|
MSC_RRC_ENB,
|
||||||
|
MSC_RRC_UE,
|
||||||
|
Srb_info->Rx_buffer.Payload,
|
||||||
|
dec_rval.consumed,
|
||||||
|
MSC_AS_TIME_FMT" RRCConnectionRequest UE %x size %u (s-TMSI mmec %u m_TMSI %u random UE id (0x%" PRIx64 ")",
|
||||||
|
MSC_AS_TIME_ARGS(ctxt_pP),
|
||||||
|
ue_context_p->ue_context.rnti,
|
||||||
|
dec_rval.consumed,
|
||||||
|
ue_context_p->ue_context.Initialue_identity_s_TMSI.mme_code,
|
||||||
|
ue_context_p->ue_context.Initialue_identity_s_TMSI.m_tmsi,
|
||||||
|
ue_context_p->ue_context.random_ue_identity);
|
||||||
} else {
|
} else {
|
||||||
ue_context_p = rrc_eNB_get_next_free_ue_context(ctxt_pP, random_value);
|
LOG_E(RRC,
|
||||||
|
PROTOCOL_RRC_CTXT_UE_FMT" RRCConnectionRequest without random UE identity or S-TMSI not supported, let's reject the UE\n",
|
||||||
|
PROTOCOL_RRC_CTXT_UE_ARGS(ctxt_pP));
|
||||||
|
rrc_eNB_generate_RRCConnectionReject(ctxt_pP,
|
||||||
|
rrc_eNB_get_ue_context(&eNB_rrc_inst[ctxt_pP->module_id], ctxt_pP->rnti),
|
||||||
|
CC_id);
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
LOG_D(RRC,
|
LOG_D(RRC,
|
||||||
PROTOCOL_RRC_CTXT_UE_FMT" UE context: %X\n",
|
PROTOCOL_RRC_CTXT_UE_FMT" UE context: %X\n",
|
||||||
@@ -3654,47 +3755,7 @@ rrc_eNB_decode_ccch(
|
|||||||
|
|
||||||
|
|
||||||
#if defined(ENABLE_ITTI)
|
#if defined(ENABLE_ITTI)
|
||||||
/* Check s-TMSI presence in message */
|
ue_context_p->ue_context.establishment_cause = rrcConnectionRequest->establishmentCause;
|
||||||
ue_context_p->ue_context.Initialue_identity_s_TMSI.presence =
|
|
||||||
(rrcConnectionRequest->ue_Identity.present == InitialUE_Identity_PR_s_TMSI);
|
|
||||||
|
|
||||||
if (ue_context_p->ue_context.Initialue_identity_s_TMSI.presence) {
|
|
||||||
/* Save s-TMSI */
|
|
||||||
S_TMSI_t s_TMSI = rrcConnectionRequest->ue_Identity.choice.s_TMSI;
|
|
||||||
|
|
||||||
ue_context_p->ue_context.Initialue_identity_s_TMSI.mme_code =
|
|
||||||
BIT_STRING_to_uint8(&s_TMSI.mmec);
|
|
||||||
ue_context_p->ue_context.Initialue_identity_s_TMSI.m_tmsi =
|
|
||||||
BIT_STRING_to_uint32(&s_TMSI.m_TMSI);
|
|
||||||
|
|
||||||
MSC_LOG_RX_DISCARDED_MESSAGE(
|
|
||||||
MSC_RRC_ENB,
|
|
||||||
MSC_RRC_UE,
|
|
||||||
Srb_info->Rx_buffer.Payload,
|
|
||||||
dec_rval.consumed,
|
|
||||||
MSC_AS_TIME_FMT" RRCConnectionRequest UE %x size %u (s-TMSI mmec %u m_TMSI %u random UE id (0x%" PRIx64 ")",
|
|
||||||
MSC_AS_TIME_ARGS(ctxt_pP),
|
|
||||||
ue_context_p->ue_context.rnti,
|
|
||||||
dec_rval.consumed,
|
|
||||||
s_TMSI.mmec,
|
|
||||||
s_TMSI.m_TMSI,
|
|
||||||
ue_context_p->ue_context.random_ue_identity);
|
|
||||||
|
|
||||||
} else {
|
|
||||||
MSC_LOG_RX_DISCARDED_MESSAGE(
|
|
||||||
MSC_RRC_ENB,
|
|
||||||
MSC_RRC_UE,
|
|
||||||
Srb_info->Rx_buffer.Payload,
|
|
||||||
dec_rval.consumed,
|
|
||||||
MSC_AS_TIME_FMT" RRCConnectionRequest UE %x size %u random UE id (0x%" PRIx64 ")",
|
|
||||||
MSC_AS_TIME_ARGS(ctxt_pP),
|
|
||||||
ue_context_p->ue_context.rnti,
|
|
||||||
dec_rval.consumed,
|
|
||||||
ue_context_p->ue_context.random_ue_identity);
|
|
||||||
}
|
|
||||||
|
|
||||||
ue_context_p->ue_context.establishment_cause =
|
|
||||||
rrcConnectionRequest->establishmentCause;
|
|
||||||
LOG_I(RRC, PROTOCOL_RRC_CTXT_UE_FMT" Accept new connection from UE random UE identity (0x%" PRIx64 ") MME code %u TMSI %u cause %u\n",
|
LOG_I(RRC, PROTOCOL_RRC_CTXT_UE_FMT" Accept new connection from UE random UE identity (0x%" PRIx64 ") MME code %u TMSI %u cause %u\n",
|
||||||
PROTOCOL_RRC_CTXT_UE_ARGS(ctxt_pP),
|
PROTOCOL_RRC_CTXT_UE_ARGS(ctxt_pP),
|
||||||
ue_context_p->ue_context.random_ue_identity,
|
ue_context_p->ue_context.random_ue_identity,
|
||||||
|
|||||||
@@ -43,6 +43,7 @@
|
|||||||
# include "RRC/LITE/defs.h"
|
# include "RRC/LITE/defs.h"
|
||||||
# include "rrc_eNB_UE_context.h"
|
# include "rrc_eNB_UE_context.h"
|
||||||
# include "rrc_eNB_S1AP.h"
|
# include "rrc_eNB_S1AP.h"
|
||||||
|
# include "enb_config.h"
|
||||||
|
|
||||||
# if defined(ENABLE_ITTI)
|
# if defined(ENABLE_ITTI)
|
||||||
# include "asn1_conversions.h"
|
# include "asn1_conversions.h"
|
||||||
@@ -661,15 +662,16 @@ rrc_eNB_send_S1AP_NAS_FIRST_REQ(
|
|||||||
S1AP_NAS_FIRST_REQ (message_p).ue_identity.s_tmsi.mme_code = s_TMSI->mme_code;
|
S1AP_NAS_FIRST_REQ (message_p).ue_identity.s_tmsi.mme_code = s_TMSI->mme_code;
|
||||||
S1AP_NAS_FIRST_REQ (message_p).ue_identity.s_tmsi.m_tmsi = s_TMSI->m_tmsi;
|
S1AP_NAS_FIRST_REQ (message_p).ue_identity.s_tmsi.m_tmsi = s_TMSI->m_tmsi;
|
||||||
LOG_I(S1AP, "[eNB %d] Build S1AP_NAS_FIRST_REQ with s_TMSI: MME code %u M-TMSI %u ue %x\n",
|
LOG_I(S1AP, "[eNB %d] Build S1AP_NAS_FIRST_REQ with s_TMSI: MME code %u M-TMSI %u ue %x\n",
|
||||||
ctxt_pP->module_id,
|
ctxt_pP->module_id,
|
||||||
S1AP_NAS_FIRST_REQ (message_p).ue_identity.s_tmsi.mme_code,
|
S1AP_NAS_FIRST_REQ (message_p).ue_identity.s_tmsi.mme_code,
|
||||||
S1AP_NAS_FIRST_REQ (message_p).ue_identity.s_tmsi.m_tmsi,
|
S1AP_NAS_FIRST_REQ (message_p).ue_identity.s_tmsi.m_tmsi,
|
||||||
ue_context_pP->ue_context.rnti);
|
ue_context_pP->ue_context.rnti);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (rrcConnectionSetupComplete->registeredMME != NULL) {
|
if (rrcConnectionSetupComplete->registeredMME != NULL) {
|
||||||
/* Fill GUMMEI */
|
/* Fill GUMMEI */
|
||||||
struct RegisteredMME *r_mme = rrcConnectionSetupComplete->registeredMME;
|
struct RegisteredMME *r_mme = rrcConnectionSetupComplete->registeredMME;
|
||||||
|
int selected_plmn_identity = rrcConnectionSetupComplete->selectedPLMN_Identity;
|
||||||
|
|
||||||
S1AP_NAS_FIRST_REQ (message_p).ue_identity.presenceMask |= UE_IDENTITIES_gummei;
|
S1AP_NAS_FIRST_REQ (message_p).ue_identity.presenceMask |= UE_IDENTITIES_gummei;
|
||||||
|
|
||||||
@@ -678,9 +680,9 @@ rrc_eNB_send_S1AP_NAS_FIRST_REQ(
|
|||||||
/* Use first indicated PLMN MCC if it is defined */
|
/* Use first indicated PLMN MCC if it is defined */
|
||||||
S1AP_NAS_FIRST_REQ (message_p).ue_identity.gummei.mcc = *r_mme->plmn_Identity->mcc->list.array[0];
|
S1AP_NAS_FIRST_REQ (message_p).ue_identity.gummei.mcc = *r_mme->plmn_Identity->mcc->list.array[0];
|
||||||
LOG_I(S1AP, "[eNB %d] Build S1AP_NAS_FIRST_REQ adding in s_TMSI: GUMMEI MCC %u ue %x\n",
|
LOG_I(S1AP, "[eNB %d] Build S1AP_NAS_FIRST_REQ adding in s_TMSI: GUMMEI MCC %u ue %x\n",
|
||||||
ctxt_pP->module_id,
|
ctxt_pP->module_id,
|
||||||
S1AP_NAS_FIRST_REQ (message_p).ue_identity.gummei.mcc,
|
S1AP_NAS_FIRST_REQ (message_p).ue_identity.gummei.mcc,
|
||||||
ue_context_pP->ue_context.rnti);
|
ue_context_pP->ue_context.rnti);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (r_mme->plmn_Identity->mnc.list.count > 0) {
|
if (r_mme->plmn_Identity->mnc.list.count > 0) {
|
||||||
@@ -691,6 +693,14 @@ rrc_eNB_send_S1AP_NAS_FIRST_REQ(
|
|||||||
S1AP_NAS_FIRST_REQ (message_p).ue_identity.gummei.mnc,
|
S1AP_NAS_FIRST_REQ (message_p).ue_identity.gummei.mnc,
|
||||||
ue_context_pP->ue_context.rnti);
|
ue_context_pP->ue_context.rnti);
|
||||||
}
|
}
|
||||||
|
} else {
|
||||||
|
const Enb_properties_array_t *enb_properties_p = NULL;
|
||||||
|
enb_properties_p = enb_config_get();
|
||||||
|
|
||||||
|
// actually the eNB configuration contains only one PLMN (can be up to 6)
|
||||||
|
S1AP_NAS_FIRST_REQ (message_p).ue_identity.gummei.mcc = enb_properties_p->properties[ctxt_pP->module_id]->mcc;
|
||||||
|
S1AP_NAS_FIRST_REQ (message_p).ue_identity.gummei.mnc = enb_properties_p->properties[ctxt_pP->module_id]->mnc;
|
||||||
|
S1AP_NAS_FIRST_REQ (message_p).ue_identity.gummei.mnc_len = enb_properties_p->properties[ctxt_pP->module_id]->mnc_digit_length;
|
||||||
}
|
}
|
||||||
|
|
||||||
S1AP_NAS_FIRST_REQ (message_p).ue_identity.gummei.mme_code = BIT_STRING_to_uint8 (&r_mme->mmec);
|
S1AP_NAS_FIRST_REQ (message_p).ue_identity.gummei.mme_code = BIT_STRING_to_uint8 (&r_mme->mmec);
|
||||||
@@ -1178,7 +1188,7 @@ int rrc_eNB_process_S1AP_UE_CONTEXT_RELEASE_COMMAND (MessageDef *msg_p, const ch
|
|||||||
GTPV1U_ENB_DELETE_TUNNEL_REQ(msg_delete_tunnels_p).rnti = ue_context_p->ue_context.rnti;
|
GTPV1U_ENB_DELETE_TUNNEL_REQ(msg_delete_tunnels_p).rnti = ue_context_p->ue_context.rnti;
|
||||||
|
|
||||||
for (e_rab = 0; e_rab < ue_context_p->ue_context.nb_of_e_rabs; e_rab++) {
|
for (e_rab = 0; e_rab < ue_context_p->ue_context.nb_of_e_rabs; e_rab++) {
|
||||||
GTPV1U_ENB_DELETE_TUNNEL_REQ(msg_delete_tunnels_p).eps_bearer_id[GTPV1U_ENB_DELETE_TUNNEL_REQ(msg_p).num_erab++] =
|
GTPV1U_ENB_DELETE_TUNNEL_REQ(msg_delete_tunnels_p).eps_bearer_id[GTPV1U_ENB_DELETE_TUNNEL_REQ(msg_delete_tunnels_p).num_erab++] =
|
||||||
ue_context_p->ue_context.enb_gtp_ebi[e_rab];
|
ue_context_p->ue_context.enb_gtp_ebi[e_rab];
|
||||||
// erase data
|
// erase data
|
||||||
ue_context_p->ue_context.enb_gtp_teid[e_rab] = 0;
|
ue_context_p->ue_context.enb_gtp_teid[e_rab] = 0;
|
||||||
|
|||||||
@@ -45,20 +45,23 @@ int openair0_device_init(openair0_device *device, openair0_config_t *openair0_cf
|
|||||||
#ifdef ETHERNET
|
#ifdef ETHERNET
|
||||||
device->type=ETH_IF;
|
device->type=ETH_IF;
|
||||||
device->func_type = BBU_FUNC;
|
device->func_type = BBU_FUNC;
|
||||||
openair0_dev_init_eth(device, openair0_cfg);
|
|
||||||
printf(" openair0_dev_init_eth ...\n");
|
printf(" openair0_dev_init_eth ...\n");
|
||||||
|
return(openair0_dev_init_eth(device, openair0_cfg));
|
||||||
|
|
||||||
#elif EXMIMO
|
#elif EXMIMO
|
||||||
device->type=EXMIMO_IF;
|
device->type=EXMIMO_IF;
|
||||||
openair0_dev_init_exmimo(device, openair0_cfg);
|
|
||||||
printf("openair0_dev_init_exmimo...\n");
|
printf("openair0_dev_init_exmimo...\n");
|
||||||
|
return(openair0_dev_init_exmimo(device, openair0_cfg));
|
||||||
#elif OAI_USRP
|
#elif OAI_USRP
|
||||||
device->type=USRP_B200_IF;
|
device->type=USRP_B200_IF;
|
||||||
openair0_dev_init_usrp(device, openair0_cfg);
|
|
||||||
printf("openair0_dev_init_usrp ...\n");
|
printf("openair0_dev_init_usrp ...\n");
|
||||||
|
return(openair0_dev_init_usrp(device, openair0_cfg));
|
||||||
|
|
||||||
#elif OAI_BLADERF
|
#elif OAI_BLADERF
|
||||||
device->type=BLADERF_IF;
|
device->type=BLADERF_IF;
|
||||||
openair0_dev_init_bladerf(device, openair0_cfg);
|
|
||||||
printf(" openair0_dev_init_bladerf ...\n");
|
printf(" openair0_dev_init_bladerf ...\n");
|
||||||
|
return(openair0_dev_init_bladerf(device, openair0_cfg));
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -570,6 +570,7 @@ int openair0_dev_init_usrp(openair0_device* device, openair0_config_t *openair0_
|
|||||||
|
|
||||||
} else {
|
} else {
|
||||||
printf("Found USRP B200");
|
printf("Found USRP B200");
|
||||||
|
args += ",num_recv_frames=256" ;
|
||||||
s->usrp = uhd::usrp::multi_usrp::make(args);
|
s->usrp = uhd::usrp::multi_usrp::make(args);
|
||||||
|
|
||||||
// s->usrp->set_rx_subdev_spec(rx_subdev);
|
// s->usrp->set_rx_subdev_spec(rx_subdev);
|
||||||
|
|||||||
@@ -17,7 +17,7 @@ eNBs =
|
|||||||
|
|
||||||
mobile_country_code = "208";
|
mobile_country_code = "208";
|
||||||
|
|
||||||
mobile_network_code = "92";
|
mobile_network_code = "93";
|
||||||
|
|
||||||
////////// Physical parameters:
|
////////// Physical parameters:
|
||||||
|
|
||||||
@@ -130,7 +130,7 @@ eNBs =
|
|||||||
};
|
};
|
||||||
|
|
||||||
////////// MME parameters:
|
////////// MME parameters:
|
||||||
mme_ip_address = ( { ipv4 = "192.168.13.11";
|
mme_ip_address = ( { ipv4 = "192.168.12.11";
|
||||||
ipv6 = "192:168:30::17";
|
ipv6 = "192:168:30::17";
|
||||||
active = "yes";
|
active = "yes";
|
||||||
preference = "ipv4";
|
preference = "ipv4";
|
||||||
@@ -140,10 +140,10 @@ eNBs =
|
|||||||
NETWORK_INTERFACES :
|
NETWORK_INTERFACES :
|
||||||
{
|
{
|
||||||
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
|
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
|
||||||
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.13.10/24";
|
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.213/24";
|
||||||
|
|
||||||
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
|
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
|
||||||
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.13.10/24";
|
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.213/24";
|
||||||
ENB_PORT_FOR_S1U = 2152; # Spec 2152
|
ENB_PORT_FOR_S1U = 2152; # Spec 2152
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@@ -66,7 +66,7 @@ eNBs =
|
|||||||
|
|
||||||
pusch_p0_Nominal = -90;
|
pusch_p0_Nominal = -90;
|
||||||
pusch_alpha = "AL1";
|
pusch_alpha = "AL1";
|
||||||
pucch_p0_Nominal = -108;
|
pucch_p0_Nominal = -96;
|
||||||
msg3_delta_Preamble = 6;
|
msg3_delta_Preamble = 6;
|
||||||
pucch_deltaF_Format1 = "deltaF2";
|
pucch_deltaF_Format1 = "deltaF2";
|
||||||
pucch_deltaF_Format1b = "deltaF3";
|
pucch_deltaF_Format1b = "deltaF3";
|
||||||
|
|||||||
@@ -28,7 +28,7 @@ eNBs =
|
|||||||
tdd_config_s = 0;
|
tdd_config_s = 0;
|
||||||
prefix_type = "NORMAL";
|
prefix_type = "NORMAL";
|
||||||
eutra_band = 7;
|
eutra_band = 7;
|
||||||
downlink_frequency = 2680000000L;
|
downlink_frequency = 2660000000L;
|
||||||
uplink_frequency_offset = -120000000;
|
uplink_frequency_offset = -120000000;
|
||||||
Nid_cell = 0;
|
Nid_cell = 0;
|
||||||
N_RB_DL = 25;
|
N_RB_DL = 25;
|
||||||
|
|||||||
@@ -16,7 +16,7 @@ eNBs =
|
|||||||
tracking_area_code = "1";
|
tracking_area_code = "1";
|
||||||
|
|
||||||
mobile_country_code = "208";
|
mobile_country_code = "208";
|
||||||
mobile_network_code = "92";
|
mobile_network_code = "95";
|
||||||
|
|
||||||
////////// Physical parameters:
|
////////// Physical parameters:
|
||||||
|
|
||||||
@@ -130,18 +130,18 @@ eNBs =
|
|||||||
};
|
};
|
||||||
|
|
||||||
////////// MME parameters:
|
////////// MME parameters:
|
||||||
mme_ip_address = ( {ipv4 = "192.168.12.26";
|
mme_ip_address = ( {ipv4 = "192.168.12.17";
|
||||||
ipv6="192:168:30::17";
|
ipv6="192:168:30::17";
|
||||||
active="yes";
|
active="yes";
|
||||||
preference="ipv4";});
|
preference="ipv4";});
|
||||||
|
|
||||||
NETWORK_INTERFACES :
|
NETWORK_INTERFACES :
|
||||||
{
|
{
|
||||||
ENB_INTERFACE_NAME_FOR_S1_MME = "eth1";
|
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
|
||||||
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.82/24";
|
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.213/24";
|
||||||
|
|
||||||
ENB_INTERFACE_NAME_FOR_S1U = "eth1";
|
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
|
||||||
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.82/24";
|
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.213/24";
|
||||||
ENB_PORT_FOR_S1U = 2152; # Spec 2152
|
ENB_PORT_FOR_S1U = 2152; # Spec 2152
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@@ -1665,6 +1665,8 @@ static void* eNB_thread( void* arg )
|
|||||||
|
|
||||||
pthread_mutex_unlock(&sync_mutex);
|
pthread_mutex_unlock(&sync_mutex);
|
||||||
|
|
||||||
|
printf( "got sync (eNB_thread)\n" );
|
||||||
|
|
||||||
int frame = 0;
|
int frame = 0;
|
||||||
|
|
||||||
#ifndef EXMIMO
|
#ifndef EXMIMO
|
||||||
@@ -1672,6 +1674,10 @@ static void* eNB_thread( void* arg )
|
|||||||
tx_pos = openair0_cfg[0].tx_scheduling_advance;
|
tx_pos = openair0_cfg[0].tx_scheduling_advance;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if defined(ENABLE_ITTI)
|
||||||
|
wait_system_ready ("Waiting for eNB application to be ready %s\r", &start_eNB);
|
||||||
|
#endif
|
||||||
|
|
||||||
while (!oai_exit) {
|
while (!oai_exit) {
|
||||||
start_meas( &softmodem_stats_mt );
|
start_meas( &softmodem_stats_mt );
|
||||||
|
|
||||||
@@ -3022,10 +3028,14 @@ int main( int argc, char **argv )
|
|||||||
openair0.func_type = BBU_FUNC;
|
openair0.func_type = BBU_FUNC;
|
||||||
openair0_cfg[0].log_level = glog_level;
|
openair0_cfg[0].log_level = glog_level;
|
||||||
|
|
||||||
if ((mode!=loop_through_memory) &&
|
if (mode!=loop_through_memory){
|
||||||
(openair0_device_init(&openair0, &openair0_cfg[0]) <0)) {
|
int ret;
|
||||||
printf("Exiting, cannot initialize device\n");
|
ret= openair0_device_init(&openair0, &openair0_cfg[0]);
|
||||||
exit(-1);
|
printf("openair0_device_init returns %d\n",ret);
|
||||||
|
if (ret<0) {
|
||||||
|
printf("Exiting, cannot initialize device\n");
|
||||||
|
exit(-1);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
else if (mode==loop_through_memory) {
|
else if (mode==loop_through_memory) {
|
||||||
}
|
}
|
||||||
@@ -3182,15 +3192,15 @@ int main( int argc, char **argv )
|
|||||||
pthread_cond_init(&sync_cond,NULL);
|
pthread_cond_init(&sync_cond,NULL);
|
||||||
pthread_mutex_init(&sync_mutex, NULL);
|
pthread_mutex_init(&sync_mutex, NULL);
|
||||||
|
|
||||||
#if defined(ENABLE_ITTI)
|
/* this is moved to the eNB main thread */
|
||||||
|
|
||||||
|
//#if defined(ENABLE_ITTI)
|
||||||
// Wait for eNB application initialization to be complete (eNB registration to MME)
|
// Wait for eNB application initialization to be complete (eNB registration to MME)
|
||||||
if (UE_flag==0) {
|
// if (UE_flag==0) {
|
||||||
printf("Waiting for eNB application to be ready\n");
|
// printf("Waiting for eNB application to be ready\n");
|
||||||
wait_system_ready ("Waiting for eNB application to be ready %s\r", &start_eNB);
|
//wait_system_ready ("Waiting for eNB application to be ready %s\r", &start_eNB);
|
||||||
}
|
// }
|
||||||
|
//#endif
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
// this starts the DMA transfers
|
// this starts the DMA transfers
|
||||||
@@ -3309,6 +3319,16 @@ int main( int argc, char **argv )
|
|||||||
|
|
||||||
#endif
|
#endif
|
||||||
printf("UE threads created\n");
|
printf("UE threads created\n");
|
||||||
|
#ifdef USE_MME
|
||||||
|
|
||||||
|
while (start_UE == 0) {
|
||||||
|
sleep(1);
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
} else {
|
} else {
|
||||||
if (multi_thread>0) {
|
if (multi_thread>0) {
|
||||||
init_eNB_proc();
|
init_eNB_proc();
|
||||||
@@ -3336,13 +3356,7 @@ int main( int argc, char **argv )
|
|||||||
// Sleep to allow all threads to setup
|
// Sleep to allow all threads to setup
|
||||||
sleep(1);
|
sleep(1);
|
||||||
|
|
||||||
#ifdef USE_MME
|
|
||||||
|
|
||||||
while (start_UE == 0) {
|
|
||||||
sleep(1);
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifndef EXMIMO
|
#ifndef EXMIMO
|
||||||
|
|
||||||
@@ -3355,6 +3369,7 @@ int main( int argc, char **argv )
|
|||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
printf("Sending sync to all threads\n");
|
||||||
|
|
||||||
pthread_mutex_lock(&sync_mutex);
|
pthread_mutex_lock(&sync_mutex);
|
||||||
sync_var=0;
|
sync_var=0;
|
||||||
|
|||||||
@@ -76,7 +76,7 @@ PHY_VARS_eNB* init_lte_eNB(LTE_DL_FRAME_PARMS *frame_parms,
|
|||||||
|
|
||||||
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
|
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
|
||||||
for (j=0; j<2; j++) {
|
for (j=0; j<2; j++) {
|
||||||
PHY_vars_eNB->dlsch_eNB[i][j] = new_eNB_dlsch(1,NUMBER_OF_HARQ_PID_MAX,frame_parms->N_RB_DL,abstraction_flag);
|
PHY_vars_eNB->dlsch_eNB[i][j] = new_eNB_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,frame_parms->N_RB_DL,abstraction_flag);
|
||||||
|
|
||||||
if (!PHY_vars_eNB->dlsch_eNB[i][j]) {
|
if (!PHY_vars_eNB->dlsch_eNB[i][j]) {
|
||||||
LOG_E(PHY,"Can't get eNB dlsch structures for UE %d \n", i);
|
LOG_E(PHY,"Can't get eNB dlsch structures for UE %d \n", i);
|
||||||
@@ -128,11 +128,11 @@ PHY_VARS_eNB* init_lte_eNB(LTE_DL_FRAME_PARMS *frame_parms,
|
|||||||
exit(-1);
|
exit(-1);
|
||||||
}
|
}
|
||||||
|
|
||||||
PHY_vars_eNB->dlsch_eNB_SI = new_eNB_dlsch(1,1,frame_parms->N_RB_DL, abstraction_flag);
|
PHY_vars_eNB->dlsch_eNB_SI = new_eNB_dlsch(1,1,NSOFT,frame_parms->N_RB_DL, abstraction_flag);
|
||||||
LOG_D(PHY,"eNB %d : SI %p\n",eNB_id,PHY_vars_eNB->dlsch_eNB_SI);
|
LOG_D(PHY,"eNB %d : SI %p\n",eNB_id,PHY_vars_eNB->dlsch_eNB_SI);
|
||||||
PHY_vars_eNB->dlsch_eNB_ra = new_eNB_dlsch(1,1,frame_parms->N_RB_DL, abstraction_flag);
|
PHY_vars_eNB->dlsch_eNB_ra = new_eNB_dlsch(1,1,NSOFT,frame_parms->N_RB_DL, abstraction_flag);
|
||||||
LOG_D(PHY,"eNB %d : RA %p\n",eNB_id,PHY_vars_eNB->dlsch_eNB_ra);
|
LOG_D(PHY,"eNB %d : RA %p\n",eNB_id,PHY_vars_eNB->dlsch_eNB_ra);
|
||||||
PHY_vars_eNB->dlsch_eNB_MCH = new_eNB_dlsch(1,NUMBER_OF_HARQ_PID_MAX,frame_parms->N_RB_DL, 0);
|
PHY_vars_eNB->dlsch_eNB_MCH = new_eNB_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,frame_parms->N_RB_DL, 0);
|
||||||
LOG_D(PHY,"eNB %d : MCH %p\n",eNB_id,PHY_vars_eNB->dlsch_eNB_MCH);
|
LOG_D(PHY,"eNB %d : MCH %p\n",eNB_id,PHY_vars_eNB->dlsch_eNB_MCH);
|
||||||
|
|
||||||
|
|
||||||
@@ -169,7 +169,7 @@ PHY_VARS_UE* init_lte_UE(LTE_DL_FRAME_PARMS *frame_parms,
|
|||||||
|
|
||||||
for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
|
for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
|
||||||
for (j=0; j<2; j++) {
|
for (j=0; j<2; j++) {
|
||||||
PHY_vars_UE->dlsch_ue[i][j] = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, abstraction_flag);
|
PHY_vars_UE->dlsch_ue[i][j] = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, abstraction_flag);
|
||||||
|
|
||||||
if (!PHY_vars_UE->dlsch_ue[i][j]) {
|
if (!PHY_vars_UE->dlsch_ue[i][j]) {
|
||||||
LOG_E(PHY,"Can't get ue dlsch structures\n");
|
LOG_E(PHY,"Can't get ue dlsch structures\n");
|
||||||
@@ -187,15 +187,15 @@ PHY_VARS_UE* init_lte_UE(LTE_DL_FRAME_PARMS *frame_parms,
|
|||||||
exit(-1);
|
exit(-1);
|
||||||
}
|
}
|
||||||
|
|
||||||
PHY_vars_UE->dlsch_ue_SI[i] = new_ue_dlsch(1,1,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, abstraction_flag);
|
PHY_vars_UE->dlsch_ue_SI[i] = new_ue_dlsch(1,1,NSOFT,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, abstraction_flag);
|
||||||
PHY_vars_UE->dlsch_ue_ra[i] = new_ue_dlsch(1,1,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, abstraction_flag);
|
PHY_vars_UE->dlsch_ue_ra[i] = new_ue_dlsch(1,1,NSOFT,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, abstraction_flag);
|
||||||
|
|
||||||
PHY_vars_UE->transmission_mode[i] = transmission_mode;
|
PHY_vars_UE->transmission_mode[i] = transmission_mode;
|
||||||
}
|
}
|
||||||
|
|
||||||
PHY_vars_UE->lte_frame_parms.pucch_config_common.deltaPUCCH_Shift = 1;
|
PHY_vars_UE->lte_frame_parms.pucch_config_common.deltaPUCCH_Shift = 1;
|
||||||
|
|
||||||
PHY_vars_UE->dlsch_ue_MCH[0] = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,MAX_TURBO_ITERATIONS_MBSFN,frame_parms->N_RB_DL,0);
|
PHY_vars_UE->dlsch_ue_MCH[0] = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_TURBO_ITERATIONS_MBSFN,frame_parms->N_RB_DL,0);
|
||||||
|
|
||||||
return (PHY_vars_UE);
|
return (PHY_vars_UE);
|
||||||
}
|
}
|
||||||
@@ -211,11 +211,11 @@ PHY_VARS_RN* init_lte_RN(LTE_DL_FRAME_PARMS *frame_parms,
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|||||||
|
|
||||||
if (eMBMS_active_state == multicast_relay) {
|
if (eMBMS_active_state == multicast_relay) {
|
||||||
for (i=0; i < 10 ; i++) { // num SF in a frame
|
for (i=0; i < 10 ; i++) { // num SF in a frame
|
||||||
PHY_vars_RN->dlsch_rn_MCH[i] = new_ue_dlsch(1,1,MAX_TURBO_ITERATIONS_MBSFN,frame_parms->N_RB_DL, 0);
|
PHY_vars_RN->dlsch_rn_MCH[i] = new_ue_dlsch(1,1,MAX_TURBO_ITERATIONS_MBSFN,NSOFT,frame_parms->N_RB_DL, 0);
|
||||||
LOG_D(PHY,"eNB %d : MCH[%d] %p\n",RN_id,i,PHY_vars_RN->dlsch_rn_MCH[i]);
|
LOG_D(PHY,"eNB %d : MCH[%d] %p\n",RN_id,i,PHY_vars_RN->dlsch_rn_MCH[i]);
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
PHY_vars_RN->dlsch_rn_MCH[0] = new_ue_dlsch(1,1,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, 0);
|
PHY_vars_RN->dlsch_rn_MCH[0] = new_ue_dlsch(1,1,MAX_TURBO_ITERATIONS,NSOFT,frame_parms->N_RB_DL, 0);
|
||||||
LOG_D(PHY,"eNB %d : MCH[0] %p\n",RN_id,PHY_vars_RN->dlsch_rn_MCH[0]);
|
LOG_D(PHY,"eNB %d : MCH[0] %p\n",RN_id,PHY_vars_RN->dlsch_rn_MCH[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user