First-level of support for new aarch64 machines
Testing on Neoverse N1 (Ampere 3GHz). Tested only on a subset of phy-simulators. - Changes: - use SIMDE consistently - adaptations of LDPC decoder generator for ARMv8 performance - SIMDe modifications of Intel CRC to allow for aarch64 build. optimizations for 128-bit to improve performance of LDPC encode/decode on aarch64 (Neoverse 1) - added BG2 files for 128-bit ldpc encoder (aarch64) - testing on Xeon - testing on x86 - minor changes to build/run on x86 - change in crc.h after returning to aarch64 - removed some warning in ldpc decoder generator for x86_64 - char - Delete irrelevant constants - Correctly declare variables - Define stdbool for all architectures - Remove definition of _MM_SHUFFLE and use SIMDE_MM_SHUFFLE - Remove commented code - Fix CMakeLists.txt - Include SIMDE avx2 functions in tools_defs.h
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committed by
Robert Schmidt
parent
79fd37b489
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a7bc282302
@@ -169,7 +169,7 @@ static inline void nrLDPC_debug_initBuffer2File(e_nrLDPC_buffers buffer)
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\brief Prints 256 data type
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\param in Input to print
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*/
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static inline void nrLDPC_debug_print256i_epi8(__m256i* in)
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static inline void nrLDPC_debug_print256i_epi8(simde__m256i* in)
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{
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uint32_t i;
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