First-level of support for new aarch64 machines
Testing on Neoverse N1 (Ampere 3GHz). Tested only on a subset of phy-simulators. - Changes: - use SIMDE consistently - adaptations of LDPC decoder generator for ARMv8 performance - SIMDe modifications of Intel CRC to allow for aarch64 build. optimizations for 128-bit to improve performance of LDPC encode/decode on aarch64 (Neoverse 1) - added BG2 files for 128-bit ldpc encoder (aarch64) - testing on Xeon - testing on x86 - minor changes to build/run on x86 - change in crc.h after returning to aarch64 - removed some warning in ldpc decoder generator for x86_64 - char - Delete irrelevant constants - Correctly declare variables - Define stdbool for all architectures - Remove definition of _MM_SHUFFLE and use SIMDE_MM_SHUFFLE - Remove commented code - Fix CMakeLists.txt - Include SIMDE avx2 functions in tools_defs.h
This commit is contained in:
committed by
Robert Schmidt
parent
79fd37b489
commit
a7bc282302
@@ -99,7 +99,7 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
|
||||
|
||||
if(impp->tinput != NULL) stop_meas(impp->tinput);
|
||||
|
||||
if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) {
|
||||
if ((BG==1 && Zc>=176) || (BG==2 && Zc>=64)) {
|
||||
// extend matrix
|
||||
if(impp->tprep != NULL) start_meas(impp->tprep);
|
||||
if(impp->tprep != NULL) stop_meas(impp->tprep);
|
||||
|
||||
Reference in New Issue
Block a user