First-level of support for new aarch64 machines
Testing on Neoverse N1 (Ampere 3GHz). Tested only on a subset of phy-simulators. - Changes: - use SIMDE consistently - adaptations of LDPC decoder generator for ARMv8 performance - SIMDe modifications of Intel CRC to allow for aarch64 build. optimizations for 128-bit to improve performance of LDPC encode/decode on aarch64 (Neoverse 1) - added BG2 files for 128-bit ldpc encoder (aarch64) - testing on Xeon - testing on x86 - minor changes to build/run on x86 - change in crc.h after returning to aarch64 - removed some warning in ldpc decoder generator for x86_64 - char - Delete irrelevant constants - Correctly declare variables - Define stdbool for all architectures - Remove definition of _MM_SHUFFLE and use SIMDE_MM_SHUFFLE - Remove commented code - Fix CMakeLists.txt - Include SIMDE avx2 functions in tools_defs.h
This commit is contained in:
Raymond Knopp
committed by
Robert Schmidt
Robert Schmidt
parent
79fd37b489
commit
a7bc282302
@@ -279,30 +279,18 @@ void nr_pdcch_channel_level(int32_t rx_size,
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uint8_t nb_rb) {
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int16_t rb;
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uint8_t aarx;
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#if defined(__x86_64__) || defined(__i386__)
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__m128i *dl_ch128;
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__m128i avg128P;
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#elif defined(__arm__) || defined(__aarch64__)
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int16x8_t *dl_ch128;
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int32x4_t *avg128P;
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#endif
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simde__m128i *dl_ch128;
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simde__m128i avg128P;
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for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
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//clear average level
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#if defined(__x86_64__) || defined(__i386__)
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avg128P = _mm_setzero_si128();
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dl_ch128=(__m128i *)&dl_ch_estimates_ext[aarx][symbol*nb_rb*12];
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#elif defined(__arm__) || defined(__aarch64__)
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dl_ch128=(int16x8_t *)&dl_ch_estimates_ext[aarx][symbol*nb_rb*12];
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#endif
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avg128P = simde_mm_setzero_si128();
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dl_ch128=(simde__m128i *)&dl_ch_estimates_ext[aarx][symbol*nb_rb*12];
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for (rb=0; rb<(nb_rb*3)>>2; rb++) {
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#if defined(__x86_64__) || defined(__i386__)
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avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[0],dl_ch128[0]));
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avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[1],dl_ch128[1]));
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avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[2],dl_ch128[2]));
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#elif defined(__arm__) || defined(__aarch64__)
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#endif
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avg128P = simde_mm_add_epi32(avg128P,simde_mm_madd_epi16(dl_ch128[0],dl_ch128[0]));
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avg128P = simde_mm_add_epi32(avg128P,simde_mm_madd_epi16(dl_ch128[1],dl_ch128[1]));
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avg128P = simde_mm_add_epi32(avg128P,simde_mm_madd_epi16(dl_ch128[2],dl_ch128[2]));
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// for (int i=0;i<24;i+=2) printf("pdcch channel re %d (%d,%d)\n",(rb*12)+(i>>1),((int16_t*)dl_ch128)[i],((int16_t*)dl_ch128)[i+1]);
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dl_ch128+=3;
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/*
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@@ -321,17 +309,11 @@ void nr_pdcch_channel_level(int32_t rx_size,
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LOG_DDD("Channel level : %d\n",avg[aarx]);
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}
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#if defined(__x86_64__) || defined(__i386__)
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_mm_empty();
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_m_empty();
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#endif
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simde_mm_empty();
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simde_m_empty();
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}
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#if defined(__x86_64) || defined(__i386__)
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__m128i mmtmpPD0,mmtmpPD1,mmtmpPD2,mmtmpPD3;
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#elif defined(__arm__) || defined(__aarch64__)
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#endif
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simde__m128i mmtmpPD0,mmtmpPD1,mmtmpPD2,mmtmpPD3;
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@@ -524,81 +506,69 @@ void nr_pdcch_channel_compensation(int32_t rx_size, int32_t rxdataF_ext[][rx_siz
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uint32_t coreset_nbr_rb) {
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uint16_t rb; //,nb_rb=20;
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uint8_t aarx;
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#if defined(__x86_64__) || defined(__i386__)
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__m128i mmtmpP0,mmtmpP1,mmtmpP2,mmtmpP3;
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#elif defined(__arm__) || defined(__aarch64__)
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int16x8_t mmtmpP0,mmtmpP1,mmtmpP2,mmtmpP3;
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#endif
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#if defined(__x86_64__) || defined(__i386__)
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__m128i *dl_ch128,*rxdataF128,*rxdataF_comp128;
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#elif defined(__arm__) || defined(__aarch64__)
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#endif
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simde__m128i mmtmpP0,mmtmpP1,mmtmpP2,mmtmpP3;
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simde__m128i *dl_ch128,*rxdataF128,*rxdataF_comp128;
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for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
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#if defined(__x86_64__) || defined(__i386__)
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dl_ch128 = (__m128i *)&dl_ch_estimates_ext[aarx][symbol*coreset_nbr_rb*12];
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rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol*coreset_nbr_rb*12];
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rxdataF_comp128 = (__m128i *)&rxdataF_comp[aarx][symbol*coreset_nbr_rb*12];
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dl_ch128 = (simde__m128i *)&dl_ch_estimates_ext[aarx][symbol*coreset_nbr_rb*12];
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rxdataF128 = (simde__m128i *)&rxdataF_ext[aarx][symbol*coreset_nbr_rb*12];
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rxdataF_comp128 = (simde__m128i *)&rxdataF_comp[aarx][symbol*coreset_nbr_rb*12];
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//printf("ch compensation dl_ch ext addr %p \n", &dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*20*12]);
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//printf("rxdataf ext addr %p symbol %d\n", &rxdataF_ext[aarx][symbol*20*12], symbol);
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//printf("rxdataf_comp addr %p\n",&rxdataF_comp[(aatx<<1)+aarx][symbol*20*12]);
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#elif defined(__arm__) || defined(__aarch64__)
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// to be filled in
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#endif
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for (rb=0; rb<(coreset_nbr_rb*3)>>2; rb++) {
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#if defined(__x86_64__) || defined(__i386__)
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// multiply by conjugated channel
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mmtmpP0 = _mm_madd_epi16(dl_ch128[0],rxdataF128[0]);
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mmtmpP0 = simde_mm_madd_epi16(dl_ch128[0],rxdataF128[0]);
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//print_ints("re",&mmtmpP0);
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// mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
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mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[0],_MM_SHUFFLE(2,3,0,1));
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mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1));
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mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i *)&conjugate[0]);
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mmtmpP1 = simde_mm_shufflelo_epi16(dl_ch128[0], SIMDE_MM_SHUFFLE(2,3,0,1));
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mmtmpP1 = simde_mm_shufflehi_epi16(mmtmpP1, SIMDE_MM_SHUFFLE(2,3,0,1));
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mmtmpP1 = simde_mm_sign_epi16(mmtmpP1,*(simde__m128i *)&conjugate[0]);
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//print_ints("im",&mmtmpP1);
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mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[0]);
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mmtmpP1 = simde_mm_madd_epi16(mmtmpP1,rxdataF128[0]);
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// mmtmpP1 contains imag part of 4 consecutive outputs (32-bit)
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mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift);
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mmtmpP0 = simde_mm_srai_epi32(mmtmpP0,output_shift);
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// print_ints("re(shift)",&mmtmpP0);
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mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift);
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mmtmpP1 = simde_mm_srai_epi32(mmtmpP1,output_shift);
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// print_ints("im(shift)",&mmtmpP1);
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mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
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mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
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mmtmpP2 = simde_mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
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mmtmpP3 = simde_mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
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//print_ints("c0",&mmtmpP2);
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//print_ints("c1",&mmtmpP3);
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rxdataF_comp128[0] = _mm_packs_epi32(mmtmpP2,mmtmpP3);
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rxdataF_comp128[0] = simde_mm_packs_epi32(mmtmpP2,mmtmpP3);
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// print_shorts("rx:",(int16_t*)rxdataF128);
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// print_shorts("ch:",(int16_t*)dl_ch128);
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// print_shorts("pack:",(int16_t*)rxdataF_comp128);
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// multiply by conjugated channel
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mmtmpP0 = _mm_madd_epi16(dl_ch128[1],rxdataF128[1]);
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mmtmpP0 = simde_mm_madd_epi16(dl_ch128[1],rxdataF128[1]);
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// mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
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mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[1],_MM_SHUFFLE(2,3,0,1));
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mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1));
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mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i *)&conjugate[0]);
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mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[1]);
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mmtmpP1 = simde_mm_shufflelo_epi16(dl_ch128[1], SIMDE_MM_SHUFFLE(2,3,0,1));
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mmtmpP1 = simde_mm_shufflehi_epi16(mmtmpP1, SIMDE_MM_SHUFFLE(2,3,0,1));
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mmtmpP1 = simde_mm_sign_epi16(mmtmpP1,*(simde__m128i *)&conjugate[0]);
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mmtmpP1 = simde_mm_madd_epi16(mmtmpP1,rxdataF128[1]);
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// mmtmpP1 contains imag part of 4 consecutive outputs (32-bit)
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mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift);
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mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift);
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mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
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mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
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rxdataF_comp128[1] = _mm_packs_epi32(mmtmpP2,mmtmpP3);
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mmtmpP0 = simde_mm_srai_epi32(mmtmpP0,output_shift);
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mmtmpP1 = simde_mm_srai_epi32(mmtmpP1,output_shift);
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mmtmpP2 = simde_mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
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mmtmpP3 = simde_mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
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rxdataF_comp128[1] = simde_mm_packs_epi32(mmtmpP2,mmtmpP3);
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//print_shorts("rx:",rxdataF128+1);
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//print_shorts("ch:",dl_ch128+1);
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//print_shorts("pack:",rxdataF_comp128+1);
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// multiply by conjugated channel
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mmtmpP0 = _mm_madd_epi16(dl_ch128[2],rxdataF128[2]);
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mmtmpP0 = simde_mm_madd_epi16(dl_ch128[2],rxdataF128[2]);
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// mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
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mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[2],_MM_SHUFFLE(2,3,0,1));
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mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1));
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mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i *)&conjugate[0]);
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mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[2]);
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mmtmpP1 = simde_mm_shufflelo_epi16(dl_ch128[2], SIMDE_MM_SHUFFLE(2,3,0,1));
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mmtmpP1 = simde_mm_shufflehi_epi16(mmtmpP1, SIMDE_MM_SHUFFLE(2,3,0,1));
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mmtmpP1 = simde_mm_sign_epi16(mmtmpP1,*(simde__m128i *)&conjugate[0]);
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mmtmpP1 = simde_mm_madd_epi16(mmtmpP1,rxdataF128[2]);
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// mmtmpP1 contains imag part of 4 consecutive outputs (32-bit)
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mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift);
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mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift);
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mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
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mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
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rxdataF_comp128[2] = _mm_packs_epi32(mmtmpP2,mmtmpP3);
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mmtmpP0 = simde_mm_srai_epi32(mmtmpP0,output_shift);
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mmtmpP1 = simde_mm_srai_epi32(mmtmpP1,output_shift);
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mmtmpP2 = simde_mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
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mmtmpP3 = simde_mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
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rxdataF_comp128[2] = simde_mm_packs_epi32(mmtmpP2,mmtmpP3);
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///////////////////////////////////////////////////////////////////////////////////////////////
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//print_shorts("rx:",rxdataF128+2);
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//print_shorts("ch:",dl_ch128+2);
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@@ -613,16 +583,11 @@ void nr_pdcch_channel_compensation(int32_t rx_size, int32_t rxdataF_ext[][rx_siz
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dl_ch128+=3;
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rxdataF128+=3;
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rxdataF_comp128+=3;
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#elif defined(__arm__) || defined(__aarch64__)
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// to be filled in
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#endif
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}
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}
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#if defined(__x86_64__) || defined(__i386__)
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_mm_empty();
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_m_empty();
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#endif
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simde_mm_empty();
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simde_m_empty();
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}
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@@ -630,36 +595,21 @@ void nr_pdcch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
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int32_t rx_size,
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int32_t rxdataF_comp[][rx_size],
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uint8_t symbol) {
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#if defined(__x86_64__) || defined(__i386__)
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__m128i *rxdataF_comp128_0,*rxdataF_comp128_1;
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#elif defined(__arm__) || defined(__aarch64__)
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int16x8_t *rxdataF_comp128_0,*rxdataF_comp128_1;
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#endif
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simde__m128i *rxdataF_comp128_0,*rxdataF_comp128_1;
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int32_t i;
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if (frame_parms->nb_antennas_rx>1) {
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#if defined(__x86_64__) || defined(__i386__)
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rxdataF_comp128_0 = (__m128i *)&rxdataF_comp[0][symbol*frame_parms->N_RB_DL*12];
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rxdataF_comp128_1 = (__m128i *)&rxdataF_comp[1][symbol*frame_parms->N_RB_DL*12];
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#elif defined(__arm__) || defined(__aarch64__)
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rxdataF_comp128_0 = (int16x8_t *)&rxdataF_comp[0][symbol*frame_parms->N_RB_DL*12];
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rxdataF_comp128_1 = (int16x8_t *)&rxdataF_comp[1][symbol*frame_parms->N_RB_DL*12];
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#endif
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rxdataF_comp128_0 = (simde__m128i *)&rxdataF_comp[0][symbol*frame_parms->N_RB_DL*12];
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rxdataF_comp128_1 = (simde__m128i *)&rxdataF_comp[1][symbol*frame_parms->N_RB_DL*12];
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// MRC on each re of rb
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for (i=0; i<frame_parms->N_RB_DL*3; i++) {
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#if defined(__x86_64__) || defined(__i386__)
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rxdataF_comp128_0[i] = _mm_adds_epi16(_mm_srai_epi16(rxdataF_comp128_0[i],1),_mm_srai_epi16(rxdataF_comp128_1[i],1));
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#elif defined(__arm__) || defined(__aarch64__)
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rxdataF_comp128_0[i] = vhaddq_s16(rxdataF_comp128_0[i],rxdataF_comp128_1[i]);
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#endif
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rxdataF_comp128_0[i] = simde_mm_adds_epi16(simde_mm_srai_epi16(rxdataF_comp128_0[i],1),simde_mm_srai_epi16(rxdataF_comp128_1[i],1));
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}
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}
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#if defined(__x86_64__) || defined(__i386__)
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_mm_empty();
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_m_empty();
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#endif
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simde_mm_empty();
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simde_m_empty();
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}
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int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
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