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First-level of support for new aarch64 machines

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Testing on Neoverse N1 (Ampere 3GHz). Tested only on a subset of phy-simulators.

- Changes:
- use SIMDE consistently
- adaptations of LDPC decoder generator for ARMv8 performance
- SIMDe modifications of Intel CRC to allow for aarch64 build.
  optimizations for 128-bit to improve performance of LDPC encode/decode
  on aarch64 (Neoverse 1)
- added BG2 files for 128-bit ldpc encoder (aarch64)
- testing on Xeon
- testing on x86
- minor changes to build/run on x86
- change in crc.h after returning to aarch64
- removed some warning in ldpc decoder generator for x86_64
- char
- Delete irrelevant constants
- Correctly declare variables
- Define stdbool for all architectures
- Remove definition of _MM_SHUFFLE and use SIMDE_MM_SHUFFLE
- Remove commented code
- Fix CMakeLists.txt
- Include SIMDE avx2 functions in tools_defs.h
This commit is contained in:
Raymond Knopp
2023-09-13 17:19:20 +02:00
committed by Robert Schmidt
parent 79fd37b489
commit a7bc282302
168 changed files with 30595 additions and 21476 deletions
Download Patch File Download Diff File Expand all files Collapse all files
radio/ETHERNET/eth_udp.c
+6 -19
View File
@@ -321,18 +321,10 @@ void *trx_eth_write_udp_cmd(udpTXelem_t *udpTXelem) {
if (TS_advance < (nsamps/2)) {
LOG_W(PHY,"Starting TX FH for TS %llu absslot %llu(%llu) last_rxTS %llu TS_advance %llu samples\n",(unsigned long long)timestamp,(unsigned long long)timestamp/nsamps,((unsigned long long)timestamp/nsamps)%20,(unsigned long long)last_rxTS,(unsigned long long)TS_advance);
}
void *buff2;
#if defined(__x86_64) || defined(__i386__)
void *buff2;
int nsamps2 = 256>>3;
__m256i buff_tx[nsamps2+1];
buff2=(void*)&buff_tx[1] - APP_HEADER_SIZE_BYTES;
#elif defined(__arm__) || defined(__aarch64__)
int nsamps2 = 256>>2;
int16x8_t buff_tx[nsamps2+2];
buff2=(void*)&buff_tx[2] - APP_HEADER_SIZE_BYTES;
#else
#error Unsupported CPU architecture, ethernet device cannot be built
#endif
simde__m256i buff_tx[nsamps2 + 1];
buff2 = (void *)&buff_tx[1] - APP_HEADER_SIZE_BYTES;
/* construct application header */
// ECPRI Protocol revision + reserved bits (1 byte)
@@ -360,9 +352,8 @@ void *trx_eth_write_udp_cmd(udpTXelem_t *udpTXelem) {
LOG_D(PHY,"TS %llu (TS0 %llu) aa %d : offset %d, len %d\n",(unsigned long long)TS,(unsigned long long)fhstate->TS0,aid,offset,len);
// ECPRI PC_ID (2 bytes)
*(uint16_t *)(buff2 + 4) = aid;
// bring TX data into 12 MSBs
#if defined(__x86_64__) || defined(__i386__)
__m256i *buff256 = (__m256i *)&(((int32_t*)buff[aid])[offset]);
// bring TX data into 12 MSBs
simde__m256i *buff256 = (simde__m256i *)&(((int32_t *)buff[aid])[offset]);
for (int j=0; j<32; j+=8) {
buff_tx[1+j] = simde_mm256_slli_epi16(buff256[j],4);
buff_tx[2+j] = simde_mm256_slli_epi16(buff256[j+1],4);
@@ -373,11 +364,7 @@ void *trx_eth_write_udp_cmd(udpTXelem_t *udpTXelem) {
buff_tx[7+j] = simde_mm256_slli_epi16(buff256[j+6],4);
buff_tx[8+j] = simde_mm256_slli_epi16(buff256[j+7],4);
}
#elif defined(__arm__)
int16x8_t *buff128 = (__int16x8_t*)&buff[aid][offset];
for (int j=0; j<64; j++) buff_tx[2+j] = vshlq_n_s16(((int16x8_t *)buff128)[j],4);
#endif
/* Send packet */
bytes_sent = sendto(eth->sockfdd[0],
buff2,
radio/IRIS/iris_lib.cpp
+8 -18
View File
@@ -139,20 +139,14 @@ trx_iris_write(openair0_device *device, openair0_timestamp timestamp, void **buf
int flag = 0;
iris_state_t *s = (iris_state_t *) device->priv;
int nsamps2; // aligned to upper 32 or 16 byte boundary
#if defined(__x86_64) || defined(__i386__)
int nsamps2; // aligned to upper 32 or 16 byte boundary
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[2][nsamps2];
#else
#error unsupported CPU architecture, iris device cannot be built
#endif
simde__m256i buff_tx[2][nsamps2];
// bring RX data into 12 LSBs for softmodem RX
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
buff_tx[i][j] = simde_mm256_slli_epi16(((__m256i *)buff[i])[j],4);
#endif
for (int j = 0; j < nsamps2; j++) {
buff_tx[i][j] = simde_mm256_slli_epi16(((simde__m256i *)buff[i])[j], 4);
}
}
@@ -228,11 +222,9 @@ static int trx_iris_read(openair0_device *device, openair0_timestamp *ptimestamp
int r;
int m = s->rx_num_channels;
int nsamps2; // aligned to upper 32 or 16 byte boundary
#if defined(__x86_64) || defined(__i386__)
int nsamps2; // aligned to upper 32 or 16 byte boundary
nsamps2 = (nsamps+7)>>3;
__m256i buff_tmp[2][nsamps2];
#endif
simde__m256i buff_tmp[2][nsamps2];
for (r = 0; r < s->device_num; r++) {
flags = 0;
@@ -301,10 +293,8 @@ static int trx_iris_read(openair0_device *device, openair0_timestamp *ptimestamp
// bring RX data into 12 LSBs for softmodem RX
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
((__m256i *)buff[i])[j] = simde_mm256_srai_epi16(buff_tmp[i][j],4);
#endif
for (int j = 0; j < nsamps2; j++) {
((simde__m256i *)buff[i])[j] = simde_mm256_srai_epi16(buff_tmp[i][j], 4);
}
}
}
radio/USRP/usrp_lib.cpp
+52 -85
View File
@@ -470,33 +470,20 @@ static int trx_usrp_write(openair0_device *device,
last_packet_state = true;
}
if(usrp_tx_thread == 0){
#if defined(__x86_64) || defined(__i386__)
if (usrp_tx_thread == 0) {
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[cc<2?2:cc][nsamps2];
#elif defined(__arm__) || defined(__aarch64__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tx[cc<2?2:cc][nsamps2];
#else
#error Unsupported CPU architecture, USRP device cannot be built
#endif
simde__m256i buff_tx[cc < 2 ? 2 : cc][nsamps2];
// bring RX data into 12 LSBs for softmodem RX
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
if ((((uintptr_t) buff[i])&0x1F)==0) {
buff_tx[i][j] = simde_mm256_slli_epi16(((__m256i *)buff[i])[j],4);
// bring RX data into 12 LSBs for softmodem RX
for (int i = 0; i < cc; i++) {
for (int j = 0; j < nsamps2; j++) {
if ((((uintptr_t)buff[i]) & 0x1F) == 0) {
buff_tx[i][j] = simde_mm256_slli_epi16(((simde__m256i *)buff[i])[j], 4);
} else {
simde__m256i tmp = simde_mm256_loadu_si256(((simde__m256i *)buff[i]) + j);
buff_tx[i][j] = simde_mm256_slli_epi16(tmp, 4);
}
}
else
{
__m256i tmp = simde_mm256_loadu_si256(((__m256i *)buff[i])+j);
buff_tx[i][j] = simde_mm256_slli_epi16(tmp,4);
}
#elif defined(__arm__) || defined(__aarch64__)
buff_tx[i][j] = vshlq_n_s16(((int16x8_t *)buff[i])[j],4);
#endif
}
}
s->tx_md.has_time_spec = true;
@@ -529,33 +516,35 @@ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_BEAM_SWITCHI
if (ret != nsamps) LOG_E(HW,"[xmit] tx samples %d != %d\n",ret,nsamps);
return ret;
}
else{
pthread_mutex_lock(&write_thread->mutex_write);
} else {
pthread_mutex_lock(&write_thread->mutex_write);
if(write_thread->count_write >= MAX_WRITE_THREAD_PACKAGE){
LOG_W(HW,"Buffer overflow, count_write = %d, start = %d end = %d, resetting write package\n", write_thread->count_write, write_thread->start, write_thread->end);
write_thread->end = write_thread->start;
write_thread->count_write = 0;
if (write_thread->count_write >= MAX_WRITE_THREAD_PACKAGE) {
LOG_W(HW,
"Buffer overflow, count_write = %d, start = %d end = %d, resetting write package\n",
write_thread->count_write,
write_thread->start,
write_thread->end);
write_thread->end = write_thread->start;
write_thread->count_write = 0;
}
end = write_thread->end;
write_package[end].timestamp = timestamp;
write_package[end].nsamps = nsamps;
write_package[end].cc = cc;
write_package[end].first_packet = first_packet_state;
write_package[end].last_packet = last_packet_state;
write_package[end].flags_gpio = flags_gpio;
for (int i = 0; i < cc; i++)
write_package[end].buff[i] = buff[i];
write_thread->count_write++;
write_thread->end = (write_thread->end + 1) % MAX_WRITE_THREAD_PACKAGE;
LOG_D(HW, "Signaling TX TS %llu\n", (unsigned long long)timestamp);
pthread_cond_signal(&write_thread->cond_write);
pthread_mutex_unlock(&write_thread->mutex_write);
return 0;
}
end = write_thread->end;
write_package[end].timestamp = timestamp;
write_package[end].nsamps = nsamps;
write_package[end].cc = cc;
write_package[end].first_packet = first_packet_state;
write_package[end].last_packet = last_packet_state;
write_package[end].flags_gpio = flags_gpio;
for (int i = 0; i < cc; i++)
write_package[end].buff[i] = buff[i];
write_thread->count_write++;
write_thread->end = (write_thread->end + 1)% MAX_WRITE_THREAD_PACKAGE;
LOG_D(HW,"Signaling TX TS %llu\n",(unsigned long long)timestamp);
pthread_cond_signal(&write_thread->cond_write);
pthread_mutex_unlock(&write_thread->mutex_write);
return 0;
}
}
//-----------------------start--------------------------
@@ -609,34 +598,22 @@ void *trx_usrp_write_thread(void * arg){
LOG_W(HW,"count write = %d, start = %d, end = %d\n", write_thread->count_write, write_thread->start, write_thread->end);
}*/
#if defined(__x86_64) || defined(__i386__)
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[cc<2?2:cc][nsamps2];
#elif defined(__arm__) || defined(__aarch64__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tx[cc<2?2:cc][nsamps2];
#else
#error Unsupported CPU architecture, USRP device cannot be built
#endif
simde__m256i buff_tx[cc < 2 ? 2 : cc][nsamps2];
// bring RX data into 12 LSBs for softmodem RX
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
// bring RX data into 12 LSBs for softmodem RX
for (int i = 0; i < cc; i++) {
for (int j = 0; j < nsamps2; j++) {
if ((((uintptr_t) buff[i])&0x1F)==0) {
buff_tx[i][j] = simde_mm256_slli_epi16(((__m256i *)buff[i])[j],4);
buff_tx[i][j] = simde_mm256_slli_epi16(((simde__m256i *)buff[i])[j], 4);
}
else
{
__m256i tmp = simde_mm256_loadu_si256(((__m256i *)buff[i])+j);
simde__m256i tmp = simde_mm256_loadu_si256(((simde__m256i *)buff[i]) + j);
buff_tx[i][j] = simde_mm256_slli_epi16(tmp,4);
}
#elif defined(__arm__) || defined(__aarch64__)
buff_tx[i][j] = vshlq_n_s16(((int16x8_t *)buff[i])[j],4);
#endif
}
}
}
}
s->tx_md.has_time_spec = true;
s->tx_md.start_of_burst = (s->tx_count==0) ? true : first_packet;
@@ -723,14 +700,9 @@ static void trx_usrp_write_reset(openair0_thread_t *wt) {
static int trx_usrp_read(openair0_device *device, openair0_timestamp *ptimestamp, void **buff, int nsamps, int cc) {
usrp_state_t *s = (usrp_state_t *)device->priv;
int samples_received=0;
int nsamps2; // aligned to upper 32 or 16 byte boundary
#if defined(__x86_64) || defined(__i386__)
int nsamps2; // aligned to upper 32 or 16 byte boundary
nsamps2 = (nsamps+7)>>3;
__m256i buff_tmp[cc<2 ? 2 : cc][nsamps2];
#elif defined(__arm__) || defined(__aarch64__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tmp[cc<2 ? 2 : cc][nsamps2];
#endif
simde__m256i buff_tmp[cc < 2 ? 2 : cc][nsamps2];
static int read_count = 0;
int rxshift;
switch (device->type) {
@@ -772,21 +744,16 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp *ptimestamp
// bring RX data into 12 LSBs for softmodem RX
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
for (int j = 0; j < nsamps2; j++) {
// FK: in some cases the buffer might not be 32 byte aligned, so we cannot use avx2
if ((((uintptr_t) buff[i])&0x1F)==0) {
((__m256i *)buff[i])[j] = simde_mm256_srai_epi16(buff_tmp[i][j],rxshift);
((simde__m256i *)buff[i])[j] = simde_mm256_srai_epi16(buff_tmp[i][j], rxshift);
} else {
__m256i tmp = simde_mm256_srai_epi16(buff_tmp[i][j],rxshift);
simde_mm256_storeu_si256(((__m256i *)buff[i])+j, tmp);
simde__m256i tmp = simde_mm256_srai_epi16(buff_tmp[i][j], rxshift);
simde_mm256_storeu_si256(((simde__m256i *)buff[i]) + j, tmp);
}
}
#elif defined(__arm__) || defined(__aarch64__)
for (int j=0; j<nsamps2; j++)
((int16x8_t *)buff[i])[j] = vshrq_n_s16(buff_tmp[i][j],rxshift);
#endif
}
if (samples_received < nsamps) {
radio/rfsimulator/stored_node.c
+4 -6
View File
@@ -48,10 +48,10 @@ int fullread(int fd, void *_buf, int count) {
int32_t signal_energy(int32_t *input,uint32_t length) {
int32_t i;
int32_t temp,temp2;
register __m64 mm0,mm1,mm2,mm3;
__m64 *in = (__m64 *)input;
mm0 = _mm_setzero_si64();//pxor(mm0,mm0);
mm3 = _mm_setzero_si64();//pxor(mm3,mm3);
register simde__m64 mm0, mm1, mm2, mm3;
simde__m64 *in = (simde__m64 *)input;
mm0 = simde_mm_setzero_si64(); // pxor(mm0,mm0);
mm3 = simde_mm_setzero_si64(); // pxor(mm3,mm3);
for (i=0; i<length>>1; i++) {
mm1 = in[i];
@@ -77,8 +77,6 @@ int32_t signal_energy(int32_t *input,uint32_t length) {
temp2/=(length*length);
// temp2<<=(2*shift_DC);
temp -= temp2;
_mm_empty();
_m_empty();
return((temp>0)?temp:1);
}