First-level of support for new aarch64 machines

Testing on Neoverse N1 (Ampere 3GHz). Tested only on a subset of phy-simulators.

- Changes:
- use SIMDE consistently
- adaptations of LDPC decoder generator for ARMv8 performance
- SIMDe modifications of Intel CRC to allow for aarch64 build.
  optimizations for 128-bit to improve performance of LDPC encode/decode
  on aarch64 (Neoverse 1)
- added BG2 files for 128-bit ldpc encoder (aarch64)
- testing on Xeon
- testing on x86
- minor changes to build/run on x86
- change in crc.h after returning to aarch64
- removed some warning in ldpc decoder generator for x86_64
- char
- Delete irrelevant constants
- Correctly declare variables
- Define stdbool for all architectures
- Remove definition of _MM_SHUFFLE and use SIMDE_MM_SHUFFLE
- Remove commented code
- Fix CMakeLists.txt
- Include SIMDE avx2 functions in tools_defs.h
This commit is contained in:
Raymond Knopp
2023-09-13 17:19:20 +02:00
committed by Robert Schmidt
parent 79fd37b489
commit a7bc282302
168 changed files with 30595 additions and 21476 deletions
+6 -19
View File
@@ -321,18 +321,10 @@ void *trx_eth_write_udp_cmd(udpTXelem_t *udpTXelem) {
if (TS_advance < (nsamps/2)) {
LOG_W(PHY,"Starting TX FH for TS %llu absslot %llu(%llu) last_rxTS %llu TS_advance %llu samples\n",(unsigned long long)timestamp,(unsigned long long)timestamp/nsamps,((unsigned long long)timestamp/nsamps)%20,(unsigned long long)last_rxTS,(unsigned long long)TS_advance);
}
void *buff2;
#if defined(__x86_64) || defined(__i386__)
void *buff2;
int nsamps2 = 256>>3;
__m256i buff_tx[nsamps2+1];
buff2=(void*)&buff_tx[1] - APP_HEADER_SIZE_BYTES;
#elif defined(__arm__) || defined(__aarch64__)
int nsamps2 = 256>>2;
int16x8_t buff_tx[nsamps2+2];
buff2=(void*)&buff_tx[2] - APP_HEADER_SIZE_BYTES;
#else
#error Unsupported CPU architecture, ethernet device cannot be built
#endif
simde__m256i buff_tx[nsamps2 + 1];
buff2 = (void *)&buff_tx[1] - APP_HEADER_SIZE_BYTES;
/* construct application header */
// ECPRI Protocol revision + reserved bits (1 byte)
@@ -360,9 +352,8 @@ void *trx_eth_write_udp_cmd(udpTXelem_t *udpTXelem) {
LOG_D(PHY,"TS %llu (TS0 %llu) aa %d : offset %d, len %d\n",(unsigned long long)TS,(unsigned long long)fhstate->TS0,aid,offset,len);
// ECPRI PC_ID (2 bytes)
*(uint16_t *)(buff2 + 4) = aid;
// bring TX data into 12 MSBs
#if defined(__x86_64__) || defined(__i386__)
__m256i *buff256 = (__m256i *)&(((int32_t*)buff[aid])[offset]);
// bring TX data into 12 MSBs
simde__m256i *buff256 = (simde__m256i *)&(((int32_t *)buff[aid])[offset]);
for (int j=0; j<32; j+=8) {
buff_tx[1+j] = simde_mm256_slli_epi16(buff256[j],4);
buff_tx[2+j] = simde_mm256_slli_epi16(buff256[j+1],4);
@@ -373,11 +364,7 @@ void *trx_eth_write_udp_cmd(udpTXelem_t *udpTXelem) {
buff_tx[7+j] = simde_mm256_slli_epi16(buff256[j+6],4);
buff_tx[8+j] = simde_mm256_slli_epi16(buff256[j+7],4);
}
#elif defined(__arm__)
int16x8_t *buff128 = (__int16x8_t*)&buff[aid][offset];
for (int j=0; j<64; j++) buff_tx[2+j] = vshlq_n_s16(((int16x8_t *)buff128)[j],4);
#endif
/* Send packet */
bytes_sent = sendto(eth->sockfdd[0],
buff2,