First-level of support for new aarch64 machines

Testing on Neoverse N1 (Ampere 3GHz). Tested only on a subset of phy-simulators.

- Changes:
- use SIMDE consistently
- adaptations of LDPC decoder generator for ARMv8 performance
- SIMDe modifications of Intel CRC to allow for aarch64 build.
  optimizations for 128-bit to improve performance of LDPC encode/decode
  on aarch64 (Neoverse 1)
- added BG2 files for 128-bit ldpc encoder (aarch64)
- testing on Xeon
- testing on x86
- minor changes to build/run on x86
- change in crc.h after returning to aarch64
- removed some warning in ldpc decoder generator for x86_64
- char
- Delete irrelevant constants
- Correctly declare variables
- Define stdbool for all architectures
- Remove definition of _MM_SHUFFLE and use SIMDE_MM_SHUFFLE
- Remove commented code
- Fix CMakeLists.txt
- Include SIMDE avx2 functions in tools_defs.h
This commit is contained in:
Raymond Knopp
2023-09-13 17:19:20 +02:00
committed by Robert Schmidt
parent 79fd37b489
commit a7bc282302
168 changed files with 30595 additions and 21476 deletions
+4 -6
View File
@@ -48,10 +48,10 @@ int fullread(int fd, void *_buf, int count) {
int32_t signal_energy(int32_t *input,uint32_t length) {
int32_t i;
int32_t temp,temp2;
register __m64 mm0,mm1,mm2,mm3;
__m64 *in = (__m64 *)input;
mm0 = _mm_setzero_si64();//pxor(mm0,mm0);
mm3 = _mm_setzero_si64();//pxor(mm3,mm3);
register simde__m64 mm0, mm1, mm2, mm3;
simde__m64 *in = (simde__m64 *)input;
mm0 = simde_mm_setzero_si64(); // pxor(mm0,mm0);
mm3 = simde_mm_setzero_si64(); // pxor(mm3,mm3);
for (i=0; i<length>>1; i++) {
mm1 = in[i];
@@ -77,8 +77,6 @@ int32_t signal_energy(int32_t *input,uint32_t length) {
temp2/=(length*length);
// temp2<<=(2*shift_DC);
temp -= temp2;
_mm_empty();
_m_empty();
return((temp>0)?temp:1);
}