fixes for UE pucch scheduling
This commit is contained in:
+1
-2
@@ -356,9 +356,8 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg)
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mac->scc->tdd_UL_DL_ConfigurationCommon :
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mac->scc->tdd_UL_DL_ConfigurationCommon :
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mac->scc_SIB->tdd_UL_DL_ConfigurationCommon,
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mac->scc_SIB->tdd_UL_DL_ConfigurationCommon,
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ul_info.slot_tx, mac->frame_type)) {
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ul_info.slot_tx, mac->frame_type)) {
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LOG_D(NR_MAC, "Slot %d. calling nr_ue_ul_ind() and nr_ue_pucch_scheduler() from %s\n", ul_info.slot_tx, __FUNCTION__);
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LOG_D(NR_MAC, "Slot %d. calling nr_ue_ul_ind()\n", ul_info.slot_tx);
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nr_ue_ul_scheduler(&ul_info);
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nr_ue_ul_scheduler(&ul_info);
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nr_ue_pucch_scheduler(mod_id, ul_info.frame_tx, ul_info.slot_tx, NULL);
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}
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}
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process_queued_nr_nfapi_msgs(mac, sfn_slot);
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process_queued_nr_nfapi_msgs(mac, sfn_slot);
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}
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}
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@@ -255,7 +255,6 @@ int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response
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pdu_0_1->ul_cqi = 255;
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pdu_0_1->ul_cqi = 255;
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pdu_0_1->timing_advance = 0;
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pdu_0_1->timing_advance = 0;
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pdu_0_1->rssi = 0;
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pdu_0_1->rssi = 0;
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if (mac->nr_ue_emul_l1.num_harqs > 0) {
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if (mac->nr_ue_emul_l1.num_harqs > 0) {
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int harq_index = 0;
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int harq_index = 0;
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pdu_0_1->pduBitmap = 2; // (value->pduBitmap >> 1) & 0x01) == HARQ and (value->pduBitmap) & 0x01) == SR
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pdu_0_1->pduBitmap = 2; // (value->pduBitmap >> 1) & 0x01) == HARQ and (value->pduBitmap) & 0x01) == SR
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@@ -4651,29 +4651,32 @@ void find_period_offset_SR(const NR_SchedulingRequestResourceConfig_t *Schedulin
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}
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}
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}
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}
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uint16_t compute_pucch_prb_size(uint8_t format,
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int compute_pucch_crc_size(int O_uci)
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uint8_t nr_prbs,
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{
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uint16_t O_tot,
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if (O_uci < 12)
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uint16_t O_csi,
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return 0;
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NR_PUCCH_MaxCodeRate_t *maxCodeRate,
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uint8_t Qm,
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uint8_t n_symb,
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uint8_t n_re_ctrl) {
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uint16_t O_crc;
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if (O_tot<12)
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O_crc = 0;
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else{
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else{
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if (O_tot<20)
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if (O_uci < 20)
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O_crc = 6;
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return 6;
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else {
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else {
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if (O_tot<360)
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if (O_uci < 360)
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O_crc = 11;
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return 11;
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else
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else
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AssertFatal(1==0,"Case for segmented PUCCH not yet implemented");
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AssertFatal(1==0,"Case for segmented PUCCH not yet implemented");
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}
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}
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}
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}
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}
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uint16_t compute_pucch_prb_size(uint8_t format,
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uint8_t nr_prbs,
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uint16_t O_uci,
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NR_PUCCH_MaxCodeRate_t *maxCodeRate,
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uint8_t Qm,
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uint8_t n_symb,
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uint8_t n_re_ctrl)
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{
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int O_crc = compute_pucch_crc_size(O_uci);
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int O_tot = O_uci + O_crc;
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int rtimes100;
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int rtimes100;
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switch(*maxCodeRate){
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switch(*maxCodeRate){
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@@ -4704,25 +4707,27 @@ uint16_t compute_pucch_prb_size(uint8_t format,
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float r = (float)rtimes100/100;
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float r = (float)rtimes100/100;
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if (O_csi == O_tot) {
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AssertFatal(O_tot <= (nr_prbs * n_re_ctrl * n_symb * Qm * r),
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if ((O_tot+O_csi)>(nr_prbs*n_re_ctrl*n_symb*Qm*r))
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"MaxCodeRate %.2f can't support %d UCI bits and %d CRC bits with %d PRBs",
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AssertFatal(1==0,"MaxCodeRate %.2f can't support %d UCI bits and %d CRC bits with %d PRBs",
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r,
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r,O_tot,O_crc,nr_prbs);
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O_tot,
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}
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O_crc,
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nr_prbs);
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if (format==2){
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if (format==2){
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// TODO fix this for multiple CSI reports
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// TODO fix this for multiple CSI reports
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for (int i=1; i<=nr_prbs; i++){
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for (int i = nr_prbs; i > 0; i--) {
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if((O_tot+O_crc)<=(i*n_symb*Qm*n_re_ctrl*r) &&
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// compute code rate factor for next prb value
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(O_tot+O_crc)>((i-1)*n_symb*Qm*n_re_ctrl*r))
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int next_prb_factor = (i - 1) * n_symb * Qm * n_re_ctrl * r;
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// if it does not sa
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if (O_tot > next_prb_factor)
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return i;
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return i;
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}
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}
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AssertFatal(1==0,"MaxCodeRate %.2f can't support %d UCI bits and %d CRC bits with at most %d PRBs",
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r,O_tot,O_crc,nr_prbs);
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}
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}
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else{
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else{
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AssertFatal(1==0,"Not yet implemented");
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AssertFatal(1==0,"Not yet implemented");
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}
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}
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return 0;
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}
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}
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int get_dlbw_tbslbrm(int scc_bwpsize,
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int get_dlbw_tbslbrm(int scc_bwpsize,
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@@ -171,7 +171,7 @@ int64_t *get_prach_config_info(frequency_range_t freq_range,
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uint8_t unpaired);
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uint8_t unpaired);
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uint16_t get_NCS(uint8_t index, uint16_t format, uint8_t restricted_set_config);
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uint16_t get_NCS(uint8_t index, uint16_t format, uint8_t restricted_set_config);
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int compute_pucch_crc_size(int O_uci);
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uint8_t get_l0_ul(uint8_t mapping_type, uint8_t dmrs_typeA_position);
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uint8_t get_l0_ul(uint8_t mapping_type, uint8_t dmrs_typeA_position);
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int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmrs_AdditionalPosition_t additional_pos, pusch_maxLength_t pusch_maxLength, uint8_t start_symbolt, uint8_t dmrs_typeA_position);
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int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmrs_AdditionalPosition_t additional_pos, pusch_maxLength_t pusch_maxLength, uint8_t start_symbolt, uint8_t dmrs_typeA_position);
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@@ -238,8 +238,7 @@ uint8_t get_pusch_nb_antenna_ports(NR_PUSCH_Config_t *pusch_Config,
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uint16_t compute_pucch_prb_size(uint8_t format,
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uint16_t compute_pucch_prb_size(uint8_t format,
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uint8_t nr_prbs,
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uint8_t nr_prbs,
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uint16_t O_tot,
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uint16_t O_uci,
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uint16_t O_csi,
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NR_PUCCH_MaxCodeRate_t *maxCodeRate,
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NR_PUCCH_MaxCodeRate_t *maxCodeRate,
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uint8_t Qm,
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uint8_t Qm,
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uint8_t n_symb,
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uint8_t n_symb,
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@@ -336,7 +336,6 @@ typedef struct {
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bool ack_received;
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bool ack_received;
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uint8_t pucch_resource_indicator;
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uint8_t pucch_resource_indicator;
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uint16_t feedback_to_ul;
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uint16_t feedback_to_ul;
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int is_common;
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frame_t dl_frame;
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frame_t dl_frame;
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int dl_slot;
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int dl_slot;
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uint8_t ack;
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uint8_t ack;
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@@ -356,19 +355,18 @@ typedef struct {
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} RAR_grant_t;
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} RAR_grant_t;
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typedef struct {
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typedef struct {
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int n_HARQ_ACK;
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NR_PUCCH_Resource_t *pucch_resource;
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uint32_t ack_payload;
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uint32_t ack_payload;
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uint8_t sr_payload;
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uint8_t sr_payload;
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uint32_t csi_part1_payload;
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uint32_t csi_part1_payload;
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uint32_t csi_part2_payload;
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uint32_t csi_part2_payload;
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int resource_indicator;
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int n_sr;
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int resource_set_id;
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int n_csi;
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int is_common;
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int n_harq;
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int initial_pucch_id;
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NR_PUCCH_Resource_t *pucch_resource;
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int n_CCE;
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int n_CCE;
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int N_CCE;
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int N_CCE;
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int8_t delta_pucch;
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int delta_pucch;
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int initial_pucch_id;
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} PUCCH_sched_t;
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} PUCCH_sched_t;
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typedef struct {
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typedef struct {
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@@ -197,10 +197,7 @@ bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac,
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frame_t frame,
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frame_t frame,
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int slot);
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int slot);
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uint8_t nr_get_csi_measurements(NR_UE_MAC_INST_t *mac,
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int nr_get_csi_measurements(NR_UE_MAC_INST_t *mac, frame_t frame, int slot, PUCCH_sched_t *pucch);
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frame_t frame,
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int slot,
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PUCCH_sched_t *pucch);
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uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac,
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uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac,
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PUCCH_sched_t *pucch,
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PUCCH_sched_t *pucch,
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@@ -276,49 +273,39 @@ void set_harq_status(NR_UE_MAC_INST_t *mac,
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uint8_t dai,
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uint8_t dai,
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int n_CCE,
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int n_CCE,
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int N_CCE,
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int N_CCE,
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int is_common,
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frame_t frame,
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frame_t frame,
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int slot);
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int slot);
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uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac,
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bool get_downlink_ack(NR_UE_MAC_INST_t *mac, frame_t frame, int slot, PUCCH_sched_t *pucch);
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frame_t frame,
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int slot,
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PUCCH_sched_t *pucch);
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int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size);
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int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size);
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void select_pucch_resource(NR_UE_MAC_INST_t *mac,
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void multiplex_pucch_resource(NR_UE_MAC_INST_t *mac, PUCCH_sched_t *pucch, int num_res);
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PUCCH_sched_t *pucch);
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int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac,
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int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac,
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int scs,
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int scs,
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NR_PUCCH_Config_t *pucch_Config,
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NR_PUCCH_Config_t *pucch_Config,
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PUCCH_sched_t *pucch,
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int delta_pucch,
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uint8_t format_type,
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uint8_t format_type,
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uint16_t nb_of_prbs,
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uint16_t nb_of_prbs,
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uint8_t freq_hop_flag,
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uint8_t freq_hop_flag,
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uint8_t add_dmrs_flag,
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uint8_t add_dmrs_flag,
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uint8_t N_symb_PUCCH,
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uint8_t N_symb_PUCCH,
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int subframe_number,
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int subframe_number,
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int O_ACK, int O_SR,
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int O_uci);
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int O_CSI, int O_CRC);
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int get_deltatf(uint16_t nb_of_prbs,
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int get_deltatf(uint16_t nb_of_prbs,
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uint8_t N_symb_PUCCH,
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uint8_t N_symb_PUCCH,
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uint8_t freq_hop_flag,
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uint8_t freq_hop_flag,
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uint8_t add_dmrs_flag,
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uint8_t add_dmrs_flag,
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int N_sc_ctrl_RB,
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int N_sc_ctrl_RB,
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int n_HARQ_ACK,
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int O_UCI);
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int O_ACK, int O_SR,
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int O_CSI, int O_CRC);
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void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
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void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
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int slot,
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int slot,
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uint16_t rnti,
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uint16_t rnti,
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PUCCH_sched_t *pucch,
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PUCCH_sched_t *pucch,
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fapi_nr_ul_config_pucch_pdu *pucch_pdu,
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fapi_nr_ul_config_pucch_pdu *pucch_pdu);
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int O_SR, int O_ACK, int O_CSI);
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/* Random Access */
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/* Random Access */
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File diff suppressed because it is too large
Load Diff
@@ -2197,87 +2197,80 @@ void build_ssb_to_ro_map(NR_UE_MAC_INST_t *mac) {
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LOG_D(NR_MAC,"Map SSB to RO done\n");
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LOG_D(NR_MAC,"Map SSB to RO done\n");
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}
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}
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void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, void *phy_data)
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void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, void *phy_data) {
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{
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NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP);
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NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP);
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int O_SR = 0;
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PUCCH_sched_t pucch[3] = {0}; // TODO the size might change in the future in case of multiple SR or multiple CSI in a slot
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int O_ACK = 0;
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int O_CSI = 0;
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int N_UCI = 0;
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PUCCH_sched_t pucch = {
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mac->nr_ue_emul_l1.num_srs = 0;
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.resource_indicator = -1,
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mac->nr_ue_emul_l1.num_harqs = 0;
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.initial_pucch_id = -1
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mac->nr_ue_emul_l1.num_csi_reports = 0;
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};
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int num_res = 0;
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uint16_t rnti = mac->crnti; //FIXME not sure this is valid for all pucch instances
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// SR
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// SR
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if (mac->state == UE_CONNECTED && trigger_periodic_scheduling_request(mac, &pucch, frameP, slotP)) {
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if (mac->state == UE_CONNECTED && trigger_periodic_scheduling_request(mac, &pucch[0], frameP, slotP)) {
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O_SR = 1;
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num_res++;
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/* sr_payload = 1 means that this is a positive SR, sr_payload = 0 means that it is a negative SR */
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/* sr_payload = 1 means that this is a positive SR, sr_payload = 0 means that it is a negative SR */
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pucch.sr_payload = nr_ue_get_SR(module_idP,
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pucch[0].sr_payload = nr_ue_get_SR(module_idP, frameP, slotP);
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frameP,
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slotP);
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}
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}
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// CSI
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// CSI
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int csi_res = 0;
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if (mac->state == UE_CONNECTED)
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if (mac->state == UE_CONNECTED)
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O_CSI = nr_get_csi_measurements(mac, frameP, slotP, &pucch);
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csi_res = nr_get_csi_measurements(mac, frameP, slotP, &pucch[num_res]);
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if (csi_res > 0) {
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num_res += csi_res;
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}
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// ACKNACK
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// ACKNACK
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O_ACK = get_downlink_ack(mac, frameP, slotP, &pucch);
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bool any_harq = get_downlink_ack(mac, frameP, slotP, &pucch[num_res]);
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if (any_harq)
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NR_PUCCH_Config_t *pucch_Config = mac->current_UL_BWP.pucch_Config;
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num_res++;
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// if multiplexing of HARQ and CSI is not possible, transmit only HARQ bits
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if ((O_ACK != 0) && (O_CSI != 0) &&
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pucch_Config &&
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pucch_Config->format2 &&
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(pucch_Config->format2->choice.setup->simultaneousHARQ_ACK_CSI == NULL)) {
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O_CSI = 0;
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pucch.csi_part1_payload = 0;
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pucch.csi_part2_payload = 0;
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}
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N_UCI = O_SR + O_ACK + O_CSI;
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mac->nr_ue_emul_l1.num_srs = O_SR;
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mac->nr_ue_emul_l1.num_harqs = O_ACK;
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mac->nr_ue_emul_l1.num_csi_reports = O_CSI;
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if (num_res == 0)
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return;
|
||||||
// do no transmit pucch if only SR scheduled and it is negative
|
// do no transmit pucch if only SR scheduled and it is negative
|
||||||
if ((O_ACK + O_CSI) == 0 && pucch.sr_payload == 0)
|
if (num_res == 1 && pucch[0].n_sr > 0 && pucch[0].sr_payload == 0)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
if (N_UCI > 0) {
|
if (num_res > 1)
|
||||||
LOG_D(NR_MAC,"%d.%d configure pucch, O_SR %d, O_ACK %d, O_CSI %d\n",frameP,slotP,O_SR,O_ACK,O_CSI);
|
multiplex_pucch_resource(mac, pucch, num_res);
|
||||||
pucch.resource_set_id = find_pucch_resource_set(mac, O_ACK + O_CSI);
|
fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slotP);
|
||||||
select_pucch_resource(mac, &pucch);
|
pthread_mutex_lock(&ul_config->mutex_ul_config);
|
||||||
fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slotP);
|
for (int j = 0; j < num_res; j++) {
|
||||||
pthread_mutex_lock(&ul_config->mutex_ul_config);
|
if (pucch[j].n_harq + pucch[j].n_sr + pucch[j].n_csi != 0) {
|
||||||
AssertFatal(ul_config->number_pdus<FAPI_NR_UL_CONFIG_LIST_NUM, "ul_config->number_pdus %d out of bounds\n",ul_config->number_pdus);
|
LOG_D(NR_MAC,
|
||||||
fapi_nr_ul_config_pucch_pdu *pucch_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu;
|
"%d.%d configure pucch, O_ACK %d, O_SR %d, O_CSI %d\n",
|
||||||
|
frameP,
|
||||||
fill_ul_config(ul_config, frameP, slotP, FAPI_NR_UL_CONFIG_TYPE_PUCCH);
|
slotP,
|
||||||
mac->nr_ue_emul_l1.active_uci_sfn_slot = NFAPI_SFNSLOT2HEX(frameP, slotP);
|
pucch[j].n_harq,
|
||||||
pthread_mutex_unlock(&ul_config->mutex_ul_config);
|
pucch[j].n_sr,
|
||||||
|
pucch[j].n_csi);
|
||||||
nr_ue_configure_pucch(mac,
|
mac->nr_ue_emul_l1.num_srs = pucch[j].n_sr;
|
||||||
slotP,
|
mac->nr_ue_emul_l1.num_harqs = pucch[j].n_harq;
|
||||||
rnti,
|
mac->nr_ue_emul_l1.num_csi_reports = pucch[j].n_csi;
|
||||||
&pucch,
|
AssertFatal(ul_config->number_pdus < FAPI_NR_UL_CONFIG_LIST_NUM,
|
||||||
pucch_pdu,
|
"ul_config->number_pdus %d out of bounds\n",
|
||||||
O_SR, O_ACK, O_CSI);
|
ul_config->number_pdus);
|
||||||
nr_scheduled_response_t scheduled_response;
|
fapi_nr_ul_config_pucch_pdu *pucch_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu;
|
||||||
fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP, phy_data);
|
fill_ul_config(ul_config, frameP, slotP, FAPI_NR_UL_CONFIG_TYPE_PUCCH);
|
||||||
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
|
mac->nr_ue_emul_l1.active_uci_sfn_slot = NFAPI_SFNSLOT2HEX(frameP, slotP);
|
||||||
mac->if_module->scheduled_response(&scheduled_response);
|
pthread_mutex_unlock(&ul_config->mutex_ul_config);
|
||||||
if(mac->state == UE_WAIT_TX_ACK_MSG4)
|
nr_ue_configure_pucch(mac,
|
||||||
mac->state = UE_CONNECTED;
|
slotP,
|
||||||
|
mac->crnti, // FIXME not sure this is valid for all pucch instances
|
||||||
|
&pucch[j],
|
||||||
|
pucch_pdu);
|
||||||
|
nr_scheduled_response_t scheduled_response;
|
||||||
|
fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP, phy_data);
|
||||||
|
if (mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
|
||||||
|
mac->if_module->scheduled_response(&scheduled_response);
|
||||||
|
if (mac->state == UE_WAIT_TX_ACK_MSG4)
|
||||||
|
mac->state = UE_CONNECTED;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void nr_schedule_csi_for_im(NR_UE_MAC_INST_t *mac, int frame, int slot) {
|
void nr_schedule_csi_for_im(NR_UE_MAC_INST_t *mac, int frame, int slot) {
|
||||||
|
|
||||||
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
|
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
|
||||||
|
|||||||
@@ -968,9 +968,13 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
|
|||||||
pucch_pdu->start_symbol_index = pucchres->format.choice.format2->startingSymbolIndex;
|
pucch_pdu->start_symbol_index = pucchres->format.choice.format2->startingSymbolIndex;
|
||||||
pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : *scc->physCellId;
|
pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : *scc->physCellId;
|
||||||
pucch_pdu->dmrs_scrambling_id = id0!= NULL ? *id0 : *scc->physCellId;
|
pucch_pdu->dmrs_scrambling_id = id0!= NULL ? *id0 : *scc->physCellId;
|
||||||
pucch_pdu->prb_size = compute_pucch_prb_size(2,pucchres->format.choice.format2->nrofPRBs,
|
pucch_pdu->prb_size = compute_pucch_prb_size(2,
|
||||||
O_uci+O_sr,O_csi,pucch_Config->format2->choice.setup->maxCodeRate,
|
pucchres->format.choice.format2->nrofPRBs,
|
||||||
2,pucchres->format.choice.format2->nrofSymbols,8);
|
O_uci + O_sr,
|
||||||
|
pucch_Config->format2->choice.setup->maxCodeRate,
|
||||||
|
2,
|
||||||
|
pucchres->format.choice.format2->nrofSymbols,
|
||||||
|
8);
|
||||||
pucch_pdu->bit_len_csi_part1 = O_csi;
|
pucch_pdu->bit_len_csi_part1 = O_csi;
|
||||||
break;
|
break;
|
||||||
case NR_PUCCH_Resource__format_PR_format3 :
|
case NR_PUCCH_Resource__format_PR_format3 :
|
||||||
@@ -996,9 +1000,13 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
|
|||||||
else
|
else
|
||||||
f3_dmrs_symbols = 2<<pucch_pdu->add_dmrs_flag;
|
f3_dmrs_symbols = 2<<pucch_pdu->add_dmrs_flag;
|
||||||
}
|
}
|
||||||
pucch_pdu->prb_size = compute_pucch_prb_size(3,pucchres->format.choice.format3->nrofPRBs,
|
pucch_pdu->prb_size = compute_pucch_prb_size(3,
|
||||||
O_uci+O_sr,O_csi,pucch_Config->format3->choice.setup->maxCodeRate,
|
pucchres->format.choice.format3->nrofPRBs,
|
||||||
2-pucch_pdu->pi_2bpsk,pucchres->format.choice.format3->nrofSymbols-f3_dmrs_symbols,12);
|
O_uci + O_sr,
|
||||||
|
pucch_Config->format3->choice.setup->maxCodeRate,
|
||||||
|
2 - pucch_pdu->pi_2bpsk,
|
||||||
|
pucchres->format.choice.format3->nrofSymbols - f3_dmrs_symbols,
|
||||||
|
12);
|
||||||
pucch_pdu->bit_len_csi_part1 = O_csi;
|
pucch_pdu->bit_len_csi_part1 = O_csi;
|
||||||
break;
|
break;
|
||||||
case NR_PUCCH_Resource__format_PR_format4 :
|
case NR_PUCCH_Resource__format_PR_format4 :
|
||||||
|
|||||||
Reference in New Issue
Block a user