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Merge remote-tracking branch 'origin/develop' into NR_cleanup_MACPHY

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This commit is contained in:
francescomani
2021-10-20 15:50:18 +02:00
parent c77fd8aae7 a722993724
commit a8d2265a9d
171 changed files with 6976 additions and 3063 deletions
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openair2/LAYER2/NR_MAC_COMMON/nr_compute_tbs_common.c
+3 -2
View File
@@ -51,7 +51,7 @@ uint32_t nr_compute_tbs(uint16_t Qm,
uint32_t Ninfo, Np_info, C;
uint8_t n, scale;
LOG_D(MAC,"nb_symb_sch %d, nb_dmrs_prb %d, nb_rb_oh %d\n",nb_symb_sch,nb_dmrs_prb,nb_rb_oh);
LOG_D(NR_MAC,"nb_symb_sch %d, nb_dmrs_prb %d, nb_rb_oh %d\n",nb_symb_sch,nb_dmrs_prb,nb_rb_oh);
nbp_re = NR_NB_SC_PER_RB * nb_symb_sch - nb_dmrs_prb - nb_rb_oh;
nb_re = min(156, nbp_re) * nb_rb;
@@ -59,6 +59,7 @@ uint32_t nr_compute_tbs(uint16_t Qm,
// Intermediate number of information bits
Ninfo = ((nb_re * R * Qm * Nl)>>scale)>>tb_scaling;
if (Ninfo <=3824) {
n = max(3, floor(log2(Ninfo)) - 6);
Np_info = max(24, (Ninfo>>n)<<n);
@@ -85,7 +86,7 @@ uint32_t nr_compute_tbs(uint16_t Qm,
}
}
LOG_D(MAC, "In %s: Ninfo %d nbp_re %d nb_re %d Qm %d, R %d, tbs %d\n", __FUNCTION__, Ninfo, nbp_re, nb_re, Qm, R, nr_tbs);
LOG_D(NR_MAC, "In %s: Ninfo %d nbp_re %d nb_re %d Qm %d, R %d, tbs %d\n", __FUNCTION__, Ninfo, nbp_re, nb_re, Qm, R, nr_tbs);
return nr_tbs;
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+196 -134
View File
@@ -1285,31 +1285,42 @@ int64_t *get_prach_config_info(frequency_range_t freq_range,
void find_aggregation_candidates(uint8_t *aggregation_level,
uint8_t *nr_of_candidates,
NR_SearchSpace_t *ss) {
if (ss->nrofCandidates->aggregationLevel1 != NR_SearchSpace__nrofCandidates__aggregationLevel1_n0) {
*aggregation_level = 1;
*nr_of_candidates = ss->nrofCandidates->aggregationLevel1;
}
if (ss->nrofCandidates->aggregationLevel2 != NR_SearchSpace__nrofCandidates__aggregationLevel2_n0) {
*aggregation_level = 2;
*nr_of_candidates = ss->nrofCandidates->aggregationLevel2;
}
if (ss->nrofCandidates->aggregationLevel4 != NR_SearchSpace__nrofCandidates__aggregationLevel4_n0) {
*aggregation_level = 4;
*nr_of_candidates = ss->nrofCandidates->aggregationLevel4;
}
if (ss->nrofCandidates->aggregationLevel8 != NR_SearchSpace__nrofCandidates__aggregationLevel8_n0) {
*aggregation_level = 8;
*nr_of_candidates = ss->nrofCandidates->aggregationLevel8;
}
if (ss->nrofCandidates->aggregationLevel16 != NR_SearchSpace__nrofCandidates__aggregationLevel16_n0) {
*aggregation_level = 16;
*nr_of_candidates = ss->nrofCandidates->aggregationLevel16;
}
// n8 does not correspont to a value of 8 but 7, the following corrects this
if(*nr_of_candidates == 7)
*nr_of_candidates = 8;
NR_SearchSpace_t *ss,
int L) {
AssertFatal(L>=1 && L<=16,"L %d not ok\n",L);
*nr_of_candidates = 0;
switch(L) {
case 1:
if (ss->nrofCandidates->aggregationLevel1 != NR_SearchSpace__nrofCandidates__aggregationLevel1_n0) {
*aggregation_level = 1;
*nr_of_candidates = ss->nrofCandidates->aggregationLevel1;
}
break;
case 2:
if (ss->nrofCandidates->aggregationLevel2 != NR_SearchSpace__nrofCandidates__aggregationLevel2_n0) {
*aggregation_level = 2;
*nr_of_candidates = ss->nrofCandidates->aggregationLevel2;
}
break;
case 4:
if (ss->nrofCandidates->aggregationLevel4 != NR_SearchSpace__nrofCandidates__aggregationLevel4_n0) {
*aggregation_level = 4;
*nr_of_candidates = ss->nrofCandidates->aggregationLevel4;
}
break;
case 8:
if (ss->nrofCandidates->aggregationLevel8 != NR_SearchSpace__nrofCandidates__aggregationLevel8_n0) {
*aggregation_level = 8;
*nr_of_candidates = ss->nrofCandidates->aggregationLevel8;
}
break;
case 16:
if (ss->nrofCandidates->aggregationLevel16 != NR_SearchSpace__nrofCandidates__aggregationLevel16_n0) {
*aggregation_level = 16;
*nr_of_candidates = ss->nrofCandidates->aggregationLevel16;
}
break;
}
}
@@ -1518,7 +1529,7 @@ int get_nr_prach_occasion_info_from_index(uint8_t index,
if (table_6_3_3_2_3_prachConfig_Index[index][1] != -1)
format2 = (uint8_t) table_6_3_3_2_3_prachConfig_Index[index][1];
*format = ((uint8_t) table_6_3_3_2_3_prachConfig_Index[index][0]) | (format2<<8);
LOG_I(MAC,"Getting Total PRACH info from index %d (col %lu ) absoluteFrequencyPointA %u mu %u frame_type %u start_symbol %u N_t_slot %u N_dur %u N_RA_sfn = %u\n",
LOG_D(NR_MAC,"Getting Total PRACH info from index %d (col %lu ) absoluteFrequencyPointA %u mu %u frame_type %u start_symbol %u N_t_slot %u N_dur %u N_RA_sfn = %u\n",
index, table_6_3_3_2_3_prachConfig_Index[index][6],
pointa,
mu,
@@ -1935,7 +1946,7 @@ uint32_t to_nrarfcn(int nr_bandP,
uint32_t nrarfcn;
int i = get_nr_table_idx(nr_bandP, scs_index);
LOG_I(MAC,"Searching for nr band %d DL Carrier frequency %llu bw %u\n",nr_bandP,(long long unsigned int)dl_CarrierFreq,bw);
LOG_I(NR_MAC,"Searching for nr band %d DL Carrier frequency %llu bw %u\n",nr_bandP,(long long unsigned int)dl_CarrierFreq,bw);
AssertFatal(dl_CarrierFreq_by_1k >= nr_bandtable[i].dl_min,
"Band %d, bw %u : DL carrier frequency %llu kHz < %llu\n",
@@ -2012,14 +2023,14 @@ uint64_t from_nrarfcn(int nr_bandP,
}
}
LOG_D(MAC, "Frequency from NR-ARFCN for N_OFFs %lu, duplex spacing %d KHz, deltaFglobal %d KHz\n", N_OFFs, delta_duplex, deltaFglobal);
LOG_D(NR_MAC, "Frequency from NR-ARFCN for N_OFFs %lu, duplex spacing %d KHz, deltaFglobal %d KHz\n", N_OFFs, delta_duplex, deltaFglobal);
AssertFatal(nrarfcn >= N_OFFs,"nrarfcn %u < N_OFFs[%d] %llu\n", nrarfcn, nr_bandtable[i].band, (long long unsigned int)N_OFFs);
get_delta_arfcn(i, nrarfcn, N_OFFs);
frequency = 1000*(F_REF_Offs_khz + (nrarfcn - N_REF_Offs) * deltaFglobal);
LOG_I(MAC, "Computing frequency (pointA %llu => %llu KHz (freq_min %llu KHz, NR band %d N_OFFs %llu))\n",
LOG_I(NR_MAC, "Computing frequency (pointA %llu => %llu KHz (freq_min %llu KHz, NR band %d N_OFFs %llu))\n",
(unsigned long long)nrarfcn,
(unsigned long long)frequency/1000,
(unsigned long long)freq_min,
@@ -2358,7 +2369,7 @@ int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmr
uint8_t row, colomn;
int32_t l_prime;
LOG_D(MAC, "PUSCH: NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d\n", duration_in_symbols, start_symbol, mapping_type, dmrs_typeA_position);
LOG_D(NR_MAC, "PUSCH: NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d\n", duration_in_symbols, start_symbol, mapping_type, dmrs_typeA_position);
// Section 6.4.1.1.3 in Spec 38.211
// For PDSCH Mapping TypeA, ld is duration between first OFDM of the slot and last OFDM symbol of the scheduled PUSCH resources
@@ -2385,7 +2396,7 @@ int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmr
l0 = 1<<l0 | 1<<(l0+1);
}
LOG_D(MAC, "PUSCH - l0:%d, ld:%d,row:%d, column:%d, addpos:%d, maxlen:%d\n", l0, ld, row, colomn, additional_pos, pusch_maxLength);
LOG_D(NR_MAC, "PUSCH - l0:%d, ld:%d,row:%d, column:%d, addpos:%d, maxlen:%d\n", l0, ld, row, colomn, additional_pos, pusch_maxLength);
AssertFatal(l_prime>=0,"invalid l_prime < 0\n");
l_prime = (mapping_type == typeA) ? (l_prime | l0) : (l_prime << start_symbol);
@@ -2428,7 +2439,7 @@ uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint
else if (I_mcs >= mcs3 && I_mcs < mcs4)
return 0;
else {
LOG_I(PHY, "PT-RS time-density determination is obtained from the DCI for the same transport block in the initial transmission\n");
LOG_D(NR_MAC, "PT-RS time-density determination is obtained from the DCI for the same transport block in the initial transmission\n");
return -1;
}
}
@@ -2461,22 +2472,22 @@ uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB) {
// - "UE procedure for applying transform precoding on PUSCH"
uint8_t get_transformPrecoding(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
const NR_PUSCH_Config_t *pusch_config,
const NR_BWP_Uplink_t *ubwp,
const NR_BWP_UplinkDedicated_t *ubwp,
uint8_t *dci_format,
int rnti_type,
uint8_t configuredGrant){
if (configuredGrant) {
if (ubwp->bwp_Dedicated->configuredGrantConfig) {
if (ubwp->bwp_Dedicated->configuredGrantConfig->choice.setup->transformPrecoder) {
return *ubwp->bwp_Dedicated->configuredGrantConfig->choice.setup->transformPrecoder;
if (ubwp->configuredGrantConfig) {
if (ubwp->configuredGrantConfig->choice.setup->transformPrecoder) {
return *ubwp->configuredGrantConfig->choice.setup->transformPrecoder;
}
}
}
if (rnti_type != NR_RNTI_RA && rnti_type != NR_RNTI_TC) {
if (*dci_format != NR_UL_DCI_FORMAT_0_0) {
if (pusch_config->transformPrecoder != NULL) {
if (pusch_config && pusch_config->transformPrecoder != NULL) {
return *pusch_config->transformPrecoder;
}
}
@@ -2493,7 +2504,8 @@ uint8_t get_transformPrecoding(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
return -1;
}
uint16_t nr_dci_size(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
const NR_BWP_UplinkCommon_t *initialUplinkBWP,
const NR_CellGroupConfig_t *cg,
dci_pdu_rel15_t *dci_pdu,
nr_dci_format_t format,
@@ -2507,27 +2519,47 @@ uint16_t nr_dci_size(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
int num_entries = 0;
int pusch_antenna_ports = 1; // TODO hardcoded number of antenna ports for pusch
NR_BWP_Downlink_t *bwp = NULL;
NR_BWP_Uplink_t *ubwp = NULL;
NR_PDSCH_Config_t *pdsch_config = NULL;
NR_PUSCH_Config_t *pusch_Config = NULL;
NR_SRS_Config_t *srs_config = NULL;
const NR_BWP_DownlinkDedicated_t *bwpd = NULL;
const NR_BWP_UplinkDedicated_t *ubwpd = NULL;
const NR_BWP_DownlinkCommon_t *bwpc = NULL;
const NR_BWP_UplinkCommon_t *ubwpc = NULL;
const NR_PDSCH_Config_t *pdsch_Config = NULL;
const NR_PUSCH_Config_t *pusch_Config = NULL;
const NR_PUCCH_Config_t *pucch_Config = NULL;
const NR_PDCCH_Config_t *pdcch_Config = NULL;
const NR_SRS_Config_t *srs_config = NULL;
if(bwp_id > 0) {
AssertFatal(cg!=NULL,"Cellgroup is null and bwp_id!=0");
bwp=cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
ubwp=cg->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1];
pdsch_config = bwp->bwp_Dedicated->pdsch_Config->choice.setup;
pusch_Config = ubwp->bwp_Dedicated->pusch_Config->choice.setup;
srs_config = ubwp->bwp_Dedicated->srs_Config->choice.setup;
bwpd=cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1]->bwp_Dedicated;
bwpc=cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1]->bwp_Common;
ubwpd=cg->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1]->bwp_Dedicated;
ubwpc=cg->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1]->bwp_Common;
pdsch_Config = (bwpd->pdsch_Config) ? bwpd->pdsch_Config->choice.setup : NULL;
pdcch_Config = (bwpd->pdcch_Config) ? bwpd->pdcch_Config->choice.setup : NULL;
pucch_Config = (ubwpd->pucch_Config) ? ubwpd->pucch_Config->choice.setup : NULL;
pusch_Config = (ubwpd->pusch_Config) ? ubwpd->pusch_Config->choice.setup : NULL;
srs_config = (ubwpd->srs_Config) ? ubwpd->srs_Config->choice.setup : NULL;
}
else if (cg){
bwpd=cg->spCellConfig->spCellConfigDedicated->initialDownlinkBWP;
bwpc=initialDownlinkBWP;
ubwpd=cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
ubwpc=initialUplinkBWP;
pdsch_Config = (bwpd->pdsch_Config) ? bwpd->pdsch_Config->choice.setup : NULL;
pdcch_Config = (bwpd->pdcch_Config) ? bwpd->pdcch_Config->choice.setup : NULL;
pucch_Config = (ubwpd->pucch_Config) ? ubwpd->pucch_Config->choice.setup : NULL;
pusch_Config = (ubwpd->pusch_Config) ? ubwpd->pusch_Config->choice.setup : NULL;
srs_config = (ubwpd->srs_Config) ? ubwpd->srs_Config->choice.setup: NULL;
}
int n_ul_bwp=1,n_dl_bwp=1;
switch(format) {
/*Only sizes for 0_0 and 1_0 are correct at the moment*/
case NR_UL_DCI_FORMAT_0_0:
/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
size += 20;
size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated
size += nr_dci_size(initialUplinkBWP,cg,dci_pdu,NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB, bwp_id) - size; // Padding to match 1_0 size
size += nr_dci_size(initialDownlinkBWP,initialUplinkBWP,cg,dci_pdu,NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB, bwp_id) - size; // Padding to match 1_0 size
// UL/SUL indicator assumed to be 0
break;
@@ -2545,56 +2577,71 @@ uint16_t nr_dci_size(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
size += dci_pdu->ul_sul_indicator.nbits;
}
// BWP Indicator
uint8_t n_ul_bwp = cg->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count;
n_ul_bwp = 0;
if (cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
cg->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList)
n_ul_bwp = cg->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count;
if (n_ul_bwp < 2)
dci_pdu->bwp_indicator.nbits = n_ul_bwp;
else
dci_pdu->bwp_indicator.nbits = 2;
size += dci_pdu->bwp_indicator.nbits;
// Freq domain assignment
if (cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pusch_Config->choice.setup->rbg_Size != NULL)
rbg_size_config = 1;
else
rbg_size_config = 0;
numRBG = getNRBG(NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
rbg_size_config);
if (pusch_Config->resourceAllocation == 0)
dci_pdu->frequency_domain_assignment.nbits = numRBG;
else if (pusch_Config->resourceAllocation == 1)
dci_pdu->frequency_domain_assignment.nbits = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
else
dci_pdu->frequency_domain_assignment.nbits = ((int)ceil( log2( (N_RB*(N_RB+1))>>1 ) )>numRBG) ? (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) )+1 : numRBG+1;
if (pusch_Config) {
if (pusch_Config->rbg_Size != NULL)
rbg_size_config = 1;
else
rbg_size_config = 0;
numRBG = getNRBG(NRRIV2BW(ubwpc->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
NRRIV2PRBOFFSET(ubwpc->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
rbg_size_config);
if (pusch_Config->resourceAllocation == 0)
dci_pdu->frequency_domain_assignment.nbits = numRBG;
else if (pusch_Config->resourceAllocation == 1)
dci_pdu->frequency_domain_assignment.nbits = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
else
dci_pdu->frequency_domain_assignment.nbits = ((int)ceil( log2( (N_RB*(N_RB+1))>>1 ) )>numRBG) ? (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) )+1 : numRBG+1;
}
else dci_pdu->frequency_domain_assignment.nbits = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
LOG_D(NR_MAC,"PUSCH Frequency Domain Assignment nbits %d, N_RB %d\n",dci_pdu->frequency_domain_assignment.nbits,N_RB);
size += dci_pdu->frequency_domain_assignment.nbits;
// Time domain assignment
if (pusch_Config->pusch_TimeDomainAllocationList==NULL) {
if (ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList==NULL)
if (pusch_Config==NULL || pusch_Config->pusch_TimeDomainAllocationList==NULL) {
if (ubwpc->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList==NULL)
num_entries = 16; // num of entries in default table
else
num_entries = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count;
num_entries = ubwpc->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count;
}
else
num_entries = pusch_Config->pusch_TimeDomainAllocationList->choice.setup->list.count;
dci_pdu->time_domain_assignment.nbits = (int)ceil(log2(num_entries));
LOG_D(NR_MAC,"PUSCH Time Domain Allocation nbits %d, pusch_Config %p\n",dci_pdu->time_domain_assignment.nbits,pusch_Config);
size += dci_pdu->time_domain_assignment.nbits;
// Frequency Hopping flag
if ((pusch_Config->frequencyHopping!=NULL) && (pusch_Config->resourceAllocation != NR_PUSCH_Config__resourceAllocation_resourceAllocationType0)) {
if (pusch_Config &&
pusch_Config->frequencyHopping!=NULL &&
pusch_Config->resourceAllocation != NR_PUSCH_Config__resourceAllocation_resourceAllocationType0) {
dci_pdu->frequency_hopping_flag.nbits = 1;
size += 1;
}
// 1st DAI
if (cg->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook==NR_PhysicalCellGroupConfig__pdsch_HARQ_ACK_Codebook_dynamic)
if (cg->physicalCellGroupConfig &&
cg->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook==NR_PhysicalCellGroupConfig__pdsch_HARQ_ACK_Codebook_dynamic)
dci_pdu->dai[0].nbits = 2;
else
dci_pdu->dai[0].nbits = 1;
size += dci_pdu->dai[0].nbits;
LOG_D(NR_MAC,"DAI1 nbits %d\n",dci_pdu->dai[0].nbits);
// 2nd DAI
if (cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) { //TODO not sure about that
if (cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig &&
cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) { //TODO not sure about that
dci_pdu->dai[1].nbits = 2;
size += dci_pdu->dai[1].nbits;
}
// SRS resource indicator
if (pusch_Config->txConfig != NULL){
if (srs_config &&
pusch_Config &&
pusch_Config->txConfig != NULL){
int count=0;
if (*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_codebook){
for (int i=0; i<srs_config->srs_ResourceSetToAddModList->list.count; i++) {
@@ -2609,7 +2656,8 @@ uint16_t nr_dci_size(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
else {
int lmin,Lmax = 0;
int lsum = 0;
if ( cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig != NULL) {
if ( cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig != NULL) {
if ( cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers != NULL)
Lmax = *cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers;
else
@@ -2629,11 +2677,13 @@ uint16_t nr_dci_size(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
dci_pdu->srs_resource_indicator.nbits = (int)ceil(log2(lsum));
size += dci_pdu->srs_resource_indicator.nbits;
}
}
} else dci_pdu->srs_resource_indicator.nbits = 0;
LOG_D(NR_MAC,"dci_pdu->srs_resource_indicator.nbits %d\n",dci_pdu->srs_resource_indicator.nbits);
// Precoding info and number of layers
long transformPrecoder = get_transformPrecoding(initialUplinkBWP, pusch_Config, ubwp, (uint8_t*)&format, rnti_type, 0);
if (pusch_Config->txConfig != NULL){
long transformPrecoder = get_transformPrecoding(initialUplinkBWP, pusch_Config, ubwpd, (uint8_t*)&format, rnti_type, 0);
dci_pdu->precoding_information.nbits=0;
if (pusch_Config &&
pusch_Config->txConfig != NULL){
if (*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_codebook){
if (pusch_antenna_ports > 1) {
if (pusch_antenna_ports == 4) {
@@ -2657,15 +2707,18 @@ uint16_t nr_dci_size(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
}
}
size += dci_pdu->precoding_information.nbits;
LOG_D(NR_MAC,"dci_pdu->precoding_informaiton.nbits=%d\n",dci_pdu->precoding_information.nbits);
// Antenna ports
NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig = NULL;
int xa=0;
int xb=0;
if(pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL){
if(pusch_Config &&
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL){
NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup;
xa = ul_ant_bits(NR_DMRS_UplinkConfig,transformPrecoder);
}
if(pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL){
if(pusch_Config &&
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL){
NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup;
xb = ul_ant_bits(NR_DMRS_UplinkConfig,transformPrecoder);
}
@@ -2674,6 +2727,7 @@ uint16_t nr_dci_size(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
else
dci_pdu->antenna_ports.nbits = xb;
size += dci_pdu->antenna_ports.nbits;
LOG_D(NR_MAC,"dci_pdu->antenna_ports.nbits = %d\n",dci_pdu->antenna_ports.nbits);
// SRS request
if (cg->spCellConfig->spCellConfigDedicated->supplementaryUplink==NULL)
dci_pdu->srs_request.nbits = 2;
@@ -2688,20 +2742,26 @@ uint16_t nr_dci_size(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
}
}
// CBGTI
if (cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) {
if (cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig &&
cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) {
int num = cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->codeBlockGroupTransmission->choice.setup->maxCodeBlockGroupsPerTransportBlock;
dci_pdu->cbgti.nbits = 2 + (num<<1);
size += dci_pdu->cbgti.nbits;
}
// PTRS - DMRS association
if ( (NR_DMRS_UplinkConfig->phaseTrackingRS == NULL && transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) ||
transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled || (*pusch_Config->maxRank==1) )
if ( (NR_DMRS_UplinkConfig &&
NR_DMRS_UplinkConfig->phaseTrackingRS == NULL &&
transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) ||
transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled ||
(pusch_Config && pusch_Config->maxRank &&
*pusch_Config->maxRank==1) )
dci_pdu->ptrs_dmrs_association.nbits = 0;
else
dci_pdu->ptrs_dmrs_association.nbits = 2;
size += dci_pdu->ptrs_dmrs_association.nbits;
// beta offset indicator
if (pusch_Config->uci_OnPUSCH!=NULL){
if (pusch_Config &&
pusch_Config->uci_OnPUSCH!=NULL){
if (pusch_Config->uci_OnPUSCH->choice.setup->betaOffsets->present == NR_UCI_OnPUSCH__betaOffsets_PR_dynamic) {
dci_pdu->beta_offset_indicator.nbits = 2;
size += dci_pdu->beta_offset_indicator.nbits;
@@ -2725,6 +2785,7 @@ uint16_t nr_dci_size(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
break;
case NR_DL_DCI_FORMAT_1_1:
LOG_D(NR_MAC,"DCI_FORMAT 1_1 : pdsch_Config %p, pucch_Config %p\n",pdsch_Config,pucch_Config);
// General note: 0 bits condition is ignored as default nbits is 0.
// Format identifier
size = 1;
@@ -2733,89 +2794,105 @@ uint16_t nr_dci_size(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
dci_pdu->carrier_indicator.nbits=3;
size += dci_pdu->carrier_indicator.nbits;
}
// BWP Indicator
uint8_t n_dl_bwp = cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count;
n_dl_bwp = 0;
if (cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList)
n_dl_bwp = cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count;
if (n_dl_bwp < 2)
dci_pdu->bwp_indicator.nbits = n_dl_bwp;
else
dci_pdu->bwp_indicator.nbits = 2;
size += dci_pdu->bwp_indicator.nbits;
// Freq domain assignment
rbg_size_config = cg->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->rbg_Size;
numRBG = getNRBG(NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
if (pdsch_Config) rbg_size_config = pdsch_Config->rbg_Size;
else rbg_size_config = 0;
numRBG = getNRBG(NRRIV2BW(bwpc->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
NRRIV2PRBOFFSET(bwpc->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
rbg_size_config);
if (pdsch_config->resourceAllocation == 0)
dci_pdu->frequency_domain_assignment.nbits = numRBG;
else if (pdsch_config->resourceAllocation == 1)
dci_pdu->frequency_domain_assignment.nbits = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
if (pdsch_Config && pdsch_Config->resourceAllocation == 0)
dci_pdu->frequency_domain_assignment.nbits = numRBG;
else if (pdsch_Config == NULL || pdsch_Config->resourceAllocation == 1)
dci_pdu->frequency_domain_assignment.nbits = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
else
dci_pdu->frequency_domain_assignment.nbits = ((int)ceil( log2( (N_RB*(N_RB+1))>>1 ) )>numRBG) ? (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) )+1 : numRBG+1;
dci_pdu->frequency_domain_assignment.nbits = ((int)ceil( log2( (N_RB*(N_RB+1))>>1 ) )>numRBG) ? (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) )+1 : numRBG+1;
size += dci_pdu->frequency_domain_assignment.nbits;
LOG_D(NR_MAC,"dci_pdu->frequency_domain_assignment.nbits %d (N_RB %d)\n",dci_pdu->frequency_domain_assignment.nbits,N_RB);
// Time domain assignment (see table 5.1.2.1.1-1 in 38.214
if (pdsch_config->pdsch_TimeDomainAllocationList==NULL) {
if (bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList==NULL)
if (pdsch_Config == NULL || pdsch_Config->pdsch_TimeDomainAllocationList==NULL) {
if (bwpc->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList==NULL)
num_entries = 16; // num of entries in default table
else
num_entries = bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;
num_entries = bwpc->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;
}
else
num_entries = pdsch_config->pdsch_TimeDomainAllocationList->choice.setup->list.count;
num_entries = pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup->list.count;
dci_pdu->time_domain_assignment.nbits = (int)ceil(log2(num_entries));
LOG_D(NR_MAC,"pdsch tda.nbits= %d\n",dci_pdu->time_domain_assignment.nbits);
size += dci_pdu->time_domain_assignment.nbits;
// VRB to PRB mapping
if ((pdsch_config->resourceAllocation == 1) && (bwp->bwp_Dedicated->pdsch_Config->choice.setup->vrb_ToPRB_Interleaver != NULL)) {
if (pdsch_Config &&
pdsch_Config->resourceAllocation == 1 &&
pdsch_Config->vrb_ToPRB_Interleaver != NULL) {
dci_pdu->vrb_to_prb_mapping.nbits = 1;
size += dci_pdu->vrb_to_prb_mapping.nbits;
}
// PRB bundling size indicator
if (pdsch_config->prb_BundlingType.present == NR_PDSCH_Config__prb_BundlingType_PR_dynamicBundling) {
if (pdsch_Config &&
pdsch_Config->prb_BundlingType.present == NR_PDSCH_Config__prb_BundlingType_PR_dynamicBundling) {
dci_pdu->prb_bundling_size_indicator.nbits = 1;
size += dci_pdu->prb_bundling_size_indicator.nbits;
}
// Rate matching indicator
NR_RateMatchPatternGroup_t *group1 = pdsch_config->rateMatchPatternGroup1;
NR_RateMatchPatternGroup_t *group2 = pdsch_config->rateMatchPatternGroup2;
NR_RateMatchPatternGroup_t *group1 = pdsch_Config ? pdsch_Config->rateMatchPatternGroup1 : NULL;
NR_RateMatchPatternGroup_t *group2 = pdsch_Config ? pdsch_Config->rateMatchPatternGroup2 : NULL;
if ((group1 != NULL) && (group2 != NULL))
dci_pdu->rate_matching_indicator.nbits = 2;
if ((group1 != NULL) != (group2 != NULL))
dci_pdu->rate_matching_indicator.nbits = 1;
size += dci_pdu->rate_matching_indicator.nbits;
// ZP CSI-RS trigger
if (pdsch_config->aperiodic_ZP_CSI_RS_ResourceSetsToAddModList != NULL) {
uint8_t nZP = pdsch_config->aperiodic_ZP_CSI_RS_ResourceSetsToAddModList->list.count;
if (pdsch_Config &&
pdsch_Config->aperiodic_ZP_CSI_RS_ResourceSetsToAddModList != NULL) {
uint8_t nZP = pdsch_Config->aperiodic_ZP_CSI_RS_ResourceSetsToAddModList->list.count;
dci_pdu->zp_csi_rs_trigger.nbits = (int)ceil(log2(nZP+1));
}
size += dci_pdu->zp_csi_rs_trigger.nbits;
// TB1- MCS 5, NDI 1, RV 2
size += 8;
// TB2
long *maxCWperDCI = pdsch_config->maxNrofCodeWordsScheduledByDCI;
long *maxCWperDCI = pdsch_Config ? pdsch_Config->maxNrofCodeWordsScheduledByDCI : NULL;
if ((maxCWperDCI != NULL) && (*maxCWperDCI == 2)) {
size += 8;
}
// HARQ PID
size += 4;
// DAI
if (cg->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook == NR_PhysicalCellGroupConfig__pdsch_HARQ_ACK_Codebook_dynamic) { // FIXME in case of more than one serving cell
if (cg->physicalCellGroupConfig &&
cg->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook == NR_PhysicalCellGroupConfig__pdsch_HARQ_ACK_Codebook_dynamic) { // FIXME in case of more than one serving cell
dci_pdu->dai[0].nbits = 2;
size += dci_pdu->dai[0].nbits;
}
LOG_D(NR_MAC,"dci_pdu->dai[0].nbits %d\n",dci_pdu->dai[0].nbits);
// TPC PUCCH
size += 2;
// PUCCH resource indicator
size += 3;
// PDSCH to HARQ timing indicator
uint8_t I = ubwp->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK->list.count;
uint8_t I = pucch_Config->dl_DataToUL_ACK ? pucch_Config->dl_DataToUL_ACK->list.count : 8;
dci_pdu->pdsch_to_harq_feedback_timing_indicator.nbits = (int)ceil(log2(I));
size += dci_pdu->pdsch_to_harq_feedback_timing_indicator.nbits;
LOG_D(NR_MAC,"dci_pdu->pdsch_to_harq_feedback_timing_indicator.nbits %d\n",dci_pdu->pdsch_to_harq_feedback_timing_indicator.nbits);
// Antenna ports
NR_SetupRelease_DMRS_DownlinkConfig_t *typeA = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA;
NR_SetupRelease_DMRS_DownlinkConfig_t *typeB = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB;
NR_SetupRelease_DMRS_DownlinkConfig_t *typeA = pdsch_Config ? pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA : NULL;
NR_SetupRelease_DMRS_DownlinkConfig_t *typeB = pdsch_Config ? pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB : NULL;
AssertFatal(typeA!=NULL || typeB!=NULL, "either dmrs_typeA or typeB must be configured\n");
dci_pdu->antenna_ports.nbits = getAntPortBitWidth(typeA,typeB);
size += dci_pdu->antenna_ports.nbits;
LOG_D(NR_MAC,"dci_pdu->antenna_ports.nbits %d\n",dci_pdu->antenna_ports.nbits);
// Tx Config Indication
long *isTciEnable = bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[bwp_id-1]->tci_PresentInDCI;
long *isTciEnable = pdcch_Config->controlResourceSetToAddModList->list.array[0]->tci_PresentInDCI;
if (isTciEnable != NULL) {
dci_pdu->transmission_configuration_indication.nbits = 3;
size += dci_pdu->transmission_configuration_indication.nbits;
@@ -2827,9 +2904,10 @@ uint16_t nr_dci_size(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
dci_pdu->srs_request.nbits = 3;
size += dci_pdu->srs_request.nbits;
// CBGTI
if (cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) {
if (cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig&&
cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) {
uint8_t maxCBGperTB = (cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission->choice.setup->maxCodeBlockGroupsPerTransportBlock + 1) * 2;
long *maxCWperDCI_rrc = pdsch_config->maxNrofCodeWordsScheduledByDCI;
long *maxCWperDCI_rrc = pdsch_Config->maxNrofCodeWordsScheduledByDCI;
uint8_t maxCW = (maxCWperDCI_rrc == NULL) ? 1 : *maxCWperDCI_rrc;
dci_pdu->cbgti.nbits = maxCBGperTB * maxCW;
size += dci_pdu->cbgti.nbits;
@@ -3337,9 +3415,10 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
type0_PDCCH_CSS_config->num_rbs = -1;
type0_PDCCH_CSS_config->num_symbols = -1;
type0_PDCCH_CSS_config->rb_offset = -1;
LOG_D(NR_MAC,"NR_SubcarrierSpacing_kHz30 %d, scs_ssb %d, scs_pdcch %d, min_chan_bw %d\n",(int)NR_SubcarrierSpacing_kHz30,(int)scs_ssb,(int)scs_pdcch,min_channel_bw);
// type0-pdcch coreset
switch( (scs_ssb << 3) | scs_pdcch ){
switch( ((int)scs_ssb << 3) | (int)scs_pdcch ){
case (NR_SubcarrierSpacing_kHz15 << 5) | NR_SubcarrierSpacing_kHz15:
AssertFatal(index_4msb < 15, "38.213 Table 13-1 4 MSB out of range\n");
type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
@@ -3372,7 +3451,7 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
}else{ ; }
break;
case (NR_SubcarrierSpacing_kHz30 << 3) | NR_SubcarrierSpacing_kHz30:
if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){
type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
@@ -3449,13 +3528,14 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
break;
default:
LOG_E(NR_MAC,"NR_SubcarrierSpacing_kHz30 %d, scs_ssb %d, scs_pdcch %d, min_chan_bw %d\n",NR_SubcarrierSpacing_kHz30,(int)scs_ssb,(int)scs_pdcch,min_channel_bw);
break;
}
LOG_D(MAC,"Coreset0: index_4msb=%d, num_rbs=%d, num_symb=%d, rb_offset=%d\n",
LOG_D(NR_MAC,"Coreset0: index_4msb=%d, num_rbs=%d, num_symb=%d, rb_offset=%d\n",
index_4msb,type0_PDCCH_CSS_config->num_rbs,type0_PDCCH_CSS_config->num_symbols,type0_PDCCH_CSS_config->rb_offset );
AssertFatal(type0_PDCCH_CSS_config->num_rbs != -1, "Type0 PDCCH coreset num_rbs undefined");
AssertFatal(type0_PDCCH_CSS_config->num_rbs != -1, "Type0 PDCCH coreset num_rbs undefined, index_4msb=%d, min_channel_bw %d, scs_ssb %d, scs_pdcch %d\n",index_4msb,min_channel_bw,(int)scs_ssb,(int)scs_pdcch);
AssertFatal(type0_PDCCH_CSS_config->num_symbols != -1, "Type0 PDCCH coreset num_symbols undefined");
AssertFatal(type0_PDCCH_CSS_config->rb_offset != -1, "Type0 PDCCH coreset rb_offset undefined");
@@ -3710,7 +3790,7 @@ void fill_coresetZero(NR_ControlResourceSet_t *coreset0, NR_Type0_PDCCH_CSS_conf
}
uint8_t fill_searchSpaceZero(NR_SearchSpace_t *ss0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, int L) {
void fill_searchSpaceZero(NR_SearchSpace_t *ss0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config) {
if(ss0 == NULL) ss0=calloc(1,sizeof(*ss0));
if(ss0->controlResourceSetId == NULL) ss0->controlResourceSetId=calloc(1,sizeof(*ss0->controlResourceSetId));
@@ -3728,7 +3808,6 @@ uint8_t fill_searchSpaceZero(NR_SearchSpace_t *ss0, NR_Type0_PDCCH_CSS_config_t
AssertFatal(type0_PDCCH_CSS_config!=NULL,"No type0 CSS configuration\n");
max_agg = (type0_PDCCH_CSS_config->num_symbols*type0_PDCCH_CSS_config->num_rbs)/6;
if (L>max_agg) return 0;
symbols = (1-(1<<type0_PDCCH_CSS_config->num_symbols))<<type0_PDCCH_CSS_config->first_symbol_index;
duration = type0_PDCCH_CSS_config->search_space_duration;
@@ -3761,28 +3840,11 @@ uint8_t fill_searchSpaceZero(NR_SearchSpace_t *ss0, NR_Type0_PDCCH_CSS_config_t
// max values are set according to TS38.213 Section 10.1 Table 10.1-1
ss0->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0;
ss0->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0;
switch(L){
case 4:
ss0->nrofCandidates->aggregationLevel4 = (((max_agg>>2) > 4)? 4 : max_agg>>2);
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0;
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
break;
case 8:
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n0;
ss0->nrofCandidates->aggregationLevel8 = (((max_agg>>3) > 2)? 2 : max_agg>>3);
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
break;
case 16:
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n0;
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0;
ss0->nrofCandidates->aggregationLevel16 = (((max_agg>>4) > 1)? 1 : max_agg>>4);
break;
default:
AssertFatal(1==0,"Invalid aggregation level %d for SS0\n",L);
}
ss0->nrofCandidates->aggregationLevel4 = (((max_agg>>2) > 4)? 4 : max_agg>>2);
ss0->nrofCandidates->aggregationLevel8 = (((max_agg>>3) > 2)? 2 : max_agg>>3);
ss0->nrofCandidates->aggregationLevel16 = (((max_agg>>4) > 1)? 1 : max_agg>>4);
ss0->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common;
return 1;
}
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
+6 -4
View File
@@ -47,7 +47,8 @@ int is_nr_DL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon,slo
int is_nr_UL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, slot_t slotP, lte_frame_type_t frame_type);
uint16_t nr_dci_size(const NR_BWP_UplinkCommon_t *initialULBWP,
uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDLBWP,
const NR_BWP_UplinkCommon_t *initialULBWP,
const NR_CellGroupConfig_t *cg,
dci_pdu_rel15_t *dci_pdu,
nr_dci_format_t format,
@@ -57,7 +58,8 @@ uint16_t nr_dci_size(const NR_BWP_UplinkCommon_t *initialULBWP,
void find_aggregation_candidates(uint8_t *aggregation_level,
uint8_t *nr_of_candidates,
NR_SearchSpace_t *ss);
NR_SearchSpace_t *ss,
int maxL);
void find_monitoring_periodicity_offset_common(NR_SearchSpace_t *ss,
uint16_t *slot_period,
@@ -139,7 +141,7 @@ void get_info_from_tda_tables(int default_abc,
int *nrOfSymbols);
void fill_coresetZero(NR_ControlResourceSet_t *coreset0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config);
uint8_t fill_searchSpaceZero(NR_SearchSpace_t *ss0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, int L);
void fill_searchSpaceZero(NR_SearchSpace_t *ss0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config);
uint16_t compute_pucch_prb_size(uint8_t format,
uint8_t nr_prbs,
@@ -183,7 +185,7 @@ uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Posi
@returns transformPrecoding value */
uint8_t get_transformPrecoding(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
const NR_PUSCH_Config_t *pusch_config,
const NR_BWP_Uplink_t *ubwp,
const NR_BWP_UplinkDedicated_t *ubwp,
uint8_t *dci_format,
int rnti_type,
uint8_t configuredGrant);