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Merge remote-tracking branch 'origin/develop' into Dedicated-BWPs

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# Conflicts:
#	openair2/GNB_APP/gnb_config.c
#	openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
#	openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
#	openair2/RRC/NR/L2_nr_interface.c
#	openair2/RRC/NR/MESSAGES/asn1_msg.c
#	openair2/RRC/NR/MESSAGES/asn1_msg.h
#	openair2/RRC/NR/nr_rrc_defs.h
#	openair2/RRC/NR/nr_rrc_proto.h
#	openair2/RRC/NR/rrc_gNB_reconfig.c
This commit is contained in:
luis_pereira87
2022-05-06 11:29:55 +01:00
parent d059c71754 d11350c08a
commit a8e6bf9bd5
80 changed files with 1815 additions and 575 deletions
Download Patch File Download Diff File Expand all files Collapse all files
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
-2
View File
@@ -4071,8 +4071,6 @@ uint16_t compute_pucch_prb_size(uint8_t format,
if ((O_tot+O_csi)>(nr_prbs*n_re_ctrl*n_symb*Qm*r))
AssertFatal(1==0,"MaxCodeRate %.2f can't support %d UCI bits and %d CRC bits with %d PRBs",
r,O_tot,O_crc,nr_prbs);
else
return nr_prbs;
}
if (format==2){
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+6 -1
View File
@@ -354,13 +354,18 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
scs_ssb = get_softmodem_params()->numerology;
band = mac->nr_band;
ssb_start_symbol = get_ssb_start_symbol(band,scs_ssb,ssb_index);
int ssb_sc_offset_norm;
if (ssb_subcarrier_offset<24 && mac->frequency_range == FR1)
ssb_sc_offset_norm = ssb_subcarrier_offset>>scs_ssb;
else
ssb_sc_offset_norm = ssb_subcarrier_offset;
if (mac->common_configuration_complete == 0)
nr_ue_sib1_scheduler(module_id,
cc_id,
ssb_start_symbol,
frame,
ssb_subcarrier_offset,
ssb_sc_offset_norm,
ssb_index,
ssb_start_subcarrier,
mac->frequency_range,
openair2/LAYER2/NR_MAC_gNB/config.c
+18 -16
View File
@@ -344,22 +344,24 @@ void config_common(int Mod_idP, int ssb_SubcarrierOffset, rrc_pdsch_AntennaPorts
uint32_t absolute_diff = (*scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB - scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA);
uint16_t sco = absolute_diff%(12*scs_scaling);
// values of subcarrier offset larger than the limit only indicates CORESET for Type0-PDCCH CSS set is not present
uint8_t ssb_SubcarrierOffset_limit = 0;
int ssb_SubcarrierOffset_limit = 0;
int offset_scaling = 0; //15kHz
if(frequency_range == FR1) {
ssb_SubcarrierOffset_limit = 24;
} else {
if (ssb_SubcarrierOffset<ssb_SubcarrierOffset_limit)
offset_scaling = cfg->ssb_config.scs_common.value;
} else
ssb_SubcarrierOffset_limit = 12;
}
if (ssb_SubcarrierOffset<ssb_SubcarrierOffset_limit)
AssertFatal(sco==(scs_scaling * ssb_SubcarrierOffset),"absoluteFrequencySSB has a subcarrier offset of %d while it should be %d\n",sco/scs_scaling,ssb_SubcarrierOffset);
AssertFatal(sco==(scs_scaling * ssb_SubcarrierOffset),
"absoluteFrequencySSB has a subcarrier offset of %d while it should be %d\n",sco/scs_scaling,ssb_SubcarrierOffset);
cfg->ssb_table.ssb_offset_point_a.value = absolute_diff/(12*scs_scaling) - 10; //absoluteFrequencySSB is the central frequency of SSB which is made by 20RBs in total
cfg->ssb_table.ssb_offset_point_a.tl.tag = NFAPI_NR_CONFIG_SSB_OFFSET_POINT_A_TAG;
cfg->num_tlv++;
cfg->ssb_table.ssb_period.value = *scc->ssb_periodicityServingCell;
cfg->ssb_table.ssb_period.tl.tag = NFAPI_NR_CONFIG_SSB_PERIOD_TAG;
cfg->num_tlv++;
cfg->ssb_table.ssb_subcarrier_offset.value = ssb_SubcarrierOffset;
cfg->ssb_table.ssb_subcarrier_offset.value = ssb_SubcarrierOffset<<offset_scaling;
cfg->ssb_table.ssb_subcarrier_offset.tl.tag = NFAPI_NR_CONFIG_SSB_SUBCARRIER_OFFSET_TAG;
cfg->num_tlv++;
@@ -492,14 +494,11 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
AssertFatal(RC.nrmac[Mod_idP]->UL_tti_req_ahead[0],
"could not allocate memory for RC.nrmac[]->UL_tti_req_ahead[]\n");
/* fill in slot/frame numbers: slot is fixed, frame will be updated by scheduler
extern sf_ahead is initialized in ru_thread but that function is not executed yet here*/
const uint16_t sf_ahead = (uint16_t) ceil((float)6/(0x01<<(*scc->ssbSubcarrierSpacing)));
const uint16_t sl_ahead = sf_ahead * (0x01<<(*scc->ssbSubcarrierSpacing));
/* consider that scheduler runs sl_ahead: the first sl_ahead slots are
* already "in the past" and thus we put frame 1 instead of 0!*/
* consider that scheduler runs sl_ahead: the first sl_ahead slots are
* already "in the past" and thus we put frame 1 instead of 0! */
for (int i = 0; i < n; ++i) {
nfapi_nr_ul_tti_request_t *req = &RC.nrmac[Mod_idP]->UL_tti_req_ahead[0][i];
req->SFN = i < (sl_ahead-1);
req->SFN = i < (RC.nrmac[Mod_idP]->if_inst->sl_ahead-1);
req->Slot = i;
}
RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL =
@@ -551,12 +550,9 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
AssertFatal(RC.nrmac[Mod_idP]->common_channels[0].frame_type == FDD,"Dynamic TDD not handled yet\n");
for (int slot = 0; slot < n; ++slot) {
/* FIXME: it seems there is a problem with slot 0/10/slots right after UL:
* we just get retransmissions. Thus, do not schedule such slots in DL in TDD */
if (RC.nrmac[Mod_idP]->common_channels[0].frame_type == FDD ||
(slot % nr_slots_period != 0)){
(slot != 0))
RC.nrmac[Mod_idP]->dlsch_slot_bitmap[slot / 64] |= (uint64_t)((slot % nr_slots_period) < nr_dl_slots) << (slot % 64);
}
RC.nrmac[Mod_idP]->ulsch_slot_bitmap[slot / 64] |= (uint64_t)((slot % nr_slots_period) >= nr_ulstart_slot) << (slot % 64);
LOG_I(NR_MAC, "In %s: slot %d DL %d UL %d\n",
@@ -707,6 +703,12 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
genericParameters,
RC.nrmac[Mod_idP]->type0_PDCCH_CSS_config);
sched_ctrl->maxL = 2;
if (CellGroup->spCellConfig &&
CellGroup->spCellConfig->spCellConfigDedicated &&
CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig &&
CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup
)
compute_csi_bitlen (CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup, UE_info, UE_id, Mod_idP);
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_OUT);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+3 -2
View File
@@ -372,8 +372,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
schedule_nr_prach(module_idP, f, s);
}
// This schedule SR
nr_sr_reporting(module_idP, frame, slot);
// Schedule CSI-RS transmission
nr_csirs_scheduling(module_idP, frame, slot, nr_slots_per_frame[*scc->ssbSubcarrierSpacing]);
@@ -402,6 +400,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
nr_schedule_pucch(module_idP, frame, slot);
// This schedule SR after PUCCH for multiplexing
nr_sr_reporting(module_idP, frame, slot);
stop_meas(&RC.nrmac[module_idP]->eNB_scheduler);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+24 -14
View File
@@ -228,7 +228,7 @@ void find_SSB_and_RO_available(module_id_t module_idP) {
cc->total_prach_occasions = total_RA_occasions - unused_RA_occasion;
cc->num_active_ssb = num_active_ssb;
LOG_I(NR_MAC,
LOG_D(NR_MAC,
"Total available RO %d, num of active SSB %d: unused RO = %d association_period %u N_RA_sfn %u total_prach_occasions_per_config_period %u\n",
cc->total_prach_occasions,
cc->num_active_ssb,
@@ -391,7 +391,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
const int16_t N_RA_RB = get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, mu_pusch);
uint16_t *vrb_map_UL = &cc->vrb_map_UL[slotP * MAX_BWP_SIZE];
for (int i = 0; i < N_RA_RB * fdm; ++i)
vrb_map_UL[bwp_start + rach_ConfigGeneric->msg1_FrequencyStart + i] = SL_to_bitmap(start_symbol, N_t_slot*N_dur);
vrb_map_UL[bwp_start + rach_ConfigGeneric->msg1_FrequencyStart + i] |= SL_to_bitmap(start_symbol, N_t_slot*N_dur);
}
}
}
@@ -403,7 +403,7 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
uint16_t monitoring_slot_period,
uint16_t monitoring_offset,uint8_t beam_index,
uint8_t num_active_ssb,
int16_t *tdd_beam_association){
int16_t *tdd_beam_association, int sl_ahead){
// preferentially we schedule the msg2 in the mixed slot or in the last dl slot
// if they are allowed by search space configuration
@@ -468,12 +468,12 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
uint8_t start_next_period = (rach_slot-(rach_slot%tdd_period_slot)+tdd_period_slot)%nr_slots_per_frame[mu];
*msg2_slot = start_next_period + last_dl_slot_period; // initializing scheduling of slot to next mixed (or last dl) slot
*msg2_frame = ((*msg2_slot>(rach_slot))? rach_frame : (rach_frame+1))%1024;
// we can't schedule msg2 before sl_ahead since prach
int eff_slot = *msg2_slot+(*msg2_frame-rach_frame)*nr_slots_per_frame[mu];
if ((eff_slot-rach_slot)<=sl_ahead) {
while ((eff_slot-rach_slot)<=sl_ahead) {
*msg2_slot = (*msg2_slot+tdd_period_slot)%nr_slots_per_frame[mu];
*msg2_frame = ((*msg2_slot>(rach_slot))? rach_frame : (rach_frame+1))%1024;
eff_slot = *msg2_slot+(*msg2_frame-rach_frame)*nr_slots_per_frame[mu];
}
if (FR==nr_FR2) {
int num_tdd_period = *msg2_slot/tdd_period_slot;
@@ -658,7 +658,8 @@ void nr_initiate_ra_proc(module_id_t module_idP,
monitoring_offset,
beam_index,
cc->num_active_ssb,
nr_mac->tdd_beam_association);
nr_mac->tdd_beam_association,
nr_mac->if_inst->sl_ahead);
ra->Msg2_frame = msg2_frame;
ra->Msg2_slot = msg2_slot;
@@ -964,11 +965,17 @@ void nr_get_Msg3alloc(module_id_t module_id,
startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols);
k2 = *pusch_TimeDomainAllocationList->list.array[i]->k2;
// we want to transmit in the uplink symbols of mixed slot
int start_symbol_index,nr_of_symbols;
SLIV2SL(pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength, &start_symbol_index, &nr_of_symbols);
LOG_D(NR_MAC,"Checking Msg3 TDA %d : k2 %d, sliv %d,S %d L %d\n",i,(int)k2,(int)pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength,start_symbol_index,nr_of_symbols);
// we want to transmit in the uplink symbols of mixed slot AND assuming Msg2 was in the mixed slot
if ((k2 + DELTA[mu])%nb_slots_per_period == 0) {
temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213
ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu];
if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot)) {
if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot) &&
nr_of_symbols<=scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols&&
start_symbol_index>=(14-scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols)) {
ra->Msg3_tda_id = i;
ra->msg3_startsymb = StartSymbolIndex;
ra->msg3_nrsymb = NrOfSymbols;
@@ -976,6 +983,7 @@ void nr_get_Msg3alloc(module_id_t module_id,
}
}
}
AssertFatal(ra->Msg3_tda_id < 16, "Couldn't find an appropriate TD allocation for Msg3\n");
}
else {
ra->Msg3_tda_id = 0;
@@ -1322,7 +1330,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
dl_req->nPDUs+=1;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15;
LOG_A(NR_MAC,"[gNB %d][RAPROC] CC_id %d Frame %d, slotP %d: Generating RA-Msg2 DCI, rnti 0x%x, state %d, CoreSetType %d\n",
LOG_D(NR_MAC,"[gNB %d][RAPROC] CC_id %d Frame %d, slotP %d: Generating RA-Msg2 DCI, rnti 0x%x, state %d, CoreSetType %d\n",
module_idP, CC_id, frameP, slotP, ra->RA_rnti, ra->state,pdcch_pdu_rel15->CoreSetType);
// SCF222: PDU index incremented for each PDSCH PDU sent in TX control message. This is used to associate control
@@ -1484,8 +1492,9 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
nr_add_msg3(module_idP, CC_id, frameP, slotP, ra, (uint8_t *) &tx_req->TLVs[0].value.direct[0]);
if(ra->cfra) {
LOG_I(NR_MAC, "Frame %d, Subframe %d: Setting RA-Msg3 reception for Frame %d Subframe %d\n", frameP, slotP, ra->Msg3_frame, ra->Msg3_slot);
LOG_D(NR_MAC, "Frame %d, Subframe %d: Setting RA-Msg3 reception (CFRA) for SFN.Slot %d.%d\n", frameP, slotP, ra->Msg3_frame, ra->Msg3_slot);
}
else LOG_D(NR_MAC, "Frame %d, Subframe %d: Setting RA-Msg3 reception (CBRA) for SFN.Slot %d.%d\n", frameP, slotP, ra->Msg3_frame, ra->Msg3_slot);
T(T_GNB_MAC_DL_RAR_PDU_WITH_DATA, T_INT(module_idP), T_INT(CC_id), T_INT(ra->RA_rnti), T_INT(frameP),
T_INT(slotP), T_INT(0), T_BUFFER(&tx_req->TLVs[0].value.direct[0], tx_req->TLVs[0].length));
@@ -1709,6 +1718,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
int rbSize = 0;
uint8_t tb_scaling = 0;
uint16_t *vrb_map = cc[CC_id].vrb_map;
// increase PRBs until we get to BWPSize or TBS is bigger than MAC PDU size
do {
if(rbSize < BWPSize)
rbSize++;
@@ -1768,7 +1778,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
dl_req->nPDUs+=1;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15;
LOG_A(NR_MAC, "[gNB %d] [RAPROC] CC_id %d Frame %d, slotP %d: Generating RA-Msg4 DCI, state %d\n", module_idP, CC_id, frameP, slotP, ra->state);
LOG_D(NR_MAC, "[gNB %d] [RAPROC] CC_id %d Frame %d, slotP %d: Generating RA-Msg4 DCI, state %d\n", module_idP, CC_id, frameP, slotP, ra->state);
// SCF222: PDU index incremented for each PDSCH PDU sent in TX control message. This is used to associate control
// information to data and is reset every slot.
@@ -1959,7 +1969,7 @@ void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_fram
if (harq->is_waiting == 0) {
if (harq->round == 0) {
if (stats->dlsch_errors == 0) {
LOG_A(NR_MAC, "(ue %i, rnti 0x%04x) Received Ack of RA-Msg4. CBRA procedure succeeded!\n", UE_id, ra->rnti);
LOG_I(NR_MAC, "(ue %i, rnti 0x%04x) Received Ack of RA-Msg4. CBRA procedure succeeded!\n", UE_id, ra->rnti);
UE_info->active[UE_id] = true;
UE_info->Msg4_ACKed[UE_id] = true;
@@ -2006,7 +2016,7 @@ void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_fram
}
}
else {
LOG_I(NR_MAC, "(ue %i, rnti 0x%04x) Received Nack of RA-Msg4. Preparing retransmission!\n", UE_id, ra->rnti);
LOG_D(NR_MAC, "(ue %i, rnti 0x%04x) Received Nack of RA-Msg4. Preparing retransmission!\n", UE_id, ra->rnti);
ra->Msg4_frame = (frame + 1) % 1024;
ra->Msg4_slot = 1;
ra->state = Msg4;
@@ -2063,7 +2073,7 @@ void nr_fill_rar(uint8_t Mod_idP,
uint8_t * dlsch_buffer,
nfapi_nr_pusch_pdu_t *pusch_pdu){
LOG_I(NR_MAC, "[gNB] Generate RAR MAC PDU frame %d slot %d preamble index %u TA command %d \n", ra->Msg2_frame, ra-> Msg2_slot, ra->preamble_index, ra->timing_offset);
LOG_D(NR_MAC, "[gNB] Generate RAR MAC PDU frame %d slot %d preamble index %u TA command %d \n", ra->Msg2_frame, ra-> Msg2_slot, ra->preamble_index, ra->timing_offset);
NR_RA_HEADER_BI *rarbi = (NR_RA_HEADER_BI *) dlsch_buffer;
NR_RA_HEADER_RAPID *rarh = (NR_RA_HEADER_RAPID *) (dlsch_buffer + 1);
NR_MAC_RAR *rar = (NR_MAC_RAR *) (dlsch_buffer + 2);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+12 -10
View File
@@ -411,14 +411,14 @@ uint32_t schedule_control_sib1(module_id_t module_id,
gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize = rbSize;
gNB_mac->sched_ctrlCommon->sched_pdsch.rbStart = 0;
LOG_D(MAC,"mcs = %i\n", gNB_mac->sched_ctrlCommon->sched_pdsch.mcs);
LOG_D(MAC,"startSymbolIndex = %i\n", startSymbolIndex);
LOG_D(MAC,"nrOfSymbols = %i\n", nrOfSymbols);
LOG_D(MAC, "rbSize = %i\n", gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize);
LOG_D(MAC,"TBS = %i\n", TBS);
LOG_D(MAC,"dmrs_length %d\n",dmrs_length);
LOG_D(MAC,"N_PRB_DMRS = %d\n",N_PRB_DMRS);
LOG_D(MAC,"mappingtype = %d\n", mappingtype);
LOG_D(NR_MAC,"mcs = %i\n", gNB_mac->sched_ctrlCommon->sched_pdsch.mcs);
LOG_D(NR_MAC,"startSymbolIndex = %i\n", startSymbolIndex);
LOG_D(NR_MAC,"nrOfSymbols = %i\n", nrOfSymbols);
LOG_D(NR_MAC, "rbSize = %i\n", gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize);
LOG_D(NR_MAC,"TBS = %i\n", TBS);
LOG_D(NR_MAC,"dmrs_length %d\n",dmrs_length);
LOG_D(NR_MAC,"N_PRB_DMRS = %d\n",N_PRB_DMRS);
LOG_D(NR_MAC,"mappingtype = %d\n", mappingtype);
// Mark the corresponding RBs as used
fill_pdcch_vrb_map(gNB_mac,
CC_id,
@@ -426,7 +426,7 @@ uint32_t schedule_control_sib1(module_id_t module_id,
gNB_mac->sched_ctrlCommon->cce_index,
gNB_mac->sched_ctrlCommon->aggregation_level);
for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; rb++) {
vrb_map[rb + rbStart] = SL_to_bitmap(startSymbolIndex, nrOfSymbols);
vrb_map[rb + rbStart] |= SL_to_bitmap(startSymbolIndex, nrOfSymbols);
}
return TBS;
}
@@ -500,7 +500,9 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = dlDmrsSymbPos;
LOG_D(MAC,"dlDmrsSymbPos = 0x%x\n", pdsch_pdu_rel15->dlDmrsSymbPos);
LOG_D(NR_MAC,"sib1:bwpStart %d, bwpSize %d\n",pdsch_pdu_rel15->BWPStart,pdsch_pdu_rel15->BWPSize);
LOG_D(NR_MAC,"sib1:rbStart %d, rbSize %d\n",pdsch_pdu_rel15->rbStart,pdsch_pdu_rel15->rbSize);
LOG_D(NR_MAC,"sib1:dlDmrsSymbPos = 0x%x\n", pdsch_pdu_rel15->dlDmrsSymbPos);
/* Fill PDCCH DL DCI PDU */
nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci];
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+16 -12
View File
@@ -575,8 +575,8 @@ bool allocate_dl_retransmission(module_id_t module_id,
rbStart += rbSize; /* last iteration rbSize was not enough, skip it */
rbSize = 0;
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
const int slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
rbStart++;
if (rbStart >= bwpSize) {
@@ -585,7 +585,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
}
while (rbStart + rbSize < bwpSize &&
(rballoc_mask[rbStart + rbSize]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)) &&
(rballoc_mask[rbStart + rbSize] & slbitmap) == slbitmap &&
rbSize < retInfo->rbSize)
rbSize++;
}
@@ -610,19 +610,19 @@ bool allocate_dl_retransmission(module_id_t module_id,
nr_set_pdsch_semi_static(sib1,
scc,
UE_info->CellGroup[UE_id],
cg,
sched_ctrl->active_bwp,
bwpd,
tda,
ps->nrOfLayers,
sched_ctrl,
&temp_ps);
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols)))
const uint16_t slbitmap = SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols);
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
rbStart++;
while (rbStart + rbSize < bwpSize &&
(rballoc_mask[rbStart + rbSize]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols)))
while (rbStart + rbSize < bwpSize && (rballoc_mask[rbStart + rbSize] & slbitmap) == slbitmap)
rbSize++;
uint32_t new_tbs;
@@ -930,14 +930,12 @@ void pf_dl(module_id_t module_id,
const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
// Freq-demain allocation
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&slbitmap))
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
rbStart++;
uint16_t max_rbSize = 1;
while (rbStart + max_rbSize < bwpSize &&
(rballoc_mask[rbStart + max_rbSize]&slbitmap))
while (rbStart + max_rbSize < bwpSize && (rballoc_mask[rbStart + max_rbSize] & slbitmap) == slbitmap)
max_rbSize++;
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
@@ -1077,6 +1075,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
if (!is_xlsch_in_slot(gNB_mac->dlsch_slot_bitmap[slot / 64], slot))
return;
//if (slot==7 || slot == 17) return;
/* PREPROCESSOR */
gNB_mac->pre_processor_dl(module_id, frame, slot);
const int CC_id = 0;
@@ -1475,6 +1475,10 @@ void nr_schedule_ue_spec(module_id_t module_id,
header->L = htons(bufEnd-buf);
dlsch_total_bytes += bufEnd-buf;
for (; buf < bufEnd - 3; buf += 4) {
uint32_t *buf32 = (uint32_t *)buf;
*buf32 = lrand48();
}
for (; buf < bufEnd; buf++)
*buf = lrand48() & 0xff;
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
-1
View File
@@ -278,7 +278,6 @@ void nr_preprocessor_phytest(module_id_t module_id,
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1;
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
ps->nrOfLayers = target_dl_Nl;
if (ps->time_domain_allocation != tda || ps->nrOfLayers != target_dl_Nl)
nr_set_pdsch_semi_static(NULL, scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, NULL, tda, target_dl_Nl, sched_ctrl, ps);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+60 -45
View File
@@ -156,7 +156,8 @@ void set_dl_mcs(NR_sched_pdsch_t *sched_pdsch,
uint16_t target_coderate,target_qm;
if (cqi_idx>0) {
int cqi_table = sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.cqi_table;
AssertFatal(cqi_table == mcs_table_idx, "Indices of MCS tables don't correspond\n");
if (cqi_table != mcs_table_idx)
LOG_W(NR_MAC,"Indices of MCS tables don't correspond yet, cri_ri_li_pmi_cqi_report.cqi_table %d, mcs_table_index %d\n",cqi_table,mcs_table_idx);
switch (cqi_table) {
case 0:
target_qm = cqi_table1[cqi_idx][0];
@@ -599,15 +600,9 @@ void nr_set_pdsch_semi_static(const NR_SIB1_t *sib1,
}
LOG_D(NR_MAC,"MCS Table Index: %d\n",ps->mcsTableIdx);
NR_PDSCH_Config_t *pdsch_Config;
if (bwp &&
bwp->bwp_Dedicated &&
bwp->bwp_Dedicated->pdsch_Config &&
bwp->bwp_Dedicated->pdsch_Config->choice.setup)
pdsch_Config = bwp->bwp_Dedicated->pdsch_Config->choice.setup;
else
pdsch_Config = NULL;
NR_PDSCH_Config_t *pdsch_Config = NULL;
if (bwpd && bwpd->pdsch_Config) pdsch_Config = bwpd->pdsch_Config->choice.setup;
LOG_D(NR_MAC,"tda %d, ps->time_domain_allocation %d,layers %d, ps->nrOfLayers %d, pdsch_config %p\n",tda,ps->time_domain_allocation,layers,ps->nrOfLayers,pdsch_Config);
if (ps->time_domain_allocation != tda) {
reset_dmrs = true;
ps->time_domain_allocation = tda;
@@ -750,7 +745,7 @@ void nr_set_pusch_semi_static(const NR_SIB1_t *sib1,
void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
nr_scs_e scs_common,
nr_scs_e pdcch_scs,
nr_frequency_range_e freq_range,
frequency_range_t freq_range,
uint8_t rmsi_pdcch_config,
uint8_t ssb_idx,
uint8_t k_ssb,
@@ -1333,6 +1328,7 @@ void nr_configure_pucch(const NR_SIB1_t *sib1,
}
}
AssertFatal(res_found==1,"No PUCCH resource found corresponding to id %ld\n",*resource_id);
LOG_D(NR_MAC,"Configure pucch: pucch_pdu->format_type %d pucch_pdu->bit_len_harq %d, pucch->pdu->bit_len_csi %d\n",pucch_pdu->format_type,pucch_pdu->bit_len_harq,pucch_pdu->bit_len_csi_part1);
}
else { // this is the default PUCCH configuration, PUCCH format 0 or 1
LOG_D(NR_MAC,"pucch_acknak: Filling default PUCCH configuration from Tables (r_pucch %d, bwp %p)\n",r_pucch,bwp);
@@ -2150,7 +2146,16 @@ void remove_nr_list(NR_list_t *listP, int id)
prev = cur;
cur = &listP->next[*cur];
}
AssertFatal(*cur != -1, "ID %d not found in UE_list\n", id);
if (*cur == -1) {
cur = &listP->head;
prev=&listP->head;
while (*cur != -1 && *cur != id) {
LOG_I(NR_MAC,"remove_nr_list : id %d, *cur %d\n",id,*cur);
prev = cur;
cur = &listP->next[*cur];
}
AssertFatal(1==0, "ID %d not found in UE_list\n", id);
}
int *next = &listP->next[*cur];
*cur = listP->next[*cur];
*next = -1;
@@ -2308,7 +2313,11 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG
UE_info->CellGroup[UE_id] = CellGroup;
add_nr_list(&UE_info->list, UE_id);
memset(&UE_info->mac_stats[UE_id], 0, sizeof(NR_mac_stats_t));
if (CellGroup && CellGroup->spCellConfig && CellGroup->spCellConfig->spCellConfigDedicated)
if (CellGroup &&
CellGroup->spCellConfig &&
CellGroup->spCellConfig->spCellConfigDedicated &&
CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig &&
CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup)
compute_csi_bitlen (CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup, UE_info, UE_id, mod_idP);
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
memset(sched_ctrl, 0, sizeof(*sched_ctrl));
@@ -2633,8 +2642,9 @@ void nr_csirs_scheduling(int Mod_idP,
int period, offset;
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
NR_BWP_Downlink_t *bwp=CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[sched_ctrl->active_bwp->bwp_Id-1];
NR_BWP_t *genericParameters = sched_ctrl->active_bwp ?
&sched_ctrl->active_bwp->bwp_Common->genericParameters:
&gNB_mac->common_channels[0].ServingCellConfigCommon->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
for (int id = 0; id < csi_measconfig->nzp_CSI_RS_ResourceToAddModList->list.count; id++){
nzpcsi = csi_measconfig->nzp_CSI_RS_ResourceToAddModList->list.array[id];
NR_CSI_RS_ResourceMapping_t resourceMapping = nzpcsi->resourceMapping;
@@ -2642,7 +2652,7 @@ void nr_csirs_scheduling(int Mod_idP,
if((frame*n_slots_frame+slot-offset)%period == 0) {
LOG_D(MAC,"Scheduling CSI-RS in frame %d slot %d\n",frame,slot);
LOG_D(NR_MAC,"Scheduling CSI-RS in frame %d slot %d\n",frame,slot);
nfapi_nr_dl_tti_request_pdu_t *dl_tti_csirs_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset((void*)dl_tti_csirs_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
@@ -2651,11 +2661,11 @@ void nr_csirs_scheduling(int Mod_idP,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t *csirs_pdu_rel15 = &dl_tti_csirs_pdu->csi_rs_pdu.csi_rs_pdu_rel15;
csirs_pdu_rel15->bwp_size = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
csirs_pdu_rel15->bwp_start = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
csirs_pdu_rel15->subcarrier_spacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
if (bwp->bwp_Common->genericParameters.cyclicPrefix)
csirs_pdu_rel15->cyclic_prefix = *bwp->bwp_Common->genericParameters.cyclicPrefix;
csirs_pdu_rel15->bwp_size = NRRIV2BW(genericParameters->locationAndBandwidth,275);
csirs_pdu_rel15->bwp_start = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth,275);
csirs_pdu_rel15->subcarrier_spacing = genericParameters->subcarrierSpacing;
if (genericParameters->cyclicPrefix)
csirs_pdu_rel15->cyclic_prefix = *genericParameters->cyclicPrefix;
else
csirs_pdu_rel15->cyclic_prefix = 0;
@@ -2810,10 +2820,8 @@ void nr_csirs_scheduling(int Mod_idP,
void nr_mac_update_timers(module_id_t module_id,
frame_t frame,
sub_frame_t slot) {
NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
const NR_list_t *UE_list = &UE_info->list;
for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
if (sched_ctrl->rrc_processing_timer > 0) {
@@ -2821,8 +2829,10 @@ void nr_mac_update_timers(module_id_t module_id,
if (sched_ctrl->rrc_processing_timer == 0) {
LOG_I(NR_MAC, "(%d.%d) De-activating RRC processing timer for UE %d\n", frame, slot, UE_id);
const NR_ServingCellConfig_t *spCellConfigDedicated = UE_info->CellGroup[UE_id] && UE_info->CellGroup[UE_id]->spCellConfig ?
UE_info->CellGroup[UE_id]->spCellConfig->spCellConfigDedicated : NULL;
const NR_SIB1_t *sib1 = RC.nrmac[module_id]->common_channels[0].sib1 ? RC.nrmac[module_id]->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL;
NR_CellGroupConfig_t *cg = UE_info->CellGroup[UE_id];
NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon;
const NR_ServingCellConfig_t *spCellConfigDedicated = cg && cg->spCellConfig ? cg->spCellConfig->spCellConfigDedicated : NULL;
// If needed, update the Dedicated BWP
const int current_bwp_id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0;
@@ -2841,45 +2851,50 @@ void nr_mac_update_timers(module_id_t module_id,
}
}
const NR_SIB1_t *sib1 = RC.nrmac[module_id]->common_channels[0].sib1 ? RC.nrmac[module_id]->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL;
NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon;
NR_BWP_DownlinkDedicated_t *bwpd = spCellConfigDedicated ? spCellConfigDedicated->initialDownlinkBWP : NULL;
NR_BWP_Downlink_t *bwp = sched_ctrl->active_bwp;
NR_BWP_DownlinkDedicated_t *bwpd = cg &&
cg->spCellConfig &&
cg->spCellConfig->spCellConfigDedicated ?
cg->spCellConfig->spCellConfigDedicated->initialDownlinkBWP : NULL;
int **preferred_dl_tda = RC.nrmac[module_id]->preferred_dl_tda;
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
const uint8_t layers = set_dl_nrOfLayers(sched_ctrl);
const int tda = sched_ctrl->active_bwp && RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] >= 0 ?
RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] :
(sched_ctrl->pdsch_semi_static.time_domain_allocation >= 0 ? sched_ctrl->pdsch_semi_static.time_domain_allocation : 0);
const int tda = bwp && preferred_dl_tda[bwp->bwp_Id][slot] >= 0 ?
preferred_dl_tda[bwp->bwp_Id][slot] : (ps->time_domain_allocation >= 0 ? ps->time_domain_allocation : 0);
nr_set_pdsch_semi_static(sib1,
scc,
UE_info->CellGroup[UE_id],
sched_ctrl->active_bwp,
cg,
bwp,
bwpd,
tda,
layers,
sched_ctrl,
&sched_ctrl->pdsch_semi_static);
ps);
NR_BWP_UplinkDedicated_t *ubwpd = spCellConfigDedicated &&
spCellConfigDedicated->uplinkConfig ?
spCellConfigDedicated->uplinkConfig->initialUplinkBWP : NULL;
NR_BWP_Uplink_t *ubwp = sched_ctrl->active_ubwp;
NR_BWP_UplinkDedicated_t *ubwpd = cg &&
cg->spCellConfig &&
cg->spCellConfig->spCellConfigDedicated &&
cg->spCellConfig->spCellConfigDedicated->uplinkConfig ?
cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP : NULL;
int **preferred_ul_tda = RC.nrmac[module_id]->preferred_ul_tda;
NR_pusch_semi_static_t *ups = &sched_ctrl->pusch_semi_static;
const uint8_t num_dmrs_cdm_grps_no_data = (sched_ctrl->active_ubwp || ubwpd) ? 1 : 2;
int dci_format = get_dci_format(sched_ctrl);
const int utda = sched_ctrl->active_ubwp && RC.nrmac[module_id]->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id][slot] >= 0 ?
RC.nrmac[module_id]->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id][slot] :
(sched_ctrl->pusch_semi_static.time_domain_allocation >= 0 ? sched_ctrl->pusch_semi_static.time_domain_allocation : 0);
const uint8_t num_dmrs_cdm_grps_no_data = (ubwp || ubwpd) ? 1 : 2;
const int utda = ubwp && preferred_ul_tda[ubwp->bwp_Id][slot] >= 0 ?
preferred_ul_tda[ubwp->bwp_Id][slot] : (ups->time_domain_allocation >= 0 ? ups->time_domain_allocation : 0);
nr_set_pusch_semi_static(sib1,
scc,
sched_ctrl->active_ubwp,
ubwp,
ubwpd,
dci_format,
utda,
num_dmrs_cdm_grps_no_data,
&sched_ctrl->pusch_semi_static);
ups);
}
}
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
+113 -40
View File
@@ -51,7 +51,8 @@ void nr_fill_nfapi_pucch(module_id_t mod_id,
&RC.nrmac[mod_id]->UL_tti_req_ahead[0][pucch->ul_slot];
AssertFatal(future_ul_tti_req->SFN == pucch->frame
&& future_ul_tti_req->Slot == pucch->ul_slot,
"future UL_tti_req's frame.slot %4d.%2d does not match PUCCH %4d.%2d\n",
"Current %4d.%2d : future UL_tti_req's frame.slot %4d.%2d does not match PUCCH %4d.%2d\n",
frame,slot,
future_ul_tti_req->SFN,
future_ul_tti_req->Slot,
pucch->frame,
@@ -161,7 +162,8 @@ void nr_schedule_pucch(int Mod_idP,
|| frameP != curr_pucch->frame
|| slotP != curr_pucch->ul_slot)
continue;
LOG_D(NR_MAC,"Scheduling PUCCH[%d] RX for UE %d in %4d.%2d O_ack %d\n",i,UE_id,curr_pucch->frame,curr_pucch->ul_slot,O_ack);
if (O_csi > 0) LOG_D(NR_MAC,"Scheduling PUCCH[%d] RX for UE %d in %4d.%2d O_ack %d, O_sr %d, O_csi %d\n",
i,UE_id,curr_pucch->frame,curr_pucch->ul_slot,O_ack,O_sr,O_csi);
nr_fill_nfapi_pucch(Mod_idP, frameP, slotP, curr_pucch, UE_id);
memset(curr_pucch, 0, sizeof(*curr_pucch));
}
@@ -566,6 +568,7 @@ void compute_csi_bitlen(NR_CSI_MeasConfig_t *csi_MeasConfig, NR_UE_info_t *UE_in
struct NR_CSI_ResourceConfig *csi_resourceconfig;
// for each CSI measurement report configuration (list of CSI-ReportConfig)
LOG_D(NR_MAC,"Searching %d csi_reports\n",csi_MeasConfig->csi_ReportConfigToAddModList->list.count);
for (csi_report_id=0; csi_report_id < csi_MeasConfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){
struct NR_CSI_ReportConfig *csi_reportconfig = csi_MeasConfig->csi_ReportConfigToAddModList->list.array[csi_report_id];
// MAC structure for CSI measurement reports (per UE and per report)
@@ -620,7 +623,7 @@ void compute_csi_bitlen(NR_CSI_MeasConfig_t *csi_MeasConfig, NR_UE_info_t *UE_in
}
else AssertFatal(1==0,"Only periodic resource configuration currently supported\n");
}
LOG_D(NR_MAC,"nb_resources %d\n",nb_resources);
// computation of bit length depending on the report type
switch(reportQuantity_type){
case (NR_CSI_ReportConfig__reportQuantity_PR_ssb_Index_RSRP):
@@ -710,7 +713,17 @@ void nr_csi_meas_reporting(int Mod_idP,
const NR_CSI_MeasConfig_t *csi_measconfig = CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup;
AssertFatal(csi_measconfig->csi_ReportConfigToAddModList->list.count > 0,
"NO CSI report configuration available");
NR_PUCCH_Config_t *pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup;
NR_PUCCH_Config_t *pucch_Config = NULL;
if (sched_ctrl->active_ubwp) {
pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup;
} else if (CellGroup &&
CellGroup->spCellConfig &&
CellGroup->spCellConfig->spCellConfigDedicated &&
CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig &&
CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP &&
CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) {
pucch_Config = CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
}
for (int csi_report_id = 0; csi_report_id < csi_measconfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){
NR_CSI_ReportConfig_t *csirep = csi_measconfig->csi_ReportConfigToAddModList->list.array[csi_report_id];
@@ -734,7 +747,7 @@ void nr_csi_meas_reporting(int Mod_idP,
if (*pucchresset->resourceList.list.array[res_index] == pucchcsires->pucch_Resource)
break;
AssertFatal(res_index < n,
"CSI resource not found among PUCCH resources\n");
"CSI pucch resource %ld not found among PUCCH resources\n",pucchcsires->pucch_Resource);
// find free PUCCH that is in order with possibly existing PUCCH
// schedulings (other CSI, SR)
@@ -773,6 +786,7 @@ void nr_csi_meas_reporting(int Mod_idP,
len = pucchres->format.choice.format2->nrofPRBs;
mask = SL_to_bitmap(pucchres->format.choice.format2->startingSymbolIndex, pucchres->format.choice.format2->nrofSymbols);
curr_pucch->simultaneous_harqcsi = pucch_Config->format2->choice.setup->simultaneousHARQ_ACK_CSI;
LOG_D(NR_MAC,"%d.%d Allocating PUCCH format 2, startPRB %d, nPRB %d, simulHARQ %d, num_bits %d\n", frame, sched_slot,start,len,curr_pucch->simultaneous_harqcsi,curr_pucch->csi_bits);
break;
case NR_PUCCH_Resource__format_PR_format3:
len = pucchres->format.choice.format3->nrofPRBs;
@@ -814,7 +828,7 @@ static void handle_dl_harq(module_id_t mod_id,
add_tail_nr_list(&UE_info->UE_sched_ctrl[UE_id].available_dl_harq, harq_pid);
harq->round = 0;
harq->ndi ^= 1;
} else if (harq->round >= MAX_HARQ_ROUNDS - 1) {
} else if (harq->round >= RC.nrmac[mod_id]->harq_round_max - 1) {
add_tail_nr_list(&UE_info->UE_sched_ctrl[UE_id].available_dl_harq, harq_pid);
harq->round = 0;
harq->ndi ^= 1;
@@ -929,18 +943,24 @@ void tci_handling(module_id_t Mod_idP, int UE_id, frame_t frame, slot_t slot) {
int ssb_index[MAX_NUM_SSB] = {0};
int ssb_rsrp[MAX_NUM_SSB] = {0};
uint8_t idx = 0;
int bwp_id = 1; //TODO
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
const int bwp_id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0;
NR_CellGroupConfig_t *CellGroup = UE_info->CellGroup[UE_id];
NR_BWP_Downlink_t *bwp = CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
NR_BWP_Downlink_t *bwp = bwp_id > 0 ? sched_ctrl->active_bwp : NULL;
//bwp indicator
int n_dl_bwp = CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count;
int n_dl_bwp=0;
if (CellGroup->spCellConfig &&
CellGroup->spCellConfig->spCellConfigDedicated &&
CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList)
n_dl_bwp = CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count;
uint8_t nr_ssbri_cri = 0;
uint8_t nb_of_csi_ssb_report = UE_info->csi_report_template[UE_id][cqi_idx].nb_of_csi_ssb_report;
int better_rsrp_reported = -140-(-0); /*minimum_measured_RSRP_value - minimum_differntail_RSRP_value*///considering the minimum RSRP value as better RSRP initially
uint8_t diff_rsrp_idx = 0;
uint8_t i, j;
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
if (n_dl_bwp < 4)
pdsch_bwp_id = bwp_id;
@@ -1057,7 +1077,10 @@ void tci_handling(module_id_t Mod_idP, int UE_id, frame_t frame, slot_t slot) {
}
}
sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tci_present_inDCI = bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[bwp_id-1]->tci_PresentInDCI;
sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tci_present_inDCI = bwp ?
bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[bwp_id-1]->tci_PresentInDCI :
CellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[0]->tci_PresentInDCI;
//filling pdsch tci state activation deactivation mac ce structure fields
if(sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tci_present_inDCI) {
@@ -1166,9 +1189,6 @@ void evaluate_rsrp_report(NR_UE_info_t *UE_info,
// including ssb rsrp in mac stats
stats->cumul_rsrp += strongest_ssb_rsrp;
stats->num_rsrp_meas++;
LOG_D(MAC,"rsrp_id = %d rsrp = %d\n",
sched_ctrl->CSI_report.ssb_cri_report.RSRP,
get_measured_rsrp(sched_ctrl->CSI_report.ssb_cri_report.RSRP));
}
@@ -1193,7 +1213,7 @@ int evaluate_ri_report(uint8_t *payload,
if ((ri_restriction>>i)&0x01) {
if(count == ri_index) {
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.ri = i;
LOG_I(MAC,"CSI Reported Rank %d\n", i+1);
LOG_D(MAC,"CSI Reported Rank %d\n", i+1);
return i;
}
count++;
@@ -1223,7 +1243,7 @@ void evaluate_cqi_report(uint8_t *payload,
else
AssertFatal(1==0,"CQI Table not present in RRC configuration\n");
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.wb_cqi_1tb = temp_cqi;
LOG_I(MAC,"Wide-band CQI for the first TB %d\n", temp_cqi);
LOG_D(MAC,"Wide-band CQI for the first TB %d\n", temp_cqi);
if (cqi_bitlen > 4) {
temp_cqi = pickandreverse_bits(payload, 4, cumul_bits);
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.wb_cqi_2tb = temp_cqi;
@@ -1248,7 +1268,7 @@ uint8_t evaluate_pmi_report(uint8_t *payload,
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x1 = temp_pmi&((1<<x1_bitlen)-1);
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x2 = (temp_pmi>>x1_bitlen)&((1<<x2_bitlen)-1);
LOG_I(MAC,"PMI Report: X1 %d X2 %d\n",
LOG_D(MAC,"PMI Report: X1 %d X2 %d\n",
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x1,
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x2);
@@ -1267,7 +1287,7 @@ int evaluate_li_report(uint8_t *payload,
if (li_bitlen>0) {
int temp_li = pickandreverse_bits(payload, li_bitlen, cumul_bits);
LOG_I(MAC,"LI %d\n",temp_li);
LOG_D(MAC,"LI %d\n",temp_li);
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.li = temp_li;
}
return li_bitlen;
@@ -1598,20 +1618,11 @@ int nr_acknack_scheduling(int mod_id,
const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels[CC_id].ServingCellConfigCommon;
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
// initializing the values for FDD
int nr_slots_period = n_slots_frame;
int first_ul_slot_tdd = slot + minfbtime;
int first_ul_slot_period = 0;
if(tdd){
nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
first_ul_slot_tdd = tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period);
first_ul_slot_period = tdd->nrofDownlinkSlots;
}
else
// if TDD configuration is not present and the band is not FDD, it means it is a dynamic TDD configuration
AssertFatal(RC.nrmac[mod_id]->common_channels[CC_id].frame_type == FDD,"Dynamic TDD not handled yet\n");
AssertFatal(tdd || RC.nrmac[mod_id]->common_channels[CC_id].frame_type == FDD, "Dynamic TDD not handled yet\n");
const int nr_slots_period = tdd ? n_slots_frame / get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity) : n_slots_frame;
const int next_ul_slot = tdd ? tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period) : slot + minfbtime;
const int first_ul_slot_period = tdd ? tdd->nrofDownlinkSlots : 0;
NR_sched_pucch_t *csi_pucch;
/* for the moment, we consider:
* * only pucch_sched[0] holds HARQ (and SR)
@@ -1648,13 +1659,18 @@ int nr_acknack_scheduling(int mod_id,
pucch->csi_bits);
/* if the currently allocated PUCCH of this UE is full, allocate it */
NR_sched_pucch_t *csi_pucch = &sched_ctrl->sched_pucch[1];
if (pucch->dai_c == 2) {
/* advance the UL slot information in PUCCH by one so we won't schedule in
* the same slot again */
const int f = pucch->frame;
const int s = pucch->ul_slot;
LOG_D(NR_MAC, "In %s: %4d.%2d DAI = 2 pucch currently in %4d.%2d, advancing by 1 slot\n", __FUNCTION__, frame, slot, f, s);
nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id);
if (!(csi_pucch
&& csi_pucch->csi_bits > 0
&& csi_pucch->frame == f
&& csi_pucch->ul_slot == s))
nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id);
memset(pucch, 0, sizeof(*pucch));
pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
if(((s + 1)%nr_slots_period) == 0)
@@ -1662,14 +1678,15 @@ int nr_acknack_scheduling(int mod_id,
else
pucch->ul_slot = (s + 1) % n_slots_frame;
// we assume that only two indices over the array sched_pucch exist
csi_pucch = &sched_ctrl->sched_pucch[1];
// skip the CSI PUCCH if it is present and if in the next frame/slot
// and if we don't multiplex
csi_pucch->r_pucch=-1;
if (csi_pucch->csi_bits > 0
if (csi_pucch
&& csi_pucch->csi_bits > 0
&& csi_pucch->frame == pucch->frame
&& csi_pucch->ul_slot == pucch->ul_slot
&& !csi_pucch->simultaneous_harqcsi) {
LOG_D(NR_MAC,"Cannot multiplex csi_pucch for %d.%d\n",csi_pucch->frame,csi_pucch->ul_slot);
nr_fill_nfapi_pucch(mod_id, frame, slot, csi_pucch, UE_id);
memset(csi_pucch, 0, sizeof(*csi_pucch));
pucch->frame = pucch->ul_slot == n_slots_frame - 1 ? (pucch->frame + 1) % 1024 : pucch->frame;
@@ -1721,7 +1738,11 @@ int nr_acknack_scheduling(int mod_id,
const int s = pucch->ul_slot;
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
LOG_D(NR_MAC, "In %s: %4d.%2d DAI > 0, cannot reach timing for pucch in %4d.%2d, advancing slot by 1 and trying again\n", __FUNCTION__, frame, slot, f, s);
nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id);
if (!(csi_pucch &&
csi_pucch->csi_bits > 0 &&
csi_pucch->frame == f &&
csi_pucch->ul_slot == s))
nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id);
memset(pucch, 0, sizeof(*pucch));
pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
if(((s + 1)%nr_slots_period) == 0)
@@ -1733,6 +1754,14 @@ int nr_acknack_scheduling(int mod_id,
pucch->timing_indicator = i;
pucch->dai_c++;
// if there is CSI in this slot update the HARQ information for that one too
if (csi_pucch &&
csi_pucch->csi_bits > 0 &&
csi_pucch->frame == pucch->frame &&
csi_pucch->ul_slot == pucch->ul_slot) {
csi_pucch->timing_indicator = i;
csi_pucch->dai_c++;
}
// retain old resource indicator, and we are good
LOG_D(NR_MAC, "In %s: %4d.%2d. DAI > 0, pucch allocated for %4d.%2d (index %d)\n", __FUNCTION__, frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator);
return 0;
@@ -1748,8 +1777,8 @@ int nr_acknack_scheduling(int mod_id,
AssertFatal(pucch->sr_flag + pucch->dai_c == 0,
"expected no SR/AckNack for UE %d in %4d.%2d, but has %d/%d for %4d.%2d\n",
UE_id, frame, slot, pucch->sr_flag, pucch->dai_c, pucch->frame, pucch->ul_slot);
const int s = first_ul_slot_tdd;
pucch->frame = (s < n_slots_frame - 1) ? frame : (frame + 1) % 1024;
const int s = next_ul_slot;
pucch->frame = s < n_slots_frame ? frame : (frame + 1) % 1024;
pucch->ul_slot = s % n_slots_frame;
}
@@ -1806,8 +1835,6 @@ int nr_acknack_scheduling(int mod_id,
return -1;
}
// is there already CSI in this slot?
csi_pucch = &sched_ctrl->sched_pucch[1];
if (csi_pucch &&
csi_pucch->csi_bits > 0 &&
csi_pucch->frame == pucch->frame &&
@@ -1817,6 +1844,7 @@ int nr_acknack_scheduling(int mod_id,
// FIXME currently we support at most 11 bits in pucch2 so skip also in that case
if(!csi_pucch->simultaneous_harqcsi
|| ((csi_pucch->csi_bits + csi_pucch->dai_c) >= 11)) {
LOG_D(NR_MAC,"Cannot multiplex csi_pucch %d +csi_pucch->dai_c %d for %d.%d\n",csi_pucch->csi_bits,csi_pucch->dai_c,csi_pucch->frame,csi_pucch->ul_slot);
nr_fill_nfapi_pucch(mod_id, frame, slot, csi_pucch, UE_id);
memset(csi_pucch, 0, sizeof(*csi_pucch));
/* advance the UL slot information in PUCCH by one so we won't schedule in
@@ -1835,6 +1863,11 @@ int nr_acknack_scheduling(int mod_id,
else {
csi_pucch->timing_indicator = ind_found;
csi_pucch->dai_c++;
// keep updating format 2 indicator
pucch->timing_indicator = ind_found; // index in the list of timing indicators
pucch->dai_c++;
LOG_D(NR_MAC,"multiplexing csi_pucch %d +csi_pucch->dai_c %d for %d.%d\n",csi_pucch->csi_bits,csi_pucch->dai_c,csi_pucch->frame,csi_pucch->ul_slot);
return 1;
}
}
@@ -1935,11 +1968,51 @@ void nr_sr_reporting(int Mod_idP, frame_t SFN, sub_frame_t slot)
&& pdu->initial_cyclic_shift == pucch_res->format.choice.format0->initialCyclicShift
&& pdu->nr_of_symbols == pucch_res->format.choice.format0->nrofSymbols
&& pdu->start_symbol_index == pucch_res->format.choice.format0->startingSymbolIndex) {
LOG_D(NR_MAC,"%4d.%2d adding SR_flag 1 to PUCCH nFAPI SR for RNTI %04x\n", SFN, slot, pdu->rnti);
LOG_D(NR_MAC,"%4d.%2d adding SR_flag 1 to PUCCH format 0 nFAPI SR for RNTI %04x\n", SFN, slot, pdu->rnti);
pdu->sr_flag = 1;
nfapi_allocated = true;
break;
}
else if (pdu->rnti == UE_info->rnti[UE_id]
&& pdu->format_type == 2 // does not use NR_PUCCH_Resource__format_PR_format0
&& pdu->nr_of_symbols == pucch_res->format.choice.format2->nrofSymbols
&& pdu->start_symbol_index == pucch_res->format.choice.format2->startingSymbolIndex) {
LOG_D(NR_MAC,"%4d.%2d adding SR_flag 1 to PUCCH format 2 nFAPI SR for RNTI %04x\n", SFN, slot, pdu->rnti);
pdu->sr_flag = 1;
nfapi_allocated = true;
break;
}
else if (pdu->rnti == UE_info->rnti[UE_id]
&& pdu->format_type == 1 // does not use NR_PUCCH_Resource__format_PR_format0
&& pdu->nr_of_symbols == pucch_res->format.choice.format1->nrofSymbols
&& pdu->start_symbol_index == pucch_res->format.choice.format1->startingSymbolIndex) {
LOG_D(NR_MAC,"%4d.%2d adding SR_flag 1 to PUCCH format 1 nFAPI SR for RNTI %04x\n", SFN, slot, pdu->rnti);
pdu->sr_flag = 1;
nfapi_allocated = true;
break;
}
else if (pdu->rnti == UE_info->rnti[UE_id]
&& pdu->format_type == 3 // does not use NR_PUCCH_Resource__format_PR_format0
&& pdu->nr_of_symbols == pucch_res->format.choice.format3->nrofSymbols
&& pdu->start_symbol_index == pucch_res->format.choice.format3->startingSymbolIndex) {
LOG_D(NR_MAC,"%4d.%2d adding SR_flag 1 to PUCCH format 3 nFAPI SR for RNTI %04x\n", SFN, slot, pdu->rnti);
pdu->sr_flag = 1;
nfapi_allocated = true;
break;
}
else if (pdu->rnti == UE_info->rnti[UE_id]
&& pdu->format_type == 4 // does not use NR_PUCCH_Resource__format_PR_format0
&& pdu->nr_of_symbols == pucch_res->format.choice.format4->nrofSymbols
&& pdu->start_symbol_index == pucch_res->format.choice.format4->startingSymbolIndex) {
LOG_D(NR_MAC,"%4d.%2d adding SR_flag 1 to PUCCH format 4 nFAPI SR for RNTI %04x\n", SFN, slot, pdu->rnti);
pdu->sr_flag = 1;
nfapi_allocated = true;
break;
}
}
if (nfapi_allocated) // break scheduling resource loop, continue next UE
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+43 -40
View File
@@ -456,9 +456,8 @@ int nr_process_mac_pdu(module_id_t module_idP,
if (!get_mac_len(pduP, pdu_len, &mac_len, &mac_subheader_len))
return 0;
LOG_D(NR_MAC, "In %s: [UE %d] %d.%d : ULSCH -> UL-%s %d (gNB %d, %d bytes)\n",
__func__,
module_idP,
LOG_D(NR_MAC, "[UE %x] %d.%d: ULSCH -> UL-%s %d (gNB %d, %d bytes)\n",
UE_info->rnti[UE_id],
frameP,
slot,
rx_lcid<4?"DCCH":"DTCH",
@@ -570,7 +569,7 @@ void handle_nr_ul_harq(const int CC_idP,
remove_front_nr_list(&sched_ctrl->feedback_ul_harq);
sched_ctrl->ul_harq_processes[harq_pid].is_waiting = false;
if(sched_ctrl->ul_harq_processes[harq_pid].round >= MAX_HARQ_ROUNDS - 1) {
if(sched_ctrl->ul_harq_processes[harq_pid].round >= gNB_mac->harq_round_max - 1) {
abort_nr_ul_harq(mod_id, UE_id, harq_pid);
} else {
sched_ctrl->ul_harq_processes[harq_pid].round++;
@@ -591,7 +590,7 @@ void handle_nr_ul_harq(const int CC_idP,
harq_pid,
crc_pdu->rnti);
add_tail_nr_list(&sched_ctrl->available_ul_harq, harq_pid);
} else if (harq->round >= MAX_HARQ_ROUNDS - 1) {
} else if (harq->round >= gNB_mac->harq_round_max - 1) {
abort_nr_ul_harq(mod_id, UE_id, harq_pid);
LOG_D(NR_MAC,
"RNTI %04x: Ulharq id %d crc failed in all rounds\n",
@@ -659,11 +658,11 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
UE_scheduling_control->ta_update = timing_advance;
UE_scheduling_control->raw_rssi = rssi;
UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640;
LOG_D(NR_MAC, "[UE %d] PUSCH TPC %d and TA %d\n",UE_id,UE_scheduling_control->tpc0,UE_scheduling_control->ta_update);
LOG_D(NR_MAC, "[UE %d] PUSCH TPC %d(SNRx10 %d) and TA %d\n",UE_id,UE_scheduling_control->tpc0,UE_scheduling_control->pusch_snrx10,UE_scheduling_control->ta_update);
}
else{
LOG_D(NR_MAC,"[UE %d] Detected DTX : increasing UE TX power\n",UE_id);
UE_scheduling_control->tpc0 = 3;
UE_scheduling_control->tpc0 = 1;
}
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
@@ -703,8 +702,8 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
UE_info->mac_stats[UE_id].ulsch_DTX++;
}
if (!get_softmodem_params()->phy_test && UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt >= pusch_failure_thres) {
LOG_W(NR_MAC,"Detected UL Failure on PUSCH after %d PUSCH DTX, stopping scheduling\n",
UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt);
LOG_W(NR_MAC,"%d.%d Detected UL Failure on PUSCH after %d PUSCH DTX, stopping scheduling\n",
frameP,slotP,UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt);
UE_info->UE_sched_ctrl[UE_id].ul_failure = 1;
nr_mac_gNB_rrc_ul_failure(gnb_mod_idP,CC_idP,frameP,slotP,rntiP);
}
@@ -736,20 +735,20 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
continue;
if(no_sig) {
LOG_W(NR_MAC, "Random Access %i failed at state %i (no signal)\n", i, ra->state);
LOG_D(NR_MAC, "Random Access %i failed at state %i (no signal)\n", i, ra->state);
nr_mac_remove_ra_rnti(gnb_mod_idP, ra->rnti);
nr_clear_ra_proc(gnb_mod_idP, CC_idP, frameP, ra);
} else {
// random access pusch with TC-RNTI
if (ra->rnti != current_rnti) {
LOG_W(NR_MAC,
LOG_D(NR_MAC,
"expected TC_RNTI %04x to match current RNTI %04x\n",
ra->rnti,
current_rnti);
if( (frameP==ra->Msg3_frame) && (slotP==ra->Msg3_slot) ) {
LOG_W(NR_MAC, "Random Access %i failed at state %i (TC_RNTI %04x RNTI %04x)\n", i, ra->state,ra->rnti,current_rnti);
LOG_D(NR_MAC, "Random Access %i failed at state %i (TC_RNTI %04x RNTI %04x)\n", i, ra->state,ra->rnti,current_rnti);
nr_mac_remove_ra_rnti(gnb_mod_idP, ra->rnti);
nr_clear_ra_proc(gnb_mod_idP, CC_idP, frameP, ra);
}
@@ -761,7 +760,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
UE_id = add_new_nr_ue(gnb_mod_idP, ra->rnti, ra->CellGroup);
if (UE_id<0) {
LOG_W(NR_MAC, "Random Access %i discarded at state %i (TC_RNTI %04x RNTI %04x): max number of users achieved!\n", i, ra->state,ra->rnti,current_rnti);
LOG_D(NR_MAC, "Random Access %i discarded at state %i (TC_RNTI %04x RNTI %04x): max number of users achieved!\n", i, ra->state,ra->rnti,current_rnti);
nr_mac_remove_ra_rnti(gnb_mod_idP, ra->rnti);
nr_clear_ra_proc(gnb_mod_idP, CC_idP, frameP, ra);
return;
@@ -859,20 +858,20 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
// for CFRA (NSA) do not schedule retransmission of msg3
if (ra->cfra) {
LOG_W(NR_MAC, "Random Access %i failed at state %i (NSA msg3 reception failed)\n", i, ra->state);
LOG_D(NR_MAC, "Random Access %i failed at state %i (NSA msg3 reception failed)\n", i, ra->state);
nr_mac_remove_ra_rnti(gnb_mod_idP, ra->rnti);
nr_clear_ra_proc(gnb_mod_idP, CC_idP, frameP, ra);
return;
}
if (ra->msg3_round >= MAX_HARQ_ROUNDS - 1) {
LOG_W(NR_MAC, "Random Access %i failed at state %i (Reached msg3 max harq rounds)\n", i, ra->state);
LOG_D(NR_MAC, "Random Access %i failed at state %i (Reached msg3 max harq rounds)\n", i, ra->state);
nr_mac_remove_ra_rnti(gnb_mod_idP, ra->rnti);
nr_clear_ra_proc(gnb_mod_idP, CC_idP, frameP, ra);
return;
}
LOG_W(NR_MAC, "Random Access %i Msg3 CRC did not pass)\n", i);
LOG_D(NR_MAC, "Random Access %i Msg3 CRC did not pass)\n", i);
ra->msg3_round++;
ra->state = Msg3_retransmission;
}
@@ -912,17 +911,22 @@ bool nr_UE_is_to_be_scheduled(module_id_t mod_id, int CC_id, int UE_id, frame_t
const struct gNB_MAC_INST_s *nrmac = RC.nrmac[mod_id];
const NR_UE_sched_ctrl_t *sched_ctrl = &nrmac->UE_info.UE_sched_ctrl[UE_id];
const int last_ul_sched = sched_ctrl->last_ul_frame * n + sched_ctrl->last_ul_slot;
const NR_TDD_UL_DL_Pattern_t *tdd =
scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
int num_slots_per_period;
int last_ul_slot,last_ul_sched;
int tdd_period_len[8] = {500,625,1000,1250,2000,2500,5000,10000};
if (tdd)
if (tdd) { // Force the default transmission in a full slot as early as possible in the UL portion of TDD period (last_ul_slot)
num_slots_per_period = n*tdd_period_len[tdd->dl_UL_TransmissionPeriodicity]/10000;
else
last_ul_slot=1+tdd->nrofDownlinkSlots;
}
else {
num_slots_per_period = n;
last_ul_slot = sched_ctrl->last_ul_slot;
}
last_ul_sched = sched_ctrl->last_ul_frame * n + last_ul_slot;
const int diff = (now - last_ul_sched + 1024 * n) % (1024 * n);
/* UE is to be scheduled if
* (1) we think the UE has more bytes awaiting than what we scheduled
@@ -1000,8 +1004,8 @@ bool allocate_ul_retransmission(module_id_t module_id,
}
/* Check the resource is enough for retransmission */
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
rbStart++;
if (rbStart + retInfo->rbSize > bwpSize) {
LOG_W(NR_MAC, "cannot allocate retransmission of UE %d/RNTI %04x: no resources (rbStart %d, retInfo->rbSize %d, bwpSize %d\n", UE_id, UE_info->rnti[UE_id], rbStart, retInfo->rbSize, bwpSize);
@@ -1021,12 +1025,11 @@ bool allocate_ul_retransmission(module_id_t module_id,
&temp_ps);
/* the retransmission will use a different time domain allocation, check
* that we have enough resources */
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols)))
const uint16_t slbitmap = SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols);
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
rbStart++;
int rbSize = 0;
while (rbStart + rbSize < bwpSize &&
(rballoc_mask[rbStart + rbSize]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols)))
while (rbStart + rbSize < bwpSize && (rballoc_mask[rbStart + rbSize] & slbitmap) == slbitmap)
rbSize++;
uint32_t new_tbs;
uint16_t new_rbSize;
@@ -1141,7 +1144,7 @@ void pf_ul(module_id_t module_id,
NR_ServingCellConfigCommon_t *scc = nrmac->common_channels[CC_id].ServingCellConfigCommon;
NR_UE_info_t *UE_info = &nrmac->UE_info;
const NR_SIB1_t *sib1 = RC.nrmac[module_id]->common_channels[0].sib1 ? RC.nrmac[module_id]->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL;
const int min_rb = 5;
const int min_rb = nrmac->min_grant_prb;
float coeff_ue[MAX_MOBILES_PER_GNB];
// UEs that could be scheduled
int ue_array[MAX_MOBILES_PER_GNB];
@@ -1257,8 +1260,8 @@ void pf_ul(module_id_t module_id,
}
LOG_D(NR_MAC,"Looking for min_rb %d RBs, starting at %d\n", min_rb, rbStart);
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
rbStart++;
if (rbStart + min_rb >= bwpSize) {
LOG_W(NR_MAC, "cannot allocate continuous UL data for UE %d/RNTI %04x: no resources (rbStart %d, min_rb %d, bwpSize %d\n",
@@ -1274,7 +1277,7 @@ void pf_ul(module_id_t module_id,
sched_ctrl->aggregation_level);
NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
sched_pusch->mcs = 9;
sched_pusch->mcs = nrmac->min_grant_mcs;
update_ul_ue_R_Qm(sched_pusch, ps);
sched_pusch->rbStart = rbStart;
sched_pusch->rbSize = min_rb;
@@ -1291,7 +1294,7 @@ void pf_ul(module_id_t module_id,
/* Mark the corresponding RBs as used */
n_rb_sched -= sched_pusch->rbSize;
for (int rb = 0; rb < sched_ctrl->sched_pusch.rbSize; rb++)
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] ^= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] ^= slbitmap;
continue;
}
@@ -1300,7 +1303,7 @@ void pf_ul(module_id_t module_id,
add_tail_nr_list(&UE_sched, UE_id);
/* Calculate coefficient*/
sched_pusch->mcs = 9;
sched_pusch->mcs = nrmac->min_grant_mcs;
const uint32_t tbs = ul_pf_tbs[ps->mcs_table][sched_pusch->mcs];
coeff_ue[UE_id] = (float) tbs / ul_thr_ue[UE_id];
LOG_D(NR_MAC,"b %d, ul_thr_ue[%d] %f, tbs %d, coeff_ue[%d] %f\n",
@@ -1393,13 +1396,12 @@ void pf_ul(module_id_t module_id,
}
update_ul_ue_R_Qm(sched_pusch, ps);
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
rbStart++;
sched_pusch->rbStart = rbStart;
uint16_t max_rbSize = 1;
while (rbStart + max_rbSize < bwpSize &&
(rballoc_mask[rbStart + max_rbSize]&&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
while (rbStart + max_rbSize < bwpSize && (rballoc_mask[rbStart + max_rbSize] & slbitmap) == slbitmap)
max_rbSize++;
if (rbStart + min_rb >= bwpSize) {
@@ -1413,6 +1415,7 @@ void pf_ul(module_id_t module_id,
const int B = cmax(sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes, 0);
uint16_t rbSize = 0;
uint32_t TBS = 0;
nr_find_nb_rb(sched_pusch->Qm,
sched_pusch->R,
1, // layers
@@ -1425,8 +1428,8 @@ void pf_ul(module_id_t module_id,
&rbSize);
sched_pusch->rbSize = rbSize;
sched_pusch->tb_size = TBS;
LOG_D(NR_MAC,"rbSize %d, TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n",
rbSize, sched_pusch->tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, B,sched_ctrl->cce_index,ps->num_dmrs_symb,ps->N_PRB_DMRS);
LOG_D(NR_MAC,"rbSize %d (max_rbSize %d), TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n",
rbSize, max_rbSize,sched_pusch->tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, B,sched_ctrl->cce_index,ps->num_dmrs_symb,ps->N_PRB_DMRS);
/* Mark the corresponding RBs as used */
@@ -1439,7 +1442,7 @@ void pf_ul(module_id_t module_id,
n_rb_sched -= sched_pusch->rbSize;
for (int rb = 0; rb < sched_ctrl->sched_pusch.rbSize; rb++)
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] ^= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] ^= slbitmap;
}
}
@@ -1473,7 +1476,7 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
if (tda < 0)
return false;
int K2 = get_K2(scc, scc_sib1, sched_ctrl->active_ubwp, tda, mu);
const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]);
const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) % 1024;
const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
if (!is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot))
@@ -1734,7 +1737,6 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes,
sched_ctrl->tpc0);
/* PUSCH in a later slot, but corresponding DCI now! */
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_pusch->slot];
AssertFatal(future_ul_tti_req->SFN == sched_pusch->frame
@@ -1939,3 +1941,4 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
memset(sched_pusch, 0, sizeof(*sched_pusch));
}
}
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+1 -1
View File
@@ -235,7 +235,7 @@ void get_pdsch_to_harq_feedback(int Mod_idP,
void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
nr_scs_e scs_common,
nr_scs_e pdcch_scs,
nr_frequency_range_e freq_range,
frequency_range_t freq_range,
uint8_t rmsi_pdcch_config,
uint8_t ssb_idx,
uint8_t k_ssb,
openair2/LAYER2/NR_MAC_gNB/main.c
+6
View File
@@ -93,6 +93,12 @@ void dump_mac_stats(gNB_MAC_INST *gNB, char *output, int strlen, bool reset_rsrp
sched_ctrl->pcmax,
avg_rsrp,
stats->num_rsrp_meas);
stroff+=sprintf(output+stroff,"UE %d: CQI %d, RI %d, PMI (%d,%d)\n",
UE_id,
UE_info->UE_sched_ctrl[UE_id].CSI_report.cri_ri_li_pmi_cqi_report.wb_cqi_1tb,
UE_info->UE_sched_ctrl[UE_id].CSI_report.cri_ri_li_pmi_cqi_report.ri+1,
UE_info->UE_sched_ctrl[UE_id].CSI_report.cri_ri_li_pmi_cqi_report.pmi_x1,
UE_info->UE_sched_ctrl[UE_id].CSI_report.cri_ri_li_pmi_cqi_report.pmi_x2);
stroff+=sprintf(output+stroff,"UE %d: dlsch_rounds %"PRIu64"/%"PRIu64"/%"PRIu64"/%"PRIu64", dlsch_errors %"PRIu64", pucch0_DTX %d, BLER %.5f MCS %d\n",
UE_id,
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+3
View File
@@ -840,6 +840,9 @@ typedef struct gNB_MAC_INST_s {
double dl_bler_target_lower;
double dl_rd2_bler_threshold;
uint8_t dl_max_mcs;
uint8_t harq_round_max;
uint8_t min_grant_prb;
uint8_t min_grant_mcs;
} gNB_MAC_INST;
#endif /*__LAYER2_NR_MAC_GNB_H__ */
openair2/LAYER2/nr_pdcp/nr_pdcp_entity.c
+1 -1
View File
@@ -113,7 +113,7 @@ static void nr_pdcp_entity_recv_pdu(nr_pdcp_entity_t *entity,
if (rcvd_count < entity->rx_deliv
|| nr_pdcp_sdu_in_list(entity->rx_list, rcvd_count)) {
LOG_W(PDCP, "discard NR PDU rcvd_count=%d\n", rcvd_count);
LOG_W(PDCP, "discard NR PDU rcvd_count=%d, entity->rx_deliv %d,sdu_in_list %d\n", rcvd_count,entity->rx_deliv,nr_pdcp_sdu_in_list(entity->rx_list,rcvd_count));
return;
}
openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c
+1 -2
View File
@@ -703,7 +703,7 @@ rb_found:
req->offset = GTPU_HEADER_OVERHEAD_MAX;
req->rnti = ue->rnti;
req->pdusession_id = rb_id;
LOG_D(PDCP, "%s() (drb %d) sending message to gtp size %d\n",
LOG_I(PDCP, "%s() (drb %d) sending message to gtp size %d\n",
__func__, rb_id, size);
extern instance_t CUuniqInstance;
itti_send_msg_to_task(TASK_GTPV1_U, CUuniqInstance, message_p);
@@ -711,7 +711,6 @@ rb_found:
memblock = get_free_mem_block(size, __FUNCTION__);
memcpy(memblock->data, buf, size);
LOG_D(PDCP, "%s(): (srb %d) calling rlc_data_req size %d\n", __func__, rb_id, size);
//for (i = 0; i < size; i++) printf(" %2.2x", (unsigned char)memblock->data[i]);
//printf("\n");
openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c
-1
View File
@@ -385,7 +385,6 @@ rlc_op_status_t rlc_data_req (const protocol_ctxt_t *const ctxt_pP,
rb->recv_sdu(rb, (char *)sdu_pP->data, sdu_sizeP, muiP);
} else {
LOG_E(RLC, "%s:%d:%s: fatal: SDU sent to unknown RB\n", __FILE__, __LINE__, __FUNCTION__);
exit(1);
}
nr_rlc_manager_unlock(nr_rlc_ue_manager);