diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index b858945018..291c16b1fa 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -216,6 +216,7 @@ void nr_dlsim_preprocessor(module_id_t module_id, frame_t frame, slot_t slot) NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch; sched_pdsch->rbStart = g_rbStart; sched_pdsch->rbSize = g_rbSize; + sched_pdsch->bwp_info = get_pdsch_bwp_start_size(RC.nrmac[module_id], UE_info); sched_pdsch->mcs = g_mcsIndex; sched_pdsch->nrOfLayers = g_nrOfLayers; sched_pdsch->pm_index = g_pmi; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index e398da1eaf..4a723263dc 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -46,16 +46,6 @@ #include -// forward declaration of functions used in this file -static void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, - NR_ServingCellConfigCommon_t *scc, - NR_UE_info_t *UE, - int startSymbolAndLength, - int scs, - int bwp_size, - int bwp_start, - int mappingtype, - int fh); static void nr_fill_rar(uint8_t Mod_idP, NR_UE_info_t *UE, uint8_t *dlsch_buffer, nfapi_nr_pusch_pdu_t *pusch_pdu); static const float ssb_per_rach_occasion[8] = {0.125, 0.25, 0.5, 1, 2, 4, 8}; @@ -807,11 +797,18 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP, NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP; NR_UE_ServingCell_Info_t *sc_info = &UE->sc_info; + NR_SearchSpace_t *ss = UE->UE_sched_ctrl.search_space; + NR_ControlResourceSet_t *coreset = UE->UE_sched_ctrl.coreset; + AssertFatal(coreset, "Coreset cannot be null for RA-Msg3 retransmission\n"); + const int coresetid = coreset->controlResourceSetId; + NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, + coresetid, + NR_SearchSpace__searchSpaceType_PR_common, + TYPE_TC_RNTI_, + ra->Msg3_tda_id); - NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = ul_bwp->tdaList_Common; - int mu = ul_bwp->scs; int slots_frame = nr_mac->frame_structure.numb_slots_frame; - uint16_t K2 = *pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->k2 + get_NTN_Koffset(scc); + uint16_t K2 = tda_info.k2 + get_NTN_Koffset(scc); const int sched_frame = (frame + (slot + K2) / slots_frame) % MAX_FRAME_NUMBER; const int sched_slot = (slot + K2) % slots_frame; @@ -824,30 +821,54 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP, reset_beam_status(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame, beam_ul.new_beam); return; } - int fh = 0; - int startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->startSymbolAndLength; - int StartSymbolIndex, NrOfSymbols; - SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols); - int mappingtype = pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType; - int buffer_index = ul_buffer_index(sched_frame, sched_slot, slots_frame, nr_mac->vrb_map_UL_size); uint16_t *vrb_map_UL = &nr_mac->common_channels[CC_id].vrb_map_UL[beam_ul.idx][buffer_index * MAX_BWP_SIZE]; - const int BWPSize = sc_info->initial_ul_BWPSize; - const int BWPStart = sc_info->initial_ul_BWPStart; + NR_pusch_dmrs_t dmrs_info = get_ul_dmrs_params(scc, ul_bwp, &tda_info, 1); + int num_dmrs_symb = 0; + for(int i = tda_info.startSymbolIndex; i < tda_info.startSymbolIndex + tda_info.nrOfSymbols; i++) + num_dmrs_symb += (dmrs_info.ul_dmrs_symb_pos >> i) & 1; + int TBS = 0, mcsindex = 0, R = 0, Qm = 0; + while(TBS < 7) { // TBS for msg3 is 7 bytes (except for RRCResumeRequest1 currently not implemented) + mcsindex++; + AssertFatal(mcsindex <= 28, "Exceeding MCS limit for Msg3\n"); + R = nr_get_code_rate_ul(mcsindex, ul_bwp->mcs_table); + Qm = nr_get_Qm_ul(mcsindex, ul_bwp->mcs_table); + TBS = nr_compute_tbs(Qm, + R, + ra->msg3_nb_rb, + tda_info.nrOfSymbols, + num_dmrs_symb * 12, // nb dmrs set for no data in dmrs symbol + 0, //nb_rb_oh + 0, // to verify tb scaling + 1) >> 3; + } + + NR_sched_pusch_t sched_pusch = { + .bwp_info = get_pusch_bwp_start_size(UE), + .tb_size = TBS, + .rbSize = ra->msg3_nb_rb, + .R = R, + .Qm = Qm, + .mcs = mcsindex, + .nrOfLayers = 1, + .tda_info = tda_info, + .dmrs_info = dmrs_info, + }; int rbStart = 0; - for (int i = 0; (i < ra->msg3_nb_rb) && (rbStart <= (BWPSize - ra->msg3_nb_rb)); i++) { - if (vrb_map_UL[rbStart + BWPStart + i]&SL_to_bitmap(StartSymbolIndex, NrOfSymbols)) { + for (int i = 0; (i < ra->msg3_nb_rb) && (rbStart <= (sched_pusch.bwp_info.bwpSize - ra->msg3_nb_rb)); i++) { + if (vrb_map_UL[rbStart + sched_pusch.bwp_info.bwpStart + i] & SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)) { rbStart += i; i = 0; } } - if (rbStart > (BWPSize - ra->msg3_nb_rb)) { + if (rbStart > (sched_pusch.bwp_info.bwpSize - ra->msg3_nb_rb)) { // cannot find free vrb_map for msg3 retransmission in this slot return; } + sched_pusch.rbStart = rbStart; LOG_I(NR_MAC, "%4d%2d: RA RNTI %04x CC_id %d Scheduling retransmission of Msg3 in (%d,%d)\n", frame, @@ -871,18 +892,18 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP, "Invalid future_ul_tti_req->n_pdus %d\n", future_ul_tti_req->n_pdus); future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); - nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu; - memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t)); - - fill_msg3_pusch_pdu(pusch_pdu, scc, UE, startSymbolAndLength, mu, BWPSize, BWPStart, mappingtype, fh); + nfapi_nr_pusch_pdu_t *pusch_pdu = prepare_pusch_pdu(future_ul_tti_req, + UE, + scc, + &sched_pusch, + get_transformPrecoding(ul_bwp, NR_UL_DCI_FORMAT_0_0, 0), + 0, + ra->msg3_round, + ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping, + UE->rnti); future_ul_tti_req->n_pdus += 1; // generation of DCI 0_0 to schedule msg3 retransmission - NR_SearchSpace_t *ss = UE->UE_sched_ctrl.search_space; - NR_ControlResourceSet_t *coreset = UE->UE_sched_ctrl.coreset; - AssertFatal(coreset, "Coreset cannot be null for RA-Msg3 retransmission\n"); - - const int coresetid = coreset->controlResourceSetId; nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][coresetid]; if (!pdcch_pdu_rel15) { nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &ul_dci_req->ul_dci_pdu_list[ul_dci_req->numPdus]; @@ -911,24 +932,17 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP, } // Fill PDCCH DL DCI PDU - nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci]; + nfapi_nr_dl_dci_pdu_t *dci_pdu = prepare_dci_pdu(pdcch_pdu_rel15, + scc, + ss, + coreset, + aggregation_level, + CCEIndex, + UE->UE_beam_index, + UE->rnti); pdcch_pdu_rel15->numDlDci++; - dci_pdu->RNTI = UE->rnti; - dci_pdu->ScramblingId = *scc->physCellId; - dci_pdu->ScramblingRNTI = 0; - dci_pdu->AggregationLevel = aggregation_level; - dci_pdu->CceIndex = CCEIndex; - dci_pdu->beta_PDCCH_1_0 = 0; - dci_pdu->powerControlOffsetSS = 1; - - dci_pdu->precodingAndBeamforming.num_prgs = 0; - dci_pdu->precodingAndBeamforming.prg_size = 0; - dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 1; - dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0; - dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index; - - dci_pdu_rel15_t uldci_payload={0}; + dci_pdu_rel15_t uldci_payload = {0}; config_uldci(sc_info, pusch_pdu, &uldci_payload, @@ -966,7 +980,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP, beam_dci.idx); for (int rb = 0; rb < ra->msg3_nb_rb; rb++) { - vrb_map_UL[rbStart + BWPStart + rb] |= SL_to_bitmap(StartSymbolIndex, NrOfSymbols); + vrb_map_UL[rbStart + sched_pusch.bwp_info.bwpStart + rb] |= SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols); } // Restart RA contention resolution timer in Msg3 retransmission slot (current slot + K2) @@ -1107,102 +1121,6 @@ static bool nr_get_Msg3alloc(gNB_MAC_INST *mac, int CC_id, int current_slot, fra return true; } -static void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, - NR_ServingCellConfigCommon_t *scc, - NR_UE_info_t *UE, - int startSymbolAndLength, - int scs, - int bwp_size, - int bwp_start, - int mappingtype, - int fh) -{ - int start_symbol_index,nr_of_symbols; - SLIV2SL(startSymbolAndLength, &start_symbol_index, &nr_of_symbols); - int mcsindex = -1; // init value - const NR_RA_t *ra = UE->ra; - pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; - pusch_pdu->rnti = UE->rnti; - pusch_pdu->handle = 0; - pusch_pdu->bwp_start = bwp_start; - pusch_pdu->bwp_size = bwp_size; - pusch_pdu->subcarrier_spacing = scs; - pusch_pdu->cyclic_prefix = 0; - pusch_pdu->mcs_table = 0; - if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder == NULL) - pusch_pdu->transform_precoding = 1; // disabled - else { - pusch_pdu->transform_precoding = 0; // enabled - pusch_pdu->dfts_ofdm.low_papr_group_number = *scc->physCellId % 30; - pusch_pdu->dfts_ofdm.low_papr_sequence_number = 0; - if (scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->groupHoppingEnabledTransformPrecoding) - AssertFatal(1==0,"Hopping mode is not supported in transform precoding\n"); - } - pusch_pdu->data_scrambling_id = *scc->physCellId; - pusch_pdu->nrOfLayers = 1; - pusch_pdu->ul_dmrs_symb_pos = get_l_prime(nr_of_symbols,mappingtype,pusch_dmrs_pos2,pusch_len1,start_symbol_index, scc->dmrs_TypeA_Position); - LOG_D(NR_MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d, ul_dmrs_symb_pos:%x\n", start_symbol_index, nr_of_symbols, mappingtype, pusch_pdu->ul_dmrs_symb_pos); - pusch_pdu->dmrs_config_type = 0; - pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; //If provided and the PUSCH is not a msg3 PUSCH, otherwise, L2 should set this to physical cell id. - pusch_pdu->pusch_identity = *scc->physCellId; //If provided and the PUSCH is not a msg3 PUSCH, otherwise, L2 should set this to physical cell id. - pusch_pdu->scid = 0; //DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]. Should match what is sent in DCI 0_1, otherwise set to 0. - pusch_pdu->dmrs_ports = 1; // 6.2.2 in 38.214 only port 0 to be used - pusch_pdu->num_dmrs_cdm_grps_no_data = nr_of_symbols <= 2 ? 1 : 2; // no data in dmrs symbols as in 6.2.2 in 38.214 - pusch_pdu->resource_alloc = 1; //type 1 - memset(pusch_pdu->rb_bitmap, 0, sizeof(pusch_pdu->rb_bitmap)); - pusch_pdu->rb_start = ra->msg3_first_rb; - if (ra->msg3_nb_rb > pusch_pdu->bwp_size) - AssertFatal(false, "MSG3 allocated number of RBs exceed the BWP size\n"); - else - pusch_pdu->rb_size = ra->msg3_nb_rb; - pusch_pdu->vrb_to_prb_mapping = 0; - - pusch_pdu->frequency_hopping = fh; - //pusch_pdu->tx_direct_current_location; - //The uplink Tx Direct Current location for the carrier. Only values in the value range of this field between 0 and 3299, - //which indicate the subcarrier index within the carrier corresponding 1o the numerology of the corresponding uplink BWP and value 3300, - //which indicates "Outside the carrier" and value 3301, which indicates "Undetermined position within the carrier" are used. [TS38.331, UplinkTxDirectCurrentBWP IE] - pusch_pdu->uplink_frequency_shift_7p5khz = 0; - //Resource Allocation in time domain - pusch_pdu->start_symbol_index = start_symbol_index; - pusch_pdu->nr_of_symbols = nr_of_symbols; - //Optional Data only included if indicated in pduBitmap - pusch_pdu->pusch_data.rv_index = nr_get_rv(ra->msg3_round % 4); - pusch_pdu->pusch_data.harq_process_id = 0; - pusch_pdu->pusch_data.new_data_indicator = (ra->msg3_round == 0) ? 1 : 0;; - pusch_pdu->pusch_data.num_cb = 0; - - // Beamforming - pusch_pdu->beamforming.num_prgs = 0; - pusch_pdu->beamforming.prg_size = 0; // bwp_size; - pusch_pdu->beamforming.dig_bf_interface = 1; - pusch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index; - - int num_dmrs_symb = 0; - for(int i = start_symbol_index; i < start_symbol_index+nr_of_symbols; i++) - num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1; - int TBS = 0; - while(TBS<7) { // TBS for msg3 is 7 bytes (except for RRCResumeRequest1 currently not implemented) - mcsindex++; - AssertFatal(mcsindex <= 28, "Exceeding MCS limit for Msg3\n"); - int R = nr_get_code_rate_ul(mcsindex,pusch_pdu->mcs_table); - pusch_pdu->target_code_rate = R; - pusch_pdu->qam_mod_order = nr_get_Qm_ul(mcsindex,pusch_pdu->mcs_table); - TBS = nr_compute_tbs(pusch_pdu->qam_mod_order, - R, - pusch_pdu->rb_size, - pusch_pdu->nr_of_symbols, - num_dmrs_symb*12, // nb dmrs set for no data in dmrs symbol - 0, //nb_rb_oh - 0, // to verify tb scaling - pusch_pdu->nrOfLayers)>>3; - - pusch_pdu->mcs_index = mcsindex; - pusch_pdu->pusch_data.tb_size = TBS; - pusch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(TBS<<3,R); - } -} - static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, slot_t slotP, NR_UE_info_t *UE, uint8_t *RAR_pdu) { gNB_MAC_INST *mac = RC.nrmac[module_idP]; @@ -1241,13 +1159,41 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, slot_ ra->Msg3_slot); future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); - nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu; - memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t)); - const int ibwp_size = sc_info->initial_ul_BWPSize; - const int fh = (ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping) ? 1 : 0; - const int startSymbolAndLength = ul_bwp->tdaList_Common->list.array[ra->Msg3_tda_id]->startSymbolAndLength; - const int mappingtype = ul_bwp->tdaList_Common->list.array[ra->Msg3_tda_id]->mappingType; + NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, 0, NR_SearchSpace__searchSpaceType_PR_common, TYPE_TC_RNTI_, ra->Msg3_tda_id); + NR_pusch_dmrs_t dmrs_info = get_ul_dmrs_params(scc, ul_bwp, &tda_info, 1); + int num_dmrs_symb = 0; + for(int i = tda_info.startSymbolIndex; i < tda_info.startSymbolIndex + tda_info.nrOfSymbols; i++) + num_dmrs_symb += (dmrs_info.ul_dmrs_symb_pos >> i) & 1; + int TBS = 0, mcsindex = 0, R = 0, Qm = 0; + while(TBS < 7) { // TBS for msg3 is 7 bytes (except for RRCResumeRequest1 currently not implemented) + mcsindex++; + AssertFatal(mcsindex <= 28, "Exceeding MCS limit for Msg3\n"); + R = nr_get_code_rate_ul(mcsindex, ul_bwp->mcs_table); + Qm = nr_get_Qm_ul(mcsindex, ul_bwp->mcs_table); + TBS = nr_compute_tbs(Qm, + R, + ra->msg3_nb_rb, + tda_info.nrOfSymbols, + num_dmrs_symb * 12, // nb dmrs set for no data in dmrs symbol + 0, //nb_rb_oh + 0, // to verify tb scaling + 1) >> 3; + } + + NR_sched_pusch_t sched_pusch = { + .bwp_info.bwpSize = sc_info->initial_ul_BWPSize, + .bwp_info.bwpStart = ra->msg3_bwp_start, + .rbSize = ra->msg3_nb_rb, + .rbStart = ra->msg3_first_rb, + .tb_size = TBS, + .R = R, + .Qm = Qm, + .mcs = mcsindex, + .nrOfLayers = 1, + .tda_info = tda_info, + .dmrs_info = dmrs_info + }; LOG_D(NR_MAC, "UE %04x: %d.%d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d)\n", @@ -1260,7 +1206,15 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, slot_ ra->msg3_first_rb, ra->msg3_round); - fill_msg3_pusch_pdu(pusch_pdu, scc, UE, startSymbolAndLength, ul_bwp->scs, ibwp_size, ra->msg3_bwp_start, mappingtype, fh); + nfapi_nr_pusch_pdu_t *pusch_pdu = prepare_pusch_pdu(future_ul_tti_req, + UE, + scc, + &sched_pusch, + get_transformPrecoding(ul_bwp, NR_UL_DCI_FORMAT_0_0, 0), + 0, + 0, + ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping, + UE->rnti); future_ul_tti_req->n_pdus += 1; // calling function to fill rar message @@ -1342,29 +1296,19 @@ static bool msg2_in_response_window(int rach_frame, static void prepare_dl_pdus(gNB_MAC_INST *nr_mac, NR_UE_info_t *UE, + NR_sched_pdsch_t *sched_pdsch, nfapi_nr_dl_tti_request_body_t *dl_req, NR_sched_pucch_t *pucch, - NR_pdsch_dmrs_t dmrs_info, - NR_tda_info_t tda, nr_rnti_type_t rnti_type, int aggregation_level, int CCEIndex, - int tb_size, int ndi, - int tpc, - int delta_PRI, int current_harq_pid, - int time_domain_assignment, int CC_id, int rnti, int round, - int mcsIndex, int tb_scaling, - int pduindex, - long BWPStart, - long BWPSize, - int rbStart, - int rbSize) + int pduindex) { // look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially // important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them @@ -1388,90 +1332,43 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac, dl_tti_pdsch_pdu->PDUType = NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE; dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdsch_pdu)); dl_req->nPDUs += 1; - nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15; NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id]; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; NR_UE_DL_BWP_t *dl_bwp = &UE->current_DL_BWP; - int mcsTableIdx = dl_bwp->mcsTableIdx; - - pdsch_pdu_rel15->pduBitmap = 0; - pdsch_pdu_rel15->rnti = rnti; - pdsch_pdu_rel15->pduIndex = pduindex; - pdsch_pdu_rel15->BWPSize = BWPSize; - pdsch_pdu_rel15->BWPStart = BWPStart; - pdsch_pdu_rel15->SubcarrierSpacing = dl_bwp->scs; - pdsch_pdu_rel15->CyclicPrefix = 0; - pdsch_pdu_rel15->NrOfCodewords = 1; - int R = nr_get_code_rate_dl(mcsIndex, mcsTableIdx); - pdsch_pdu_rel15->targetCodeRate[0] = R; - int Qm = nr_get_Qm_dl(mcsIndex, mcsTableIdx); - pdsch_pdu_rel15->qamModOrder[0] = Qm; - pdsch_pdu_rel15->TBSize[0] = tb_size; - pdsch_pdu_rel15->mcsIndex[0] = mcsIndex; - pdsch_pdu_rel15->mcsTable[0] = mcsTableIdx; - pdsch_pdu_rel15->rvIndex[0] = nr_get_rv(round % 4); - pdsch_pdu_rel15->dataScramblingId = *scc->physCellId; - pdsch_pdu_rel15->nrOfLayers = 1; - pdsch_pdu_rel15->transmissionScheme = 0; - pdsch_pdu_rel15->refPoint = 0; - pdsch_pdu_rel15->dmrsConfigType = dmrs_info.dmrsConfigType; - pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId; - pdsch_pdu_rel15->SCID = 0; - pdsch_pdu_rel15->numDmrsCdmGrpsNoData = dmrs_info.numDmrsCdmGrpsNoData; - pdsch_pdu_rel15->dmrsPorts = 1; - pdsch_pdu_rel15->resourceAlloc = 1; - pdsch_pdu_rel15->rbStart = rbStart; - pdsch_pdu_rel15->rbSize = rbSize; - pdsch_pdu_rel15->VRBtoPRBMapping = 0; - pdsch_pdu_rel15->StartSymbolIndex = tda.startSymbolIndex; - pdsch_pdu_rel15->NrOfSymbols = tda.nrOfSymbols; - pdsch_pdu_rel15->dlDmrsSymbPos = dmrs_info.dl_dmrs_symb_pos; - pdsch_pdu_rel15->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(mcsTableIdx, UE->sc_info.dl_bw_tbslbrm, 1); - pdsch_pdu_rel15->maintenance_parms_v3.ldpcBaseGraph = get_BG(tb_size << 3, R); - - pdsch_pdu_rel15->precodingAndBeamforming.num_prgs = 1; - pdsch_pdu_rel15->precodingAndBeamforming.prg_size = 275; - pdsch_pdu_rel15->precodingAndBeamforming.dig_bf_interfaces = 1; - pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].pm_idx = 0; - pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index; + nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = prepare_pdsch_pdu(dl_tti_pdsch_pdu, + nr_mac, + UE, + sched_pdsch, + dl_bwp->pdsch_Config, + false, + round, + rnti, + UE->UE_beam_index, + 1, + pduindex); /* Fill PDCCH DL DCI PDU */ - nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci]; + nfapi_nr_dl_dci_pdu_t *dci_pdu = prepare_dci_pdu(pdcch_pdu_rel15, + scc, + sched_ctrl->search_space, + coreset, + aggregation_level, + CCEIndex, + UE->UE_beam_index, + rnti); pdcch_pdu_rel15->numDlDci++; - dci_pdu->RNTI = rnti; - dci_pdu->ScramblingId = *scc->physCellId; - dci_pdu->ScramblingRNTI = 0; - dci_pdu->AggregationLevel = aggregation_level; - dci_pdu->CceIndex = CCEIndex; - dci_pdu->beta_PDCCH_1_0 = 0; - dci_pdu->powerControlOffsetSS = 1; - dci_pdu->precodingAndBeamforming.num_prgs = 0; - dci_pdu->precodingAndBeamforming.prg_size = 0; - dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 1; - dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0; - dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index; - - dci_pdu_rel15_t dci_payload; - dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize, - pdsch_pdu_rel15->rbStart, - BWPSize); - - dci_payload.time_domain_assignment.val = time_domain_assignment; - dci_payload.vrb_to_prb_mapping.val = 0; - dci_payload.mcs = pdsch_pdu_rel15->mcsIndex[0]; - dci_payload.tb_scaling = tb_scaling; - if (rnti_type == TYPE_TC_RNTI_) { - dci_payload.format_indicator = 1; - dci_payload.rv = pdsch_pdu_rel15->rvIndex[0]; - dci_payload.harq_pid.val = current_harq_pid; - dci_payload.ndi = ndi; - dci_payload.dai[0].val = pucch ? (pucch->dai_c-1) & 3 : 0; - dci_payload.tpc = tpc; // TPC for PUCCH: table 7.2.1-1 in 38.213 - dci_payload.pucch_resource_indicator = delta_PRI; // This is delta_PRI from 9.2.1 in 38.213 - dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch ? pucch->timing_indicator : 0; - } + dci_pdu_rel15_t dci_payload = prepare_dci_dl_payload(nr_mac, + UE, + rnti_type, + sched_ctrl->search_space->searchSpaceType->present, + pdsch_pdu_rel15, + sched_pdsch, + pucch, + current_harq_pid, + tb_scaling, + false); LOG_D(NR_MAC, "DCI 1_0 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d pucchres %d harqtiming %d\n", @@ -1489,7 +1386,7 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac, LOG_D(NR_MAC, "DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d " "n_symb %d, BWPsize %d\n", - pdcch_pdu_rel15->dci_pdu[0].RNTI, + dci_pdu->RNTI, rnti_type, NR_DL_DCI_FORMAT_1_0, (unsigned long long)pdcch_pdu_rel15->FreqDomainResource, @@ -1500,7 +1397,7 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac, fill_dci_pdu_rel15(&UE->sc_info, dl_bwp, &UE->current_UL_BWP, - &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1], + dci_pdu, &dci_payload, NR_DL_DCI_FORMAT_1_0, rnti_type, @@ -1544,7 +1441,6 @@ static void nr_generate_Msg2(module_id_t module_idP, NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id]; NR_UE_DL_BWP_t *dl_bwp = &UE->current_DL_BWP; - NR_UE_ServingCell_Info_t *sc_info = &UE->sc_info; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; NR_RA_t *ra = UE->ra; long rrc_ra_ResponseWindow = @@ -1585,23 +1481,14 @@ static void nr_generate_Msg2(module_id_t module_idP, int mcsIndex = -1; // initialization value int rbStart = 0; int rbSize = 8; - long BWPStart = 0; - long BWPSize = 0; - NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = NULL; - if (*ss->controlResourceSetId != 0) { - BWPStart = dl_bwp->BWPStart; - BWPSize = sc_info->initial_dl_BWPSize; - } else { - type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[cc->ssb_index[UE->UE_beam_index]]; - BWPStart = type0_PDCCH_CSS_config->cset_start_rb; - BWPSize = type0_PDCCH_CSS_config->num_rbs; - } - + bwp_info_t bwp_info = get_pdsch_bwp_start_size(nr_mac, UE); NR_ControlResourceSet_t *coreset = sched_ctrl->coreset; AssertFatal(coreset, "Coreset cannot be null for RA-Msg2\n"); const int coresetid = coreset->controlResourceSetId; // Calculate number of symbols int time_domain_assignment = get_dl_tda(nr_mac, slotP); + + NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[cc->ssb_index[UE->UE_beam_index]]; int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1; NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp, ss->searchSpaceType->present, @@ -1615,14 +1502,14 @@ static void nr_generate_Msg2(module_id_t module_idP, return; uint16_t *vrb_map = cc[CC_id].vrb_map[beam.idx]; - for (int i = 0; (i < rbSize) && (rbStart <= (BWPSize - rbSize)); i++) { - if (vrb_map[BWPStart + rbStart + i] & SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)) { + for (int i = 0; (i < rbSize) && (rbStart <= (bwp_info.bwpSize - rbSize)); i++) { + if (vrb_map[bwp_info.bwpStart + rbStart + i] & SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)) { rbStart += i; i = 0; } } - if (rbStart > (BWPSize - rbSize)) { + if (rbStart > (bwp_info.bwpSize - rbSize)) { LOG_W(NR_MAC, "Cannot find free vrb_map for RA RNTI %04x!\n", ra->RA_rnti); reset_beam_status(&nr_mac->beam_info, ra->Msg3_frame, ra->Msg3_slot, UE->UE_beam_index, n_slots_frame, ra->Msg3_beam.new_beam); reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam); @@ -1683,11 +1570,9 @@ static void nr_generate_Msg2(module_id_t module_idP, NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc, dl_bwp, &tda_info, 1); - uint8_t tb_scaling = 0; int R, Qm; uint32_t TBS = 0; - while (TBS < 9) { // min TBS for RAR is 9 bytes mcsIndex++; R = nr_get_code_rate_dl(mcsIndex, mcsTableIdx); @@ -1703,31 +1588,35 @@ static void nr_generate_Msg2(module_id_t module_idP, >> 3; // layers } + NR_sched_pdsch_t sched_pdsch = { + .R = R, + .Qm = Qm, + .mcs = mcsIndex, + .time_domain_allocation = time_domain_assignment, + .nrOfLayers = 1, + .dmrs_parms = dmrs_parms, + .tda_info = tda_info, + .pm_index = 0, + .tb_size = TBS, + .bwp_info = bwp_info, + .rbStart = rbStart, + .rbSize = rbSize + }; prepare_dl_pdus(nr_mac, UE, + &sched_pdsch, dl_req, NULL, - dmrs_parms, - tda_info, TYPE_RA_RNTI_, aggregation_level, CCEIndex, - TBS, 0, 0, - 0, - 0, - time_domain_assignment, CC_id, ra->RA_rnti, 0, - mcsIndex, tb_scaling, - pduindex, - BWPStart, - BWPSize, - rbStart, - rbSize); + pduindex); // DL TX request nfapi_nr_pdu_t *tx_req = &TX_req->pdu_list[TX_req->Number_of_PDUs]; @@ -1774,7 +1663,7 @@ static void nr_generate_Msg2(module_id_t module_idP, // Mark the corresponding symbols RBs as used fill_pdcch_vrb_map(nr_mac, CC_id, &sched_ctrl->sched_pdcch, CCEIndex, aggregation_level, beam.idx); for (int rb = 0; rb < rbSize; rb++) { - vrb_map[BWPStart + rb + rbStart] |= SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols); + vrb_map[bwp_info.bwpStart + rb + rbStart] |= SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols); } ra->ra_state = nrRA_WAIT_Msg3; @@ -1828,18 +1717,6 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP, if (beam.idx < 0) return; - long BWPStart = 0; - long BWPSize = 0; - NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = NULL; - if(*ss->controlResourceSetId!=0) { - BWPStart = dl_bwp->BWPStart; - BWPSize = dl_bwp->BWPSize; - } else { - type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[cc->ssb_index[UE->UE_beam_index]]; - BWPStart = type0_PDCCH_CSS_config->cset_start_rb; - BWPSize = type0_PDCCH_CSS_config->num_rbs; - } - // get CCEindex, needed also for PUCCH and then later for PDCCH uint8_t aggregation_level; int CCEIndex = get_cce_index(nr_mac, @@ -1867,6 +1744,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP, } uint8_t time_domain_assignment = get_dl_tda(nr_mac, slotP); + NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[cc->ssb_index[UE->UE_beam_index]]; int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1; NR_tda_info_t msg4_tda = get_dl_tda_info(dl_bwp, ss->searchSpaceType->present, @@ -1880,7 +1758,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP, return; NR_pdsch_dmrs_t dmrs_info = get_dl_dmrs_params(scc, dl_bwp, &msg4_tda, 1); - + bwp_info_t bwp_info = get_pdsch_bwp_start_size(nr_mac, UE); uint8_t mcsTableIdx = dl_bwp->mcsTableIdx; uint8_t mcsIndex = 0; int rbStart = 0; @@ -1892,8 +1770,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP, NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid]; DevAssert(!harq->is_waiting); pdu_length = harq->tb_size; - } - else { + } else { uint8_t subheader_len = (mac_sdu_length < 256) ? sizeof(NR_MAC_SUBHEADER_SHORT) : sizeof(NR_MAC_SUBHEADER_LONG); pdu_length = mac_sdu_length + subheader_len + 13; // 13 is contention resolution length of msgB. It is divided into 3 parts: // BI MAC subheader (1 Oct) + SuccessRAR MAC subheader (1 Oct) + SuccessRAR (11 Oct) @@ -1901,22 +1778,26 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP, // increase PRBs until we get to BWPSize or TBS is bigger than MAC PDU size do { - if(rbSize < BWPSize) + if(rbSize < bwp_info.bwpSize) rbSize++; else mcsIndex++; LOG_D(NR_MAC,"Calling nr_compute_tbs with N_PRB_DMRS %d, N_DMRS_SLOT %d\n",dmrs_info.N_PRB_DMRS,dmrs_info.N_DMRS_SLOT); tb_size = nr_compute_tbs(nr_get_Qm_dl(mcsIndex, mcsTableIdx), - nr_get_code_rate_dl(mcsIndex, mcsTableIdx), - rbSize, msg4_tda.nrOfSymbols, dmrs_info.N_PRB_DMRS * dmrs_info.N_DMRS_SLOT, 0, tb_scaling,1) >> 3; + nr_get_code_rate_dl(mcsIndex, mcsTableIdx), + rbSize, + msg4_tda.nrOfSymbols, + dmrs_info.N_PRB_DMRS * dmrs_info.N_DMRS_SLOT, + 0, + tb_scaling,1) >> 3; } while (tb_size < pdu_length && mcsIndex<=28); AssertFatal(tb_size >= pdu_length, "Cannot allocate %s\n", ra_type_str); int i = 0; uint16_t *vrb_map = cc[CC_id].vrb_map[beam.idx]; - while ((i < rbSize) && (rbStart + rbSize <= BWPSize)) { - if (vrb_map[BWPStart + rbStart + i]&SL_to_bitmap(msg4_tda.startSymbolIndex, msg4_tda.nrOfSymbols)) { + while ((i < rbSize) && (rbStart + rbSize <= bwp_info.bwpSize)) { + if (vrb_map[bwp_info.bwpStart + rbStart + i]&SL_to_bitmap(msg4_tda.startSymbolIndex, msg4_tda.nrOfSymbols)) { rbStart += i+1; i = 0; } else { @@ -1924,15 +1805,14 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP, } } - if (rbStart > (BWPSize - rbSize)) { + if (rbStart > (bwp_info.bwpSize - rbSize)) { LOG_E(NR_MAC, "Cannot find free vrb_map for RNTI %04x!\n", UE->rnti); reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam); return; } - const int delta_PRI = 0; int r_pucch = nr_get_pucch_resource(coreset, UE->current_UL_BWP.pucch_Config, CCEIndex); - LOG_D(NR_MAC, "Msg4 r_pucch %d (CCEIndex %d, delta_PRI %d)\n", r_pucch, CCEIndex, delta_PRI); + LOG_D(NR_MAC, "Msg4 r_pucch %d CCEIndex %d\n", r_pucch, CCEIndex); int alloc = nr_acknack_scheduling(nr_mac, UE, frameP, slotP, UE->UE_beam_index, r_pucch, 1); if (alloc < 0) { LOG_D(NR_MAC,"Couldn't find a pucch allocation for ack nack (msg4) in frame %d slot %d\n", frameP, slotP); @@ -2000,33 +1880,36 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP, } rnti_t rnti = ra->ra_type == RA_4_STEP ? UE->rnti : ra->MsgB_rnti; - + NR_sched_pdsch_t sched_pdsch = { + .R = nr_get_code_rate_dl(mcsIndex, mcsTableIdx), + .Qm = nr_get_Qm_dl(mcsIndex, mcsTableIdx), + .mcs = mcsIndex, + .time_domain_allocation = time_domain_assignment, + .nrOfLayers = 1, + .dmrs_parms = dmrs_info, + .tda_info = msg4_tda, + .pm_index = 0, + .tb_size = tb_size, + .bwp_info = bwp_info, + .rbStart = rbStart, + .rbSize = rbSize + }; const int pduindex = nr_mac->pdu_index[CC_id]++; prepare_dl_pdus(nr_mac, UE, + &sched_pdsch, dl_req, pucch, - dmrs_info, - msg4_tda, TYPE_TC_RNTI_, aggregation_level, CCEIndex, - tb_size, harq->ndi, - sched_ctrl->tpc1, - delta_PRI, current_harq_pid, - time_domain_assignment, CC_id, rnti, harq->round, - mcsIndex, tb_scaling, - pduindex, - BWPStart, - BWPSize, - rbStart, - rbSize); + pduindex); // Reset TPC to 0 dB to not request new gain multiple times before computing new value for SNR sched_ctrl->tpc1 = 1; @@ -2063,7 +1946,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP, aggregation_level, beam.idx); for (int rb = 0; rb < rbSize; rb++) { - vrb_map[BWPStart + rb + rbStart] |= SL_to_bitmap(msg4_tda.startSymbolIndex, msg4_tda.nrOfSymbols); + vrb_map[bwp_info.bwpStart + rb + rbStart] |= SL_to_bitmap(msg4_tda.startSymbolIndex, msg4_tda.nrOfSymbols); } ra->ra_state = nrRA_WAIT_Msg4_MsgB_ACK; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index bb8aea43fe..76e9db4fb3 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -274,8 +274,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, slot_t slotP, nfapi } } -static uint32_t get_tbs_bch(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, - NR_sched_pdsch_t *pdsch, +static uint32_t get_tbs_bch(NR_sched_pdsch_t *pdsch, uint32_t num_total_bytes, uint16_t *vrb_map) { @@ -287,8 +286,8 @@ static uint32_t get_tbs_bch(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, int mcsTableIdx = 0; uint32_t TBS = 0; const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols); - int bwpSize = type0_PDCCH_CSS_config->num_rbs; - int bwpStart = type0_PDCCH_CSS_config->cset_start_rb; + int bwpSize = pdsch->bwp_info.bwpSize; + int bwpStart = pdsch->bwp_info.bwpStart; int rbStop = bwpSize - 1; int rbStart = 0; uint16_t rbSize = 0; @@ -357,9 +356,12 @@ static uint32_t schedule_control_sib1(gNB_MAC_INST *gNB_mac, NR_COMMON_channels_t *cc = &gNB_mac->common_channels[CC_id]; uint16_t *vrb_map = cc->vrb_map[beam]; NR_sched_pdsch_t *pdsch = &gNB_mac->sched_ctrlCommon->sched_pdsch; + pdsch->bwp_info = get_pdsch_bwp_start_size(gNB_mac, NULL); pdsch->time_domain_allocation = time_domain_allocation; pdsch->dmrs_parms = *dmrs_parms; pdsch->tda_info = *tda_info; + pdsch->nrOfLayers = 1; + pdsch->pm_index = 0; pdsch->mcs = 0; // starting from mcs 0 gNB_mac->sched_ctrlCommon->num_total_bytes = num_total_bytes; @@ -381,11 +383,13 @@ static uint32_t schedule_control_sib1(gNB_MAC_INST *gNB_mac, AssertFatal(gNB_mac->sched_ctrlCommon->cce_index >= 0, "Could not find CCE for coreset0\n"); - uint32_t TBS = get_tbs_bch(type0_PDCCH_CSS_config, - &gNB_mac->sched_ctrlCommon->sched_pdsch, + uint32_t TBS = get_tbs_bch(&gNB_mac->sched_ctrlCommon->sched_pdsch, gNB_mac->sched_ctrlCommon->num_total_bytes, vrb_map); + pdsch->R = nr_get_code_rate_dl(pdsch->mcs, 0); + pdsch->Qm = nr_get_Qm_dl(pdsch->mcs, 0); + // Mark the corresponding RBs as used fill_pdcch_vrb_map(gNB_mac, CC_id, @@ -409,15 +413,11 @@ static void nr_fill_nfapi_dl_SIB_pdu(gNB_MAC_INST *gNB_mac, nfapi_nr_dl_tti_request_body_t *dl_req, int pdu_index, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, - uint32_t TBS, - int StartSymbolIndex, - int NrOfSymbols, bool is_sib1, int beam_index) { NR_COMMON_channels_t *cc = gNB_mac->common_channels; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; - int mcsTableIdx = 0; nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; memset(dl_tti_pdcch_pdu, 0, sizeof(*dl_tti_pdcch_pdu)); @@ -432,50 +432,18 @@ static void nr_fill_nfapi_dl_SIB_pdu(gNB_MAC_INST *gNB_mac, dl_tti_pdsch_pdu->PDUType = NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE; dl_tti_pdsch_pdu->PDUSize = (uint16_t)(4+sizeof(nfapi_nr_dl_tti_pdsch_pdu)); dl_req->nPDUs += 1; - nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15; - - pdsch_pdu_rel15->precodingAndBeamforming.num_prgs = 0; - pdsch_pdu_rel15->precodingAndBeamforming.prg_size = 0; - pdsch_pdu_rel15->precodingAndBeamforming.dig_bf_interfaces = 1; - pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].pm_idx = 0; - pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = beam_index; - - pdcch_pdu_rel15->CoreSetType = NFAPI_NR_CSET_CONFIG_MIB_SIB1; - - pdsch_pdu_rel15->pduBitmap = 0; - pdsch_pdu_rel15->rnti = SI_RNTI; - pdsch_pdu_rel15->pduIndex = pdu_index; - - pdsch_pdu_rel15->BWPSize = type0_PDCCH_CSS_config->num_rbs; - pdsch_pdu_rel15->BWPStart = type0_PDCCH_CSS_config->cset_start_rb; - - pdsch_pdu_rel15->SubcarrierSpacing = type0_PDCCH_CSS_config->scs_pdcch; - pdsch_pdu_rel15->CyclicPrefix = 0; - - pdsch_pdu_rel15->NrOfCodewords = 1; - pdsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(pdsch->mcs, mcsTableIdx); - pdsch_pdu_rel15->qamModOrder[0] = nr_get_Qm_dl(pdsch->mcs, mcsTableIdx); - pdsch_pdu_rel15->mcsIndex[0] = pdsch->mcs; - pdsch_pdu_rel15->mcsTable[0] = mcsTableIdx; - pdsch_pdu_rel15->rvIndex[0] = nr_get_rv(0); - pdsch_pdu_rel15->dataScramblingId = *scc->physCellId; - pdsch_pdu_rel15->nrOfLayers = 1; - pdsch_pdu_rel15->transmissionScheme = 0; - pdsch_pdu_rel15->refPoint = is_sib1; - pdsch_pdu_rel15->dmrsConfigType = 0; - pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId; - pdsch_pdu_rel15->SCID = 0; - pdsch_pdu_rel15->numDmrsCdmGrpsNoData = pdsch->dmrs_parms.numDmrsCdmGrpsNoData; - pdsch_pdu_rel15->dmrsPorts = 1; - pdsch_pdu_rel15->resourceAlloc = 1; - pdsch_pdu_rel15->rbStart = pdsch->rbStart; - pdsch_pdu_rel15->rbSize = pdsch->rbSize; - pdsch_pdu_rel15->VRBtoPRBMapping = 0; - pdsch_pdu_rel15->TBSize[0] = TBS; - pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex; - pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols; - pdsch_pdu_rel15->dlDmrsSymbPos = pdsch->dmrs_parms.dl_dmrs_symb_pos; + nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = prepare_pdsch_pdu(dl_tti_pdsch_pdu, + gNB_mac, + NULL, + pdsch, + NULL, + is_sib1, + 0, + SI_RNTI, + beam_index, + 1, + pdu_index); LOG_D(NR_MAC, "OtherSI:bwpStart %d, bwpSize %d, rbStart %d, rbSize %d, dlDmrsSymbPos = 0x%x\n", pdsch_pdu_rel15->BWPStart, @@ -484,58 +452,35 @@ static void nr_fill_nfapi_dl_SIB_pdu(gNB_MAC_INST *gNB_mac, pdsch_pdu_rel15->rbSize, pdsch_pdu_rel15->dlDmrsSymbPos); - pdsch_pdu_rel15->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(0, - pdsch_pdu_rel15->BWPSize, - 1); - pdsch_pdu_rel15->maintenance_parms_v3.ldpcBaseGraph = get_BG(TBS<<3,pdsch_pdu_rel15->targetCodeRate[0]); - /* Fill PDCCH DL DCI PDU */ - nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci]; + nfapi_nr_dl_dci_pdu_t *dci_pdu = prepare_dci_pdu(pdcch_pdu_rel15, + scc, + search_space, + coreset, + aggregation_level, + cce_index, + beam_index, + SI_RNTI); pdcch_pdu_rel15->numDlDci++; - dci_pdu->RNTI = SI_RNTI; - dci_pdu->ScramblingId = *scc->physCellId; - dci_pdu->ScramblingRNTI = 0; - dci_pdu->AggregationLevel = aggregation_level; - dci_pdu->CceIndex = cce_index; - dci_pdu->beta_PDCCH_1_0 = 0; - dci_pdu->powerControlOffsetSS = 1; - - dci_pdu->precodingAndBeamforming.num_prgs = 0; - dci_pdu->precodingAndBeamforming.prg_size = 0; - dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 1; - dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0; - dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = beam_index; /* DCI payload */ - dci_pdu_rel15_t dci_payload; - memset(&dci_payload, 0, sizeof(dci_pdu_rel15_t)); - - dci_payload.bwp_indicator.val = 0; - - // frequency domain assignment - dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0( - pdsch_pdu_rel15->rbSize, pdsch_pdu_rel15->rbStart, type0_PDCCH_CSS_config->num_rbs); - - dci_payload.time_domain_assignment.val = pdsch->time_domain_allocation; - dci_payload.mcs = pdsch->mcs; - dci_payload.rv = pdsch_pdu_rel15->rvIndex[0]; - dci_payload.harq_pid.val = 0; - dci_payload.ndi = 0; - dci_payload.dai[0].val = 0; - dci_payload.tpc = 0; // table 7.2.1-1 in 38.213 - dci_payload.pucch_resource_indicator = 0; - dci_payload.pdsch_to_harq_feedback_timing_indicator.val = 0; - dci_payload.antenna_ports.val = 0; - dci_payload.dmrs_sequence_initialization.val = pdsch_pdu_rel15->SCID; - dci_payload.system_info_indicator = is_sib1 ? 0 : 1; - int dci_format = NR_DL_DCI_FORMAT_1_0; int rnti_type = TYPE_SI_RNTI_; + dci_pdu_rel15_t dci_payload = prepare_dci_dl_payload(gNB_mac, + NULL, + rnti_type, + NR_SearchSpace__searchSpaceType_PR_common, + pdsch_pdu_rel15, + pdsch, + NULL, + 0, + 0, + is_sib1); fill_dci_pdu_rel15(NULL, NULL, NULL, - &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1], + dci_pdu, &dci_payload, dci_format, rnti_type, @@ -644,6 +589,7 @@ void schedule_nr_sib1(module_id_t module_idP, beam.idx, cc->sib1_bcch_length); + gNB_mac->sched_ctrlCommon->sched_pdsch.tb_size = TBS; nfapi_nr_dl_tti_request_body_t *dl_req = &DL_req->dl_tti_request_body; int pdu_index = gNB_mac->pdu_index[0]++; nr_fill_nfapi_dl_SIB_pdu(gNB_mac, @@ -656,9 +602,6 @@ void schedule_nr_sib1(module_id_t module_idP, dl_req, pdu_index, type0_PDCCH_CSS_config, - TBS, - tda_info.startSymbolIndex, - tda_info.nrOfSymbols, true, beam_index); @@ -764,14 +707,19 @@ static void other_sib_sched_control(module_id_t module_idP, NR_sched_pdsch_t sched_pdsch_otherSI = {0}; sched_pdsch_otherSI.time_domain_allocation = time_domain_allocation; + sched_pdsch_otherSI.bwp_info = get_pdsch_bwp_start_size(gNB_mac, NULL); sched_pdsch_otherSI.dmrs_parms = dmrs_parms; sched_pdsch_otherSI.tda_info = tda_info; + sched_pdsch_otherSI.nrOfLayers = 1; + sched_pdsch_otherSI.pm_index = 0; sched_pdsch_otherSI.mcs = 0; // starting from mcs 0 uint16_t *vrb_map = cc->vrb_map[beam.idx]; uint8_t *sib_bcch_pdu = cc->other_sib_bcch_pdu[payload_idx]; int num_total_bytes = cc->other_sib_bcch_length[payload_idx]; - uint32_t TBS = get_tbs_bch(type0_PDCCH_CSS_config, &sched_pdsch_otherSI, num_total_bytes, vrb_map); + sched_pdsch_otherSI.tb_size = get_tbs_bch(&sched_pdsch_otherSI, num_total_bytes, vrb_map); + sched_pdsch_otherSI.R = nr_get_code_rate_dl(sched_pdsch_otherSI.mcs, 0); + sched_pdsch_otherSI.Qm = nr_get_Qm_dl(sched_pdsch_otherSI.mcs, 0); for (int rb = 0; rb < sched_pdsch_otherSI.rbSize; rb++) { vrb_map[rb + type0_PDCCH_CSS_config->cset_start_rb] |= SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols); @@ -789,9 +737,6 @@ static void other_sib_sched_control(module_id_t module_idP, dl_req, pdu_index, type0_PDCCH_CSS_config, - TBS, - tda_info.startSymbolIndex, - tda_info.nrOfSymbols, false, beam_index); @@ -799,12 +744,12 @@ static void other_sib_sched_control(module_id_t module_idP, nfapi_nr_pdu_t *tx_req = &TX_req->pdu_list[ntx_req]; // Data to be transmitted - memcpy(tx_req->TLVs[0].value.direct, sib_bcch_pdu, TBS); + memcpy(tx_req->TLVs[0].value.direct, sib_bcch_pdu, sched_pdsch_otherSI.tb_size); - tx_req->PDU_length = TBS; + tx_req->PDU_length = sched_pdsch_otherSI.tb_size; tx_req->PDU_index = pdu_index; tx_req->num_TLV = 1; - tx_req->TLVs[0].length = TBS + 2; + tx_req->TLVs[0].length = sched_pdsch_otherSI.tb_size + 2; TX_req->Number_of_PDUs++; TX_req->SFN = frame; TX_req->Slot = slot; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index cb3c1bf801..0ea552e64d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -384,12 +384,16 @@ void abort_nr_dl_harq(NR_UE_info_t* UE, int8_t harq_pid) UE->mac_stats.dl.errors++; } -static bwp_info_t get_pdsch_bwp_start_size(gNB_MAC_INST *nr_mac, NR_UE_info_t *UE) +bwp_info_t get_pdsch_bwp_start_size(gNB_MAC_INST *nr_mac, NR_UE_info_t *UE) { + bwp_info_t bwp_info; + if (!UE) { + bwp_info.bwpStart = nr_mac->cset0_bwp_start; + bwp_info.bwpSize = nr_mac->cset0_bwp_size; + return bwp_info; + } NR_UE_DL_BWP_t *dl_bwp = &UE->current_DL_BWP; NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; - bwp_info_t bwp_info; - // 3GPP TS 38.214 Section 5.1.2.2 Resource allocation in frequency domain // For a PDSCH scheduled with a DCI format 1_0 in any type of PDCCH common search space, regardless of which bandwidth part is the // active bandwidth part, RB numbering starts from the lowest RB of the CORESET in which the DCI was received; otherwise RB @@ -575,6 +579,7 @@ static bool allocate_dl_retransmission(module_id_t module_id, sched_ctrl->sched_pdsch = *retInfo; sched_ctrl->sched_pdsch.rbStart = rbStart - bwp_info.bwpStart; sched_ctrl->sched_pdsch.pucch_allocation = alloc; + sched_ctrl->sched_pdsch.bwp_info = bwp_info; /* retransmissions: directly allocate */ *n_rb_sched -= sched_ctrl->sched_pdsch.rbSize; @@ -764,10 +769,10 @@ static void pf_dl(module_id_t module_id, const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols); uint16_t *rballoc_mask = mac->common_channels[CC_id].vrb_map[beam.idx]; - bwp_info_t bwp_info = get_pdsch_bwp_start_size(mac, iterator->UE); + sched_pdsch->bwp_info = get_pdsch_bwp_start_size(mac, iterator->UE); int rbStart = 0; // WRT BWP start - int rbStop = bwp_info.bwpSize - 1; - int bwp_start = bwp_info.bwpStart; + int rbStop = sched_pdsch->bwp_info.bwpSize - 1; + int bwp_start = sched_pdsch->bwp_info.bwpStart; // Freq-demain allocation while (rbStart < rbStop && (rballoc_mask[rbStart + bwp_start] & slbitmap)) rbStart++; @@ -919,6 +924,84 @@ nr_pp_impl_dl nr_init_dlsch_preprocessor(int CC_id) { return nr_dlsch_preprocessor; } +nfapi_nr_dl_tti_pdsch_pdu_rel15_t *prepare_pdsch_pdu(nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu, + const gNB_MAC_INST *mac, + const NR_UE_info_t *UE, + const NR_sched_pdsch_t *sched_pdsch, + const NR_PDSCH_Config_t *pdsch_Config, + bool is_sib1, + int harq_round, + int rnti, + int beam_index, + int nl_tbslbrm, + int pdu_index) +{ + const NR_UE_DL_BWP_t *dl_bwp = UE ? &UE->current_DL_BWP : NULL; + const NR_ServingCellConfigCommon_t *scc = mac->common_channels[0].ServingCellConfigCommon; + nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15; + pdsch_pdu->pduBitmap = 0; + pdsch_pdu->rnti = rnti; + pdsch_pdu->pduIndex = pdu_index; + pdsch_pdu->BWPSize = sched_pdsch->bwp_info.bwpSize; + pdsch_pdu->BWPStart = sched_pdsch->bwp_info.bwpStart; + pdsch_pdu->SubcarrierSpacing = dl_bwp ? dl_bwp->scs : *scc->ssbSubcarrierSpacing; + pdsch_pdu->CyclicPrefix = dl_bwp && dl_bwp->cyclicprefix ? *dl_bwp->cyclicprefix : 0; + // Codeword information + pdsch_pdu->NrOfCodewords = 1; + pdsch_pdu->targetCodeRate[0] = sched_pdsch->R; + pdsch_pdu->qamModOrder[0] = sched_pdsch->Qm; + pdsch_pdu->mcsIndex[0] = sched_pdsch->mcs; + pdsch_pdu->mcsTable[0] = dl_bwp ? dl_bwp->mcsTableIdx : 0; + pdsch_pdu->rvIndex[0] = nr_get_rv(harq_round % 4); + pdsch_pdu->TBSize[0] = sched_pdsch->tb_size; + pdsch_pdu->dataScramblingId = pdsch_Config && pdsch_Config->dataScramblingIdentityPDSCH ? *pdsch_Config->dataScramblingIdentityPDSCH : *scc->physCellId; + pdsch_pdu->nrOfLayers = sched_pdsch->nrOfLayers; + pdsch_pdu->transmissionScheme = 0; + pdsch_pdu->refPoint = is_sib1; + // DMRS + const NR_pdsch_dmrs_t *dmrs_parms = &sched_pdsch->dmrs_parms; + pdsch_pdu->dlDmrsSymbPos = dmrs_parms->dl_dmrs_symb_pos; + pdsch_pdu->dmrsConfigType = dmrs_parms->dmrsConfigType; + pdsch_pdu->SCID = dmrs_parms->n_scid; + pdsch_pdu->dlDmrsScramblingId = dmrs_parms->scrambling_id; + pdsch_pdu->numDmrsCdmGrpsNoData = dmrs_parms->numDmrsCdmGrpsNoData; + pdsch_pdu->dmrsPorts = (1 << sched_pdsch->nrOfLayers) - 1; // FIXME with a better implementation + // Pdsch Allocation in frequency domain + pdsch_pdu->resourceAlloc = 1; + pdsch_pdu->rbStart = sched_pdsch->rbStart; + pdsch_pdu->rbSize = sched_pdsch->rbSize; + pdsch_pdu->VRBtoPRBMapping = 0; // non-interleaved + // Resource Allocation in time domain + const NR_tda_info_t *tda_info = &sched_pdsch->tda_info; + pdsch_pdu->StartSymbolIndex = tda_info->startSymbolIndex; + pdsch_pdu->NrOfSymbols = tda_info->nrOfSymbols; + /* Check and validate PTRS values */ + if (dmrs_parms->phaseTrackingRS) { + bool valid_ptrs_setup = set_dl_ptrs_values(dmrs_parms->phaseTrackingRS, + pdsch_pdu->rbSize, + pdsch_pdu->mcsIndex[0], + pdsch_pdu->mcsTable[0], + &pdsch_pdu->PTRSFreqDensity, + &pdsch_pdu->PTRSTimeDensity, + &pdsch_pdu->PTRSPortIndex, + &pdsch_pdu->nEpreRatioOfPDSCHToPTRS, + &pdsch_pdu->PTRSReOffset, + pdsch_pdu->NrOfSymbols); + if (valid_ptrs_setup) + pdsch_pdu->pduBitmap |= 0x1; // Bit 0: pdschPtrs - Indicates PTRS included (FR2) + } + int dl_bw_tbslbrm = UE ? UE->sc_info.dl_bw_tbslbrm : sched_pdsch->bwp_info.bwpSize; + pdsch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(pdsch_pdu->mcsTable[0], dl_bw_tbslbrm, nl_tbslbrm); + pdsch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(sched_pdsch->tb_size << 3, sched_pdsch->R); + // Precoding and beamforming + pdsch_pdu->precodingAndBeamforming.num_prgs = 0; + pdsch_pdu->precodingAndBeamforming.prg_size = pdsch_pdu->rbSize; + pdsch_pdu->precodingAndBeamforming.dig_bf_interfaces = 0; + pdsch_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = sched_pdsch->pm_index; + pdsch_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = beam_index; + return pdsch_pdu; +} + void nr_schedule_ue_spec(module_id_t module_id, frame_t frame, slot_t slot, @@ -970,8 +1053,6 @@ void nr_schedule_ue_spec(module_id_t module_id, /* POST processing */ const uint8_t nrOfLayers = sched_pdsch->nrOfLayers; - const uint16_t R = sched_pdsch->R; - const uint8_t Qm = sched_pdsch->Qm; const uint32_t TBS = sched_pdsch->tb_size; int8_t current_harq_pid = sched_pdsch->dl_harq_pid; @@ -1055,160 +1136,62 @@ void nr_schedule_ue_spec(module_id_t module_id, nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; memset(dl_tti_pdsch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t)); dl_tti_pdsch_pdu->PDUType = NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE; - dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdsch_pdu)); + dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdsch_pdu)); dl_req->nPDUs += 1; - nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15; - pdsch_pdu->pduBitmap = 0; - pdsch_pdu->rnti = rnti; /* SCF222: PDU index incremented for each PDSCH PDU sent in TX control * message. This is used to associate control information to data and is * reset every slot. */ const int pduindex = gNB_mac->pdu_index[CC_id]++; - pdsch_pdu->pduIndex = pduindex; - - bwp_info_t bwp_info = get_pdsch_bwp_start_size(gNB_mac, UE); - pdsch_pdu->BWPSize = bwp_info.bwpSize; - pdsch_pdu->BWPStart = bwp_info.bwpStart; - - pdsch_pdu->SubcarrierSpacing = current_BWP->scs; - pdsch_pdu->CyclicPrefix = current_BWP->cyclicprefix ? *current_BWP->cyclicprefix : 0; - // Codeword information - pdsch_pdu->NrOfCodewords = 1; - //number of information bits per 1024 coded bits expressed in 0.1 bit units - pdsch_pdu->targetCodeRate[0] = R; - pdsch_pdu->qamModOrder[0] = Qm; - pdsch_pdu->mcsIndex[0] = sched_pdsch->mcs; - pdsch_pdu->mcsTable[0] = current_BWP->mcsTableIdx; - // NVIDIA: Workaround for MCSTableIdx mismatch error - if (nr_get_code_rate_dl(sched_pdsch->mcs, current_BWP->mcsTableIdx) != R) { - pdsch_pdu->mcsTable[0] = 0; - } - AssertFatal(harq->round < gNB_mac->dl_bler.harq_round_max,"%d", harq->round); - pdsch_pdu->rvIndex[0] = nr_get_rv(harq->round % 4); - pdsch_pdu->TBSize[0] = TBS; - pdsch_pdu->dataScramblingId = *scc->physCellId; - pdsch_pdu->nrOfLayers = nrOfLayers; - pdsch_pdu->transmissionScheme = 0; - pdsch_pdu->refPoint = 0; // Point A - // DMRS - pdsch_pdu->dlDmrsSymbPos = dmrs_parms->dl_dmrs_symb_pos; - pdsch_pdu->dmrsConfigType = dmrs_parms->dmrsConfigType; - pdsch_pdu->dlDmrsScramblingId = *scc->physCellId; - pdsch_pdu->SCID = 0; - pdsch_pdu->numDmrsCdmGrpsNoData = dmrs_parms->numDmrsCdmGrpsNoData; - pdsch_pdu->dmrsPorts = (1<resourceAlloc = 1; - pdsch_pdu->rbStart = sched_pdsch->rbStart; - pdsch_pdu->rbSize = sched_pdsch->rbSize; - pdsch_pdu->VRBtoPRBMapping = 1; // non-interleaved, check if this is ok for initialBWP - // Resource Allocation in time domain - pdsch_pdu->StartSymbolIndex = tda_info->startSymbolIndex; - pdsch_pdu->NrOfSymbols = tda_info->nrOfSymbols; - // Precoding - pdsch_pdu->precodingAndBeamforming.num_prgs = 0; - pdsch_pdu->precodingAndBeamforming.prg_size = pdsch_pdu->rbSize; - pdsch_pdu->precodingAndBeamforming.dig_bf_interfaces = 0; - pdsch_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = sched_pdsch->pm_index; - pdsch_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index; - // TBS_LBRM according to section 5.4.2.1 of 38.212 // TODO: verify the case where maxMIMO_Layers is NULL, in which case // in principle maxMIMO_layers should be given by the maximum number of layers // for PDSCH supported by the UE for the serving cell (5.4.2.1 of 38.212) long maxMIMO_Layers = UE->sc_info.maxMIMO_Layers_PDSCH ? *UE->sc_info.maxMIMO_Layers_PDSCH : 1; const int nl_tbslbrm = min(maxMIMO_Layers, 4); - // Maximum number of PRBs across all configured DL BWPs - pdsch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = - nr_compute_tbslbrm(current_BWP->mcsTableIdx, UE->sc_info.dl_bw_tbslbrm, nl_tbslbrm); - pdsch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(TBS<<3,R); + nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu = prepare_pdsch_pdu(dl_tti_pdsch_pdu, + gNB_mac, + UE, + sched_pdsch, + current_BWP->pdsch_Config, + false, + harq->round, + rnti, + UE->UE_beam_index, + nl_tbslbrm, + pduindex); - NR_PDSCH_Config_t *pdsch_Config = current_BWP->pdsch_Config; - - /* Check and validate PTRS values */ - struct NR_SetupRelease_PTRS_DownlinkConfig *phaseTrackingRS = - pdsch_Config ? pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS : NULL; - - if (phaseTrackingRS) { - bool valid_ptrs_setup = set_dl_ptrs_values(phaseTrackingRS->choice.setup, - pdsch_pdu->rbSize, - pdsch_pdu->mcsIndex[0], - pdsch_pdu->mcsTable[0], - &pdsch_pdu->PTRSFreqDensity, - &pdsch_pdu->PTRSTimeDensity, - &pdsch_pdu->PTRSPortIndex, - &pdsch_pdu->nEpreRatioOfPDSCHToPTRS, - &pdsch_pdu->PTRSReOffset, - pdsch_pdu->NrOfSymbols); - - if (valid_ptrs_setup) - pdsch_pdu->pduBitmap |= 0x1; // Bit 0: pdschPtrs - Indicates PTRS included (FR2) - } LOG_D(NR_MAC,"Configuring DCI/PDCCH in %d.%d at CCE %d, rnti %x\n", frame,slot,sched_ctrl->cce_index,rnti); /* Fill PDCCH DL DCI PDU */ - nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci]; + nfapi_nr_dl_dci_pdu_t *dci_pdu = prepare_dci_pdu(pdcch_pdu, + scc, + sched_ctrl->search_space, + sched_ctrl->coreset, + sched_ctrl->aggregation_level, + sched_ctrl->cce_index, + UE->UE_beam_index, + rnti); pdcch_pdu->numDlDci++; - dci_pdu->RNTI = rnti; - - if (sched_ctrl->coreset && - sched_ctrl->search_space && - sched_ctrl->coreset->pdcch_DMRS_ScramblingID && - sched_ctrl->search_space->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) { - dci_pdu->ScramblingId = *sched_ctrl->coreset->pdcch_DMRS_ScramblingID; - dci_pdu->ScramblingRNTI = rnti; - } else { - dci_pdu->ScramblingId = *scc->physCellId; - dci_pdu->ScramblingRNTI = 0; - } - - dci_pdu->AggregationLevel = sched_ctrl->aggregation_level; - dci_pdu->CceIndex = sched_ctrl->cce_index; - dci_pdu->beta_PDCCH_1_0 = 0; - dci_pdu->powerControlOffsetSS = 1; - - dci_pdu->precodingAndBeamforming.num_prgs = 0; - dci_pdu->precodingAndBeamforming.prg_size = 0; - dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 0; - dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0; - dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index; /* DCI payload */ - dci_pdu_rel15_t dci_payload; - memset(&dci_payload, 0, sizeof(dci_pdu_rel15_t)); - // bwp indicator - // as per table 7.3.1.1.2-1 in 38.212 - dci_payload.bwp_indicator.val = UE->sc_info.n_dl_bwp < 4 ? bwp_id : bwp_id - 1; + const int rnti_type = TYPE_C_RNTI_; + dci_pdu_rel15_t dci_payload = prepare_dci_dl_payload(gNB_mac, + UE, + rnti_type, + sched_ctrl->search_space->searchSpaceType->present, + pdsch_pdu, + sched_pdsch, + pucch, + current_harq_pid, + 0, + false); - AssertFatal(pdsch_Config == NULL || pdsch_Config->resourceAllocation == NR_PDSCH_Config__resourceAllocation_resourceAllocationType1, - "Only frequency resource allocation type 1 is currently supported\n"); - - // 3GPP TS 38.214 Section 5.1.2.2.2 Downlink resource allocation type 1 - uint16_t riv_bwp_size = pdsch_pdu->BWPSize; - if (current_BWP->dci_format == NR_DL_DCI_FORMAT_1_0 - && sched_ctrl->search_space->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_common) { - if (gNB_mac->cset0_bwp_size > 0) { - riv_bwp_size = gNB_mac->cset0_bwp_size; - } else { - riv_bwp_size = UE->sc_info.initial_dl_BWPSize; - } - } - dci_payload.frequency_domain_assignment.val = - PRBalloc_to_locationandbandwidth0(pdsch_pdu->rbSize, pdsch_pdu->rbStart, riv_bwp_size); - - dci_payload.format_indicator = 1; - dci_payload.time_domain_assignment.val = sched_pdsch->time_domain_allocation; - dci_payload.mcs = sched_pdsch->mcs; - dci_payload.rv = pdsch_pdu->rvIndex[0]; - dci_payload.harq_pid.val = current_harq_pid; - dci_payload.ndi = harq->ndi; - dci_payload.dai[0].val = pucch ? (pucch->dai_c-1)&3 : 0; - dci_payload.tpc = sched_ctrl->tpc1; // TPC for PUCCH: table 7.2.1-1 in 38.213 // Reset TPC to 0 dB to not request new gain multiple times before computing new value for SNR sched_ctrl->tpc1 = 1; - dci_payload.pucch_resource_indicator = pucch ? pucch->resource_indicator : 0; - dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch ? pucch->timing_indicator : 0; // PDSCH to HARQ TI - dci_payload.antenna_ports.val = dmrs_parms->dmrs_ports_id; - dci_payload.dmrs_sequence_initialization.val = pdsch_pdu->SCID; + NR_PDSCH_Config_t *pdsch_Config = current_BWP->pdsch_Config; + AssertFatal(pdsch_Config == NULL + || pdsch_Config->resourceAllocation == NR_PDSCH_Config__resourceAllocation_resourceAllocationType1, + "Only frequency resource allocation type 1 is currently supported\n"); + LOG_D(NR_MAC, "%4d.%2d DCI type 1 payload: freq_alloc %d (%d,%d,%d), " "nrOfLayers %d, time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d tpc %d ti %d\n", @@ -1228,7 +1211,6 @@ void nr_schedule_ue_spec(module_id_t module_id, dci_payload.tpc, pucch ? pucch->timing_indicator : 0); - const int rnti_type = TYPE_C_RNTI_; fill_dci_pdu_rel15(&UE->sc_info, current_BWP, &UE->current_UL_BWP, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index bc7b40937f..a470c48bc4 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -173,7 +173,7 @@ void nr_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slot) sched_pdsch->pucch_allocation = alloc; sched_pdsch->rbStart = rbStart; sched_pdsch->rbSize = rbSize; - + sched_pdsch->bwp_info = get_pdsch_bwp_start_size(mac, UE); sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc, dl_bwp, &tda_info, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 176ad758ad..d78fa5cd4f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -300,8 +300,7 @@ NR_pdsch_dmrs_t get_dl_dmrs_params(const NR_ServingCellConfigCommon_t *scc, if (dci_format == NR_DL_DCI_FORMAT_1_0) { dmrs.numDmrsCdmGrpsNoData = tda_info->nrOfSymbols <= 2 ? 1 : 2; dmrs.dmrs_ports_id = 0; - } - else { + } else { //TODO first basic implementation of dmrs port selection // only vaild for a single codeword // for now it assumes a selection of Nl consecutive dmrs ports @@ -346,16 +345,21 @@ NR_pdsch_dmrs_t get_dl_dmrs_params(const NR_ServingCellConfigCommon_t *scc, } } + dmrs.n_scid = 0; + long *scramblingID = NULL; NR_PDSCH_Config_t *pdsch_Config = dl_bwp ? dl_bwp->pdsch_Config : NULL; if (pdsch_Config) { - if (tda_info->mapping_type == typeB) - dmrs.dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type != NULL; - else - dmrs.dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type != NULL; - } - else + NR_DMRS_DownlinkConfig_t *dmrs_Config = tda_info->mapping_type == typeB ? + pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup : + pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup; + dmrs.phaseTrackingRS = dmrs_Config->phaseTrackingRS ? dmrs_Config->phaseTrackingRS->choice.setup : NULL; + dmrs.dmrsConfigType = dmrs_Config->dmrs_Type != NULL; + scramblingID = dmrs.n_scid ? dmrs_Config->scramblingID1 : dmrs_Config->scramblingID0; + } else { dmrs.dmrsConfigType = NFAPI_NR_DMRS_TYPE1; - + dmrs.phaseTrackingRS = NULL; + } + dmrs.scrambling_id = scramblingID ? *scramblingID : *scc->physCellId; dmrs.N_PRB_DMRS = dmrs.numDmrsCdmGrpsNoData * (dmrs.dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4); dmrs.dl_dmrs_symb_pos = fill_dmrs_mask(pdsch_Config, dci_format, scc->dmrs_TypeA_Position, tda_info->nrOfSymbols, tda_info->startSymbolIndex, tda_info->mapping_type, frontloaded_symb); dmrs.N_DMRS_SLOT = get_num_dmrs(dmrs.dl_dmrs_symb_pos); @@ -702,8 +706,8 @@ const NR_DMRS_UplinkConfig_t *get_DMRS_UplinkConfig(const NR_PUSCH_Config_t *pus NR_pusch_dmrs_t get_ul_dmrs_params(const NR_ServingCellConfigCommon_t *scc, const NR_UE_UL_BWP_t *ul_bwp, const NR_tda_info_t *tda_info, - const int Layers) { - + const int Layers) +{ NR_pusch_dmrs_t dmrs = {0}; // TODO setting of cdm groups with no data to be redone for MIMO if(NFAPI_MODE == NFAPI_MODE_AERIAL) { @@ -715,13 +719,36 @@ NR_pusch_dmrs_t get_ul_dmrs_params(const NR_ServingCellConfigCommon_t *scc, dmrs.num_dmrs_cdm_grps_no_data = 2; } - NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig = ul_bwp->pusch_Config ? - (tda_info->mapping_type == typeA ? - ul_bwp->pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup : - ul_bwp->pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup) : NULL; + const NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig = get_DMRS_UplinkConfig(ul_bwp->pusch_Config, tda_info); + dmrs.ptrsConfig = NR_DMRS_UplinkConfig + && NR_DMRS_UplinkConfig->phaseTrackingRS ? + NR_DMRS_UplinkConfig->phaseTrackingRS->choice.setup : NULL; + + dmrs.pusch_identity = *scc->physCellId; + dmrs.dmrs_scrambling_id = *scc->physCellId; + dmrs.scid = 0; + if (ul_bwp->transform_precoding) { // transform precoding disabled + long *scramblingid = NULL; + if (NR_DMRS_UplinkConfig && dmrs.scid == 0) + scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID0; + else if (NR_DMRS_UplinkConfig) + scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID1; + if (scramblingid) + dmrs.dmrs_scrambling_id = *scramblingid; + } else { + if (NR_DMRS_UplinkConfig && NR_DMRS_UplinkConfig->transformPrecodingEnabled) { + if (NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity) + dmrs.pusch_identity = *NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity; + if ((!NR_DMRS_UplinkConfig->transformPrecodingEnabled->sequenceGroupHopping + && !NR_DMRS_UplinkConfig->transformPrecodingEnabled->sequenceHopping) + && !scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->groupHoppingEnabledTransformPrecoding) + dmrs.low_papr_sequence_number = 0; + else + AssertFatal(false, "Hopping mode is not supported in transform precoding\n"); + } + } dmrs.dmrs_config_type = NR_DMRS_UplinkConfig && NR_DMRS_UplinkConfig->dmrs_Type ? 1 : 0; - const pusch_dmrs_AdditionalPosition_t additional_pos = (NR_DMRS_UplinkConfig && NR_DMRS_UplinkConfig->dmrs_AdditionalPosition) ? (*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos3 ? @@ -782,6 +809,92 @@ int get_mcs_from_bler(const NR_bler_options_t *bler_options, return new_mcs; } +nfapi_nr_dl_dci_pdu_t *prepare_dci_pdu(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, + const NR_ServingCellConfigCommon_t *scc, + const NR_SearchSpace_t *ss, + const NR_ControlResourceSet_t *coreset, + int aggregation_level, + int cce_index, + int beam_index, + int rnti) +{ + nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci]; + dci_pdu->RNTI = rnti; + dci_pdu->AggregationLevel = aggregation_level; + dci_pdu->CceIndex = cce_index; + if (coreset->pdcch_DMRS_ScramblingID && + ss->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) { + dci_pdu->ScramblingId = *coreset->pdcch_DMRS_ScramblingID; + dci_pdu->ScramblingRNTI = rnti; + } else { + dci_pdu->ScramblingId = *scc->physCellId; + dci_pdu->ScramblingRNTI = 0; + } + dci_pdu->beta_PDCCH_1_0 = 0; + dci_pdu->powerControlOffsetSS = 1; + dci_pdu->precodingAndBeamforming.num_prgs = 0; + dci_pdu->precodingAndBeamforming.prg_size = 0; + dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 1; + dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0; + dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = beam_index; + return dci_pdu; +} + +dci_pdu_rel15_t prepare_dci_dl_payload(const gNB_MAC_INST *gNB_mac, + const NR_UE_info_t *UE, + nr_rnti_type_t rnti_type, + NR_SearchSpace__searchSpaceType_PR ss_type, + const nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu, + const NR_sched_pdsch_t *sched_pdsch, + const NR_sched_pucch_t *pucch, + int harq_pid, + int tb_scaling, + bool is_sib1) +{ + const NR_UE_DL_BWP_t *dl_BWP = UE ? &UE->current_DL_BWP : NULL; + dci_pdu_rel15_t dci_payload = {0}; + dci_payload.format_indicator = 1; + dci_payload.time_domain_assignment.val = sched_pdsch->time_domain_allocation; + dci_payload.mcs = sched_pdsch->mcs; + dci_payload.rv = pdsch_pdu->rvIndex[0]; + dci_payload.vrb_to_prb_mapping.val = 0; + int riv_bwp = pdsch_pdu->BWPSize; + if (!UE) + riv_bwp = gNB_mac->cset0_bwp_size; + else if (dl_BWP->dci_format == NR_DL_DCI_FORMAT_1_0 && ss_type == NR_SearchSpace__searchSpaceType_PR_common) { + if (gNB_mac->cset0_bwp_size > 0) + riv_bwp = gNB_mac->cset0_bwp_size; + else + riv_bwp = UE->sc_info.initial_dl_BWPSize; + } + dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu->rbSize, pdsch_pdu->rbStart, riv_bwp); + if (rnti_type == TYPE_SI_RNTI_) { + dci_payload.system_info_indicator = !is_sib1; + return dci_payload; + } + if (rnti_type == TYPE_RA_RNTI_) { + dci_payload.tb_scaling = tb_scaling; + return dci_payload; + } + + const NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; + dci_payload.dmrs_sequence_initialization.val = pdsch_pdu->SCID; + dci_payload.antenna_ports.val = sched_pdsch->dmrs_parms.dmrs_ports_id; + dci_payload.tpc = sched_ctrl->tpc1; + const NR_UE_harq_t *harq = &sched_ctrl->harq_processes[harq_pid]; + AssertFatal(harq, "HARQ process should be available for DCI with RNTI %s\n", rnti_types(rnti_type)); + dci_payload.harq_pid.val = harq_pid; + dci_payload.ndi = harq->ndi; + dci_payload.pucch_resource_indicator = pucch ? pucch->resource_indicator : 0; + dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch ? pucch->timing_indicator : 0; // PDSCH to HARQ TI + dci_payload.dai[0].val = pucch ? (pucch->dai_c - 1) & 3 : 0; + // bwp indicator + // as per table 7.3.1.1.2-1 in 38.212 + if (dl_BWP) + dci_payload.bwp_indicator.val = UE->sc_info.n_dl_bwp < 4 ? dl_BWP->bwp_id : dl_BWP->bwp_id - 1; + return dci_payload; +} + void config_uldci(const NR_UE_ServingCell_Info_t *sc_info, const nfapi_nr_pusch_pdu_t *pusch_pdu, dci_pdu_rel15_t *dci_pdu_rel15, @@ -1175,11 +1288,11 @@ void set_r_pucch_parms(int rsetindex, *start_symbol_index = default_pucch_firstsymb[rsetindex]; } -void prepare_dci(const NR_UE_ServingCell_Info_t *servingCellInfo, - const NR_UE_DL_BWP_t *current_BWP, - const NR_ControlResourceSet_t *coreset, - dci_pdu_rel15_t *dci_pdu_rel15, - nr_dci_format_t format) +static void prepare_dci_X1(const NR_UE_ServingCell_Info_t *servingCellInfo, + const NR_UE_DL_BWP_t *current_BWP, + const NR_ControlResourceSet_t *coreset, + dci_pdu_rel15_t *dci_pdu_rel15, + nr_dci_format_t format) { const NR_PDSCH_Config_t *pdsch_Config = current_BWP ? current_BWP->pdsch_Config : NULL; @@ -1326,7 +1439,7 @@ void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo, pdcch_dci_pdu->PayloadSizeBits = dci_size; AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported"); if (dci_format == NR_DL_DCI_FORMAT_1_1 || dci_format == NR_UL_DCI_FORMAT_0_1) - prepare_dci(servingCellInfo, current_DL_BWP, coreset, dci_pdu_rel15, dci_format); + prepare_dci_X1(servingCellInfo, current_DL_BWP, coreset, dci_pdu_rel15, dci_format); /// Payload generation switch (dci_format) { diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 534b955f7b..2896de953c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -65,7 +65,7 @@ int get_ul_tda(gNB_MAC_INST *nrmac, int frame, int slot) return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots) } -static bwp_info_t get_pusch_bwp_start_size(NR_UE_info_t *UE) +bwp_info_t get_pusch_bwp_start_size(NR_UE_info_t *UE) { NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP; NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; @@ -1819,6 +1819,7 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, sched_pusch->slot, sched_pusch->rbSize); + sched_pusch->bwp_info = bwp_info; sched_pusch->rbStart = rbStart; /* no need to recompute the TBS, it will be the same */ @@ -2029,6 +2030,7 @@ static void pf_ul(module_id_t module_id, update_ul_ue_R_Qm(sched_pusch->mcs, current_BWP->mcs_table, current_BWP->pusch_Config, &sched_pusch->R, &sched_pusch->Qm); sched_pusch->rbStart = rbStart; sched_pusch->rbSize = min_rb; + sched_pusch->bwp_info = bwp_info; sched_pusch->frame = sched_frame; sched_pusch->slot = sched_slot; sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm, @@ -2222,6 +2224,7 @@ static void pf_ul(module_id_t module_id, sched_pusch->rbSize = rbSize; sched_pusch->tb_size = TBS; + sched_pusch->bwp_info = bwp_info; sched_pusch->frame = sched_frame; sched_pusch->slot = sched_slot; LOG_D(NR_MAC, @@ -2251,6 +2254,106 @@ static void pf_ul(module_id_t module_id, } } +nfapi_nr_pusch_pdu_t *prepare_pusch_pdu(nfapi_nr_ul_tti_request_t *future_ul_tti_req, + const NR_UE_info_t *UE, + const NR_ServingCellConfigCommon_t *scc, + const NR_sched_pusch_t *sched_pusch, + int transform_precoding, + int harq_id, + int harq_round, + int fh, + int rnti) +{ + nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu; + memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t)); + const NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP; + + pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; + pusch_pdu->rnti = rnti; + pusch_pdu->handle = 0; //not yet used + pusch_pdu->bwp_size = sched_pusch->bwp_info.bwpSize; + pusch_pdu->bwp_start = sched_pusch->bwp_info.bwpStart; + pusch_pdu->subcarrier_spacing = ul_bwp->scs; + pusch_pdu->cyclic_prefix = 0; + pusch_pdu->target_code_rate = sched_pusch->R; + pusch_pdu->qam_mod_order = sched_pusch->Qm; + pusch_pdu->mcs_index = sched_pusch->mcs; + pusch_pdu->mcs_table = ul_bwp->mcs_table; + pusch_pdu->transform_precoding = transform_precoding; + if (ul_bwp->pusch_Config && ul_bwp->pusch_Config->dataScramblingIdentityPUSCH) + pusch_pdu->data_scrambling_id = *ul_bwp->pusch_Config->dataScramblingIdentityPUSCH; + else + pusch_pdu->data_scrambling_id = *scc->physCellId; + pusch_pdu->nrOfLayers = sched_pusch->nrOfLayers; + // DMRS + pusch_pdu->num_dmrs_cdm_grps_no_data = sched_pusch->dmrs_info.num_dmrs_cdm_grps_no_data; + pusch_pdu->dmrs_ports = ((1 << sched_pusch->nrOfLayers) - 1); + pusch_pdu->ul_dmrs_symb_pos = sched_pusch->dmrs_info.ul_dmrs_symb_pos; + pusch_pdu->dmrs_config_type = sched_pusch->dmrs_info.dmrs_config_type; + pusch_pdu->scid = sched_pusch->dmrs_info.scid; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1] + pusch_pdu->pusch_identity = sched_pusch->dmrs_info.pusch_identity; + pusch_pdu->ul_dmrs_scrambling_id = sched_pusch->dmrs_info.dmrs_scrambling_id; + /* Allocation in frequency domain */ + pusch_pdu->resource_alloc = 1; //type 1 + pusch_pdu->rb_start = sched_pusch->rbStart; + pusch_pdu->rb_size = sched_pusch->rbSize; + pusch_pdu->vrb_to_prb_mapping = 0; + pusch_pdu->frequency_hopping = fh; + /* Resource Allocation in time domain */ + pusch_pdu->start_symbol_index = sched_pusch->tda_info.startSymbolIndex; + pusch_pdu->nr_of_symbols = sched_pusch->tda_info.nrOfSymbols; + /* PUSCH PDU */ + pusch_pdu->pusch_data.rv_index = nr_get_rv(harq_round % 4); + pusch_pdu->pusch_data.harq_process_id = harq_id; + pusch_pdu->pusch_data.new_data_indicator = (harq_round == 0) ? 1 : 0; // not NDI but indicator for new transmission + pusch_pdu->pusch_data.tb_size = sched_pusch->tb_size; + pusch_pdu->pusch_data.num_cb = 0; // CBG not supported + // Beamforming + pusch_pdu->beamforming.num_prgs = 0; + pusch_pdu->beamforming.prg_size = 0; // bwp_size; + pusch_pdu->beamforming.dig_bf_interface = 1; + pusch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index; + /* TRANSFORM PRECODING --------------------------------------------------------*/ + if (pusch_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled) { + // U as specified in section 6.4.1.1.1.2 in 38.211, if sequence hopping and group hopping are disabled + pusch_pdu->dfts_ofdm.low_papr_group_number = sched_pusch->dmrs_info.pusch_identity % 30; + pusch_pdu->dfts_ofdm.low_papr_sequence_number = sched_pusch->dmrs_info.low_papr_sequence_number; + } + + + pusch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(sched_pusch->tb_size << 3, sched_pusch->R); + pusch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = 0; + if (UE->sc_info.rateMatching_PUSCH) { + // TBS_LBRM according to section 5.4.2.1 of 38.212 + long *maxMIMO_Layers = UE->sc_info.maxMIMO_Layers_PUSCH; + if (!maxMIMO_Layers && ul_bwp && ul_bwp->pusch_Config) + maxMIMO_Layers = ul_bwp->pusch_Config->maxRank; + AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n"); + pusch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(ul_bwp->mcs_table, + UE->sc_info.ul_bw_tbslbrm, + *maxMIMO_Layers); + } + /* PUSCH PTRS */ + if (sched_pusch->dmrs_info.ptrsConfig) { + bool valid_ptrs_setup = false; + pusch_pdu->pusch_ptrs.ptrs_ports_list = calloc_or_fail(2, sizeof(nfapi_nr_ptrs_ports_t)); + valid_ptrs_setup = set_ul_ptrs_values(sched_pusch->dmrs_info.ptrsConfig, + pusch_pdu->rb_size, + pusch_pdu->mcs_index, + pusch_pdu->mcs_table, + &pusch_pdu->pusch_ptrs.ptrs_freq_density, + &pusch_pdu->pusch_ptrs.ptrs_time_density, + &pusch_pdu->pusch_ptrs.ptrs_ports_list->ptrs_re_offset, + &pusch_pdu->pusch_ptrs.num_ptrs_ports, + &pusch_pdu->pusch_ptrs.ul_ptrs_power, + pusch_pdu->nr_of_symbols); + if (valid_ptrs_setup == true) + pusch_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS; // enable PUSCH PTRS + } else + pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS + return pusch_pdu; +} + static bool nr_ulsch_preprocessor(module_id_t module_id, frame_t frame, slot_t slot) { gNB_MAC_INST *nr_mac = RC.nrmac[module_id]; @@ -2364,8 +2467,6 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, slot_t slot, nfapi_ uint16_t rnti = UE->rnti; sched_ctrl->SR = false; - int *tpmi = NULL; - int8_t harq_id = sched_pusch->ul_harq_pid; if (harq_id < 0) { /* PP has not selected a specific HARQ Process, get a new one */ @@ -2474,9 +2575,16 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, slot_t slot, nfapi_ "Invalid future_ul_tti_req->n_pdus %d\n", future_ul_tti_req->n_pdus); future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; - future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); - nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu; - memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t)); + future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); + nfapi_nr_pusch_pdu_t *pusch_pdu = prepare_pusch_pdu(future_ul_tti_req, + UE, + scc, + sched_pusch, + current_BWP->transform_precoding, + harq_id, + cur_harq->round, + current_BWP->pusch_Config && current_BWP->pusch_Config->frequencyHopping, + rnti); future_ul_tti_req->n_pdus += 1; LOG_D(NR_MAC, @@ -2488,101 +2596,10 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, slot_t slot, nfapi_ future_ul_tti_req->SFN, future_ul_tti_req->Slot); - pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; - pusch_pdu->rnti = rnti; - pusch_pdu->handle = 0; //not yet used - - /* FAPI: BWP */ - - pusch_pdu->bwp_size = current_BWP->BWPSize; - pusch_pdu->bwp_start = current_BWP->BWPStart; - pusch_pdu->subcarrier_spacing = current_BWP->scs; - pusch_pdu->cyclic_prefix = 0; - - /* FAPI: PUSCH information always included */ - pusch_pdu->target_code_rate = sched_pusch->R; - pusch_pdu->qam_mod_order = sched_pusch->Qm; - pusch_pdu->mcs_index = sched_pusch->mcs; - pusch_pdu->mcs_table = current_BWP->mcs_table; - pusch_pdu->transform_precoding = current_BWP->transform_precoding; - if (current_BWP->pusch_Config && current_BWP->pusch_Config->dataScramblingIdentityPUSCH) - pusch_pdu->data_scrambling_id = *current_BWP->pusch_Config->dataScramblingIdentityPUSCH; - else - pusch_pdu->data_scrambling_id = *scc->physCellId; - pusch_pdu->nrOfLayers = sched_pusch->nrOfLayers; - // If nrOfLayers is the same as in srs_feedback, we use the best TPMI, i.e. the one in srs_feedback. - // Otherwise, we use the valid TPMI that we saved in the first transmission. - if (pusch_pdu->nrOfLayers != (sched_ctrl->srs_feedback.ul_ri + 1)) - tpmi = &sched_pusch->tpmi; - pusch_pdu->num_dmrs_cdm_grps_no_data = sched_pusch->dmrs_info.num_dmrs_cdm_grps_no_data; - - /* FAPI: DMRS */ - pusch_pdu->num_dmrs_cdm_grps_no_data = sched_pusch->dmrs_info.num_dmrs_cdm_grps_no_data; - pusch_pdu->dmrs_ports = ((1<nrOfLayers) - 1); - pusch_pdu->ul_dmrs_symb_pos = sched_pusch->dmrs_info.ul_dmrs_symb_pos; - pusch_pdu->dmrs_config_type = sched_pusch->dmrs_info.dmrs_config_type; - pusch_pdu->scid = 0; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1] - const NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig = get_DMRS_UplinkConfig(current_BWP->pusch_Config, &sched_pusch->tda_info); - if (pusch_pdu->transform_precoding) { // transform precoding disabled - long *scramblingid=NULL; - pusch_pdu->pusch_identity = *scc->physCellId; - if (NR_DMRS_UplinkConfig && pusch_pdu->scid == 0) - scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID0; - else if (NR_DMRS_UplinkConfig) - scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID1; - if (scramblingid == NULL) - pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; - else - pusch_pdu->ul_dmrs_scrambling_id = *scramblingid; - } - else { - pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; - if (NR_DMRS_UplinkConfig && - NR_DMRS_UplinkConfig->transformPrecodingEnabled && - NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity != NULL) - pusch_pdu->pusch_identity = *NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity; - else if (NR_DMRS_UplinkConfig) - pusch_pdu->pusch_identity = *scc->physCellId; - } - pusch_pdu->scid = 0; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1] - pusch_pdu->dmrs_ports = ((1<nrOfLayers) - 1); - - /* FAPI: Pusch Allocation in frequency domain */ - pusch_pdu->resource_alloc = 1; //type 1 - pusch_pdu->rb_start = sched_pusch->rbStart; - pusch_pdu->rb_size = sched_pusch->rbSize; - pusch_pdu->vrb_to_prb_mapping = 0; - if (current_BWP->pusch_Config==NULL || current_BWP->pusch_Config->frequencyHopping==NULL) - pusch_pdu->frequency_hopping = 0; - else - pusch_pdu->frequency_hopping = 1; - - /* FAPI: Resource Allocation in time domain */ - pusch_pdu->start_symbol_index = sched_pusch->tda_info.startSymbolIndex; - pusch_pdu->nr_of_symbols = sched_pusch->tda_info.nrOfSymbols; - - /* PUSCH PDU */ - AssertFatal(cur_harq->round < nr_mac->ul_bler.harq_round_max, - "RV index %d is out of bounds\n", - cur_harq->round % 4); - pusch_pdu->pusch_data.rv_index = nr_get_rv(cur_harq->round % 4); - pusch_pdu->pusch_data.harq_process_id = harq_id; - pusch_pdu->pusch_data.new_data_indicator = (cur_harq->round == 0) ? 1 : 0; // not NDI but indicator for new transmission - pusch_pdu->pusch_data.tb_size = sched_pusch->tb_size; - pusch_pdu->pusch_data.num_cb = 0; //CBG not supported - - // Beamforming - pusch_pdu->beamforming.num_prgs = 0; - pusch_pdu->beamforming.prg_size = 0; // bwp_size; - pusch_pdu->beamforming.dig_bf_interface = 1; - pusch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index; - - pusch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(sched_pusch->tb_size<<3,sched_pusch->R); // Calacualte the normalized tx_power for PHR long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL; int tbs_bits = pusch_pdu->pusch_data.tb_size << 3; - sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs, tbs_bits, sched_pusch->rbSize, @@ -2592,57 +2609,6 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, slot_t slot, nfapi_ deltaMCS, false); - NR_UE_ServingCell_Info_t *sc_info = &UE->sc_info; - if (sc_info->rateMatching_PUSCH) { - // TBS_LBRM according to section 5.4.2.1 of 38.212 - long *maxMIMO_Layers = sc_info->maxMIMO_Layers_PUSCH; - if (!maxMIMO_Layers) - maxMIMO_Layers = current_BWP->pusch_Config->maxRank; - AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n"); - pusch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = - nr_compute_tbslbrm(current_BWP->mcs_table, sc_info->ul_bw_tbslbrm, *maxMIMO_Layers); - } else - pusch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = 0; - - LOG_D(NR_MAC,"PUSCH PDU : data_scrambling_identity %x, dmrs_scrambling_id %x\n",pusch_pdu->data_scrambling_id,pusch_pdu->ul_dmrs_scrambling_id); - /* TRANSFORM PRECODING --------------------------------------------------------*/ - - if (pusch_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled){ - - // U as specified in section 6.4.1.1.1.2 in 38.211, if sequence hopping and group hopping are disabled - pusch_pdu->dfts_ofdm.low_papr_group_number = pusch_pdu->pusch_identity % 30; - - // V as specified in section 6.4.1.1.1.2 in 38.211 V = 0 if sequence hopping and group hopping are disabled - if ((!NR_DMRS_UplinkConfig || - !NR_DMRS_UplinkConfig->transformPrecodingEnabled || - (!NR_DMRS_UplinkConfig->transformPrecodingEnabled->sequenceGroupHopping && !NR_DMRS_UplinkConfig->transformPrecodingEnabled->sequenceHopping)) && - !scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->groupHoppingEnabledTransformPrecoding) - pusch_pdu->dfts_ofdm.low_papr_sequence_number = 0; - else - AssertFatal(1==0,"Hopping mode is not supported in transform precoding\n"); - - LOG_D(NR_MAC,"TRANSFORM PRECODING IS ENABLED. CDM groups: %d, U: %d MCS table: %d\n", pusch_pdu->num_dmrs_cdm_grps_no_data, pusch_pdu->dfts_ofdm.low_papr_group_number, current_BWP->mcs_table); - } - - /*-----------------------------------------------------------------------------*/ - - /* PUSCH PTRS */ - if (NR_DMRS_UplinkConfig && NR_DMRS_UplinkConfig->phaseTrackingRS != NULL) { - bool valid_ptrs_setup = false; - pusch_pdu->pusch_ptrs.ptrs_ports_list = (nfapi_nr_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ptrs_ports_t)); - valid_ptrs_setup = set_ul_ptrs_values(NR_DMRS_UplinkConfig->phaseTrackingRS->choice.setup, - pusch_pdu->rb_size, pusch_pdu->mcs_index, pusch_pdu->mcs_table, - &pusch_pdu->pusch_ptrs.ptrs_freq_density,&pusch_pdu->pusch_ptrs.ptrs_time_density, - &pusch_pdu->pusch_ptrs.ptrs_ports_list->ptrs_re_offset,&pusch_pdu->pusch_ptrs.num_ptrs_ports, - &pusch_pdu->pusch_ptrs.ul_ptrs_power, pusch_pdu->nr_of_symbols); - if (valid_ptrs_setup==true) { - pusch_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS; // enable PUSCH PTRS - } - } - else{ - pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS - } - /* look up the PDCCH PDU for this BWP and CORESET. If it does not exist, * create it */ NR_SearchSpace_t *ss = sched_ctrl->search_space; @@ -2663,26 +2629,15 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, slot_t slot, nfapi_ LOG_D(NR_MAC,"Configuring ULDCI/PDCCH in %d.%d at CCE %d, rnti %04x\n", frame,slot,sched_ctrl->cce_index,rnti); /* Fill PDCCH DL DCI PDU */ - nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci]; + nfapi_nr_dl_dci_pdu_t *dci_pdu = prepare_dci_pdu(pdcch_pdu, + scc, + ss, + coreset, + sched_ctrl->aggregation_level, + sched_ctrl->cce_index, + UE->UE_beam_index, + rnti); pdcch_pdu->numDlDci++; - dci_pdu->RNTI = rnti; - if (coreset->pdcch_DMRS_ScramblingID && - ss->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) { - dci_pdu->ScramblingId = *coreset->pdcch_DMRS_ScramblingID; - dci_pdu->ScramblingRNTI = rnti; - } else { - dci_pdu->ScramblingId = *scc->physCellId; - dci_pdu->ScramblingRNTI = 0; - } - dci_pdu->AggregationLevel = sched_ctrl->aggregation_level; - dci_pdu->CceIndex = sched_ctrl->cce_index; - dci_pdu->beta_PDCCH_1_0 = 0; - dci_pdu->powerControlOffsetSS = 1; - dci_pdu->precodingAndBeamforming.num_prgs = 0; - dci_pdu->precodingAndBeamforming.prg_size = 0; - dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 1; - dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0; - dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index; dci_pdu_rel15_t uldci_payload; memset(&uldci_payload, 0, sizeof(uldci_payload)); @@ -2695,6 +2650,12 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, slot_t slot, nfapi_ sched_pusch->frame, sched_pusch->slot, sched_ctrl->ul_harq_processes[harq_id].round); + + // If nrOfLayers is the same as in srs_feedback, we use the best TPMI, i.e. the one in srs_feedback. + // Otherwise, we use the valid TPMI that we saved in the first transmission. + int *tpmi = NULL; + if (pusch_pdu->nrOfLayers != (sched_ctrl->srs_feedback.ul_ri + 1)) + tpmi = &sched_pusch->tpmi; config_uldci(&UE->sc_info, pusch_pdu, &uldci_payload, diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 6acf4ae1d8..a817378534 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -170,6 +170,24 @@ void config_uldci(const NR_UE_ServingCell_Info_t *sc_info, uint8_t ndi, NR_UE_UL_BWP_t *ul_bwp, NR_SearchSpace__searchSpaceType_PR ss_type); +dci_pdu_rel15_t prepare_dci_dl_payload(const gNB_MAC_INST *gNB_mac, + const NR_UE_info_t *UE, + nr_rnti_type_t rnti_type, + NR_SearchSpace__searchSpaceType_PR ss_type, + const nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu, + const NR_sched_pdsch_t *sched_pdsch, + const NR_sched_pucch_t *pucch, + int harq_pid, + int tb_scaling, + bool is_sib1); +nfapi_nr_dl_dci_pdu_t *prepare_dci_pdu(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, + const NR_ServingCellConfigCommon_t *scc, + const NR_SearchSpace_t *ss, + const NR_ControlResourceSet_t *coreset, + int aggregation_level, + int cce_index, + int beam_index, + int rnti); void nr_schedule_pucch(gNB_MAC_INST *nrmac, frame_t frameP, slot_t slotP); @@ -252,12 +270,6 @@ void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo, long pdsch_HARQ_ACK_Codebook, uint16_t cset0_bwp_size); -void prepare_dci(const NR_UE_ServingCell_Info_t *servingCellInfo, - const NR_UE_DL_BWP_t *current_BWP, - const NR_ControlResourceSet_t *coreset, - dci_pdu_rel15_t *dci_pdu_rel15, - nr_dci_format_t format); - void set_r_pucch_parms(int rsetindex, int r_pucch, int bwp_size, @@ -323,7 +335,26 @@ void nr_check_Msg4_MsgB_Ack(module_id_t module_id, frame_t frame, slot_t slot, N void mac_remove_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rnti); NR_UE_info_t *get_new_nr_ue_inst(uid_allocator_t *uia, rnti_t rnti, NR_CellGroupConfig_t *CellGroup); int nr_get_default_pucch_res(int pucch_ResourceCommon); - +nfapi_nr_pusch_pdu_t *prepare_pusch_pdu(nfapi_nr_ul_tti_request_t *future_ul_tti_req, + const NR_UE_info_t *UE, + const NR_ServingCellConfigCommon_t *scc, + const NR_sched_pusch_t *sched_pusch, + int transform_precoding, + int harq_id, + int harq_round, + int fh, + int rnti); +nfapi_nr_dl_tti_pdsch_pdu_rel15_t *prepare_pdsch_pdu(nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu, + const gNB_MAC_INST *mac, + const NR_UE_info_t *UE, + const NR_sched_pdsch_t *sched_pdsch, + const NR_PDSCH_Config_t *pdsch_Config, + bool is_sib1, + int harq_round, + int rnti, + int beam_index, + int nl_tbslbrm, + int pdu_index); int nr_write_ce_dlsch_pdu(module_id_t module_idP, const NR_UE_sched_ctrl_t *ue_sched_ctl, unsigned char *mac_pdu, @@ -425,7 +456,8 @@ NR_beam_alloc_t beam_allocation_procedure(NR_beam_info_t *beam_info, int frame, void reset_beam_status(NR_beam_info_t *beam_info, int frame, int slot, int beam_index, int slots_per_frame, bool new_beam); void beam_selection_procedures(gNB_MAC_INST *mac, NR_UE_info_t *UE); void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t frameP, slot_t slotP); - +bwp_info_t get_pdsch_bwp_start_size(gNB_MAC_INST *nr_mac, NR_UE_info_t *UE); +bwp_info_t get_pusch_bwp_start_size(NR_UE_info_t *UE); size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset_rsrp); long get_lcid_from_drbid(int drb_id); diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 3918e0215c..31c00239d2 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -392,6 +392,11 @@ typedef struct NR_pusch_dmrs { uint16_t ul_dmrs_symb_pos; uint8_t num_dmrs_cdm_grps_no_data; nfapi_nr_dmrs_type_e dmrs_config_type; + int dmrs_scrambling_id; + int pusch_identity; + int scid; + int low_papr_sequence_number; + NR_PTRS_UplinkConfig_t *ptrsConfig; } NR_pusch_dmrs_t; typedef struct NR_sched_pusch { @@ -413,7 +418,6 @@ typedef struct NR_sched_pusch { /// UL HARQ PID to use for this UE, or -1 for "any new" int8_t ul_harq_pid; - uint8_t nrOfLayers; int tpmi; @@ -421,6 +425,7 @@ typedef struct NR_sched_pusch { int time_domain_allocation; NR_tda_info_t tda_info; NR_pusch_dmrs_t dmrs_info; + bwp_info_t bwp_info; int phr_txpower_calc; } NR_sched_pusch_t; @@ -436,7 +441,10 @@ typedef struct NR_pdsch_dmrs { uint8_t N_DMRS_SLOT; uint16_t dl_dmrs_symb_pos; uint8_t numDmrsCdmGrpsNoData; + uint32_t scrambling_id; + int n_scid; nfapi_nr_dmrs_type_e dmrsConfigType; + NR_PTRS_DownlinkConfig_t *phaseTrackingRS; } NR_pdsch_dmrs_t; typedef struct NR_sched_pdsch { @@ -460,7 +468,7 @@ typedef struct NR_sched_pdsch { uint16_t pm_index; uint8_t nrOfLayers; - + bwp_info_t bwp_info; NR_pdsch_dmrs_t dmrs_parms; // time_domain_allocation is the index of a list of tda int time_domain_allocation;