diff --git a/executables/nr-ue.c b/executables/nr-ue.c index 29e9bb3c23..71c36bb74e 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -355,6 +355,9 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { nr_dcireq_t dcireq; nr_scheduled_response_t scheduled_response; + uint32_t nb_rb, start_rb; + uint8_t nb_symb_sch, start_symbol, mcs, precod_nbr_layers, harq_pid, rvidx; + uint16_t n_rnti; // Process Rx data for one sub-frame if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) { @@ -367,12 +370,38 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { nr_ue_dcireq(&dcireq); //to be replaced with function pointer later scheduled_response.dl_config = &dcireq.dl_config_req; - scheduled_response.ul_config = NULL; + scheduled_response.ul_config = &dcireq.ul_config_req; scheduled_response.tx_request = NULL; scheduled_response.module_id = UE->Mod_id; scheduled_response.CC_id = 0; scheduled_response.frame = proc->frame_rx; scheduled_response.slot = proc->nr_tti_rx; + + //--------------------------Temporary configuration-----------------------------// + n_rnti = 0x1234; + nb_rb = 50; + start_rb = 30; + nb_symb_sch = 12; + start_symbol = 2; + precod_nbr_layers = 1; + mcs = 9; + harq_pid = 0; + rvidx = 0; + //------------------------------------------------------------------------------// + + scheduled_response.ul_config->sfn_slot = NR_UPLINK_SLOT; + scheduled_response.ul_config->number_pdus = 1; + scheduled_response.ul_config->ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH; + scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.rnti = n_rnti; + scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.number_rbs = nb_rb; + scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.start_rb = start_rb; + scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.number_symbols = nb_symb_sch; + scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.start_symbol = start_symbol; + scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.mcs = mcs; + scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.ndi = 0; + scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.rv = rvidx; + scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = precod_nbr_layers; + scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.harq_process_nbr = harq_pid; nr_ue_scheduled_response(&scheduled_response); #ifdef UE_SLOT_PARALLELISATION @@ -417,6 +446,7 @@ typedef struct processingData_s { } processingData_t; void UE_processing(void *arg) { + uint8_t thread_id; processingData_t *rxtxD=(processingData_t *) arg; UE_nr_rxtx_proc_t *proc = &rxtxD->proc; PHY_VARS_NR_UE *UE = rxtxD->UE; @@ -433,10 +463,14 @@ void UE_processing(void *arg) { #endif */ + if (proc->nr_tti_tx == NR_UPLINK_SLOT || UE->frame_parms.frame_type == FDD){ + thread_id = PHY_vars_UE_g[UE->Mod_id][0]->current_thread_id[proc->nr_tti_tx]; + + if (UE->mode != loop_through_memory) - phy_procedures_nrUE_TX(UE,proc,0,0); + phy_procedures_nrUE_TX(UE,proc,0,thread_id); } diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c index e7e02520d6..25f415601e 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c @@ -168,10 +168,12 @@ uint8_t nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, uint16_t start_sc, start_rb; int8_t Wf[2], Wt[2], l0, l_prime[2], delta; uint16_t n_dmrs; - uint8_t dmrs_type; + uint8_t dmrs_type, length_dmrs; uint8_t mapping_type; - int ap, start_symbol, i; - int sample_offsetF; + int ap, start_symbol, Nid_cell, i; + int sample_offsetF, N_RE_prime, N_PRB_oh; + uint16_t n_rnti; + uint32_t TBS; NR_UE_ULSCH_t *ulsch_ue; NR_UL_UE_HARQ_t *harq_process_ul_ue; @@ -179,12 +181,34 @@ uint8_t nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, NR_UE_PUSCH *pusch_ue = UE->pusch_vars[thread_id][eNB_id]; num_of_codewords = 1; // tmp assumption + length_dmrs = 1; + n_rnti = 0x1234; + Nid_cell = 0; + N_PRB_oh = 0; // higher layer (RRC) parameter xOverhead in PUSCH-ServingCellConfig + + for (cwd_index = 0;cwd_index < num_of_codewords; cwd_index++) { ulsch_ue = UE->ulsch[thread_id][eNB_id][cwd_index]; harq_process_ul_ue = ulsch_ue->harq_processes[harq_pid]; + ulsch_ue->length_dmrs = length_dmrs; + ulsch_ue->rnti = n_rnti; + ulsch_ue->Nid_cell = Nid_cell; + ulsch_ue->Nsc_pusch = harq_process_ul_ue->nb_rb*NR_NB_SC_PER_RB; + ulsch_ue->Nsymb_pusch = harq_process_ul_ue->number_of_symbols; + ulsch_ue->nb_re_dmrs = UE->dmrs_UplinkConfig.pusch_maxLength*(UE->dmrs_UplinkConfig.pusch_dmrs_type == pusch_dmrs_type1)?6:4; + + N_RE_prime = NR_NB_SC_PER_RB*harq_process_ul_ue->number_of_symbols - ulsch_ue->nb_re_dmrs - N_PRB_oh; + + harq_process_ul_ue->num_of_mod_symbols = N_RE_prime*harq_process_ul_ue->nb_rb*num_of_codewords; + + TBS = nr_compute_tbs( harq_process_ul_ue->mcs, harq_process_ul_ue->nb_rb, ulsch_ue->Nsymb_pusch, ulsch_ue->nb_re_dmrs, ulsch_ue->length_dmrs, harq_process_ul_ue->Nl); + + harq_process_ul_ue->TBS = TBS; + + /////////////////////////ULSCH coding///////////////////////// /////////// diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h index 96a7ba3205..5873c84d8f 100755 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h @@ -52,6 +52,7 @@ typedef struct { int slot; fapi_nr_dl_config_request_t dl_config_req; + fapi_nr_ul_config_request_t ul_config_req; } nr_dcireq_t; typedef struct {