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minor chanels for IF4p5 in RRU

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This commit is contained in:
Raymond Knopp
2017-10-24 00:55:24 +02:00
parent 5d5efb7b74
commit b18f9d6a76
5 changed files with 17 additions and 12 deletions
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openair1/PHY/LTE_TRANSPORT/if4_tools.c
+2 -1
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@@ -207,7 +207,7 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
} else if (packet_type >= IF4p5_PRACH &&
packet_type <= IF4p5_PRACH+4) {
// FIX: hard coded prach samples length
LOG_D(PHY,"IF4p5_PRACH: frame %d, subframe %d\n",frame,subframe);
LOG_D(PHY,"IF4p5_PRACH: frame %d, subframe %d,packet type %x\n",frame,subframe,packet_type);
db_fulllength = PRACH_NUM_SAMPLES;
if (eth->flags == ETH_RAW_IF4p5_MODE) {
@@ -248,6 +248,7 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
packet_type)) < 0) {
perror("ETHERNET write for IF4p5_PRACH\n");
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE_IF, 0 );
} else {
AssertFatal(1==0, "send_IF4p5 - Unknown packet_type %x", packet_type);
openair1/PHY/LTE_TRANSPORT/if4_tools.h
+5 -5
View File
@@ -39,11 +39,11 @@
#define IF4p5_PULFFT 0x0019
#define IF4p5_PDLFFT 0x0020
#define IF4p5_PRACH 0x0021
#define IF4p5_PRACH_BR_CE0 0x0021
#define IF4p5_PRACH_BR_CE1 0x0022
#define IF4p5_PRACH_BR_CE2 0x0023
#define IF4p5_PRACH_BR_CE3 0x0024
#define IF4p5_PULTICK 0x0025
#define IF4p5_PRACH_BR_CE0 0x0022
#define IF4p5_PRACH_BR_CE1 0x0023
#define IF4p5_PRACH_BR_CE2 0x0024
#define IF4p5_PRACH_BR_CE3 0x0025
#define IF4p5_PULTICK 0x0026
struct IF4p5_header {
/// Type
openair1/PHY/LTE_TRANSPORT/prach.c
+1 -1
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@@ -640,7 +640,7 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
#if defined(EXMIMO) || defined(OAI_USRP)
prach_start = (ue->rx_offset+subframe*ue->frame_parms.samples_per_tti-ue->hw_timing_advance-ue->N_TA_offset);
#ifdef PRACH_DEBUG
LOG_I(PHY,"[UE %d] prach_start %d, rx_offset %d, hw_timing_advance %d, N_TA_offset %d\n", ue->Mod_id,
LOG_D(PHY,"[UE %d] prach_start %d, rx_offset %d, hw_timing_advance %d, N_TA_offset %d\n", ue->Mod_id,
prach_start,
ue->rx_offset,
ue->hw_timing_advance,