|
|
|
@@ -573,34 +573,24 @@ void fill_dci_pdu_rel15(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
|
|
|
|
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
|
|
|
|
|
pos=fsize;
|
|
|
|
|
*dci_pdu |= ((dci_pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_size-pos));
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment,fsize,N_RB,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
// Time domain assignment
|
|
|
|
|
pos+=4;
|
|
|
|
|
*dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment&0xf) << (dci_size-pos));
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"time-domain assignment %d (3 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
// VRB to PRB mapping
|
|
|
|
|
|
|
|
|
|
pos++;
|
|
|
|
|
*dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping&0x1)<<(dci_size-pos);
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
// MCS
|
|
|
|
|
pos+=5;
|
|
|
|
|
*dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs&0x1f)<<(dci_size-pos);
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
// TB scaling
|
|
|
|
|
pos+=2;
|
|
|
|
|
*dci_pdu |= ((uint64_t)dci_pdu_rel15->tb_scaling&0x3)<<(dci_size-pos);
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"tb_scaling %d (2 bits)=> %d (0x%lx)\n",dci_pdu_rel15->tb_scaling,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case NR_RNTI_C:
|
|
|
|
@@ -608,18 +598,14 @@ void fill_dci_pdu_rel15(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
|
|
|
|
// indicating a DL DCI format 1bit
|
|
|
|
|
pos++;
|
|
|
|
|
*dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator&1)<<(dci_size-pos);
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
// Freq domain assignment (275rb >> fsize = 16)
|
|
|
|
|
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
|
|
|
|
|
pos+=fsize;
|
|
|
|
|
*dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_size-pos));
|
|
|
|
|
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"Freq domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment,fsize,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
uint16_t is_ra = 1;
|
|
|
|
|
for (int i=0; i<fsize; i++)
|
|
|
|
@@ -653,72 +639,52 @@ void fill_dci_pdu_rel15(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
|
|
|
|
|
|
|
|
|
pos+=4;
|
|
|
|
|
*dci_pdu |= ((dci_pdu_rel15->time_domain_assignment&0xf) << (dci_size-pos));
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"Time domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment,4,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
// VRB to PRB mapping 1bit
|
|
|
|
|
pos++;
|
|
|
|
|
*dci_pdu |= (dci_pdu_rel15->vrb_to_prb_mapping&1)<<(dci_size-pos);
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"VRB to PRB %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping,1,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
// MCS 5bit //bit over 32, so dci_pdu ++
|
|
|
|
|
pos+=5;
|
|
|
|
|
*dci_pdu |= (dci_pdu_rel15->mcs&0x1f)<<(dci_size-pos);
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"MCS %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,5,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
// New data indicator 1bit
|
|
|
|
|
pos++;
|
|
|
|
|
*dci_pdu |= (dci_pdu_rel15->ndi&1)<<(dci_size-pos);
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
// Redundancy version 2bit
|
|
|
|
|
pos+=2;
|
|
|
|
|
*dci_pdu |= (dci_pdu_rel15->rv&0x3)<<(dci_size-pos);
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
// HARQ process number 4bit
|
|
|
|
|
pos+=4;
|
|
|
|
|
*dci_pdu |= ((dci_pdu_rel15->harq_pid&0xf)<<(dci_size-pos));
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
// Downlink assignment index 2bit
|
|
|
|
|
pos+=2;
|
|
|
|
|
*dci_pdu |= ((dci_pdu_rel15->dai&3)<<(dci_size-pos));
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"DAI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->dai,2,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
// TPC command for scheduled PUCCH 2bit
|
|
|
|
|
pos+=2;
|
|
|
|
|
*dci_pdu |= ((dci_pdu_rel15->tpc&3)<<(dci_size-pos));
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
// PUCCH resource indicator 3bit
|
|
|
|
|
pos+=3;
|
|
|
|
|
*dci_pdu |= ((dci_pdu_rel15->pucch_resource_indicator&0x7)<<(dci_size-pos));
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"PUCCH RI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pucch_resource_indicator,3,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
// PDSCH-to-HARQ_feedback timing indicator 3bit
|
|
|
|
|
pos+=3;
|
|
|
|
|
*dci_pdu |= ((dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator&0x7)<<(dci_size-pos));
|
|
|
|
|
#ifdef DEBUG_FILL_DCI
|
|
|
|
|
LOG_D(MAC,"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator,3,dci_size-pos,*dci_pdu);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
} //end else
|
|
|
|
|
break;
|
|
|
|
@@ -1363,4 +1329,4 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
*/
|
|
|
|
|
*/
|
|
|
|
|