merge develop and fix one double free bug in nr_dlschsim

This commit is contained in:
Laurent THOMAS
2022-04-13 15:15:11 +02:00
65 changed files with 1003 additions and 772 deletions
+24 -20
View File
@@ -536,6 +536,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
}
nr_generate_modulation_table();
gNB->pdcch_gold_init = cfg->cell_config.phy_cell_id.value;
nr_init_pdcch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
@@ -549,28 +550,30 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(nb_codewords*sizeof(uint32_t *));
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *));
AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<nb_codewords; q++) {
for (int q=0; q<NR_NB_NSCID; q++) {
pdsch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pdsch_dmrs_init_length*sizeof(uint32_t));
AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d codeword %d - malloc failed\n", slot, symb, q);
AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
}
}
}
nr_init_pdsch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
for (int nscid = 0; nscid < NR_NB_NSCID; nscid++) {
gNB->pdsch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
nr_init_pdsch_dmrs(gNB, nscid, cfg->cell_config.phy_cell_id.value);
}
//PUSCH DMRS init
gNB->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(2*sizeof(uint32_t ***));
gNB->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(NR_NB_NSCID*sizeof(uint32_t ***));
uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
for(int nscid=0; nscid<2; nscid++) {
for(int nscid=0; nscid<NR_NB_NSCID; nscid++) {
pusch_dmrs[nscid] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
AssertFatal(pusch_dmrs[nscid]!=NULL, "NR init: pusch_dmrs for nscid %d - malloc failed\n", nscid);
@@ -585,9 +588,10 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
}
}
uint32_t Nid_pusch[2] = {cfg->cell_config.phy_cell_id.value,cfg->cell_config.phy_cell_id.value};
LOG_D(PHY,"Initializing PUSCH DMRS Gold sequence with (%x,%x)\n",Nid_pusch[0],Nid_pusch[1]);
nr_gold_pusch(gNB, &Nid_pusch[0]);
for (int nscid=0; nscid<NR_NB_NSCID; nscid++) {
gNB->pusch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
nr_gold_pusch(gNB, nscid, gNB->pusch_gold_init[nscid]);
}
//CSI RS init
gNB->nr_gold_csi_rs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
@@ -607,6 +611,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
}
}
gNB->csi_gold_init = cfg->cell_config.phy_cell_id.value;
nr_init_csi_rs(gNB, cfg->cell_config.phy_cell_id.value);
for (int id=0; id<NUMBER_OF_NR_SRS_MAX; id++) {
@@ -644,12 +649,12 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
common_vars->beam_id = (uint8_t **)malloc16(Ptx*sizeof(uint8_t*));
for (i=0;i<Ptx;i++){
common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n",
i,common_vars->txdataF[i],
fp->samples_per_frame_wCP*sizeof(int32_t));
common_vars->beam_id[i] = (uint8_t*)malloc16_clear(fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t));
memset(common_vars->beam_id[i],255,fp->symbols_per_slot*fp->slots_per_frame);
common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n",
i,common_vars->txdataF[i],
fp->samples_per_frame_wCP*sizeof(int32_t));
common_vars->beam_id[i] = (uint8_t*)malloc16_clear(fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t));
memset(common_vars->beam_id[i],255,fp->symbols_per_slot*fp->slots_per_frame);
}
for (i=0;i<Prx;i++){
common_vars->rxdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t));
@@ -740,10 +745,9 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(pdcch_dmrs);
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
for (int q = 0; q < nb_codewords; q++)
for (int q = 0; q < NR_NB_NSCID; q++)
free_and_zero(pdsch_dmrs[slot][symb][q]);
free_and_zero(pdsch_dmrs[slot][symb]);
}
@@ -771,7 +775,7 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(csi_rs);
for (int id = 0; id < NUMBER_OF_NR_SRS_MAX; id++) {
for (int i = 0; i < Prx; i++){
for (int i = 0; i < Prx; i++) {
free_and_zero(gNB->nr_srs_info[id]->srs_received_signal[i]);
free_and_zero(gNB->nr_srs_info[id]->srs_ls_estimated_channel[i]);
free_and_zero(gNB->nr_srs_info[id]->srs_estimated_channel_freq[i]);
+35 -78
View File
@@ -159,7 +159,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
NR_UE_COMMON *const common_vars = &ue->common_vars;
NR_UE_PBCH **const pbch_vars = ue->pbch_vars;
NR_UE_PRACH **const prach_vars = ue->prach_vars;
int i,j,slot,symb, gNB_id, th_id;
int i,slot,symb, gNB_id, th_id;
NR_UE_SRS **const srs_vars = ue->srs_vars;
@@ -210,18 +210,21 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
ue->nr_gold_pusch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
uint32_t ***pusch_dmrs = ue->nr_gold_pusch_dmrs;
ue->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
for (slot=0; slot<fp->slots_per_frame; slot++) {
pusch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
pusch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
AssertFatal(pusch_dmrs[slot]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d - malloc failed\n", slot);
for (symb=0; symb<fp->symbols_per_slot; symb++) {
pusch_dmrs[slot][symb] = (uint32_t *)malloc16(pusch_dmrs_init_length*sizeof(uint32_t));
pusch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *));
AssertFatal(pusch_dmrs[slot][symb]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<NR_NB_NSCID; q++) {
pusch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pusch_dmrs_init_length*sizeof(uint32_t));
AssertFatal(pusch_dmrs[slot][symb][q]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
}
}
}
@@ -298,24 +301,38 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(nb_codewords*sizeof(uint32_t *));
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *));
AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<nb_codewords; q++) {
for (int q=0; q<NR_NB_NSCID; q++) {
pdsch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pdsch_dmrs_init_length*sizeof(uint32_t));
AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d codeword %d - malloc failed\n", slot, symb, q);
AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
}
}
}
// DLSCH
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
for (gNB_id = 0; gNB_id < ue->n_connected_gNB+1; gNB_id++) {
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
ue->pdsch_vars[th_id][gNB_id] = (NR_UE_PDSCH *)malloc16_clear(sizeof(NR_UE_PDSCH));
}
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
phy_init_nr_ue_PDSCH( ue->pdsch_vars[th_id][gNB_id], fp );
}
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
for (i=0; i<nb_codewords; i++) {
ue->pdsch_vars[th_id][gNB_id]->llr[i] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );//Q_m = 8 bits/Sym, Code_Rate=3, Number of Segments =8, Circular Buffer K_cb = 8448
}
for (i=0; i<NR_MAX_NB_LAYERS; i++) {
ue->pdsch_vars[th_id][gNB_id]->layer_llr[i] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );//Q_m = 8 bits/Sym, Code_Rate=3, Number of Segments =8, Circular Buffer K_cb = 8448
}
}
}
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
ue->pdcch_vars[th_id][gNB_id] = (NR_UE_PDCCH *)malloc16_clear(sizeof(NR_UE_PDCCH));
}
@@ -343,49 +360,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
}
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
phy_init_nr_ue_PDSCH( ue->pdsch_vars[th_id][gNB_id], fp );
}
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
for (i=0; i<nb_codewords; i++) {
ue->pdsch_vars[th_id][gNB_id]->llr[i] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );//Q_m = 8 bits/Sym, Code_Rate=3, Number of Segments =8, Circular Buffer K_cb = 8448
}
for (i=0; i<NR_MAX_NB_LAYERS; i++) {
ue->pdsch_vars[th_id][gNB_id]->layer_llr[i] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );//Q_m = 8 bits/Sym, Code_Rate=3, Number of Segments =8, Circular Buffer K_cb = 8448
}
}
// 100 PRBs * 12 REs/PRB * 4 PDCCH SYMBOLS * 2 LLRs/RE
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
ue->pdcch_vars[th_id][gNB_id]->llr = (int16_t *)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
ue->pdcch_vars[th_id][gNB_id]->llr16 = (int16_t *)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
ue->pdcch_vars[th_id][gNB_id]->wbar = (int16_t *)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
ue->pdcch_vars[th_id][gNB_id]->rxdataF_comp = (int32_t **)malloc16_clear( 4*fp->nb_antennas_rx*sizeof(int32_t *) );
ue->pdcch_vars[th_id][gNB_id]->rho = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
ue->pdcch_vars[th_id][gNB_id]->rxdataF_ext = (int32_t **)malloc16_clear( 4*fp->nb_antennas_rx*sizeof(int32_t *) );
ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_ext = (int32_t **)malloc16_clear( 4*fp->nb_antennas_rx*sizeof(int32_t *) );
// Channel estimates
ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates = (int32_t **)malloc16_clear(4*fp->nb_antennas_rx*sizeof(int32_t *));
ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_time = (int32_t **)malloc16_clear(4*fp->nb_antennas_rx*sizeof(int32_t *));
for (i=0; i<fp->nb_antennas_rx; i++) {
ue->pdcch_vars[th_id][gNB_id]->rho[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*(100*12*4));
for (j=0; j<4; j++) {
int idx = (j*fp->nb_antennas_rx)+i;
ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates[idx] = (int32_t *)malloc16_clear( sizeof(int32_t)*fp->symbols_per_slot*(fp->ofdm_symbol_size+LTE_CE_FILTER_LENGTH) );
ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_time[idx] = (int32_t *)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2 );
// size_t num = 7*2*fp->N_RB_DL*12;
size_t num = 4*273*12; // 4 symbols, 100 PRBs, 12 REs per PRB
ue->pdcch_vars[th_id][gNB_id]->rxdataF_comp[idx] = (int32_t *)malloc16_clear(sizeof(int32_t) * num);
ue->pdcch_vars[th_id][gNB_id]->rxdataF_ext[idx] = (int32_t *)malloc16_clear(sizeof(int32_t) * num);
ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_ext[idx] = (int32_t *)malloc16_clear(sizeof(int32_t) * num);
}
}
}
// RACH
prach_vars[gNB_id]->prachF = (int16_t *)malloc16_clear( sizeof(int)*(7*2*sizeof(int)*(fp->ofdm_symbol_size*12)) );
prach_vars[gNB_id]->prach = (int16_t *)malloc16_clear( sizeof(int)*(7*2*sizeof(int)*(fp->ofdm_symbol_size*12)) );
@@ -423,6 +397,8 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
for (int q=0; q<NR_NB_NSCID; q++)
free_and_zero(ue->nr_gold_pusch_dmrs[slot][symb][q]);
free_and_zero(ue->nr_gold_pusch_dmrs[slot][symb]);
}
free_and_zero(ue->nr_gold_pusch_dmrs[slot]);
@@ -456,10 +432,9 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
}
free_and_zero(ue->nr_gold_pdcch[0]);
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (int slot=0; slot<fp->slots_per_frame; slot++) {
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
for (int q=0; q<nb_codewords; q++)
for (int q=0; q<NR_NB_NSCID; q++)
free_and_zero(ue->nr_gold_pdsch[0][slot][symb][q]);
free_and_zero(ue->nr_gold_pdsch[0][slot][symb]);
}
@@ -467,38 +442,20 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
}
free_and_zero(ue->nr_gold_pdsch[0]);
for (int gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
for (int gNB_id = 0; gNB_id < ue->n_connected_gNB+1; gNB_id++) {
// PDSCH
for (int th_id = 0; th_id < RX_NB_TH_MAX; th_id++) {
free_and_zero(ue->pdsch_vars[th_id][gNB_id]->llr_shifts);
free_and_zero(ue->pdsch_vars[th_id][gNB_id]->llr128_2ndstream);
phy_term_nr_ue__PDSCH(ue->pdsch_vars[th_id][gNB_id], fp);
free_and_zero(ue->pdsch_vars[th_id][gNB_id]);
}
}
for (int gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
for (int th_id = 0; th_id < RX_NB_TH_MAX; th_id++) {
for (int i = 0; i < fp->nb_antennas_rx; i++) {
for (int j = 0; j < 4; j++) {
int idx = j * fp->nb_antennas_rx + i;
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates[idx]);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_time[idx]);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->rxdataF_comp[idx]);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->rxdataF_ext[idx]);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_ext[idx]);
}
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->rho[i]);
}
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->llr);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->llr16);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->wbar);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->rxdataF_comp);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->rho);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->rxdataF_ext);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_ext);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_time);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]);
}
@@ -155,8 +155,6 @@ typedef struct {
uint8_t h[MAX_NUM_CHANNEL_BITS];
/// Scrambled "b"-sequences (for definition see 36-211 V8.6 2009-03, p.14)
uint8_t b_tilde[MAX_NUM_CHANNEL_BITS];
/// Modulated "d"-sequences (for definition see 36-211 V8.6 2009-03, p.14)
int32_t d[MAX_NUM_RE];
/// Transform-coded "z"-sequences (for definition see 36-211 V8.6 2009-03, p.14-15)
int32_t z[MAX_NUM_RE];
/// "q" sequences for CQI/PMI (for definition see 36-212 V8.6 2009-03, p.27)
@@ -42,7 +42,7 @@
//#define DEBUG_ULSCH_MODULATION
void dft_lte(int32_t *z,int32_t *d, int32_t Msc_PUSCH, uint8_t Nsymb)
void dft_lte(int32_t *z,struct complex16 *input, int32_t Msc_PUSCH, uint8_t Nsymb)
{
#if defined(__x86_64__) || defined(__i386__)
@@ -66,7 +66,7 @@ void dft_lte(int32_t *z,int32_t *d, int32_t Msc_PUSCH, uint8_t Nsymb)
#endif
// printf("Doing lte_dft for Msc_PUSCH %d\n",Msc_PUSCH);
d0 = (uint32_t *)d;
d0 = (uint32_t *)input;
d1 = d0+Msc_PUSCH;
d2 = d1+Msc_PUSCH;
d3 = d2+Msc_PUSCH;
@@ -476,7 +476,8 @@ void ulsch_modulation(int32_t **txdataF,
// Modulation
ulsch_Msymb = G/Q_m;
/// Modulated "d"-sequences (for definition see 36-211 V8.6 2009-03, p.14)
struct complex16 d[MAX_NUM_RE] __attribute__((aligned(32)));
if(ulsch->cooperation_flag == 2)
// For Distributed Alamouti Scheme in Collabrative Communication
{
@@ -488,14 +489,14 @@ void ulsch_modulation(int32_t **txdataF,
//UE1, -x1*
((int16_t*)&ulsch->d[i])[0] = (ulsch->b_tilde[j] == 1) ? (gain_lin_QPSK) : -gain_lin_QPSK;
((int16_t*)&ulsch->d[i])[1] = (ulsch->b_tilde[j+1] == 1)? (-gain_lin_QPSK) : gain_lin_QPSK;
d[i].r = (ulsch->b_tilde[j] == 1) ? (gain_lin_QPSK) : -gain_lin_QPSK;
d[i].i = (ulsch->b_tilde[j+1] == 1)? (-gain_lin_QPSK) : gain_lin_QPSK;
// if (i<Msc_PUSCH)
// printf("input %d (%p): %d,%d\n", i,&ulsch->d[i],((int16_t*)&ulsch->d[i])[0],((int16_t*)&ulsch->d[i])[1]);
// UE1, x0*
((int16_t*)&ulsch->d[i+1])[0] = (ulsch->b_tilde[j-2] == 1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
((int16_t*)&ulsch->d[i+1])[1] = (ulsch->b_tilde[j-1] == 1)? (gain_lin_QPSK) : -gain_lin_QPSK;
d[i+1].r = (ulsch->b_tilde[j-2] == 1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
d[i+1].i = (ulsch->b_tilde[j-1] == 1)? (gain_lin_QPSK) : -gain_lin_QPSK;
break;
@@ -521,8 +522,8 @@ void ulsch_modulation(int32_t **txdataF,
qam16_table_offset_im+=1;
((int16_t*)&ulsch->d[i])[0]=-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
((int16_t*)&ulsch->d[i])[1]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
d[i].r =-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
d[i].i =(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
//UE1,x0*
qam16_table_offset_re = 0;
@@ -544,8 +545,8 @@ void ulsch_modulation(int32_t **txdataF,
// ((int16_t*)&ulsch->d[i+1])[0]=-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
// ((int16_t*)&ulsch->d[i+1])[1]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
((int16_t*)&ulsch->d[i+1])[0]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
((int16_t*)&ulsch->d[i+1])[1]=-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
d[i+1].r=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
d[i+1].i=-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
break;
@@ -578,8 +579,8 @@ void ulsch_modulation(int32_t **txdataF,
qam64_table_offset_im+=1;
((int16_t*)&ulsch->d[i])[0]=-(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
((int16_t*)&ulsch->d[i])[1]=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
d[i].r=-(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
d[i].i=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
//UE1,x0*
qam64_table_offset_re = 0;
@@ -605,8 +606,8 @@ void ulsch_modulation(int32_t **txdataF,
qam64_table_offset_im+=1;
((int16_t*)&ulsch->d[i+1])[0]=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
((int16_t*)&ulsch->d[i+1])[1]=-(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
d[i+1].r=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
d[i+1].i=-(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
break;
@@ -621,8 +622,8 @@ void ulsch_modulation(int32_t **txdataF,
case 2:
// TODO: this has to be updated!!!
((int16_t*)&ulsch->d[i])[0] = (ulsch->b_tilde[j] == 1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
((int16_t*)&ulsch->d[i])[1] = (ulsch->b_tilde[j+1] == 1)? (-gain_lin_QPSK) : gain_lin_QPSK;
d[i].r = (ulsch->b_tilde[j] == 1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
d[i].i = (ulsch->b_tilde[j+1] == 1)? (-gain_lin_QPSK) : gain_lin_QPSK;
// if (i<Msc_PUSCH)
// printf("input %d/%d Msc_PUSCH %d (%p): %d,%d\n", i,Msymb,Msc_PUSCH,&ulsch->d[i],((int16_t*)&ulsch->d[i])[0],((int16_t*)&ulsch->d[i])[1]);
@@ -646,8 +647,8 @@ void ulsch_modulation(int32_t **txdataF,
qam16_table_offset_im+=1;
((int16_t*)&ulsch->d[i])[0]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
((int16_t*)&ulsch->d[i])[1]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
d[i].r=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
d[i].i=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
// printf("input(16qam) %d (%p): %d,%d\n", i,&ulsch->d[i],((int16_t*)&ulsch->d[i])[0],((int16_t*)&ulsch->d[i])[1]);
break;
@@ -676,8 +677,8 @@ void ulsch_modulation(int32_t **txdataF,
qam64_table_offset_im+=1;
((int16_t*)&ulsch->d[i])[0]=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
((int16_t*)&ulsch->d[i])[1]=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
d[i].r=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
d[i].i=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
break;
@@ -688,7 +689,7 @@ void ulsch_modulation(int32_t **txdataF,
// Transform Precoding
dft_lte(ulsch->z,ulsch->d,Msc_PUSCH,ulsch->Nsymb_pusch);
dft_lte(ulsch->z,d,Msc_PUSCH,ulsch->Nsymb_pusch);
DevAssert(txdataF);
+1 -1
View File
@@ -91,7 +91,7 @@ int slot_fep(PHY_VARS_UE *ue,
}
// subframe_offset_F = frame_parms->ofdm_symbol_size * frame_parms->symbols_per_tti * (Ns>>1);
if (l<0 || l>=7-frame_parms->Ncp) {
printf("slot_fep: l must be between 0 and %d\n",7-frame_parms->Ncp);
return(-1);
@@ -165,6 +165,11 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//------------------generate DMRS------------------//
if(pusch_pdu->ul_dmrs_scrambling_id != gNB->pusch_gold_init[pusch_pdu->scid]) {
gNB->pusch_gold_init[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
nr_gold_pusch(gNB, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
}
// transform precoding = 1 means disabled
if (pusch_pdu->transform_precoding == 1) {
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch,
@@ -1247,4 +1252,4 @@ int nr_srs_channel_estimation(PHY_VARS_gNB *gNB,
#endif
return 0;
}
}
+19 -29
View File
@@ -78,57 +78,47 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
}
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
{
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid) {
uint32_t x1, x2;
uint8_t reset;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
int pdsch_dmrs_init_length = ((fp->N_RB_DL*12)>>5)+1;
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
uint16_t N_n_scid[2]={Nid, Nid};
uint8_t n_scid=0; // again works only for 1_0
for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) {
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid));
LOG_D(PHY,"PDSCH DMRS slot %d, symb %d x2 %x, N_n_scid %d,n_scid %d\n",slot,symb,x2,N_n_scid[n_scid],n_scid);
for (uint32_t n=0; n<pdsch_dmrs_init_length; n++) {
pdsch_dmrs[slot][symb][0][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
if(nb_codewords>1)
memcpy(pdsch_dmrs[slot][symb][1],pdsch_dmrs[slot][symb][0],sizeof(uint32_t)*pdsch_dmrs_init_length);
reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) +((Nid<<1)+nscid));
LOG_D(PHY,"PDSCH DMRS slot %d, symb %d x2 %x, Nid %d,nscid %d\n",slot,symb,x2,Nid,nscid);
for (uint32_t n=0; n<pdsch_dmrs_init_length; n++) {
pdsch_dmrs[slot][symb][nscid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid) {
void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid) {
unsigned char ns;
unsigned int n,x1,x2;
int nscid, reset;
unsigned int nid;
int reset;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
unsigned short l;
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
for (nscid=0; nscid<2; nscid++) {
nid = Nid[nscid];
for (ns=0; ns<fp->slots_per_frame; ns++) {
for (l=0; l<fp->symbols_per_slot; l++) {
reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*ns+l+1) * ((nid<<1)+1) +((nid<<1)+nscid));
LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",ns,l,x2);
for (ns=0; ns<fp->slots_per_frame; ns++) {
for (l=0; l<fp->symbols_per_slot; l++) {
reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*ns+l+1) * ((nid<<1)+1) +((nid<<1)+nscid));
LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",ns,l,x2);
for (n=0; n<pusch_dmrs_init_length; n++) {
gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
for (n=0; n<pusch_dmrs_init_length; n++) {
gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
+16 -24
View File
@@ -76,46 +76,38 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
}
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
unsigned short *n_idDMRS)
{
int nscid,
uint32_t nid) {
unsigned int x1,x2,x2tmp0;
unsigned int nid;
uint8_t reset;
int pdsch_dmrs_init_length = ((ue->frame_parms.N_RB_DL*12)>>5)+1;
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
/// to be updated from higher layer
//unsigned short lbar = 0;
for (int nscid=0; nscid<nb_codewords; nscid++) {
for (int ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
for (int ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
nid = n_idDMRS[nscid];
for (int l=0; l<ue->frame_parms.symbols_per_slot; l++) {
for (int l=0; l<ue->frame_parms.symbols_per_slot; l++) {
reset = 1;
x2tmp0 = ((ue->frame_parms.symbols_per_slot*ns+l+1)*((nid<<1)+1))<<17;
x2 = (x2tmp0+(nid<<1)+nscid)%(1U<<31); //cinit
LOG_D(PHY,"UE DMRS slot %d, symb %d, x2 %x, nscid %d\n",ns,l,x2,nscid);
reset = 1;
x2tmp0 = ((ue->frame_parms.symbols_per_slot*ns+l+1)*((nid<<1)+1))<<17;
x2 = (x2tmp0+(nid<<1)+nscid)%(1U<<31); //cinit
LOG_D(PHY,"UE DMRS slot %d, symb %d, x2 %x, nscid %d\n",ns,l,x2,nscid);
for (int n=0; n<pdsch_dmrs_init_length; n++) {
ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
for (int n=0; n<pdsch_dmrs_init_length; n++) {
ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
uint16_t *N_n_scid,
uint16_t N_n_scid,
uint8_t n_scid)
{
uint32_t x1, x2, n;
uint8_t reset, slot, symb;
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
uint32_t ***pusch_dmrs = ue->nr_gold_pusch_dmrs;
uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
for (slot=0; slot<fp->slots_per_frame; slot++) {
@@ -123,10 +115,10 @@ void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
for (symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid));
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid<<1)+1) +((N_n_scid<<1)+n_scid));
LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",slot,symb,x2);
for (n=0; n<pusch_dmrs_init_length; n++) {
pusch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
pusch_dmrs[slot][symb][n_scid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
+2 -2
View File
@@ -37,10 +37,10 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB);
@param Nid is used for the initialization of x2, Physical cell Id by default or upper layer configured pdcch_scrambling_ID
*/
void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid);
void nr_init_csi_rs(PHY_VARS_gNB* gNB, uint32_t Nid);
void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid);
void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid);
int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
unsigned int Ns,
+3 -2
View File
@@ -61,10 +61,11 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
unsigned short n_idDMRS);
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
unsigned short *n_idDMRS);
int nscid,
uint32_t nid);
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
uint16_t *N_n_scid,
uint16_t N_n_scid,
uint8_t n_scid);
#endif
+4 -15
View File
@@ -30,7 +30,6 @@
void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
int16_t amp,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params,
uint16_t cell_id,
int slot){
NR_DL_FRAME_PARMS frame_parms=gNB->frame_parms;
@@ -52,20 +51,10 @@ void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
AssertFatal(b!=0, "Invalid CSI frequency domain mapping: no bit selected in bitmap\n");
// pre-computed for scrambling id equel to cell id
// if the scrambling id is not the cell id we need to re-initialize the rs
if (csi_params.scramb_id != cell_id) {
uint8_t reset;
uint32_t x1, x2;
uint32_t Nid = csi_params.scramb_id;
for (uint8_t symb=0; symb<frame_parms.symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<10) * (frame_parms.symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid));
for (uint32_t n=0; n<(csi_rs_length>>5)+1; n++) {
gold_csi_rs[symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
// if the scrambling id is not the one previously used to initialize we need to re-initialize the rs
if (csi_params.scramb_id != gNB->csi_gold_init) {
gNB->csi_gold_init = csi_params.scramb_id;
nr_init_csi_rs(gNB, csi_params.scramb_id);
}
switch (csi_params.row) {
+22 -13
View File
@@ -66,11 +66,12 @@ void nr_pdcch_scrambling(uint32_t *in,
}
}
void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
uint32_t **gold_pdcch_dmrs,
void nr_generate_dci(PHY_VARS_gNB *gNB,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms) {
NR_DL_FRAME_PARMS *frame_parms,
int slot) {
int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1] __attribute__((aligned(16))); // 3 for the max coreset duration
uint16_t cset_start_sc;
@@ -81,7 +82,7 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
int rb_offset;
int n_rb;
// compute rb_offset and n_prb based on frequency allocation
nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL];
nr_fill_cce_list(cce_list,0,pdcch_pdu_rel15);
@@ -95,6 +96,13 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
* in time: by its first slot and its first symbol*/
const nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[d];
if(dci_pdu->ScramblingId != gNB->pdcch_gold_init) {
gNB->pdcch_gold_init = dci_pdu->ScramblingId;
nr_init_pdcch_dmrs(gNB, dci_pdu->ScramblingId);
}
uint32_t **gold_pdcch_dmrs = gNB->nr_gold_pdcch_dmrs[slot];
cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
dci_idx = 0;
@@ -104,8 +112,8 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
uint32_t dmrs_length = n_rb*6; //2(QPSK)*3(per RB)*6(REG per CCE)
uint32_t encoded_length = dci_pdu->AggregationLevel*108; //2(QPSK)*9(per RB)*6(REG per CCE)
LOG_D(PHY, "DL_DCI : rb_offset %d, nb_rb %d, DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d),Scrambling_Id %d,ScramblingRNTI %x,PayloadSizeBits %d\n",
rb_offset, n_rb,dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType,
dci_pdu->ScramblingId,dci_pdu->ScramblingRNTI,dci_pdu->PayloadSizeBits);
rb_offset, n_rb,dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType,
dci_pdu->ScramblingId,dci_pdu->ScramblingRNTI,dci_pdu->PayloadSizeBits);
dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
/// DMRS QPSK modulation
@@ -115,10 +123,10 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
#ifdef DEBUG_PDCCH_DMRS
if(dci_pdu->RNTI!=0xFFFF) {
for (int i=0; i<dmrs_length>>1; i++)
printf("symb %d i %d %p gold seq 0x%08x mod_dmrs %d %d\n", symb, i,
&gold_pdcch_dmrs[symb][i>>5],gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] );
}
for (int i=0; i<dmrs_length>>1; i++)
printf("symb %d i %d %p gold seq 0x%08x mod_dmrs %d %d\n", symb, i,
&gold_pdcch_dmrs[symb][i>>5],gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] );
}
#endif
}
@@ -249,15 +257,16 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
}
void nr_generate_dci_top(processingData_L1tx_t *msgTx,
uint32_t **gold_pdcch_dmrs,
int slot,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms) {
for (int i=0; i<msgTx->num_ul_pdcch; i++)
nr_generate_dci(&msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
nr_generate_dci(msgTx->gNB,&msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
for (int i=0; i<msgTx->num_dl_pdcch; i++)
nr_generate_dci(&msgTx->pdcch_pdu[i].pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
nr_generate_dci(msgTx->gNB,&msgTx->pdcch_pdu[i].pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
}
+1 -1
View File
@@ -30,7 +30,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
uint16_t N_RB);
void nr_generate_dci_top(processingData_L1tx_t *msgTx,
uint32_t **gold_pdcch_dmrs,
int slot,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms);
+30 -20
View File
@@ -58,7 +58,6 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
PHY_VARS_gNB *gNB = msgTx->gNB;
NR_gNB_DLSCH_t *dlsch;
uint32_t ***pdsch_dmrs = gNB->nr_gold_pdsch_dmrs[slot];
int32_t** txdataF = gNB->common_vars.txdataF;
int16_t amp = AMP;
int xOverhead = 0;
@@ -93,6 +92,12 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
}
n_dmrs = (rel15->BWPStart+rel15->rbStart+rel15->rbSize)*nb_re_dmrs;
if(rel15->dlDmrsScramblingId != gNB->pdsch_gold_init[rel15->SCID]) {
gNB->pdsch_gold_init[rel15->SCID] = rel15->dlDmrsScramblingId;
nr_init_pdsch_dmrs(gNB, rel15->SCID, rel15->dlDmrsScramblingId);
}
uint32_t ***pdsch_dmrs = gNB->nr_gold_pdsch_dmrs[slot];
uint16_t dmrs_symbol_map = rel15->dlDmrsSymbPos;//single DMRS: 010000100 Double DMRS 110001100
uint8_t dmrs_len = get_num_dmrs(rel15->dlDmrsSymbPos);
uint16_t nb_re = ((12*rel15->NrOfSymbols)-nb_re_dmrs*dmrs_len-xOverhead)*rel15->rbSize*rel15->nrOfLayers;
@@ -146,17 +151,18 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
printf("\n");
#endif
/// scrambling
for (int q=0; q<rel15->NrOfCodewords; q++) {
uint32_t scrambled_output[encoded_length];
/// scrambling
start_meas(dlsch_scrambling_stats);
uint32_t scrambled_output[(encoded_length>>5)+4]; // modulator acces by 4 bytes in some cases
memset(scrambled_output, 0, sizeof(scrambled_output));
if ( encoded_length > rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * Qm * rel15->nrOfLayers) abort();
nr_pdsch_codeword_scrambling(output,
encoded_length,
q,
rel15->dataScramblingId,
rel15->rnti,
scrambled_output);
stop_meas(dlsch_scrambling_stats);
#ifdef DEBUG_DLSCH
printf("PDSCH scrambling:\n");
@@ -166,12 +172,16 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
printf("\n");
}
#endif
start_meas(dlsch_modulation_stats);
stop_meas(dlsch_scrambling_stats);
/// Modulation
start_meas(dlsch_modulation_stats);
nr_modulation(scrambled_output,
encoded_length,
Qm,
mod_symbs[q]);
stop_meas(dlsch_modulation_stats);
encoded_length,
Qm,
mod_symbs[q]);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PDSCH_MODULATION, 0);
stop_meas(dlsch_modulation_stats);
#ifdef DEBUG_DLSCH
printf("PDSCH Modulation: Qm %d(%d)\n", Qm, nb_re);
for (int i=0; i<nb_re>>3; i++) {
@@ -186,18 +196,18 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
start_meas(&gNB->dlsch_layer_mapping_stats);
/// Layer mapping
nr_layer_mapping(mod_symbs,
rel15->nrOfLayers,
nb_re,
tx_layers);
rel15->nrOfLayers,
nb_re,
tx_layers);
#ifdef DEBUG_DLSCH
printf("Layer mapping (%d layers):\n", rel15->nrOfLayers);
for (int l=0; l<rel15->nrOfLayers; l++)
for (int i=0; i<(nb_re/rel15->nrOfLayers)>>3; i++) {
printf("layer %d, Re %d..%d : ",l,i<<3,(i<<3)+7);
for (int j=0; j<8; j++) {
printf("l%d %d\t", tx_layers[l][((i<<3)+j)<<1], tx_layers[l][(((i<<3)+j)<<1)+1]);
}
printf("\n");
printf("layer %d, Re %d..%d : ",l,i<<3,(i<<3)+7);
for (int j=0; j<8; j++) {
printf("l%d %d\t", tx_layers[l][((i<<3)+j)<<1], tx_layers[l][(((i<<3)+j)<<1)+1]);
}
printf("\n");
}
#endif
@@ -216,7 +226,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
#ifdef DEBUG_DLSCH_MAPPING
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_re %d,nb_layers %d)\n",
start_sc, rel15->StartSymbolIndex, rel15->rbSize, nb_re,rel15->nrOfLayers);
start_sc, rel15->StartSymbolIndex, rel15->rbSize, nb_re,rel15->nrOfLayers);
#endif
start_meas(&gNB->dlsch_resource_mapping_stats);
@@ -269,7 +279,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
l_prime = 0;
}
/// DMRS QPSK modulation
nr_modulation(pdsch_dmrs[l][0], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
nr_modulation(pdsch_dmrs[l][rel15->SCID], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_DLSCH
printf("DMRS modulation (symbol %d, %d symbols, type %d):\n", l, n_dmrs, dmrs_Type);
@@ -290,7 +300,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
if(ptrs_symbol) {
/* PTRS QPSK Modulation for each OFDM symbol in a slot */
LOG_D(PHY,"Doing ptrs modulation for symbol %d, n_ptrs %d\n",l,n_ptrs);
nr_modulation(pdsch_dmrs[l][0], (n_ptrs<<1), DMRS_MOD_ORDER, mod_ptrs);
nr_modulation(pdsch_dmrs[l][rel15->SCID], (n_ptrs<<1), DMRS_MOD_ORDER, mod_ptrs);
}
}
uint16_t k = start_sc;
@@ -338,7 +338,6 @@ uint8_t get_nr_prach_duration(uint8_t prach_format);
void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
int16_t amp,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params,
uint16_t cell_id,
int slot);
void free_nr_prach_entry(PHY_VARS_gNB *gNB, int prach_id);
@@ -466,8 +466,11 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t gNB_id,
unsigned char Ns,
unsigned char symbol,
unsigned short scrambling_id,
unsigned short coreset_start_subcarrier,
unsigned short nb_rb_coreset)
unsigned short nb_rb_coreset,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size])
{
unsigned char aarx;
@@ -476,7 +479,6 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
int16_t ch[2],*pil,*rxF,*dl_ch,*fl,*fm,*fr;
int ch_offset,symbol_offset;
int **dl_ch_estimates =ue->pdcch_vars[proc->thread_id][gNB_id]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
ch_offset = ue->frame_parms.ofdm_symbol_size*symbol;
@@ -493,13 +495,11 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
fm = filt16a_m1;
fr = filt16a_r1;
// checking if re-initialization of scrambling IDs is needed (should be done here but scrambling ID for PDCCH is not taken from RRC)
/* if (( != ue->scramblingID_pdcch){
ue->scramblingID_pdcch=;
nr_gold_pdsch(ue,ue->scramblingID_pdcch);
}*/
if (scrambling_id != ue->scramblingID_pdcch){
ue->scramblingID_pdcch = scrambling_id;
nr_gold_pdcch(ue,ue->scramblingID_pdcch);
}
// generate pilot
int pilot[nb_rb_coreset * 3] __attribute__((aligned(16)));
@@ -511,7 +511,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
k = coreset_start_subcarrier;
pil = (int16_t *)&pilot[0];
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+1)];
dl_ch = (int16_t *)&dl_ch_estimates[aarx][ch_offset];
dl_ch = (int16_t *)&pdcch_dl_ch_estimates[aarx][ch_offset];
memset(dl_ch,0,4*(ue->frame_parms.ofdm_symbol_size));
@@ -666,6 +666,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned char Ns,
unsigned short p,
unsigned char symbol,
unsigned char nscid,
unsigned short scrambling_id,
unsigned short BWPStart,
uint8_t config_type,
unsigned short bwp_start_subcarrier,
@@ -703,11 +705,10 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
int8_t delta = get_delta(p, config_type);
// checking if re-initialization of scrambling IDs is needed
/*if ((XXX.scramblingID0 != ue->scramblingID[0]) || (XXX.scramblingID1 != ue->scramblingID[1])){
ue->scramblingID[0] = XXX.scramblingID0;
ue->scramblingID[1] = XXX.scramblingID1;
nr_gold_pdsch(ue,ue->scramblingID);
}*/
if (scrambling_id != ue->scramblingID_dlsch[nscid]){
ue->scramblingID_dlsch[nscid] = scrambling_id;
nr_gold_pdsch(ue, nscid, scrambling_id);
}
nr_pdsch_dmrs_rx(ue, Ns, ue->nr_gold_pdsch[gNB_id][Ns][symbol][0], &pilot[0], 1000+p, 0, nb_rb_pdsch+rb_offset, config_type);
@@ -44,8 +44,11 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t gNB_id,
unsigned char Ns,
unsigned char symbol,
unsigned short scrambling_id,
unsigned short coreset_start_subcarrier,
unsigned short nb_rb_coreset);
unsigned short nb_rb_coreset,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size]);
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
@@ -74,6 +77,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned char Ns,
unsigned short p,
unsigned char symbol,
unsigned char nscid,
unsigned short scrambling_id,
unsigned short BWPStart,
uint8_t config_type,
unsigned short bwp_start_subcarrier,
+58 -31
View File
@@ -42,6 +42,7 @@
#include "PHY/CODING/coding_extern.h"
#include "PHY/sse_intrin.h"
#include "common/utils/nr/nr_common.h"
#include <openair1/PHY/TOOLS/phy_scope_interface.h>
#include "assertions.h"
#include "T.h"
@@ -201,7 +202,7 @@ static void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
}
}
int32_t nr_pdcch_llr(NR_DL_FRAME_PARMS *frame_parms, int32_t **rxdataF_comp,
int32_t nr_pdcch_llr(NR_DL_FRAME_PARMS *frame_parms, int32_t rx_size, int32_t rxdataF_comp[][rx_size],
int16_t *pdcch_llr, uint8_t symbol,uint32_t coreset_nbr_rb) {
int16_t *rxF = (int16_t *) &rxdataF_comp[0][(symbol * coreset_nbr_rb * 12)];
int32_t i;
@@ -270,7 +271,8 @@ int32_t pdcch_llr(NR_DL_FRAME_PARMS *frame_parms,
//__m128i avg128P;
//compute average channel_level on each (TX,RX) antenna pair
void nr_pdcch_channel_level(int32_t **dl_ch_estimates_ext,
void nr_pdcch_channel_level(int32_t rx_size,
int32_t dl_ch_estimates_ext[][rx_size],
NR_DL_FRAME_PARMS *frame_parms,
int32_t *avg,
int symbol,
@@ -337,9 +339,11 @@ void nr_pdcch_channel_level(int32_t **dl_ch_estimates_ext,
// This function will extract the mapped DM-RS PDCCH REs as per 38.211 Section 7.4.1.3.2 (Mapping to physical resources)
void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
int32_t **dl_ch_estimates,
int32_t **rxdataF_ext,
int32_t **dl_ch_estimates_ext,
int32_t est_size,
int32_t dl_ch_estimates[][est_size],
int32_t rx_size,
int32_t rxdataF_ext[][rx_size],
int32_t dl_ch_estimates_ext[][rx_size],
uint8_t symbol,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t *coreset_freq_dom,
@@ -515,9 +519,9 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
#define print_shorts(s,x) printf("%s %d,%d,%d,%d,%d,%d,%d,%d\n",s,(x)[0],(x)[1],(x)[2],(x)[3],(x)[4],(x)[5],(x)[6],(x)[7])
void nr_pdcch_channel_compensation(int32_t **rxdataF_ext,
int32_t **dl_ch_estimates_ext,
int32_t **rxdataF_comp,
void nr_pdcch_channel_compensation(int32_t rx_size, int32_t rxdataF_ext[][rx_size],
int32_t dl_ch_estimates_ext[][rx_size],
int32_t rxdataF_comp[][rx_size],
int32_t **rho,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t symbol,
@@ -628,7 +632,8 @@ void nr_pdcch_channel_compensation(int32_t **rxdataF_ext,
void nr_pdcch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t rx_size,
int32_t rxdataF_comp[][rx_size],
uint8_t symbol) {
#if defined(__x86_64__) || defined(__i386__)
__m128i *rxdataF_comp128_0,*rxdataF_comp128_1;
@@ -664,19 +669,31 @@ void nr_pdcch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15,
int16_t *e_rx) {
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
int16_t *pdcch_e_rx,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15) {
uint32_t frame = proc->frame_rx;
uint32_t slot = proc->nr_slot_rx;
NR_UE_COMMON *common_vars = &ue->common_vars;
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][0];
uint8_t log2_maxh, aarx;
int32_t avgs;
int32_t avgP[4];
int n_rb,rb_offset;
// Pointers to extracted PDCCH symbols in frequency-domain.
int32_t rx_size = 4*273*12;
int32_t rxdataF_ext[4*frame_parms->nb_antennas_rx][rx_size];
int32_t rxdataF_comp[4*frame_parms->nb_antennas_rx][rx_size];
int32_t pdcch_dl_ch_estimates_ext[4*frame_parms->nb_antennas_rx][rx_size];
// Pointer to llrs, 4-bit resolution.
int32_t llr_size = 2*4*100*12;
int16_t llr[llr_size];
get_coreset_rballoc(rel15->coreset.frequency_domain_resource,&n_rb,&rb_offset);
LOG_D(PHY,"pdcch coreset: freq %x, n_rb %d, rb_offset %d\n",
rel15->coreset.frequency_domain_resource[0],n_rb,rb_offset);
@@ -684,9 +701,11 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
LOG_D(PHY,"in nr_pdcch_extract_rbs_single(rxdataF -> rxdataF_ext || dl_ch_estimates -> dl_ch_estimates_ext)\n");
nr_pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF,
pdcch_vars->dl_ch_estimates,
pdcch_vars->rxdataF_ext,
pdcch_vars->dl_ch_estimates_ext,
pdcch_est_size,
pdcch_dl_ch_estimates,
rx_size,
rxdataF_ext,
pdcch_dl_ch_estimates_ext,
s,
frame_parms,
rel15->coreset.frequency_domain_resource,
@@ -696,7 +715,8 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
LOG_D(PHY,"we enter nr_pdcch_channel_level(avgP=%d) => compute channel level based on ofdm symbol 0, pdcch_vars[eNB_id]->dl_ch_estimates_ext\n",*avgP);
LOG_D(PHY,"in nr_pdcch_channel_level(dl_ch_estimates_ext -> dl_ch_estimates_ext)\n");
// compute channel level based on ofdm symbol 0
nr_pdcch_channel_level(pdcch_vars->dl_ch_estimates_ext,
nr_pdcch_channel_level(rx_size,
pdcch_dl_ch_estimates_ext,
frame_parms,
avgP,
s,
@@ -718,26 +738,33 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
LOG_D(PHY,"we enter nr_pdcch_channel_compensation(log2_maxh=%d)\n",log2_maxh);
LOG_D(PHY,"in nr_pdcch_channel_compensation(rxdataF_ext x dl_ch_estimates_ext -> rxdataF_comp)\n");
// compute LLRs for ofdm symbol 0 only
nr_pdcch_channel_compensation(pdcch_vars->rxdataF_ext,
pdcch_vars->dl_ch_estimates_ext,
pdcch_vars->rxdataF_comp,
nr_pdcch_channel_compensation(rx_size, rxdataF_ext,
pdcch_dl_ch_estimates_ext,
rxdataF_comp,
NULL,
frame_parms,
s,
log2_maxh,
n_rb); // log2_maxh+I0_shift
UEscopeCopy(ue, pdcchRxdataF_comp, rxdataF_comp, sizeof(struct complex16), frame_parms->nb_antennas_rx, rx_size);
if (frame_parms->nb_antennas_rx > 1) {
LOG_D(PHY,"we enter nr_pdcch_detection_mrc(frame_parms->nb_antennas_rx=%d)\n", frame_parms->nb_antennas_rx);
nr_pdcch_detection_mrc(frame_parms, pdcch_vars->rxdataF_comp,s);
nr_pdcch_detection_mrc(frame_parms, rx_size, rxdataF_comp,s);
}
LOG_D(PHY,"we enter nr_pdcch_llr(for symbol %d), pdcch_vars[eNB_id]->rxdataF_comp ---> pdcch_vars[eNB_id]->llr \n",s);
LOG_D(PHY,"in nr_pdcch_llr(rxdataF_comp -> llr)\n");
nr_pdcch_llr(frame_parms,
pdcch_vars->rxdataF_comp,
pdcch_vars->llr,
rx_size,
rxdataF_comp,
llr,
s,
n_rb);
UEscopeCopy(ue, pdcchLlr, llr, sizeof(int16_t), 1, llr_size);
#if T_TRACER
// T(T_UE_PHY_PDCCH_IQ, T_INT(frame_parms->N_RB_DL), T_INT(frame_parms->N_RB_DL),
@@ -751,8 +778,8 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
}
LOG_D(PHY,"we enter nr_pdcch_demapping_deinterleaving(), number of candidates %d\n",rel15->number_of_candidates);
nr_pdcch_demapping_deinterleaving((uint32_t *) pdcch_vars->llr,
(uint32_t *) e_rx,
nr_pdcch_demapping_deinterleaving((uint32_t *) llr,
(uint32_t *) pdcch_e_rx,
rel15->coreset.duration,
rel15->coreset.StartSymbolIndex,
n_rb,
@@ -833,13 +860,12 @@ static uint16_t nr_dci_false_detection(uint64_t *dci,
return x;
}
uint8_t nr_dci_decoding_procedure(int16_t *e_rx,
PHY_VARS_NR_UE *ue,
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int16_t *pdcch_e_rx,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15) {
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][0];
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15,
NR_UE_PDCCH_CONFIG *phy_pdcch_config) {
//int gNB_id = 0;
int16_t tmp_e[16*108];
@@ -870,7 +896,8 @@ uint8_t nr_dci_decoding_procedure(int16_t *e_rx,
LOG_D(PHY, "(%i.%i) Trying DCI candidate %d of %d number of candidates, CCE %d (%d), L %d, length %d, format %s\n",
proc->frame_rx, proc->nr_slot_rx, j, rel15->number_of_candidates, CCEind, e_rx_cand_idx, L, dci_length, nr_dci_format_string[rel15->dci_format_options[k]]);
nr_pdcch_unscrambling(&e_rx[e_rx_cand_idx], rel15->coreset.scrambling_rnti, L*108, rel15->coreset.pdcch_dmrs_scrambling_id, tmp_e);
nr_pdcch_unscrambling(&pdcch_e_rx[e_rx_cand_idx], rel15->coreset.scrambling_rnti, L*108, rel15->coreset.pdcch_dmrs_scrambling_id, tmp_e);
#ifdef DEBUG_DCI_DECODING
uint32_t *z = (uint32_t *) &e_rx[e_rx_cand_idx];
@@ -915,7 +942,7 @@ uint8_t nr_dci_decoding_procedure(int16_t *e_rx,
}
e_rx_cand_idx += 9*L*6*2; //e_rx index for next candidate (L CCEs, 6 REGs per CCE and 9 REs per REG and 2 uint16_t per RE)
}
pdcch_vars->nb_search_space = 0;
phy_pdcch_config->nb_search_space = 0;
return(dci_ind->number_of_dcis);
}
+34 -22
View File
@@ -101,7 +101,7 @@ void free_list(NR_UE_SSB *node) {
}
int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_initial_symbol)
int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_initial_symbol, NR_UE_PDCCH_CONFIG *phy_pdcch_config)
{
NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
int ret =-1;
@@ -165,6 +165,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini
0,
temp_ptr->i_ssb,
SISO,
phy_pdcch_config,
&result);
temp_ptr=temp_ptr->next_ssb;
@@ -215,6 +216,8 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
int ret=-1;
int rx_power=0; //aarx,
NR_UE_PDCCH_CONFIG phy_pdcch_config={0};
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_INITIAL_UE_SYNC, VCD_FUNCTION_IN);
@@ -335,7 +338,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
if (ret==0) { //we got sss channel
nr_gold_pbch(ue);
ret = nr_pbch_detection(proc, ue, 1); // start pbch detection at first symbol after pss
ret = nr_pbch_detection(proc, ue, 1, &phy_pdcch_config); // start pbch detection at first symbol after pss
}
if (ret == 0) {
@@ -354,15 +357,17 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
nr_gold_pdcch(ue,fp->Nid_cell);
// compute the scrambling IDs for PDSCH DMRS
for (int i=0; i<2; i++)
ue->scramblingID[i]=fp->Nid_cell;
nr_gold_pdsch(ue,ue->scramblingID);
for (int i=0; i<NR_NB_NSCID; i++) {
ue->scramblingID_dlsch[i]=fp->Nid_cell;
nr_gold_pdsch(ue, i, ue->scramblingID_dlsch[i]);
}
// initialize the pusch dmrs
uint16_t N_n_scid[2] = {fp->Nid_cell,fp->Nid_cell};
int n_scid = 0; // This quantity is indicated by higher layer parameter dmrs-SeqInitialization
nr_init_pusch_dmrs(ue, N_n_scid, n_scid);
for (int i=0; i<NR_NB_NSCID; i++) {
ue->scramblingID_ulsch[i]=fp->Nid_cell;
nr_init_pusch_dmrs(ue, ue->scramblingID_ulsch[i], i);
}
// we also need to take into account the shift by samples_per_frame in case the if is true
if (ue->ssb_offset < sync_pos_frame){
@@ -531,33 +536,40 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
// if stand alone and sync on ssb do sib1 detection as part of initial sync
if (sa==1 && ret==0) {
bool dec = false;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][0];
int gnb_id = 0; //FIXME
int coreset_nb_rb=0;
int coreset_start_rb=0;
for(int n_ss = 0; n_ss<pdcch_vars->nb_search_space; n_ss++) {
uint8_t nb_symb_pdcch = pdcch_vars->pdcch_config[n_ss].coreset.duration;
int start_symb = pdcch_vars->pdcch_config[n_ss].coreset.StartSymbolIndex;
get_coreset_rballoc(pdcch_vars->pdcch_config[n_ss].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb);
// Hold the channel estimates in frequency domain.
int32_t pdcch_est_size = fp->symbols_per_slot*(fp->ofdm_symbol_size+LTE_CE_FILTER_LENGTH);
int32_t pdcch_dl_ch_estimates[4*fp->nb_antennas_rx][pdcch_est_size];
for(int n_ss = 0; n_ss<phy_pdcch_config.nb_search_space; n_ss++) {
uint8_t nb_symb_pdcch = phy_pdcch_config.pdcch_config[n_ss].coreset.duration;
int start_symb = phy_pdcch_config.pdcch_config[n_ss].coreset.StartSymbolIndex;
get_coreset_rballoc(phy_pdcch_config.pdcch_config[n_ss].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb);
for (uint16_t l=start_symb; l<start_symb+nb_symb_pdcch; l++) {
nr_slot_fep_init_sync(ue,
proc,
l, // the UE PHY has no notion of the symbols to be monitored in the search space
pdcch_vars->slot,
is*fp->samples_per_frame+pdcch_vars->sfn*fp->samples_per_frame+ue->rx_offset);
phy_pdcch_config.slot,
is*fp->samples_per_frame+phy_pdcch_config.sfn*fp->samples_per_frame+ue->rx_offset);
if (coreset_nb_rb > 0)
nr_pdcch_channel_estimation(ue,
proc,
0,
pdcch_vars->slot,
phy_pdcch_config.slot,
l,
fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
coreset_nb_rb);
fp->Nid_cell,
fp->first_carrier_offset+(phy_pdcch_config.pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
coreset_nb_rb,
pdcch_est_size,
pdcch_dl_ch_estimates);
}
int dci_cnt = nr_ue_pdcch_procedures(gnb_id, ue, proc, n_ss);
int dci_cnt = nr_ue_pdcch_procedures(gnb_id, ue, proc, pdcch_est_size, pdcch_dl_ch_estimates, &phy_pdcch_config, n_ss);
if (dci_cnt>0){
NR_UE_DLSCH_t *dlsch = ue->dlsch_SI[gnb_id];
if (dlsch && (dlsch->active == 1)) {
@@ -570,8 +582,8 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
nr_slot_fep_init_sync(ue,
proc,
m,
pdcch_vars->slot, // same slot and offset as pdcch
is*fp->samples_per_frame+pdcch_vars->sfn*fp->samples_per_frame+ue->rx_offset);
phy_pdcch_config.slot, // same slot and offset as pdcch
is*fp->samples_per_frame+phy_pdcch_config.sfn*fp->samples_per_frame+ue->rx_offset);
}
int ret = nr_ue_pdsch_procedures(ue,
+3 -1
View File
@@ -391,6 +391,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
uint8_t gNB_id,
uint8_t i_ssb,
MIMO_mode_t mimo_mode,
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
fapiPbch_t *result) {
NR_UE_COMMON *nr_ue_common_vars = &ue->common_vars;
int max_h=0;
@@ -577,7 +578,8 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t *rx_ind=calloc(sizeof(*rx_ind),1);
uint16_t number_pdus = 1;
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id);
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id, phy_pdcch_config);
nr_fill_rx_indication(rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, gNB_id, ue, NULL, NULL, number_pdus, proc,(void *)result);
if (ue->if_inst && ue->if_inst->dl_indication)
@@ -1076,8 +1076,11 @@ uint32_t dlsch_decoding_emul(PHY_VARS_NR_UE *phy_vars_ue,
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15,
int16_t *e_rx);
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
int16_t *pdcch_e_rx,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15);
/*! \brief Extract PSS and SSS resource elements
@param phy_vars_ue Pointer to UE variables
@@ -1130,11 +1133,13 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
uint8_t i_ssb,
MIMO_mode_t mimo_mode,
fapiPbch_t* result);
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
fapiPbch_t* result);
int nr_pbch_detection(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
int pbch_initial_symbol);
PHY_VARS_NR_UE *ue,
int pbch_initial_symbol,
NR_UE_PDCCH_CONFIG *phy_pdcch_config);
uint16_t rx_pbch_emul(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t eNB_id,
@@ -1628,11 +1633,12 @@ uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms,
#include <openair1/PHY/LTE_TRANSPORT/transport_proto.h>
uint8_t nr_dci_decoding_procedure(int16_t *e_rx,
PHY_VARS_NR_UE *ue,
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int16_t *pdcch_e_rx,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15);
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15,
NR_UE_PDCCH_CONFIG *phy_pdcch_config);
/** \brief This function is the top-level entry point to PDSCH demodulation, after frequency-domain transformation and channel estimation. It performs
@@ -260,6 +260,8 @@ typedef struct {
uint16_t ptrs_symbols;
// PTRS symbol index, to be updated every PTRS symbol within a slot.
uint8_t ptrs_symbol_index;
uint8_t nscid;
uint16_t dlDmrsScramblingId;
/// PDU BITMAP
uint16_t pduBitmap;
} NR_DL_UE_HARQ_t;
+11 -3
View File
@@ -32,6 +32,7 @@
#include <stdint.h>
#include "PHY/NR_REFSIG/dmrs_nr.h"
#include "PHY/NR_REFSIG/ptrs_nr.h"
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "PHY/MODULATION/nr_modulation.h"
@@ -215,9 +216,16 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
/////////////////////////DMRS Modulation/////////////////////////
///////////
uint32_t **pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
if(pusch_pdu->ul_dmrs_scrambling_id != UE->scramblingID_ulsch[pusch_pdu->scid]) {
UE->scramblingID_ulsch[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
nr_init_pusch_dmrs(UE, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
}
uint32_t ***pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
uint16_t n_dmrs = (pusch_pdu->bwp_start + start_rb + nb_rb)*((dmrs_type == pusch_dmrs_type1) ? 6:4);
int16_t mod_dmrs[n_dmrs<<1] __attribute((aligned(16)));
///////////
////////////////////////////////////////////////////////////////////////
@@ -382,7 +390,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
// TODO: performance improvement, we can skip the modulation of DMRS symbols outside the bandwidth part
// Perform this on gold sequence, not required when SC FDMA operation is done,
LOG_D(PHY,"DMRS in symbol %d\n",l);
nr_modulation(pusch_dmrs[l], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // Qm = 2 as DMRS is QPSK modulated
nr_modulation(pusch_dmrs[l][pusch_pdu->scid], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
} else {
dmrs_idx = 0;
}
@@ -392,7 +400,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) {
is_ptrs_sym = 1;
nr_modulation(pusch_dmrs[l], nb_rb, DMRS_MOD_ORDER, mod_ptrs);
nr_modulation(pusch_dmrs[l][pusch_pdu->scid], nb_rb, DMRS_MOD_ORDER, mod_ptrs);
}
}
+3
View File
@@ -558,6 +558,9 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric,
}
//#endif
if (Nid1==N_ID_1_NUMBER)
return -1;
int re = 0;
int im = 0;
if (Nid1 == N_ID_1_NUMBER) {
+43 -38
View File
@@ -678,52 +678,42 @@ static void uePbchIQ (scopeGraphData_t **data, OAIgraph_t *graph, PHY_VARS_NR_U
static void uePcchLLR (scopeGraphData_t **data, OAIgraph_t *graph, PHY_VARS_NR_UE *phy_vars_ue, int eNB_id, int UE_id) {
// PDCCH LLRs
if (!phy_vars_ue->pdcch_vars[0][eNB_id]->llr)
if (!data[pdcchLlr])
return;
//int num_re = 4*273*12; // 12*frame_parms->N_RB_DL*num_pdcch_symbols
//int Qm = 2;
int coded_bits_per_codeword = 2*4*100*12; //num_re*Qm;
const int sz=data[pdcchLlr]->lineSz;
float *llr, *bit;
oai_xygraph_getbuff(graph, &bit, &llr, coded_bits_per_codeword*RX_NB_TH_MAX, 0);
int base=0;
oai_xygraph_getbuff(graph, &bit, &llr, sz, 0);
for (int thr=0 ; thr < RX_NB_TH_MAX ; thr ++ ) {
int16_t *pdcch_llr = (int16_t *) phy_vars_ue->pdcch_vars[thr][eNB_id]->llr;
int16_t *pdcch_llr = (int16_t *)(data[pdcchLlr]+1);
for (int i=0; i<coded_bits_per_codeword; i++) {
llr[base+i] = (float) pdcch_llr[i];
}
base+=coded_bits_per_codeword;
for (int i=0; i<sz; i++) {
llr[i] = (float) pdcch_llr[i];
}
AssertFatal(base <= coded_bits_per_codeword*RX_NB_TH_MAX, "");
oai_xygraph(graph,bit,llr,base,0,10);
oai_xygraph(graph,bit,llr,sz,0,10);
}
static void uePcchIQ (scopeGraphData_t **data, OAIgraph_t *graph, PHY_VARS_NR_UE *phy_vars_ue, int eNB_id, int UE_id) {
// PDCCH I/Q of MF Output
if (!phy_vars_ue->pdcch_vars[0][eNB_id]->rxdataF_comp[0])
if (!data[pdcchRxdataF_comp])
return;
int nb=4*273*12; // 12*frame_parms->N_RB_DL*num_pdcch_symbols
const int sz=data[pdcchRxdataF_comp]->lineSz;
//const int antennas=data[pdcchRxdataF_comp]->colSz;
// We take the first antenna only for now
float *I, *Q;
oai_xygraph_getbuff(graph, &I, &Q, nb*RX_NB_TH_MAX, 0);
int base=0;
oai_xygraph_getbuff(graph, &I, &Q, sz, 0);
for (int thr=0 ; thr < RX_NB_TH_MAX ; thr ++ ) {
scopeSample_t *pdcch_comp = (scopeSample_t *) phy_vars_ue->pdcch_vars[thr][eNB_id]->rxdataF_comp[0];
scopeSample_t *pdcch_comp = (scopeSample_t *) (data[pdcchRxdataF_comp]+1);
for (int i=0; i< nb; i++) {
I[base+i] = pdcch_comp[i].r;
Q[base+i] = pdcch_comp[i].i;
}
base+=nb;
for (int i=0; i<sz; i++) {
I[i] = pdcch_comp[i].r;
Q[i] = pdcch_comp[i].i;
}
AssertFatal(base <= nb*RX_NB_TH_MAX, "");
oai_xygraph(graph,I,Q,base,0,10);
oai_xygraph(graph,I,Q,sz,0,10);
}
static void uePdschLLR (scopeGraphData_t **data, OAIgraph_t *graph, PHY_VARS_NR_UE *phy_vars_ue, int eNB_id, int UE_id) {
// PDSCH LLRs
@@ -908,7 +898,6 @@ static void *nrUEscopeThread(void *arg) {
char *name="5G-UE-scope";
fl_initialize (&fl_argc, &name, NULL, 0, 0);
OAI_phy_scope_t *form_nrue=create_phy_scope_nrue(0);
(( scopeData_t *)ue->scopeData)->liveData=calloc(sizeof(scopeGraphData_t *), UEdataTypeNumberOfItems);
while (!oai_exit) {
fl_freeze_form(form_nrue->phy_scope);
@@ -925,28 +914,43 @@ static void *nrUEscopeThread(void *arg) {
}
void UEcopyData(PHY_VARS_NR_UE *ue, enum UEdataType type, void *dataIn, int elementSz, int colSz, int lineSz) {
// Local static copy of the scope data bufs
// The active data buf is alterned to avoid interference between the Scope thread (display) and the Rx thread (data input)
// Index of "2" could be set to the number of Rx threads + 1
static scopeGraphData_t *copyDataBufs[UEdataTypeNumberOfItems][2] = {0};
static int copyDataBufsIdx[UEdataTypeNumberOfItems] = {0};
scopeData_t *tmp=(scopeData_t *)ue->scopeData;
if (tmp) {
scopeGraphData_t *live= ((scopeGraphData_t **)tmp->liveData)[type];
// Begin of critical zone between UE Rx threads that might copy new data at the same time: might require a mutex
int newCopyDataIdx = (copyDataBufsIdx[type]==0)?1:0;
copyDataBufsIdx[type] = newCopyDataIdx;
// End of critical zone between UE Rx threads
if (live == NULL || live->dataSize < elementSz*colSz*lineSz) {
scopeGraphData_t *ptr=realloc(live, sizeof(scopeGraphData_t) + elementSz*colSz*lineSz);
// New data will be copied in a different buffer than the live one
scopeGraphData_t *copyData= copyDataBufs[type][newCopyDataIdx];
if (copyData == NULL || copyData->dataSize < elementSz*colSz*lineSz) {
scopeGraphData_t *ptr=realloc(copyData, sizeof(scopeGraphData_t) + elementSz*colSz*lineSz);
if (!ptr) {
LOG_E(PHY,"can't realloc\n");
return;
} else {
live=ptr;
copyData=ptr;
}
}
live->dataSize=elementSz*colSz*lineSz;
live->elementSz=elementSz;
live->colSz=colSz;
live->lineSz=lineSz;
memcpy(live+1, dataIn, elementSz*colSz*lineSz);
((scopeGraphData_t **)tmp->liveData)[type]=live;
copyData->dataSize=elementSz*colSz*lineSz;
copyData->elementSz=elementSz;
copyData->colSz=colSz;
copyData->lineSz=lineSz;
memcpy(copyData+1, dataIn, elementSz*colSz*lineSz);
copyDataBufs[type][newCopyDataIdx] = copyData;
// The new data just copied in the local static buffer becomes live now
((scopeGraphData_t **)tmp->liveData)[type]=copyData;
}
}
@@ -954,6 +958,7 @@ void nrUEinitScope(PHY_VARS_NR_UE *ue) {
AssertFatal(ue->scopeData=malloc(sizeof(scopeData_t)),"");
scopeData_t *scope=(scopeData_t *) ue->scopeData;
scope->copyData=UEcopyData;
AssertFatal(scope->liveData=calloc(sizeof(scopeGraphData_t *), UEdataTypeNumberOfItems),"");
pthread_t forms_thread;
threadCreate(&forms_thread, nrUEscopeThread, ue, "scope", -1, OAI_PRIORITY_RT_LOW);
}
+58 -33
View File
@@ -7082,43 +7082,40 @@ static inline void dft12f(simd_q15_t *x0,
simd_q15_t tmp_dft12[12];
simd_q15_t *tmp_dft12_ptr = &tmp_dft12[0];
// msg("dft12\n");
bfly4_tw1(x0,
x3,
x6,
x9,
tmp_dft12_ptr,
tmp_dft12_ptr+3,
tmp_dft12_ptr+6,
tmp_dft12_ptr+9);
tmp_dft12,
tmp_dft12+3,
tmp_dft12+6,
tmp_dft12+9);
bfly4_tw1(x1,
x4,
x7,
x10,
tmp_dft12_ptr+1,
tmp_dft12_ptr+4,
tmp_dft12_ptr+7,
tmp_dft12_ptr+10);
tmp_dft12+1,
tmp_dft12+4,
tmp_dft12+7,
tmp_dft12+10);
bfly4_tw1(x2,
x5,
x8,
x11,
tmp_dft12_ptr+2,
tmp_dft12_ptr+5,
tmp_dft12_ptr+8,
tmp_dft12_ptr+11);
tmp_dft12+2,
tmp_dft12+5,
tmp_dft12+8,
tmp_dft12+11);
// k2=0;
bfly3_tw1(tmp_dft12_ptr,
tmp_dft12_ptr+1,
tmp_dft12_ptr+2,
bfly3_tw1(tmp_dft12,
tmp_dft12+1,
tmp_dft12+2,
y0,
y4,
y8);
@@ -7126,9 +7123,9 @@ static inline void dft12f(simd_q15_t *x0,
// k2=1;
bfly3(tmp_dft12_ptr+3,
tmp_dft12_ptr+4,
tmp_dft12_ptr+5,
bfly3(tmp_dft12+3,
tmp_dft12+4,
tmp_dft12+5,
y1,
y5,
y9,
@@ -7138,9 +7135,9 @@ static inline void dft12f(simd_q15_t *x0,
// k2=2;
bfly3(tmp_dft12_ptr+6,
tmp_dft12_ptr+7,
tmp_dft12_ptr+8,
bfly3(tmp_dft12+6,
tmp_dft12+7,
tmp_dft12+8,
y2,
y6,
y10,
@@ -7148,9 +7145,9 @@ static inline void dft12f(simd_q15_t *x0,
W4_12);
// k2=3;
bfly3(tmp_dft12_ptr+9,
tmp_dft12_ptr+10,
tmp_dft12_ptr+11,
bfly3(tmp_dft12+9,
tmp_dft12+10,
tmp_dft12+11,
y3,
y7,
y11,
@@ -10606,15 +10603,43 @@ int dfts_autoinit(void)
#ifndef MR_MAIN
void dft(uint8_t sizeidx, int16_t *sigF,int16_t *sig,unsigned char scale_flag){
AssertFatal((sizeidx>=0 && sizeidx<(int)DFT_SIZE_IDXTABLESIZE),"Invalid dft size index %i\n",sizeidx);
dft_ftab[sizeidx](sigF,sig,scale_flag);
void dft(uint8_t sizeidx, int16_t *input,int16_t *output,unsigned char scale_flag){
AssertFatal((sizeidx >= 0 && sizeidx<DFT_SIZE_IDXTABLESIZE),"Invalid dft size index %i\n",sizeidx);
int algn=0xF;
#ifdef __AVX2__
if ( (dft_ftab[sizeidx].size%3) != 0 ) // there is no AVX2 implementation for multiples of 3 DFTs
algn=0x1F;
#endif
AssertFatal(((intptr_t)output&algn)==0,"Buffers should be aligned %p",output);
if (((intptr_t)input)&algn) {
LOG_D(PHY, "DFT called with input not aligned, add a memcpy, size %d\n", sizeidx);
int sz=dft_ftab[sizeidx].size;
if (sizeidx==DFT_12) // This case does 8 DFTs in //
sz*=8;
int16_t tmp[sz*2] __attribute__ ((aligned(32))); // input and output are not in right type (int16_t instead of c16_t)
memcpy(tmp, input, sizeof tmp);
dft_ftab[sizeidx].func(tmp,output,scale_flag);
} else
dft_ftab[sizeidx].func(input,output,scale_flag);
};
void idft(uint8_t sizeidx, int16_t *sigF,int16_t *sig,unsigned char scale_flag){
AssertFatal((sizeidx>=0 && sizeidx<(int)IDFT_SIZE_IDXTABLESIZE),"Invalid idft size index %i\n",sizeidx);
idft_ftab[sizeidx](sigF,sig,scale_flag);
void idft(uint8_t sizeidx, int16_t *input,int16_t *output,unsigned char scale_flag){
AssertFatal((sizeidx>=0 && sizeidx<DFT_SIZE_IDXTABLESIZE),"Invalid idft size index %i\n",sizeidx);
int algn=0xF;
#ifdef __AVX2__
algn=0x1F;
#endif
AssertFatal( ((intptr_t)output&algn)==0,"Buffers should be 16 bytes aligned %p",output);
if (((intptr_t)input)&algn ) {
LOG_D(PHY, "DFT called with input not aligned, add a memcpy\n");
int sz=idft_ftab[sizeidx].size;
int16_t tmp[sz*2] __attribute__ ((aligned(32))); // input and output are not in right type (int16_t instead of c16_t)
memcpy(tmp, input, sizeof tmp);
dft_ftab[sizeidx].func(tmp,output,scale_flag);
} else
idft_ftab[sizeidx].func(input,output,scale_flag);
};
#endif
/*---------------------------------------------------------------------------------------*/
+2
View File
@@ -45,6 +45,8 @@ enum UEdataType {
pbchDlChEstimateTime,
pbchLlr,
pbchRxdataF_comp,
pdcchLlr,
pdcchRxdataF_comp,
UEdataTypeNumberOfItems
};
+133 -136
View File
@@ -188,159 +188,156 @@ This function performs optimized fixed-point radix-2 FFT/IFFT.
);
*/
#define FOREACH_DFTSZ(SZ_DEF) \
SZ_DEF(12) \
SZ_DEF(24) \
SZ_DEF(36) \
SZ_DEF(48) \
SZ_DEF(60) \
SZ_DEF(64) \
SZ_DEF(72) \
SZ_DEF(96) \
SZ_DEF(108) \
SZ_DEF(120) \
SZ_DEF(128) \
SZ_DEF(144) \
SZ_DEF(180) \
SZ_DEF(192) \
SZ_DEF(216) \
SZ_DEF(240) \
SZ_DEF(256) \
SZ_DEF(288) \
SZ_DEF(300) \
SZ_DEF(324) \
SZ_DEF(360) \
SZ_DEF(384) \
SZ_DEF(432) \
SZ_DEF(480) \
SZ_DEF(512) \
SZ_DEF(540) \
SZ_DEF(576) \
SZ_DEF(600) \
SZ_DEF(648) \
SZ_DEF(720) \
SZ_DEF(768) \
SZ_DEF(864) \
SZ_DEF(900) \
SZ_DEF(960) \
SZ_DEF(972) \
SZ_DEF(1024) \
SZ_DEF(1080) \
SZ_DEF(1152) \
SZ_DEF(1200) \
SZ_DEF(1296) \
SZ_DEF(1440) \
SZ_DEF(1500) \
SZ_DEF(1536) \
SZ_DEF(1620) \
SZ_DEF(1728) \
SZ_DEF(1800) \
SZ_DEF(1920) \
SZ_DEF(1944) \
SZ_DEF(2048) \
SZ_DEF(2160) \
SZ_DEF(2304) \
SZ_DEF(2400) \
SZ_DEF(2592) \
SZ_DEF(2700) \
SZ_DEF(2880) \
SZ_DEF(2916) \
SZ_DEF(3000) \
SZ_DEF(3072) \
SZ_DEF(3240) \
SZ_DEF(4096) \
SZ_DEF(6144) \
SZ_DEF(8192) \
SZ_DEF(9216) \
SZ_DEF(12288) \
SZ_DEF(18432) \
SZ_DEF(24576) \
SZ_DEF(36864) \
SZ_DEF(49152) \
SZ_DEF(73728) \
SZ_DEF(98304)
#define FOREACH_IDFTSZ(SZ_DEF)\
SZ_DEF(64) \
SZ_DEF(128) \
SZ_DEF(256) \
SZ_DEF(512) \
SZ_DEF(1024) \
SZ_DEF(1536) \
SZ_DEF(2048) \
SZ_DEF(3072) \
SZ_DEF(4096) \
SZ_DEF(6144) \
SZ_DEF(8192) \
SZ_DEF(9216) \
SZ_DEF(12288) \
SZ_DEF(18432) \
SZ_DEF(24576) \
SZ_DEF(36864) \
SZ_DEF(49152) \
SZ_DEF(73728) \
SZ_DEF(98304)
#ifdef OAIDFTS_MAIN
typedef void(*adftfunc_t)(int16_t *sigF,int16_t *sig,unsigned char scale_flag);
typedef void(*aidftfunc_t)(int16_t *sigF,int16_t *sig,unsigned char scale_flag);
typedef void(*adftfunc_t)(int16_t *sigF,int16_t *sig,unsigned char scale_flag);
typedef void(*aidftfunc_t)(int16_t *sigF,int16_t *sig,unsigned char scale_flag);
void dft12(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft24(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft36(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft48(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft60(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft64(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft72(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft96(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft108(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft120(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft128(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft144(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft180(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft192(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft216(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft240(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft256(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft288(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft300(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft324(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft360(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft384(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft432(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft480(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft512(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft540(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft576(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft600(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft648(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft720(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft768(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft864(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft900(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft960(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft972(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1024(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1080(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1152(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1200(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1296(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1440(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1500(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1536(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void dft1620(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1728(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1800(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1920(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1944(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2048(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2160(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2304(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2400(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2592(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2700(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2880(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2916(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft3000(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft3072(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void dft3240(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft4096(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft6144(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void dft8192(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft9216(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft12288(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft18432(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft24576(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft36864(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft49152(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft73728(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft98304(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft64(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft128(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft256(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft512(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft1024(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft1536(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft2048(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft3072(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft4096(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft6144(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft8192(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft9216(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft12288(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft18432(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft24576(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft36864(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft49152(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft73728(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft98304(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
#define SZ_FUNC(Sz) void dft ## Sz(int16_t *x,int16_t *y,uint8_t scale_flag);
FOREACH_DFTSZ(SZ_FUNC)
#define SZ_iFUNC(Sz) void idft ## Sz(int16_t *x,int16_t *y,uint8_t scale_flag);
FOREACH_IDFTSZ(SZ_iFUNC)
#else
typedef void(*dftfunc_t)(uint8_t sizeidx,int16_t *sigF,int16_t *sig,unsigned char scale_flag);
typedef void(*idftfunc_t)(uint8_t sizeidx,int16_t *sigF,int16_t *sig,unsigned char scale_flag);
typedef void(*dftfunc_t)(uint8_t sizeidx,int16_t *sigF,int16_t *sig,unsigned char scale_flag);
typedef void(*idftfunc_t)(uint8_t sizeidx,int16_t *sigF,int16_t *sig,unsigned char scale_flag);
# ifdef OAIDFTS_LOADER
dftfunc_t dft;
idftfunc_t idft;
dftfunc_t dft;
idftfunc_t idft;
# else
extern dftfunc_t dft;
extern idftfunc_t idft;
extern int load_dftslib(void);
extern dftfunc_t dft;
extern idftfunc_t idft;
extern int load_dftslib(void);
# endif
#endif
typedef enum DFT_size_idx {
DFT_12, DFT_24, DFT_36, DFT_48, DFT_60, DFT_72, DFT_96,
DFT_108, DFT_120, DFT_128, DFT_144, DFT_180, DFT_192, DFT_216, DFT_240,
DFT_256, DFT_288, DFT_300, DFT_324, DFT_360, DFT_384, DFT_432, DFT_480,
DFT_512, DFT_540, DFT_576, DFT_600, DFT_648, DFT_720, DFT_768, DFT_864,
DFT_900, DFT_960, DFT_972, DFT_1024, DFT_1080, DFT_1152, DFT_1200, DFT_1296,
DFT_1440, DFT_1500, DFT_1536, DFT_1620, DFT_1728, DFT_1800, DFT_1920, DFT_1944,
DFT_2048, DFT_2160, DFT_2304, DFT_2400, DFT_2592, DFT_2700, DFT_2880, DFT_2916,
DFT_3000, DFT_3072, DFT_3240, DFT_4096, DFT_6144, DFT_8192, DFT_9216, DFT_12288,
DFT_18432, DFT_24576, DFT_36864, DFT_49152, DFT_73728, DFT_98304,
DFT_SIZE_IDXTABLESIZE
} dft_size_idx_t;
#define SZ_ENUM(Sz) DFT_ ## Sz,
#ifdef OAIDFTS_MAIN
adftfunc_t dft_ftab[]={
dft12, dft24, dft36, dft48, dft60, dft72, dft96,
dft108, dft120, dft128, dft144, dft180, dft192, dft216, dft240,
dft256, dft288, dft300, dft324, dft360, dft384, dft432, dft480,
dft512, dft540, dft576, dft600, dft648, dft720, dft768, dft864,
dft900, dft960, dft972, dft1024, dft1080, dft1152, dft1200, dft1296,
dft1440, dft1500, dft1536, dft1620, dft1728, dft1800, dft1920, dft1944,
dft2048, dft2160, dft2304, dft2400, dft2592, dft2700, dft2880, dft2916,
dft3000, dft3072, dft3240, dft4096, dft6144, dft8192, dft9216, dft12288,
dft18432, dft24576, dft36864, dft49152, dft73728, dft98304
};
#endif
typedef enum dft_size_idx {
FOREACH_DFTSZ(SZ_ENUM)
DFT_SIZE_IDXTABLESIZE
} dft_size_idx_t;
#define SZ_iENUM(Sz) IDFT_ ## Sz,
typedef enum idft_size_idx {
IDFT_128, IDFT_256, IDFT_512, IDFT_1024, IDFT_1536, IDFT_2048, IDFT_3072, IDFT_4096,
IDFT_6144, IDFT_8192, IDFT_9216, IDFT_12288, IDFT_18432, IDFT_24576, IDFT_36864, IDFT_49152,
IDFT_73728, IDFT_98304,
IDFT_SIZE_IDXTABLESIZE
} idft_size_idx_t;
FOREACH_IDFTSZ(SZ_iENUM)
IDFT_SIZE_IDXTABLESIZE
} idft_size_idx_t;
#ifdef OAIDFTS_MAIN
aidftfunc_t idft_ftab[]={
idft128, idft256, idft512, idft1024, idft1536, idft2048, idft3072, idft4096,
idft6144, idft8192, idft9216, idft12288, idft18432, idft24576, idft36864, idft49152,
idft73728, idft98304
#define SZ_PTR(Sz) {dft ## Sz,Sz},
struct {
adftfunc_t func;
int size;
} dft_ftab[]= {
FOREACH_DFTSZ(SZ_PTR)
};
#define SZ_iPTR(Sz) {idft ## Sz,Sz},
struct {
adftfunc_t func;
int size;
} idft_ftab[]= {
FOREACH_IDFTSZ(SZ_iPTR)
};
#endif
@@ -394,7 +391,7 @@ int32_t add_real_vector64(int16_t *x,
uint32_t N);
int32_t sub_real_vector64(int16_t *x,
int16_t* y,
int16_t *y,
int16_t *z,
uint32_t N);
@@ -451,7 +448,7 @@ int32_t signal_energy_amp_shift(int32_t *input, uint32_t length);
/*!\fn int32_t signal_energy(int *,uint32_t);
\brief Computes the signal energy per subcarrier
*/
int32_t subcarrier_energy(int32_t *,uint32_t, int32_t* subcarrier_energy, uint16_t rx_power_correction);
int32_t subcarrier_energy(int32_t *,uint32_t, int32_t *subcarrier_energy, uint16_t rx_power_correction);
#endif
/*!\fn int32_t signal_energy_nodc(int32_t *,uint32_t);
+6
View File
@@ -850,9 +850,15 @@ typedef struct PHY_VARS_gNB_s {
/// counter to average prach energh over first 100 prach opportunities
int prach_energy_counter;
int csi_gold_init;
int pdcch_gold_init;
int pdsch_gold_init[2];
int pusch_gold_init[2];
int ap_N1;
int ap_N2;
int ap_XP;
int pucch0_thres;
int pusch_thres;
int prach_thres;
+13 -47
View File
@@ -550,57 +550,20 @@ typedef struct {
} NR_UE_PDCCH_SEARCHSPACE;
#endif
typedef struct {
/// \brief Pointers to extracted PDCCH symbols in frequency-domain.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
int32_t **rxdataF_ext;
/// \brief Pointers to extracted and compensated PDCCH symbols in frequency-domain.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
int32_t **rxdataF_comp;
/// \brief Hold the channel estimates in frequency domain.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: samples? [0..symbols_per_tti*(ofdm_symbol_size+LTE_CE_FILTER_LENGTH)[
int32_t **dl_ch_estimates;
/// \brief Hold the channel estimates in time domain (used for tracking).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: samples? [0..2*ofdm_symbol_size[
int32_t **dl_ch_estimates_time;
/// \brief Pointers to extracted channel estimates of PDCCH symbols.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
int32_t **dl_ch_estimates_ext;
/// \brief Pointers to channel cross-correlation vectors for multi-gNB detection.
/// - first index: rx antenna [0..nb_antennas_rx[
/// - second index: ? [0..]
int32_t **rho;
/// \brief Pointer to llrs, 4-bit resolution.
/// - first index: ? [0..48*N_RB_DL[
int16_t *llr;
/// \brief Pointer to llrs, 16-bit resolution.
/// - first index: ? [0..96*N_RB_DL[
int16_t *llr16;
/// \brief \f$\overline{w}\f$ from 36-211.
/// - first index: ? [0..48*N_RB_DL[
int16_t *wbar;
/// Total number of PDU errors (diagnostic mode)
uint32_t dci_errors;
int nb_search_space;
uint16_t sfn;
uint16_t slot;
fapi_nr_dl_config_dci_dl_pdu_rel15_t pdcch_config[FAPI_NR_MAX_SS];
} NR_UE_PDCCH_CONFIG;
typedef struct {
/// Total number of PDU received
uint32_t dci_received;
/// Total number of DCI False detection (diagnostic mode)
uint32_t dci_false;
/// Total number of DCI missed (diagnostic mode)
uint32_t dci_missed;
/// nCCE for PDCCH per subframe
uint8_t nCCE[10];
//Check for specific DCIFormat and AgregationLevel
uint8_t dciFormat;
uint8_t agregationLevel;
int nb_search_space;
fapi_nr_dl_config_dci_dl_pdu_rel15_t pdcch_config[FAPI_NR_MAX_SS];
// frame and slot for sib1 in initial sync
uint16_t sfn;
uint16_t slot;
/*
#ifdef NR_PDCCH_DEFS_NR_UE
int nb_searchSpaces;
@@ -786,7 +749,10 @@ typedef struct {
uint32_t ****nr_gold_pdsch[NUMBER_OF_CONNECTED_eNB_MAX];
// Scrambling IDs used in PDSCH DMRS
uint16_t scramblingID[2];
uint16_t scramblingID_dlsch[2];
// Scrambling IDs used in PUSCH DMRS
uint16_t scramblingID_ulsch[2];
/// PDCCH DMRS
uint32_t ***nr_gold_pdcch[NUMBER_OF_CONNECTED_eNB_MAX];
@@ -795,7 +761,7 @@ typedef struct {
uint16_t scramblingID_pdcch;
/// PUSCH DMRS sequence
uint32_t ***nr_gold_pusch_dmrs;
uint32_t ****nr_gold_pusch_dmrs;
uint32_t X_u[64][839];
+2
View File
@@ -95,6 +95,8 @@
#define NR_RX_NB_TH 1
#define NR_NB_TH_SLOT 2
#define NR_NB_NSCID 2
extern const uint8_t nr_rv_round_map[4];
static inline
+2 -3
View File
@@ -158,8 +158,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,1);
nr_generate_dci_top(msgTx,
gNB->nr_gold_pdcch_dmrs[slot],
nr_generate_dci_top(msgTx, slot,
&gNB->common_vars.txdataF[0][txdataF_offset],
AMP, fp);
@@ -178,7 +177,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
if (csirs->active == 1) {
LOG_D(PHY, "CSI-RS generation started in frame %d.%d\n",frame,slot);
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params = csirs->csirs_pdu.csi_rs_pdu_rel15;
nr_generate_csi_rs(gNB, AMP, csi_params, gNB->gNB_config.cell_config.phy_cell_id.value, slot);
nr_generate_csi_rs(gNB, AMP, csi_params, slot);
csirs->active = 0;
}
}
+14 -8
View File
@@ -116,16 +116,18 @@ int phy_procedures_RN_UE_RX(unsigned char last_slot, unsigned char next_slot, re
void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB_id);
/*! \brief Scheduling for UE RX procedures in normal subframes.
@param ue Pointer to UE variables on which to act
@param proc Pointer to proc information
@param gNB_id Local id of eNB on which to act
@param dlsch_parallel use multithreaded dlsch processing
@param txFifo Result fifo if PDSCH is run in parallel
@param ue Pointer to UE variables on which to act
@param proc Pointer to proc information
@param gNB_id Local id of eNB on which to act
@param dlsch_parallel use multithreaded dlsch processing
@param phy_pdcch_config PDCCH Config for this slot
@param txFifo Result fifo if PDSCH is run in parallel
*/
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t gNB_id,
uint8_t dlsch_parallel,
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
notifiedFIFO_t *txFifo);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB_id, uint8_t abstraction_flag, uint8_t do_pdcch_flag, relaying_type_t r_type);
@@ -383,7 +385,8 @@ void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
fapi_nr_rx_indication_t *rx_ind,
UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
uint8_t gNB_id);
uint8_t gNB_id,
void *phy_data);
/*@}*/
@@ -417,8 +420,11 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0, NR_UE_DLSCH_t *dlsch1);
int nr_ue_pdcch_procedures(uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
int n_ss);
+12 -7
View File
@@ -315,6 +315,8 @@ void configure_dlsch(NR_UE_DLSCH_t *dlsch0,
dlsch0_harq->mcs = dlsch_config_pdu->mcs;
dlsch0_harq->rvidx = dlsch_config_pdu->rv;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
dlsch0_harq->nscid = dlsch_config_pdu->nscid;
dlsch0_harq->dlDmrsScramblingId = dlsch_config_pdu->dlDmrsScramblingId;
//get nrOfLayers from DCI info
uint8_t Nl = 0;
for (int i = 0; i < 12; i++) { // max 12 ports
@@ -351,15 +353,14 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
// Note: we have to handle the thread IDs for this. To be revisited completely.
thread_id = scheduled_response->thread_id;
NR_UE_DLSCH_t *dlsch0 = NULL;
NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_ULSCH_t *ulsch = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0];
NR_UE_PUCCH *pucch_vars = PHY_vars_UE_g[module_id][cc_id]->pucch_vars[thread_id][0];
NR_UE_PDCCH_CONFIG *phy_pdcch_config = NULL;
if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *pdcch_config;
pdcch_vars->nb_search_space = 0;
for (int i = 0; i < dl_config->number_pdus; ++i){
AssertFatal(dl_config->number_pdus < FAPI_NR_DL_CONFIG_LIST_NUM,"dl_config->number_pdus %d out of bounds\n",dl_config->number_pdus);
@@ -369,12 +370,16 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
switch(dl_config->dl_config_list[i].pdu_type) {
case FAPI_NR_DL_CONFIG_TYPE_DCI:
if (NULL == phy_pdcch_config) {
phy_pdcch_config = (NR_UE_PDCCH_CONFIG *)scheduled_response->phy_data;
phy_pdcch_config->nb_search_space = 0;
}
pdcch_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
memcpy(&pdcch_vars->pdcch_config[pdcch_vars->nb_search_space],pdcch_config,sizeof(*pdcch_config));
pdcch_vars->nb_search_space = pdcch_vars->nb_search_space + 1;
pdcch_vars->sfn = scheduled_response->frame;
pdcch_vars->slot = slot;
LOG_D(PHY,"Number of DCI SearchSpaces %d\n",pdcch_vars->nb_search_space);
memcpy((void*)&phy_pdcch_config->pdcch_config[phy_pdcch_config->nb_search_space],(void*)pdcch_config,sizeof(*pdcch_config));
phy_pdcch_config->nb_search_space = phy_pdcch_config->nb_search_space + 1;
phy_pdcch_config->sfn = scheduled_response->frame;
phy_pdcch_config->slot = slot;
LOG_D(PHY,"Number of DCI SearchSpaces %d\n",phy_pdcch_config->nb_search_space);
break;
case FAPI_NR_DL_CONFIG_TYPE_CSI_IM:
LOG_I(PHY,"Received CSI-IM PDU at FAPI\n");
+41 -22
View File
@@ -87,7 +87,8 @@ void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
fapi_nr_rx_indication_t *rx_ind,
UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
uint8_t gNB_id){
uint8_t gNB_id,
void *phy_data){
memset((void*)dl_ind, 0, sizeof(nr_downlink_indication_t));
@@ -97,6 +98,7 @@ void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
dl_ind->frame = proc->frame_rx;
dl_ind->slot = proc->nr_slot_rx;
dl_ind->thread_id = proc->thread_id;
dl_ind->phy_data = phy_data;
if (dci_ind) {
@@ -360,7 +362,7 @@ void nr_ue_measurement_procedures(uint16_t l,
static void nr_ue_pbch_procedures(uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,int estimateSz, struct complex16 dl_ch_estimates[][estimateSz])
UE_nr_rxtx_proc_t *proc,int estimateSz, struct complex16 dl_ch_estimates[][estimateSz], NR_UE_PDCCH_CONFIG *phy_pdcch_config)
{
int ret = 0;
@@ -380,7 +382,8 @@ static void nr_ue_pbch_procedures(uint8_t gNB_id,
gNB_id,
(ue->frame_parms.ssb_index)&7,
SISO,
&result);
phy_pdcch_config,
&result);
if (ret==0) {
@@ -486,6 +489,9 @@ unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb
int nr_ue_pdcch_procedures(uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
int n_ss)
{
int frame_rx = proc->frame_rx;
@@ -494,14 +500,16 @@ int nr_ue_pdcch_procedures(uint8_t gNB_id,
fapi_nr_dci_indication_t *dci_ind = calloc(1, sizeof(*dci_ind));
nr_downlink_indication_t dl_indication;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][gNB_id];
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &pdcch_vars->pdcch_config[n_ss];
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &phy_pdcch_config->pdcch_config[n_ss];
start_meas(&ue->dlsch_rx_pdcch_stats);
/// PDCCH/DCI e-sequence (input to rate matching).
int32_t pdcch_e_rx_size = NR_MAX_PDCCH_SIZE;
int16_t pdcch_e_rx[pdcch_e_rx_size];
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_IN);
int16_t e_rx[NR_MAX_PDCCH_SIZE]={0};
nr_rx_pdcch(ue, proc, rel15, e_rx);
nr_rx_pdcch(ue, proc, pdcch_est_size, pdcch_dl_ch_estimates, pdcch_e_rx, rel15);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_OUT);
@@ -512,7 +520,7 @@ int nr_ue_pdcch_procedures(uint8_t gNB_id,
n_ss);
#endif
dci_cnt = nr_dci_decoding_procedure(e_rx, ue, proc, dci_ind, rel15);
dci_cnt = nr_dci_decoding_procedure(ue, proc, pdcch_e_rx, dci_ind, rel15, phy_pdcch_config);
#ifdef NR_PDCCH_SCHED_DEBUG
LOG_I(PHY,"<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_dci_decoding_procedure() -> dci_cnt=%u\n",dci_cnt);
@@ -532,11 +540,13 @@ int nr_ue_pdcch_procedures(uint8_t gNB_id,
ue->pdcch_vars[proc->thread_id][gNB_id]->dci_received += dci_cnt;
dci_ind->number_of_dcis = dci_cnt;
// fill dl_indication message
nr_fill_dl_indication(&dl_indication, dci_ind, NULL, proc, ue, gNB_id);
nr_fill_dl_indication(&dl_indication, dci_ind, NULL, proc, ue, gNB_id, phy_pdcch_config);
// send to mac
ue->if_inst->dl_indication(&dl_indication, NULL);
stop_meas(&ue->dlsch_rx_pdcch_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
@@ -581,6 +591,8 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int gNB_
nr_slot_rx,
get_dmrs_port(aatx,dlsch0_harq->dmrs_ports),
m,
dlsch0_harq->nscid,
dlsch0_harq->dlDmrsScramblingId,
BWPStart,
dlsch0_harq->dmrsConfigType,
ue->frame_parms.first_carrier_offset+(BWPStart + pdsch_start_rb)*12,
@@ -800,16 +812,16 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
switch (pdsch) {
case RA_PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id);
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id, NULL);
nr_fill_rx_indication(rx_ind, FAPI_NR_RX_PDU_TYPE_RAR, gNB_id, ue, dlsch0, NULL, number_pdus, proc, NULL);
ue->UE_mode[gNB_id] = RA_RESPONSE;
break;
case PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id);
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id, NULL);
nr_fill_rx_indication(rx_ind, FAPI_NR_RX_PDU_TYPE_DLSCH, gNB_id, ue, dlsch0, NULL, number_pdus, proc, NULL);
break;
case SI_PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id);
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id, NULL);
nr_fill_rx_indication(rx_ind, FAPI_NR_RX_PDU_TYPE_SIB, gNB_id, ue, dlsch0, NULL, number_pdus, proc, NULL);
break;
default:
@@ -1367,6 +1379,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t gNB_id,
uint8_t dlsch_parallel,
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
notifiedFIFO_t *txFifo
)
{
@@ -1374,10 +1387,9 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
int nr_slot_rx = proc->nr_slot_rx;
int slot_pbch;
int slot_ssb;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][0];
fapi_nr_config_request_t *cfg = &ue->nrUE_config;
uint8_t nb_symb_pdcch = pdcch_vars->nb_search_space > 0 ? pdcch_vars->pdcch_config[0].coreset.duration : 0;
uint8_t nb_symb_pdcch = phy_pdcch_config->nb_search_space > 0 ? phy_pdcch_config->pdcch_config[0].coreset.duration : 0;
uint8_t dci_cnt = 0;
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
@@ -1396,8 +1408,8 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
int coreset_nb_rb=0;
int coreset_start_rb=0;
if (pdcch_vars->nb_search_space > 0)
get_coreset_rballoc(pdcch_vars->pdcch_config[0].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb);
if (phy_pdcch_config->nb_search_space > 0)
get_coreset_rballoc(phy_pdcch_config->pdcch_config[0].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb);
slot_pbch = is_pbch_in_slot(cfg, frame_rx, nr_slot_rx, fp);
slot_ssb = is_ssb_in_slot(cfg, frame_rx, nr_slot_rx, fp);
@@ -1428,7 +1440,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
if ((ue->decode_MIB == 1) && slot_pbch) {
LOG_D(PHY," ------ Decode MIB: frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
nr_ue_pbch_procedures(gNB_id, ue, proc, estimateSz, dl_ch_estimates);
nr_ue_pbch_procedures(gNB_id, ue, proc, estimateSz, dl_ch_estimates, phy_pdcch_config);
if (ue->no_timing_correction==0) {
LOG_D(PHY,"start adjust sync slot = %d no timing %d\n", nr_slot_rx, ue->no_timing_correction);
@@ -1469,13 +1481,17 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
nr_slot_rx);
}
// Hold the channel estimates in frequency domain.
int32_t pdcch_est_size = ((((fp->symbols_per_slot*(fp->ofdm_symbol_size+LTE_CE_FILTER_LENGTH))+15)/16)*16);
__attribute__ ((aligned(16))) int32_t pdcch_dl_ch_estimates[4*fp->nb_antennas_rx][pdcch_est_size];
dci_cnt = 0;
for(int n_ss = 0; n_ss<pdcch_vars->nb_search_space; n_ss++) {
for(int n_ss = 0; n_ss<phy_pdcch_config->nb_search_space; n_ss++) {
for (uint16_t l=0; l<nb_symb_pdcch; l++) {
// note: this only works if RBs for PDCCH are contigous!
LOG_D(PHY, "pdcch_channel_estimation: first_carrier_offset %d, BWPStart %d, coreset_start_rb %d, coreset_nb_rb %d\n",
fp->first_carrier_offset, pdcch_vars->pdcch_config[n_ss].BWPStart, coreset_start_rb, coreset_nb_rb);
fp->first_carrier_offset, phy_pdcch_config->pdcch_config[n_ss].BWPStart, coreset_start_rb, coreset_nb_rb);
if (coreset_nb_rb > 0)
nr_pdcch_channel_estimation(ue,
@@ -1483,13 +1499,16 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
gNB_id,
nr_slot_rx,
l,
fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
coreset_nb_rb);
phy_pdcch_config->pdcch_config[n_ss].coreset.pdcch_dmrs_scrambling_id,
fp->first_carrier_offset+(phy_pdcch_config->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
coreset_nb_rb,
pdcch_est_size,
pdcch_dl_ch_estimates);
stop_meas(&ue->ofdm_demod_stats);
}
dci_cnt = dci_cnt + nr_ue_pdcch_procedures(gNB_id, ue, proc, n_ss);
dci_cnt = dci_cnt + nr_ue_pdcch_procedures(gNB_id, ue, proc, pdcch_est_size, pdcch_dl_ch_estimates, phy_pdcch_config, n_ss);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDCCH, VCD_FUNCTION_OUT);
+1 -1
View File
@@ -618,7 +618,7 @@ int main(int argc, char **argv)
}
}*/
free(test_input);
//free(test_input); it must not be free as it is in DLSCH_struct -> free_gNB_dlsch () -> free(harq->pdu) with no checks or control
free_channel_desc_scm(gNB2UE);
+8 -6
View File
@@ -961,10 +961,10 @@ int main(int argc, char **argv)
nr_gold_pdcch(UE, frame_parms->Nid_cell);
// compute the scrambling IDs for PDSCH DMRS
for (int i = 0; i < 2; i++)
UE->scramblingID[i] = frame_parms->Nid_cell;
nr_gold_pdsch(UE, UE->scramblingID);
for (int i = 0; i < 2; i++) {
UE->scramblingID_dlsch[i] = frame_parms->Nid_cell;
nr_gold_pdsch(UE, i, UE->scramblingID_dlsch[i]);
}
nr_l2_init_ue(NULL);
UE_mac = get_mac_inst(0);
@@ -1003,6 +1003,8 @@ int main(int argc, char **argv)
nr_dcireq_t dcireq;
nr_scheduled_response_t scheduled_response;
NR_UE_PDCCH_CONFIG phy_pdcch_config={0};
memset((void*)&dcireq,0,sizeof(dcireq));
memset((void*)&scheduled_response,0,sizeof(scheduled_response));
dcireq.module_id = 0;
@@ -1017,6 +1019,7 @@ int main(int argc, char **argv)
scheduled_response.frame = frame;
scheduled_response.slot = slot;
scheduled_response.thread_id = 0;
scheduled_response.phy_data = &phy_pdcch_config;
nr_ue_phy_config_request(&UE_mac->phy_config);
//NR_COMMON_channels_t *cc = RC.nrmac[0]->common_channels;
@@ -1259,6 +1262,7 @@ int main(int argc, char **argv)
&UE_proc,
0,
dlsch_threads,
&phy_pdcch_config,
NULL);
//printf("dlsim round %d ends\n",round);
@@ -1407,8 +1411,6 @@ int main(int argc, char **argv)
LOG_M("chestF0.m","chF0",&UE->pdsch_vars[0][0]->dl_ch_estimates_ext[0][0],g_rbSize*12*14,1,1);
write_output("rxF_comp.m","rxFc",&UE->pdsch_vars[0][0]->rxdataF_comp0[0][0],N_RB_DL*12*14,1,1);
LOG_M("rxF_llr.m","rxFllr",UE->pdsch_vars[UE_proc.thread_id][0]->llr[0],available_bits,1,0);
LOG_M("pdcch_rxFcomp.m","pdcch_rxFcomp",&UE->pdcch_vars[0][0]->rxdataF_comp[0][0],96*12,1,1);
LOG_M("pdcch_rxFllr.m","pdcch_rxFllr",UE->pdcch_vars[0][0]->llr,96*12,1,1);
break;
}
@@ -28,7 +28,8 @@ void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
fapi_nr_rx_indication_t *rx_ind,
UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
uint8_t gNB_id) {}
uint8_t gNB_id,
void *phy_data) {}
void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
uint8_t pdu_type,
uint8_t gNB_id,
+8 -2
View File
@@ -74,7 +74,10 @@ void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) {}
int nr_ue_pdcch_procedures(uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int n_ss) {
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
int n_ss) {
return 0;
}
@@ -722,6 +725,8 @@ int main(int argc, char **argv)
}
else {
UE_nr_rxtx_proc_t proc={0};
NR_UE_PDCCH_CONFIG phy_pdcch_config={0};
UE->rx_offset=0;
uint8_t ssb_index = 0;
const int estimateSz=7*2*sizeof(int)*frame_parms->ofdm_symbol_size;
@@ -750,7 +755,8 @@ int main(int argc, char **argv)
0,
ssb_index%8,
SISO,
&result);
&phy_pdcch_config,
&result);
if (ret==0) {
//UE->rx_ind.rx_indication_body->mib_pdu.ssb_index; //not yet detected automatically
+4 -4
View File
@@ -782,10 +782,10 @@ int main(int argc, char **argv)
init_nr_ue_transport(UE);
// initialize the pusch dmrs
uint16_t N_n_scid[2] = {frame_parms->Nid_cell,frame_parms->Nid_cell};
int n_scid = 0; // This quantity is indicated by higher layer parameter dmrs-SeqInitialization
nr_init_pusch_dmrs(UE, N_n_scid, n_scid);
for(int n_scid = 0; n_scid<2; n_scid++) {
UE->scramblingID_ulsch[n_scid] = frame_parms->Nid_cell;
nr_init_pusch_dmrs(UE, frame_parms->Nid_cell, n_scid);
}
//Configure UE
NR_UE_RRC_INST_t rrcue;