PDCCH resource mapping DCI payload
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@@ -165,25 +165,69 @@ uint8_t nr_generate_dci_top(NR_gNB_DCI_ALLOC_t dci_alloc,
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uint16_t mod_dmrs[NR_MAX_PDCCH_DMRS_LENGTH<<1];
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uint8_t idx=0;
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uint16_t a;
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int k,l;
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nr_cce_t cce;
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/// DMRS QPSK modulation
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for (int m=0; m<NR_MAX_PDCCH_DMRS_LENGTH>>1; m++) {
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idx = ((((gold_pdcch_dmrs[(m<<1)>>5])>>((m<<1)&0x1f))&1)<<1) ^ (((gold_pdcch_dmrs[((m<<1)+1)>>5])>>(((m<<1)+1)&0x1f))&1);
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mod_dmrs[m<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
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mod_dmrs[(m<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
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for (int i=0; i<NR_MAX_PDCCH_DMRS_LENGTH>>1; i++) {
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idx = ((((gold_pdcch_dmrs[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((gold_pdcch_dmrs[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
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mod_dmrs[i<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
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mod_dmrs[(i<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
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#ifdef DEBUG_PDCCH_DMRS
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printf("m %d idx %d gold seq %d b0-b1 %d-%d mod_dmrs %d %d\n", m, idx, gold_pdcch_dmrs[(m<<1)>>5], (((gold_pdcch_dmrs[(m<<1)>>5])>>((m<<1)&0x1f))&1),
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(((gold_pdcch_dmrs[((m<<1)+1)>>5])>>(((m<<1)+1)&0x1f))&1), mod_dmrs[(m<<1)], mod_dmrs[(m<<1)+1]);
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printf("i %d idx %d gold seq %d b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, gold_pdcch_dmrs[(i<<1)>>5], (((gold_pdcch_dmrs[(i<<1)>>5])>>((i<<1)&0x1f))&1),
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(((gold_pdcch_dmrs[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), mod_dmrs[(i<<1)], mod_dmrs[(i<<1)+1]);
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#endif
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}
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/// DCI payload processing
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//channel coding
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// scrambling
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uint32_t scrambled_payload[4];
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nr_pdcch_scrambling(dci_alloc, pdcch_vars, config, scrambled_payload);
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// QPSK modulation
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uint32_t mod_dci[NR_MAX_DCI_SIZE>>1];
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for (int i=0; i<dci_alloc.size>>1; i++) {
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idx = (((scrambled_payload[i<<1]>>(i<<1))&1)<<1) ^ ((scrambled_payload[(i<<1)+1]>>((i<<1)+1))&1);
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mod_dci[i<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
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mod_dci[(i<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
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}
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/// Resource mapping
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a = (config.rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
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uint8_t n_rb = pdcch_vars.coreset_params.n_rb;
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uint8_t rb_offset = pdcch_vars.coreset_params.n_symb;
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uint8_t n_symb = pdcch_vars.coreset_params.rb_offset;
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uint8_t first_slot = pdcch_vars.first_slot;
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uint8_t first_symb = pdcch_vars.ss_params.first_symbol_idx;
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/*The coreset is initialised
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* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset
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* in time: by its first slot and its first symbol*/
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uint8_t cset_start_sc = frame_parms.first_carrier_offset + ((int)floor(frame_parms.ssb_start_subcarrier/NR_NB_SC_PER_RB)+rb_offset)*NR_NB_SC_PER_RB;
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uint8_t cset_start_symb = first_slot*frame_parms.symbols_per_slot + first_symb;
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for (int aa = 0; aa < config.rf_config.tx_antenna_ports.value; aa++)
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{
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if (cset_start_sc >= frame_parms.ofdm_symbol_size)
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cset_start_sc -= frame_parms.ofdm_symbol_size;
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for (int cce_idx=0; cce_idx<dci_alloc.L; cce_idx++){
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cce = pdcch_vars.cce_list[cce_idx];
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k = cset_start_sc + cce.start_sc_idx;
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l = cset_start_symb + cce.symb_idx;
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for (int m=0; m<NR_NB_SC_PER_RB; m++) {
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((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dci[m<<1]) >> 15;
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((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dci[(m<<1) + 1]) >> 15;
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k++;
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if (k >= frame_parms.ofdm_symbol_size)
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k -= frame_parms.ofdm_symbol_size;
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}
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}
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}
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return 0;
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}
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