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Merge branch 'ue_slot0_slot1_parallelization_bis' into develop_integration_w30

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This commit is contained in:
tct-labo4
2017-07-17 15:16:21 +02:00
parent 08b8b3142d ed145f5799
commit b5eec87e75
16 changed files with 1550 additions and 135 deletions
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openair1/PHY/LTE_TRANSPORT/dci_tools.c
+167 -42
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@@ -4781,17 +4781,19 @@ int check_dci_format1_1a_coherency(DCI_format_t dci_format,
uint8_t NPRB = 0; uint8_t NPRB = 0;
long long int RIV_max = 0; long long int RIV_max = 0;
#ifdef DEBUG_DCI
LOG_I(PHY,"[DCI-FORMAT-1-1A] AbsSubframe %d.%d dci_format %d\n", frame, subframe, dci_format); LOG_I(PHY,"[DCI-FORMAT-1-1A] AbsSubframe %d.%d dci_format %d\n", frame, subframe, dci_format);
LOG_I(PHY,"[DCI-FORMAT-1-1A] rnti %x\n", rnti); LOG_I(PHY,"[DCI-FORMAT-1-1A] rnti %x\n", rnti);
LOG_I(PHY,"[DCI-FORMAT-1-1A] harq_pid %d\n", harq_pid); LOG_I(PHY,"[DCI-FORMAT-1-1A] harq_pid %d\n", harq_pid);
LOG_I(PHY,"[DCI-FORMAT-1-1A] rah %d\n", rah); LOG_I(PHY,"[DCI-FORMAT-1-1A] rah %d\n", rah);
LOG_I(PHY,"[DCI-FORMAT-1-1A] rballoc %x\n", rballoc); LOG_I(PHY,"[DCI-FORMAT-1-1A] rballoc %x\n", rballoc);
LOG_I(PHY,"[DCI-FORMAT-1-1A] mcs1 %d\n", mcs1); LOG_I(PHY,"[DCI-FORMAT-1-1A] mcs1 %d\n", mcs1);
//LOG_I(PHY,"[DCI-FORMAT-1-1A] rv1 %d\n", rv1); #ifdef DEBUG_DCI
//LOG_I(PHY,"[DCI-FORMAT-1-1A] ndi1 %d\n", ndi1); LOG_I(PHY,"[DCI-FORMAT-1-1A] rv1 %d\n", rv1);
LOG_I(PHY,"[DCI-FORMAT-1-1A] TPC %d\n", TPC); LOG_I(PHY,"[DCI-FORMAT-1-1A] ndi1 %d\n", ndi1);
#endif #endif
LOG_I(PHY,"[DCI-FORMAT-1-1A] TPC %d\n", TPC);
// I- check dci content minimum coherency // I- check dci content minimum coherency
if( ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) && harq_pid > 0) if( ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) && harq_pid > 0)
@@ -5131,10 +5133,70 @@ int check_dci_format2_2a_coherency(DCI_format_t dci_format,
return(1); return(1);
} }
void compute_llr_offset(LTE_DL_FRAME_PARMS *frame_parms,
LTE_UE_PDCCH *pdcch_vars,
LTE_UE_PDSCH *pdsch_vars,
LTE_DL_UE_HARQ_t *dlsch0_harq,
uint8_t nb_rb_alloc,
uint8_t subframe)
{
uint32_t pbch_pss_sss_re;
uint32_t crs_re;
uint32_t granted_re;
uint32_t data_re;
uint32_t llr_offset;
uint8_t symbol;
uint8_t symbol_mod;
pdsch_vars->llr_offset[pdcch_vars->num_pdcch_symbols] = 0;
//LOG_I(PHY,"compute_llr_offset: nb RB %d - Qm %d \n", nb_rb_alloc, dlsch0_harq->Qm);
//dlsch0_harq->rb_alloc_even;
//dlsch0_harq->rb_alloc_odd;
for(symbol=pdcch_vars->num_pdcch_symbols; symbol<frame_parms->symbols_per_tti; symbol++)
{
symbol_mod = (symbol >= (7-frame_parms->Ncp))? (symbol-(7-frame_parms->Ncp)) : symbol;
if((symbol_mod == 0) || symbol_mod == (4-frame_parms->Ncp))
{
if (frame_parms->mode1_flag==0)
crs_re = 4;
else
crs_re = 2;
}
else
{
crs_re = 0;
}
granted_re = nb_rb_alloc * (12-crs_re);
pbch_pss_sss_re = adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,dlsch0_harq->Qm,subframe,symbol);
pbch_pss_sss_re = (double)pbch_pss_sss_re * ((double)(12-crs_re)/12);
data_re = granted_re - pbch_pss_sss_re;
llr_offset = data_re * dlsch0_harq->Qm * 2;
pdsch_vars->llr_length[symbol] = data_re;
if(symbol < (frame_parms->symbols_per_tti-1))
pdsch_vars->llr_offset[symbol+1] = pdsch_vars->llr_offset[symbol] + llr_offset;
//LOG_I(PHY,"Granted Re subframe %d / symbol %d => %d (%d RBs)\n", subframe, symbol_mod, granted_re,dlsch0_harq->nb_rb);
//LOG_I(PHY,"Pbch/PSS/SSS Re subframe %d / symbol %d => %d \n", subframe, symbol_mod, pbch_pss_sss_re);
//LOG_I(PHY,"CRS Re Per PRB subframe %d / symbol %d => %d \n", subframe, symbol_mod, crs_re);
//LOG_I(PHY,"Data Re subframe %d / symbol %d => %d \n", subframe, symbol_mod, data_re);
//LOG_I(PHY,"Data Re subframe %d-symbol %d => llr length %d, llr offset %d \n", subframe, symbol,
// pdsch_vars->llr_length[symbol], pdsch_vars->llr_offset[symbol]);
}
}
void prepare_dl_decoding_format1_1A(DCI_format_t dci_format, void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
uint8_t N_RB_DL, uint8_t N_RB_DL,
DCI_INFO_EXTRACTED_t *pdci_info_extarcted, DCI_INFO_EXTRACTED_t *pdci_info_extarcted,
LTE_DL_FRAME_PARMS *frame_parms, LTE_DL_FRAME_PARMS *frame_parms,
LTE_UE_PDCCH *pdcch_vars,
LTE_UE_PDSCH *pdsch_vars,
uint8_t subframe, uint8_t subframe,
uint16_t rnti, uint16_t rnti,
uint16_t tc_rnti, uint16_t tc_rnti,
@@ -5156,12 +5218,27 @@ void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
uint8_t dai = pdci_info_extarcted->dai; uint8_t dai = pdci_info_extarcted->dai;
uint8_t NPRB = 0; uint8_t NPRB = 0;
uint8_t nb_rb_alloc = 0;
if(dci_format == format1A) if(dci_format == format1A)
{ {
if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti))
{ {
NPRB = (TPC&1) + 2; NPRB = (TPC&1) + 2;
switch (N_RB_DL) {
case 6:
nb_rb_alloc = RIV2nb_rb_LUT6[rballoc];//NPRB;
break;
case 25:
nb_rb_alloc = RIV2nb_rb_LUT25[rballoc];//NPRB;
break;
case 50:
nb_rb_alloc = RIV2nb_rb_LUT50[rballoc];//NPRB;
break;
case 100:
nb_rb_alloc = RIV2nb_rb_LUT100[rballoc];//NPRB;
break;
}
} }
else else
{ {
@@ -5179,11 +5256,13 @@ void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
NPRB = RIV2nb_rb_LUT100[rballoc];//NPRB; NPRB = RIV2nb_rb_LUT100[rballoc];//NPRB;
break; break;
} }
nb_rb_alloc = NPRB;
} }
} }
else // format1 else // format1
{ {
NPRB = conv_nprb(rah, rballoc, N_RB_DL); NPRB = conv_nprb(rah, rballoc, N_RB_DL);
nb_rb_alloc = NPRB;
} }
pdlsch0->current_harq_pid = harq_pid; pdlsch0->current_harq_pid = harq_pid;
@@ -5221,14 +5300,14 @@ void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
if (pdlsch0_harq->status == SCH_IDLE) if (pdlsch0_harq->status == SCH_IDLE)
//packet was actually decoded in previous transmission (ACK was missed by eNB) //packet was actually decoded in previous transmission (ACK was missed by eNB)
//However, the round is not a good check as it might have been decoded in a retransmission prior to this one. //However, the round is not a good check as it might have been decoded in a retransmission prior to this one.
{ {
LOG_D(PHY,"skip pdsch decoding and report ack\n"); LOG_D(PHY,"skip pdsch decoding and report ack\n");
// skip pdsch decoding and report ack // skip pdsch decoding and report ack
//pdlsch0_harq->status = SCH_IDLE; //pdlsch0_harq->status = SCH_IDLE;
pdlsch0->active = 0; pdlsch0->active = 0;
pdlsch0->harq_ack[subframe].ack = 1; pdlsch0->harq_ack[subframe].ack = 1;
pdlsch0->harq_ack[subframe].harq_id = harq_pid; pdlsch0->harq_ack[subframe].harq_id = harq_pid;
pdlsch0->harq_ack[subframe].send_harq_status = 1; pdlsch0->harq_ack[subframe].send_harq_status = 1;
//pdlsch0_harq->first_tx = 0; //pdlsch0_harq->first_tx = 0;
} }
@@ -5236,7 +5315,7 @@ void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
{ {
// nothing special to do // nothing special to do
} }
} }
} }
pdlsch0_harq->DCINdi = ndi1; pdlsch0_harq->DCINdi = ndi1;
@@ -5346,7 +5425,6 @@ void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
pdlsch0_harq->rb_alloc_odd[2]= pdlsch0_harq->rb_alloc_even[2]; pdlsch0_harq->rb_alloc_odd[2]= pdlsch0_harq->rb_alloc_even[2];
pdlsch0_harq->rb_alloc_odd[3]= pdlsch0_harq->rb_alloc_even[3]; pdlsch0_harq->rb_alloc_odd[3]= pdlsch0_harq->rb_alloc_even[3];
} }
if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti))
{ {
pdlsch0_harq->TBS = TBStable[mcs1][NPRB-1]; pdlsch0_harq->TBS = TBStable[mcs1][NPRB-1];
@@ -5360,11 +5438,20 @@ void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
pdlsch0_harq->Qm = get_Qm(mcs1); pdlsch0_harq->Qm = get_Qm(mcs1);
} }
} }
compute_llr_offset(frame_parms,
pdcch_vars,
pdsch_vars,
pdlsch0_harq,
nb_rb_alloc,
subframe);
} }
void prepare_dl_decoding_format1C(uint8_t N_RB_DL, void prepare_dl_decoding_format1C(uint8_t N_RB_DL,
DCI_INFO_EXTRACTED_t *pdci_info_extarcted, DCI_INFO_EXTRACTED_t *pdci_info_extarcted,
LTE_DL_FRAME_PARMS *frame_parms, LTE_DL_FRAME_PARMS *frame_parms,
LTE_UE_PDCCH *pdcch_vars,
LTE_UE_PDSCH *pdsch_vars,
uint32_t rnti, uint32_t rnti,
uint32_t si_rnti, uint32_t si_rnti,
uint32_t ra_rnti, uint32_t ra_rnti,
@@ -5467,6 +5554,14 @@ void prepare_dl_decoding_format1C(uint8_t N_RB_DL,
AssertFatal(0,"Format 1C: Unknown N_RB_DL %d\n",frame_parms->N_RB_DL); AssertFatal(0,"Format 1C: Unknown N_RB_DL %d\n",frame_parms->N_RB_DL);
break; break;
} }
compute_llr_offset(frame_parms,
pdcch_vars,
pdsch_vars,
pdlsch0_harq,
pdlsch0_harq->nb_rb,
subframe);
} }
void compute_precoding_info_2cw(uint8_t tpmi, uint8_t tbswap, uint16_t pmi_alloc, LTE_DL_FRAME_PARMS *frame_parms, LTE_DL_UE_HARQ_t *dlsch0_harq, LTE_DL_UE_HARQ_t *dlsch1_harq) void compute_precoding_info_2cw(uint8_t tpmi, uint8_t tbswap, uint16_t pmi_alloc, LTE_DL_FRAME_PARMS *frame_parms, LTE_DL_UE_HARQ_t *dlsch0_harq, LTE_DL_UE_HARQ_t *dlsch1_harq)
@@ -5536,10 +5631,10 @@ switch (tpmi) {
dlsch_harq->pmi_alloc = pmi_alloc;//pmi_convert(frame_parms,dlsch0->pmi_alloc,1); dlsch_harq->pmi_alloc = pmi_alloc;//pmi_convert(frame_parms,dlsch0->pmi_alloc,1);
break; break;
} }
#ifdef DEBUG_HARQ #ifdef DEBUG_HARQ
printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d with tpmi %d\n", dlsch_harq->pmi_alloc, tpmi); printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d with tpmi %d\n", dlsch_harq->pmi_alloc, tpmi);
#endif #endif
} }
void compute_precoding_info_format2A(uint8_t tpmi, void compute_precoding_info_format2A(uint8_t tpmi,
uint8_t nb_antenna_ports_eNB, uint8_t nb_antenna_ports_eNB,
@@ -5640,6 +5735,8 @@ void compute_precoding_info_format2A(uint8_t tpmi,
void prepare_dl_decoding_format2_2A(DCI_format_t dci_format, void prepare_dl_decoding_format2_2A(DCI_format_t dci_format,
DCI_INFO_EXTRACTED_t *pdci_info_extarcted, DCI_INFO_EXTRACTED_t *pdci_info_extarcted,
LTE_DL_FRAME_PARMS *frame_parms, LTE_DL_FRAME_PARMS *frame_parms,
LTE_UE_PDCCH *pdcch_vars,
LTE_UE_PDSCH *pdsch_vars,
uint16_t rnti, uint16_t rnti,
uint8_t subframe, uint8_t subframe,
LTE_DL_UE_HARQ_t *dlsch0_harq, LTE_DL_UE_HARQ_t *dlsch0_harq,
@@ -5819,7 +5916,7 @@ void prepare_dl_decoding_format2_2A(DCI_format_t dci_format,
if (TB0_active) { if (TB0_active) {
// printf("TB0 ndi1 =%d, dlsch0_harq->DCINdi =%d, dlsch0_harq->first_tx = %d\n", ndi1, dlsch0_harq->DCINdi, dlsch0_harq->first_tx); // printf("TB0 ndi1 =%d, dlsch0_harq->DCINdi =%d, dlsch0_harq->first_tx = %d\n", ndi1, dlsch0_harq->DCINdi, dlsch0_harq->first_tx);
if ((ndi1!=dlsch0_harq->DCINdi) || (dlsch0_harq->first_tx==1)) { if ((ndi1!=dlsch0_harq->DCINdi) || (dlsch0_harq->first_tx==1)) {
dlsch0_harq->round = 0; dlsch0_harq->round = 0;
dlsch0_harq->status = ACTIVE; dlsch0_harq->status = ACTIVE;
dlsch0_harq->DCINdi = ndi1; dlsch0_harq->DCINdi = ndi1;
@@ -5834,12 +5931,12 @@ void prepare_dl_decoding_format2_2A(DCI_format_t dci_format,
//NDI has not been toggled but rv was increased by eNB: retransmission //NDI has not been toggled but rv was increased by eNB: retransmission
{ {
if(dlsch0_harq->status == SCH_IDLE) { if(dlsch0_harq->status == SCH_IDLE) {
// skip pdsch decoding and report ack // skip pdsch decoding and report ack
//dlsch0_harq->status = SCH_IDLE; //dlsch0_harq->status = SCH_IDLE;
pdlsch0->active = 0; pdlsch0->active = 0;
pdlsch0->harq_ack[subframe].ack = 1; pdlsch0->harq_ack[subframe].ack = 1;
pdlsch0->harq_ack[subframe].harq_id = harq_pid; pdlsch0->harq_ack[subframe].harq_id = harq_pid;
pdlsch0->harq_ack[subframe].send_harq_status = 1; pdlsch0->harq_ack[subframe].send_harq_status = 1;
}*/ }*/
// if Imcs in [29..31] TBS is assumed to be as determined from DCI transported in the latest // if Imcs in [29..31] TBS is assumed to be as determined from DCI transported in the latest
@@ -5882,13 +5979,13 @@ void prepare_dl_decoding_format2_2A(DCI_format_t dci_format,
//NDI has not been toggled but rv was increased by eNB: retransmission //NDI has not been toggled but rv was increased by eNB: retransmission
{ {
if(dlsch1_harq->status == SCH_IDLE) { if(dlsch1_harq->status == SCH_IDLE) {
// skip pdsch decoding and report ack // skip pdsch decoding and report ack
//dlsch1_harq->status = SCH_IDLE; //dlsch1_harq->status = SCH_IDLE;
pdlsch1->active = 0; pdlsch1->active = 0;
pdlsch1->harq_ack[subframe].ack = 1; pdlsch1->harq_ack[subframe].ack = 1;
pdlsch1->harq_ack[subframe].harq_id = harq_pid; pdlsch1->harq_ack[subframe].harq_id = harq_pid;
pdlsch1->harq_ack[subframe].send_harq_status = 1; pdlsch1->harq_ack[subframe].send_harq_status = 1;
} }
}*/ }*/
// if Imcs in [29..31] TBS is assumed to be as determined from DCI transported in the latest // if Imcs in [29..31] TBS is assumed to be as determined from DCI transported in the latest
@@ -5911,7 +6008,16 @@ void prepare_dl_decoding_format2_2A(DCI_format_t dci_format,
} }
compute_llr_offset(frame_parms,
pdcch_vars,
pdsch_vars,
dlsch0_harq,
dlsch0_harq->nb_rb,
subframe);
/* #ifdef DEBUG_HARQ /* #ifdef DEBUG_HARQ
printf("[DCI UE]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status);
printf("[DCI UE]: TB0_active %d , TB1_active %d\n", TB0_active, TB1_active); printf("[DCI UE]: TB0_active %d , TB1_active %d\n", TB0_active, TB1_active);
if (dlsch0 != NULL && dlsch1 != NULL) if (dlsch0 != NULL && dlsch1 != NULL)
printf("[DCI UE] dlsch0_harq status = %d, dlsch1_harq status = %d\n", dlsch0_harq->status, dlsch1_harq->status); printf("[DCI UE] dlsch0_harq status = %d, dlsch1_harq status = %d\n", dlsch0_harq->status, dlsch1_harq->status);
@@ -5927,6 +6033,8 @@ int generate_ue_dlsch_params_from_dci(int frame,
void *dci_pdu, void *dci_pdu,
uint16_t rnti, uint16_t rnti,
DCI_format_t dci_format, DCI_format_t dci_format,
LTE_UE_PDCCH *pdcch_vars,
LTE_UE_PDSCH *pdsch_vars,
LTE_UE_DLSCH_t **dlsch, LTE_UE_DLSCH_t **dlsch,
LTE_DL_FRAME_PARMS *frame_parms, LTE_DL_FRAME_PARMS *frame_parms,
PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated, PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
@@ -5938,10 +6046,10 @@ int generate_ue_dlsch_params_from_dci(int frame,
{ {
uint8_t harq_pid=0; uint8_t harq_pid=0;
uint8_t frame_type=frame_parms->frame_type; uint8_t frame_type=frame_parms->frame_type;
uint8_t tpmi=0; uint8_t tpmi=0;
LTE_UE_DLSCH_t *dlsch0=NULL,*dlsch1=NULL; LTE_UE_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
LTE_DL_UE_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL; LTE_DL_UE_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
DCI_INFO_EXTRACTED_t dci_info_extarcted; DCI_INFO_EXTRACTED_t dci_info_extarcted;
uint8_t status=0; uint8_t status=0;
@@ -6006,16 +6114,21 @@ int generate_ue_dlsch_params_from_dci(int frame,
&dci_info_extarcted, &dci_info_extarcted,
dlsch0_harq); dlsch0_harq);
if(status == 0) if(status == 0)
{
printf("bad DCI 1A !!! \n");
return(-1); return(-1);
}
// dci is correct ==> update internal structure and prepare dl decoding // dci is correct ==> update internal structure and prepare dl decoding
#ifdef DEBUG_DCI //#ifdef DEBUG_DCI
LOG_I(PHY,"[DCI-FORMAT-1A] AbsSubframe %d.%d prepare dl decoding \n", frame, subframe); LOG_I(PHY,"[DCI-FORMAT-1A] AbsSubframe %d.%d prepare dl decoding \n", frame, subframe);
#endif //#endif
prepare_dl_decoding_format1_1A(format1A, prepare_dl_decoding_format1_1A(format1A,
frame_parms->N_RB_DL, frame_parms->N_RB_DL,
&dci_info_extarcted, &dci_info_extarcted,
frame_parms, frame_parms,
pdcch_vars,
pdsch_vars,
subframe, subframe,
rnti, rnti,
tc_rnti, tc_rnti,
@@ -6066,6 +6179,8 @@ int generate_ue_dlsch_params_from_dci(int frame,
prepare_dl_decoding_format1C(frame_parms->N_RB_DL, prepare_dl_decoding_format1C(frame_parms->N_RB_DL,
&dci_info_extarcted, &dci_info_extarcted,
frame_parms, frame_parms,
pdcch_vars,
pdsch_vars,
rnti, rnti,
si_rnti, si_rnti,
ra_rnti, ra_rnti,
@@ -6107,16 +6222,22 @@ int generate_ue_dlsch_params_from_dci(int frame,
&dci_info_extarcted, &dci_info_extarcted,
dlsch0_harq); dlsch0_harq);
if(status == 0) if(status == 0)
return(-1); {
printf("bad DCI 1 !!! \n");
return(-1);
}
// dci is correct ==> update internal structure and prepare dl decoding // dci is correct ==> update internal structure and prepare dl decoding
#ifdef DEBUG_DCI //#ifdef DEBUG_DCI
LOG_I(PHY,"[DCI-FORMAT-1] AbsSubframe %d.%d prepare dl decoding \n", frame, subframe); LOG_I(PHY,"[DCI-FORMAT-1] AbsSubframe %d.%d prepare dl decoding \n", frame, subframe);
#endif //#endif
prepare_dl_decoding_format1_1A(format1, prepare_dl_decoding_format1_1A(format1,
frame_parms->N_RB_DL, frame_parms->N_RB_DL,
&dci_info_extarcted, &dci_info_extarcted,
frame_parms, frame_parms,
pdcch_vars,
pdsch_vars,
subframe, subframe,
rnti, rnti,
tc_rnti, tc_rnti,
@@ -6130,7 +6251,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
case format2: case format2:
{ {
//extract dci infomation // extract dci infomation
//LOG_I(PHY,"[DCI-format2] AbsSubframe %d.%d extract dci infomation \n", frame, subframe); //LOG_I(PHY,"[DCI-format2] AbsSubframe %d.%d extract dci infomation \n", frame, subframe);
extract_dci2_info(frame_parms->N_RB_DL, extract_dci2_info(frame_parms->N_RB_DL,
frame_type, frame_type,
@@ -6143,8 +6264,8 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch[0]->active = 1; dlsch[0]->active = 1;
dlsch[1]->active = 1; dlsch[1]->active = 1;
dlsch0 = dlsch[0]; dlsch0 = dlsch[0];
dlsch1 = dlsch[1]; dlsch1 = dlsch[1];
dlsch0_harq = dlsch0->harq_processes[dci_info_extarcted.harq_pid]; dlsch0_harq = dlsch0->harq_processes[dci_info_extarcted.harq_pid];
dlsch1_harq = dlsch1->harq_processes[dci_info_extarcted.harq_pid]; dlsch1_harq = dlsch1->harq_processes[dci_info_extarcted.harq_pid];
@@ -6171,13 +6292,15 @@ int generate_ue_dlsch_params_from_dci(int frame,
prepare_dl_decoding_format2_2A(format2, prepare_dl_decoding_format2_2A(format2,
&dci_info_extarcted, &dci_info_extarcted,
frame_parms, frame_parms,
pdcch_vars,
pdsch_vars,
rnti, rnti,
subframe, subframe,
dlsch0_harq, dlsch0_harq,
dlsch1_harq, dlsch1_harq,
dlsch0, dlsch0,
dlsch1); dlsch1);
} }
break; break;
case format2A: case format2A:
@@ -6224,6 +6347,8 @@ int generate_ue_dlsch_params_from_dci(int frame,
prepare_dl_decoding_format2_2A(format2A, prepare_dl_decoding_format2_2A(format2A,
&dci_info_extarcted, &dci_info_extarcted,
frame_parms, frame_parms,
pdcch_vars,
pdsch_vars,
rnti, rnti,
subframe, subframe,
dlsch0_harq, dlsch0_harq,
@@ -6231,7 +6356,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0, dlsch0,
dlsch1); dlsch1);
} }
break; break;
case format1E_2A_M10PRB: case format1E_2A_M10PRB:
if (!dlsch[0]) return -1; if (!dlsch[0]) return -1;
openair1/PHY/LTE_TRANSPORT/dlsch_demodulation.c
+126 -28
View File
@@ -89,6 +89,7 @@ extern void print_shorts(char *s,int16_t *x);
int rx_pdsch(PHY_VARS_UE *ue, int rx_pdsch(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
PDSCH_t type, PDSCH_t type,
unsigned char eNB_id, unsigned char eNB_id,
unsigned char eNB_id_i, //if this == ue->n_connected_eNB, we assume MU interference unsigned char eNB_id_i, //if this == ue->n_connected_eNB, we assume MU interference
@@ -111,10 +112,12 @@ int rx_pdsch(PHY_VARS_UE *ue,
int avg_0[2]; int avg_0[2];
int avg_1[2]; int avg_1[2];
uint8_t slot = 0;
unsigned char aatx,aarx; unsigned char aatx,aarx;
unsigned short nb_rb = 0, round; unsigned short nb_rb = 0, round;
int avgs, rb; int avgs = 0, rb;
LTE_DL_UE_HARQ_t *dlsch0_harq,*dlsch1_harq = 0; LTE_DL_UE_HARQ_t *dlsch0_harq,*dlsch1_harq = 0;
uint8_t beamforming_mode; uint8_t beamforming_mode;
@@ -247,6 +250,11 @@ int rx_pdsch(PHY_VARS_UE *ue,
return(-1); return(-1);
} }
} }
if(symbol > ue->frame_parms.symbols_per_tti>>1)
{
slot = 1;
}
#ifdef DEBUG_HARQ #ifdef DEBUG_HARQ
printf("Demod dlsch0_harq->pmi_alloc %d\n", dlsch0_harq->pmi_alloc); printf("Demod dlsch0_harq->pmi_alloc %d\n", dlsch0_harq->pmi_alloc);
#endif #endif
@@ -256,6 +264,9 @@ int rx_pdsch(PHY_VARS_UE *ue,
LOG_I(PHY,"dlsch: using pmi %x (%p), rb_alloc %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc),dlsch[0],dlsch0_harq->rb_alloc_even[0]); LOG_I(PHY,"dlsch: using pmi %x (%p), rb_alloc %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc),dlsch[0],dlsch0_harq->rb_alloc_even[0]);
#endif #endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[subframe%RX_NB_TH][slot]);
#endif
nb_rb = dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].rxdataF, nb_rb = dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].rxdataF,
common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].dl_ch_estimates[eNB_id], common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].dl_ch_estimates[eNB_id],
pdsch_vars[eNB_id]->rxdataF_ext, pdsch_vars[eNB_id]->rxdataF_ext,
@@ -363,12 +374,20 @@ int rx_pdsch(PHY_VARS_UE *ue,
return(-1); return(-1);
} }
#if UE_TIMING_TRACE
#ifdef DEBUG_PHY stop_meas(&ue->generic_stat_bis[subframe%RX_NB_TH][slot]);
LOG_D(PHY,"[DLSCH] nb_rb %d log2_maxh = %d (%d,%d)\n",nb_rb,pdsch_vars[eNB_id]->log2_maxh,avg[0],avgs); #if DISABLE_LOG_X
LOG_D(PHY,"[DLSCH] mimo_mode = %d\n", dlsch0_harq->mimo_mode); printf("[AbsSFN %d.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",frame,subframe,slot,
symbol,ue->high_speed_flag,type,symbol,ue->generic_stat_bis[subframe%RX_NB_TH][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",frame,subframe,slot,symbol,
ue->high_speed_flag,type,ue->generic_stat_bis[subframe%RX_NB_TH][slot].p_time/(cpuf*1000.0));
#endif
#endif #endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[subframe%RX_NB_TH][slot]);
#endif
aatx = frame_parms->nb_antenna_ports_eNB; aatx = frame_parms->nb_antenna_ports_eNB;
aarx = frame_parms->nb_antennas_rx; aarx = frame_parms->nb_antennas_rx;
@@ -391,6 +410,18 @@ int rx_pdsch(PHY_VARS_UE *ue,
nb_rb); nb_rb);
} }
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[subframe%RX_NB_TH][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[subframe%RX_NB_TH][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[subframe%RX_NB_TH][slot].p_time/(cpuf*1000.0));
#endif
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[subframe%RX_NB_TH][slot]);
#endif
if (first_symbol_flag==1) { if (first_symbol_flag==1) {
if (beamforming_mode==0){ if (beamforming_mode==0){
if (dlsch0_harq->mimo_mode<LARGE_CDD) { if (dlsch0_harq->mimo_mode<LARGE_CDD) {
@@ -481,6 +512,16 @@ int rx_pdsch(PHY_VARS_UE *ue,
avg[0],avgs); avg[0],avgs);
//LOG_D(PHY,"[DLSCH] mimo_mode = %d\n", dlsch0_harq->mimo_mode); //LOG_D(PHY,"[DLSCH] mimo_mode = %d\n", dlsch0_harq->mimo_mode);
#endif #endif
//wait until pdcch is decoded
proc->channel_level = 1;
}
uint32_t wait = 0;
while(proc->channel_level == 0)
{
usleep(1);
wait++;
} }
#if T_TRACER #if T_TRACER
@@ -491,6 +532,19 @@ int rx_pdsch(PHY_VARS_UE *ue,
} }
#endif #endif
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[subframe%RX_NB_TH][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,subframe,slot,symbol,first_symbol_flag,ue->generic_stat_bis[subframe%RX_NB_TH][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,subframe,slot,symbol,first_symbol_flag,ue->generic_stat_bis[subframe%RX_NB_TH][slot].p_time/(cpuf*1000.0));
#endif
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[subframe%RX_NB_TH][slot]);
#endif
// Now channel compensation // Now channel compensation
if (dlsch0_harq->mimo_mode<LARGE_CDD) { if (dlsch0_harq->mimo_mode<LARGE_CDD) {
dlsch_channel_compensation(pdsch_vars[eNB_id]->rxdataF_ext, dlsch_channel_compensation(pdsch_vars[eNB_id]->rxdataF_ext,
@@ -685,8 +739,18 @@ int rx_pdsch(PHY_VARS_UE *ue,
measurements); // log2_maxh+I0_shift measurements); // log2_maxh+I0_shift
} }
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[subframe%RX_NB_TH][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n",frame,subframe,slot,symbol,pdsch_vars[eNB_id]->log2_maxh,proc->channel_level,ue->generic_stat_bis[subframe%RX_NB_TH][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n",frame,subframe,slot,symbol,pdsch_vars[eNB_id]->log2_maxh,proc->channel_level,ue->generic_stat_bis[subframe%RX_NB_TH][slot].p_time/(cpuf*1000.0));
#endif
#endif
// MRC // MRC
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[subframe%RX_NB_TH][slot]);
#endif
if (frame_parms->nb_antennas_rx > 1) { if (frame_parms->nb_antennas_rx > 1) {
if ((dlsch0_harq->mimo_mode == LARGE_CDD) || if ((dlsch0_harq->mimo_mode == LARGE_CDD) ||
@@ -754,31 +818,59 @@ int rx_pdsch(PHY_VARS_UE *ue,
//i_mod should have been passed as a parameter //i_mod should have been passed as a parameter
} }
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[subframe%RX_NB_TH][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[subframe%RX_NB_TH][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[subframe%RX_NB_TH][slot].p_time/(cpuf*1000.0));
#endif
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[subframe%RX_NB_TH][slot]);
#endif
//printf("LLR dlsch0_harq->Qm %d rx_type %d cw0 %d cw1 %d symbol %d \n",dlsch0_harq->Qm,rx_type,codeword_TB0,codeword_TB1,symbol); //printf("LLR dlsch0_harq->Qm %d rx_type %d cw0 %d cw1 %d symbol %d \n",dlsch0_harq->Qm,rx_type,codeword_TB0,codeword_TB1,symbol);
// compute LLRs
// -> // compute @pointer where llrs should filled for this ofdm-symbol
int8_t *pllr_symbol_cw0;
int8_t *pllr_symbol_cw1;
uint32_t llr_offset_symbol;
llr_offset_symbol = pdsch_vars[eNB_id]->llr_offset[symbol];
pllr_symbol_cw0 = (int8_t*)pdsch_vars[eNB_id]->llr[0];
pllr_symbol_cw1 = (int8_t*)pdsch_vars[eNB_id]->llr[1];
pllr_symbol_cw0 += llr_offset_symbol;
pllr_symbol_cw1 += llr_offset_symbol;
/*LOG_I(PHY,"compute LLRs [AbsSubframe %d.%d-%d] NbRB %d Qm %d LLRs-Length %d LLR-Offset %d @LLR Buff %x @LLR Buff(symb) %x\n",
proc->frame_rx, proc->subframe_rx,symbol,
nb_rb,dlsch0_harq->Qm,
pdsch_vars[eNB_id]->llr_length[symbol],
pdsch_vars[eNB_id]->llr_offset[symbol],
(int16_t*)pdsch_vars[eNB_id]->llr[0],
pllr_symbol);*/
switch (dlsch0_harq->Qm) { switch (dlsch0_harq->Qm) {
case 2 : case 2 :
if ((rx_type==rx_standard) || (codeword_TB1 == -1)) { if ((rx_type==rx_standard) || (codeword_TB1 == -1)) {
dlsch_qpsk_llr(frame_parms, dlsch_qpsk_llr(frame_parms,
pdsch_vars[eNB_id]->rxdataF_comp0, pdsch_vars[eNB_id]->rxdataF_comp0,
pdsch_vars[eNB_id]->llr[0], (int16_t*)pllr_symbol_cw0,
symbol, symbol,
first_symbol_flag, first_symbol_flag,
nb_rb, nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
pdsch_vars[eNB_id]->llr128,
beamforming_mode); beamforming_mode);
} else if (codeword_TB0 == -1){ } else if (codeword_TB0 == -1){
dlsch_qpsk_llr(frame_parms, dlsch_qpsk_llr(frame_parms,
pdsch_vars[eNB_id]->rxdataF_comp0, pdsch_vars[eNB_id]->rxdataF_comp0,
pdsch_vars[eNB_id]->llr[1], (int16_t*)pllr_symbol_cw1,
symbol, symbol,
first_symbol_flag, first_symbol_flag,
nb_rb, nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream,
beamforming_mode); beamforming_mode);
} }
else if (rx_type >= rx_IC_single_stream) { else if (rx_type >= rx_IC_single_stream) {
@@ -945,22 +1037,22 @@ int rx_pdsch(PHY_VARS_UE *ue,
if ((rx_type==rx_standard) || (codeword_TB1 == -1)) { if ((rx_type==rx_standard) || (codeword_TB1 == -1)) {
dlsch_64qam_llr(frame_parms, dlsch_64qam_llr(frame_parms,
pdsch_vars[eNB_id]->rxdataF_comp0, pdsch_vars[eNB_id]->rxdataF_comp0,
pdsch_vars[eNB_id]->llr[0], (int16_t*)pllr_symbol_cw0,
pdsch_vars[eNB_id]->dl_ch_mag0, pdsch_vars[eNB_id]->dl_ch_mag0,
pdsch_vars[eNB_id]->dl_ch_magb0, pdsch_vars[eNB_id]->dl_ch_magb0,
symbol,first_symbol_flag,nb_rb, symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr128, pdsch_vars[eNB_id]->llr_offset[symbol],
beamforming_mode); beamforming_mode);
} else if (codeword_TB0 == -1){ } else if (codeword_TB0 == -1){
dlsch_64qam_llr(frame_parms, dlsch_64qam_llr(frame_parms,
pdsch_vars[eNB_id]->rxdataF_comp0, pdsch_vars[eNB_id]->rxdataF_comp0,
pdsch_vars[eNB_id]->llr[1], (int16_t*)pllr_symbol_cw1,
pdsch_vars[eNB_id]->dl_ch_mag0, pdsch_vars[eNB_id]->dl_ch_mag0,
pdsch_vars[eNB_id]->dl_ch_magb0, pdsch_vars[eNB_id]->dl_ch_magb0,
symbol,first_symbol_flag,nb_rb, symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream, pdsch_vars[eNB_id]->llr_offset[symbol],
beamforming_mode); beamforming_mode);
} }
else if (rx_type >= rx_IC_single_stream) { else if (rx_type >= rx_IC_single_stream) {
@@ -1017,10 +1109,10 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_mag0, pdsch_vars[eNB_id]->dl_ch_mag0,
dl_ch_mag_ptr,//i dl_ch_mag_ptr,//i
pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0], (int16_t*)pllr_symbol_cw0,
symbol,first_symbol_flag,nb_rb, symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr128); pdsch_vars[eNB_id]->llr_offset[symbol]);
if (rx_type==rx_IC_dual_stream) { if (rx_type==rx_IC_dual_stream) {
dlsch_64qam_64qam_llr(frame_parms, dlsch_64qam_64qam_llr(frame_parms,
rxdataF_comp_ptr, rxdataF_comp_ptr,
@@ -1028,10 +1120,10 @@ int rx_pdsch(PHY_VARS_UE *ue,
dl_ch_mag_ptr, dl_ch_mag_ptr,
pdsch_vars[eNB_id]->dl_ch_mag0,//i pdsch_vars[eNB_id]->dl_ch_mag0,//i
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1], (int16_t*)pllr_symbol_cw1,
symbol,first_symbol_flag,nb_rb, symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol), adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream); pdsch_vars[eNB_id]->llr_offset[symbol]);
} }
} }
} }
@@ -1047,10 +1139,9 @@ int rx_pdsch(PHY_VARS_UE *ue,
if (rx_type==rx_standard) { if (rx_type==rx_standard) {
dlsch_qpsk_llr(frame_parms, dlsch_qpsk_llr(frame_parms,
pdsch_vars[eNB_id]->rxdataF_comp0, pdsch_vars[eNB_id]->rxdataF_comp0,
pdsch_vars[eNB_id]->llr[0], (int16_t*)pllr_symbol_cw0,
symbol,first_symbol_flag,nb_rb, symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
pdsch_vars[eNB_id]->llr128,
beamforming_mode); beamforming_mode);
} }
break; break;
@@ -1070,12 +1161,12 @@ int rx_pdsch(PHY_VARS_UE *ue,
if (rx_type==rx_standard) { if (rx_type==rx_standard) {
dlsch_64qam_llr(frame_parms, dlsch_64qam_llr(frame_parms,
pdsch_vars[eNB_id]->rxdataF_comp0, pdsch_vars[eNB_id]->rxdataF_comp0,
pdsch_vars[eNB_id]->llr[0], (int16_t*)pllr_symbol_cw0,
pdsch_vars[eNB_id]->dl_ch_mag0, pdsch_vars[eNB_id]->dl_ch_mag0,
pdsch_vars[eNB_id]->dl_ch_magb0, pdsch_vars[eNB_id]->dl_ch_magb0,
symbol,first_symbol_flag,nb_rb, symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr128, pdsch_vars[eNB_id]->llr_offset[symbol],
beamforming_mode); beamforming_mode);
} }
break; break;
@@ -1086,6 +1177,14 @@ int rx_pdsch(PHY_VARS_UE *ue,
} }
} }
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[subframe%RX_NB_TH][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[subframe%RX_NB_TH][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[subframe%RX_NB_TH][slot].p_time/(cpuf*1000.0));
#endif
#endif
// Please keep it: useful for debugging // Please keep it: useful for debugging
#if 0 #if 0
if( (symbol == 13) && (subframe==0) && (dlsch0_harq->Qm == 6) /*&& (nb_rb==25)*/) if( (symbol == 13) && (subframe==0) && (dlsch0_harq->Qm == 6) /*&& (nb_rb==25)*/)
@@ -1132,7 +1231,6 @@ int rx_pdsch(PHY_VARS_UE *ue,
T_BUFFER(&pdsch_vars[eNB_id]->rxdataF_comp0[eNB_id][0], T_BUFFER(&pdsch_vars[eNB_id]->rxdataF_comp0[eNB_id][0],
2 * /* ulsch[UE_id]->harq_processes[harq_pid]->nb_rb */ frame_parms->N_RB_UL *12*frame_parms->symbols_per_tti*2)); 2 * /* ulsch[UE_id]->harq_processes[harq_pid]->nb_rb */ frame_parms->N_RB_UL *12*frame_parms->symbols_per_tti*2));
#endif #endif
return(0); return(0);
} }
@@ -3464,11 +3562,11 @@ void dlsch_channel_level(int **dl_ch_estimates_ext,
*/ */
} }
avg[(aatx<<1)+aarx] = (((int32_t*)&avg128D)[0] + avg[(aatx<<1)+aarx] =(((int32_t*)&avg128D)[0] +
((int32_t*)&avg128D)[1] + ((int32_t*)&avg128D)[1] +
((int32_t*)&avg128D)[2] + ((int32_t*)&avg128D)[2] +
((int32_t*)&avg128D)[3])/y; ((int32_t*)&avg128D)[3])/y;
//printf("Channel level : %d\n",avg[(aatx<<1)+aarx]); // printf("Channel level : %d\n",avg[(aatx<<1)+aarx]);
} }
_mm_empty(); _mm_empty();
@@ -4644,7 +4742,7 @@ unsigned short dlsch_extract_rbs_dual(int **rxdataF,
unsigned char subframe, unsigned char subframe,
uint32_t high_speed_flag, uint32_t high_speed_flag,
LTE_DL_FRAME_PARMS *frame_parms, LTE_DL_FRAME_PARMS *frame_parms,
MIMO_mode_t mimo_mode) { MIMO_mode_t mimo_mode) {
int prb,nb_rb=0; int prb,nb_rb=0;
int prb_off,prb_off2; int prb_off,prb_off2;
openair1/PHY/LTE_TRANSPORT/dlsch_llr_computation.c
+50 -9
View File
@@ -636,7 +636,6 @@ int dlsch_qpsk_llr(LTE_DL_FRAME_PARMS *frame_parms,
uint8_t first_symbol_flag, uint8_t first_symbol_flag,
uint16_t nb_rb, uint16_t nb_rb,
uint16_t pbch_pss_sss_adjust, uint16_t pbch_pss_sss_adjust,
int16_t **llr32p,
uint8_t beamforming_mode) uint8_t beamforming_mode)
{ {
@@ -645,12 +644,14 @@ int dlsch_qpsk_llr(LTE_DL_FRAME_PARMS *frame_parms,
int i,len; int i,len;
uint8_t symbol_mod = (symbol >= (7-frame_parms->Ncp))? (symbol-(7-frame_parms->Ncp)) : symbol; uint8_t symbol_mod = (symbol >= (7-frame_parms->Ncp))? (symbol-(7-frame_parms->Ncp)) : symbol;
/*
if (first_symbol_flag==1) { if (first_symbol_flag==1) {
llr32 = (uint32_t*)dlsch_llr; llr32 = (uint32_t*)dlsch_llr;
} else { } else {
llr32 = (uint32_t*)(*llr32p); llr32 = (uint32_t*)(*llr32p);
} }*/
llr32 = (uint32_t*)dlsch_llr;
if (!llr32) { if (!llr32) {
msg("dlsch_qpsk_llr: llr is null, symbol %d, llr32=%p\n",symbol, llr32); msg("dlsch_qpsk_llr: llr is null, symbol %d, llr32=%p\n",symbol, llr32);
return(-1); return(-1);
@@ -672,6 +673,13 @@ int dlsch_qpsk_llr(LTE_DL_FRAME_PARMS *frame_parms,
//printf("dlsch_qpsk_llr: symbol %d,nb_rb %d, len %d,pbch_pss_sss_adjust %d\n",symbol,nb_rb,len,pbch_pss_sss_adjust); //printf("dlsch_qpsk_llr: symbol %d,nb_rb %d, len %d,pbch_pss_sss_adjust %d\n",symbol,nb_rb,len,pbch_pss_sss_adjust);
/*LOG_I(PHY,"dlsch_qpsk_llr: [symb %d / FirstSym %d / Length %d]: @LLR Buff %x, @LLR Buff(symb) %x \n",
symbol,
first_symbol_flag,
len,
dlsch_llr,
llr32);*/
//printf("ll32p=%p , dlsch_llr=%p, symbol=%d, flag=%d \n", llr32, dlsch_llr, symbol, first_symbol_flag); //printf("ll32p=%p , dlsch_llr=%p, symbol=%d, flag=%d \n", llr32, dlsch_llr, symbol, first_symbol_flag);
for (i=0; i<len; i++) { for (i=0; i<len; i++) {
*llr32 = *rxF; *llr32 = *rxF;
@@ -680,7 +688,7 @@ int dlsch_qpsk_llr(LTE_DL_FRAME_PARMS *frame_parms,
llr32++; llr32++;
} }
*llr32p = (int16_t *)llr32; //*llr32p = (int16_t *)llr32;
return(0); return(0);
} }
@@ -1040,7 +1048,8 @@ void dlsch_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
uint8_t first_symbol_flag, uint8_t first_symbol_flag,
uint16_t nb_rb, uint16_t nb_rb,
uint16_t pbch_pss_sss_adjust, uint16_t pbch_pss_sss_adjust,
int16_t **llr_save, //int16_t **llr_save,
uint32_t llr_offset,
uint8_t beamforming_mode) uint8_t beamforming_mode)
{ {
#if defined(__x86_64__) || defined(__i386__) #if defined(__x86_64__) || defined(__i386__)
@@ -1054,11 +1063,18 @@ void dlsch_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
unsigned char symbol_mod,len_mod4; unsigned char symbol_mod,len_mod4;
short *llr; short *llr;
int16_t *llr2; int16_t *llr2;
int8_t *pllr_symbol;
/*
if (first_symbol_flag==1) if (first_symbol_flag==1)
llr = dlsch_llr; llr = dlsch_llr;
else else
llr = *llr_save; llr = *llr_save;
*/
llr = dlsch_llr;
pllr_symbol = (int8_t*)dlsch_llr;
pllr_symbol += llr_offset;
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol; symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
@@ -1082,6 +1098,15 @@ void dlsch_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
len = (nb_rb*12) - pbch_pss_sss_adjust; len = (nb_rb*12) - pbch_pss_sss_adjust;
} }
// printf("dlsch_64qam_llr: symbol %d,nb_rb %d, len %d,pbch_pss_sss_adjust %d\n",symbol,nb_rb,len,pbch_pss_sss_adjust);
/* LOG_I(PHY,"dlsch_64qam_llr [symb %d / FirstSym %d / Length %d]: @LLR Buff %x \n",
symbol,
first_symbol_flag,
len,
dlsch_llr,
pllr_symbol);*/
llr2 = llr; llr2 = llr;
llr += (len*6); llr += (len*6);
@@ -1176,7 +1201,6 @@ void dlsch_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
} }
*llr_save = llr;
#if defined(__x86_64__) || defined(__i386__) #if defined(__x86_64__) || defined(__i386__)
_mm_empty(); _mm_empty();
_m_empty(); _m_empty();
@@ -8789,7 +8813,8 @@ int dlsch_64qam_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
uint8_t first_symbol_flag, uint8_t first_symbol_flag,
uint16_t nb_rb, uint16_t nb_rb,
uint16_t pbch_pss_sss_adjust, uint16_t pbch_pss_sss_adjust,
int16_t **llr16p) //int16_t **llr16p,
uint32_t llr_offset)
{ {
int16_t *rxF = (int16_t*)&rxdataF_comp[0][(symbol*frame_parms->N_RB_DL*12)]; int16_t *rxF = (int16_t*)&rxdataF_comp[0][(symbol*frame_parms->N_RB_DL*12)];
@@ -8798,16 +8823,18 @@ int dlsch_64qam_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
int16_t *ch_mag_i = (int16_t*)&dl_ch_mag_i[0][(symbol*frame_parms->N_RB_DL*12)]; int16_t *ch_mag_i = (int16_t*)&dl_ch_mag_i[0][(symbol*frame_parms->N_RB_DL*12)];
int16_t *rho = (int16_t*)&rho_i[0][(symbol*frame_parms->N_RB_DL*12)]; int16_t *rho = (int16_t*)&rho_i[0][(symbol*frame_parms->N_RB_DL*12)];
int16_t *llr16; int16_t *llr16;
int8_t *pllr_symbol; // pointer where llrs should filled for this ofdm symbol
int len; int len;
uint8_t symbol_mod = (symbol >= (7-frame_parms->Ncp))? (symbol-(7-frame_parms->Ncp)) : symbol; uint8_t symbol_mod = (symbol >= (7-frame_parms->Ncp))? (symbol-(7-frame_parms->Ncp)) : symbol;
//first symbol has different structure due to more pilots //first symbol has different structure due to more pilots
if (first_symbol_flag == 1) { /*if (first_symbol_flag == 1) {
llr16 = (int16_t*)dlsch_llr; llr16 = (int16_t*)dlsch_llr;
} else { } else {
llr16 = (int16_t*)(*llr16p); llr16 = (int16_t*)(*llr16p);
} }*/
llr16 = (int16_t*)dlsch_llr;
if (!llr16) { if (!llr16) {
msg("dlsch_64qam_64qam_llr: llr is null, symbol %d\n",symbol); msg("dlsch_64qam_64qam_llr: llr is null, symbol %d\n",symbol);
return(-1); return(-1);
@@ -8826,6 +8853,18 @@ int dlsch_64qam_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
len = (nb_rb*12) - pbch_pss_sss_adjust; len = (nb_rb*12) - pbch_pss_sss_adjust;
} }
pllr_symbol = (int8_t*)dlsch_llr;
pllr_symbol += llr_offset;
//printf("dlsch_64qam_64qam_llr: symbol %d,nb_rb %d, len %d,pbch_pss_sss_adjust %d\n",symbol,nb_rb,len,pbch_pss_sss_adjust);
/*LOG_I(PHY,"dlsch_64qam_64qam_llr [symb %d / FirstSym %d / Length %d / LLR Offset %d]: @LLR Buff %x, @LLR Buff(symb) %x, , @Compute LLR Buff(symb) %x \n",
symbol,
first_symbol_flag,
len,
llr_offset,
(int16_t*)dlsch_llr,
llr16,
pllr_symbol);*/
#ifdef __AVX2__ #ifdef __AVX2__
// Round length up to multiple of 16 words // Round length up to multiple of 16 words
@@ -8859,6 +8898,7 @@ int dlsch_64qam_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
(int32_t *) rho_256i, (int32_t *) rho_256i,
len); len);
#endif #endif
free16(rxF_256i, sizeof(rxF_256i)); free16(rxF_256i, sizeof(rxF_256i));
free16(rxF_i_256i, sizeof(rxF_i_256i)); free16(rxF_i_256i, sizeof(rxF_i_256i));
free16(ch_mag_256i, sizeof(ch_mag_256i)); free16(ch_mag_256i, sizeof(ch_mag_256i));
@@ -8876,6 +8916,7 @@ int dlsch_64qam_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
#endif #endif
llr16 += (6*len); llr16 += (6*len);
*llr16p = (short *)llr16; //*llr16p = (short *)llr16;
return(0); return(0);
} }
openair1/PHY/LTE_TRANSPORT/initial_sync.c
+8 -10
View File
@@ -233,19 +233,17 @@ int pbch_detection(PHY_VARS_UE *ue, runmode_t mode)
break; break;
} }
ue->proc.proc_rxtx[0].frame_rx = (((ue->pbch_vars[0]->decoded_output[2]&3)<<6) + (ue->pbch_vars[0]->decoded_output[1]>>2))<<2; for(int i=0; i<RX_NB_TH;i++)
ue->proc.proc_rxtx[0].frame_rx += frame_mod4; {
ue->proc.proc_rxtx[i].frame_rx = (((ue->pbch_vars[0]->decoded_output[2]&3)<<6) + (ue->pbch_vars[0]->decoded_output[1]>>2))<<2;
ue->proc.proc_rxtx[1].frame_rx = (((ue->pbch_vars[0]->decoded_output[2]&3)<<6) + (ue->pbch_vars[0]->decoded_output[1]>>2))<<2; ue->proc.proc_rxtx[i].frame_rx = (((ue->pbch_vars[0]->decoded_output[2]&3)<<6) + (ue->pbch_vars[0]->decoded_output[1]>>2))<<2;
ue->proc.proc_rxtx[1].frame_rx += frame_mod4;
#ifndef USER_MODE #ifndef USER_MODE
// one frame delay // one frame delay
ue->proc.proc_rxtx[0].frame_rx ++; ue->proc.proc_rxtx[i].frame_rx ++;
ue->proc.proc_rxtx[1].frame_rx ++;
#endif #endif
ue->proc.proc_rxtx[0].frame_tx = ue->proc.proc_rxtx[0].frame_rx; ue->proc.proc_rxtx[i].frame_tx = ue->proc.proc_rxtx[0].frame_rx;
ue->proc.proc_rxtx[1].frame_tx = ue->proc.proc_rxtx[1].frame_rx; }
#ifdef DEBUG_INITIAL_SYNCH #ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"[UE%d] Initial sync: pbch decoded sucessfully mode1_flag %d, tx_ant %d, frame %d, N_RB_DL %d, phich_duration %d, phich_resource %s!\n", LOG_I(PHY,"[UE%d] Initial sync: pbch decoded sucessfully mode1_flag %d, tx_ant %d, frame %d, N_RB_DL %d, phich_duration %d, phich_resource %s!\n",
ue->Mod_id, ue->Mod_id,
openair1/PHY/LTE_TRANSPORT/proto.h
+8 -3
View File
@@ -802,7 +802,8 @@ int dlsch_64qam_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
unsigned char first_symbol_flag, unsigned char first_symbol_flag,
unsigned short nb_rb, unsigned short nb_rb,
uint16_t pbch_pss_sss_adjust, uint16_t pbch_pss_sss_adjust,
short **llr16p); //short **llr16p,
uint32_t llr_offset);
/** \brief This function generates log-likelihood ratios (decoder input) for single-stream QPSK received waveforms. /** \brief This function generates log-likelihood ratios (decoder input) for single-stream QPSK received waveforms.
@@ -823,7 +824,7 @@ int32_t dlsch_qpsk_llr(LTE_DL_FRAME_PARMS *frame_parms,
uint8_t first_symbol_flag, uint8_t first_symbol_flag,
uint16_t nb_rb, uint16_t nb_rb,
uint16_t pbch_pss_sss_adj, uint16_t pbch_pss_sss_adj,
int16_t **llr128p, //int16_t **llr128p,
uint8_t beamforming_mode); uint8_t beamforming_mode);
/** /**
@@ -909,7 +910,8 @@ void dlsch_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
uint8_t first_symbol_flag, uint8_t first_symbol_flag,
uint16_t nb_rb, uint16_t nb_rb,
uint16_t pbch_pss_sss_adjust, uint16_t pbch_pss_sss_adjust,
int16_t **llr_save, //int16_t **llr_save,
uint32_t llr_offset,
uint8_t beamforming_mode); uint8_t beamforming_mode);
@@ -1346,6 +1348,7 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
@param i_mod Modulation order of the interfering stream @param i_mod Modulation order of the interfering stream
*/ */
int32_t rx_pdsch(PHY_VARS_UE *phy_vars_ue, int32_t rx_pdsch(PHY_VARS_UE *phy_vars_ue,
UE_rxtx_proc_t *proc,
PDSCH_t type, PDSCH_t type,
uint8_t eNB_id, uint8_t eNB_id,
uint8_t eNB_id_i, uint8_t eNB_id_i,
@@ -1695,6 +1698,8 @@ int generate_ue_dlsch_params_from_dci(int frame,
void *dci_pdu, void *dci_pdu,
rnti_t rnti, rnti_t rnti,
DCI_format_t dci_format, DCI_format_t dci_format,
LTE_UE_PDCCH *pdcch_vars,
LTE_UE_PDSCH *pdsch_vars,
LTE_UE_DLSCH_t **dlsch, LTE_UE_DLSCH_t **dlsch,
LTE_DL_FRAME_PARMS *frame_parms, LTE_DL_FRAME_PARMS *frame_parms,
PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated, PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
openair1/PHY/MODULATION/defs.h
+11
View File
@@ -78,6 +78,17 @@ int slot_fep_ul(LTE_DL_FRAME_PARMS *frame_parms,
unsigned char eNb_id, unsigned char eNb_id,
int no_prefix); int no_prefix);
int front_end_fft(PHY_VARS_UE *ue,
unsigned char l,
unsigned char Ns,
int sample_offset,
int no_prefix);
int front_end_chanEst(PHY_VARS_UE *ue,
unsigned char l,
unsigned char Ns,
int reset_freq_est);
void normal_prefix_mod(int32_t *txdataF,int32_t *txdata,uint8_t nsymb,LTE_DL_FRAME_PARMS *frame_parms); void normal_prefix_mod(int32_t *txdataF,int32_t *txdata,uint8_t nsymb,LTE_DL_FRAME_PARMS *frame_parms);
void do_OFDM_mod(int32_t **txdataF, int32_t **txdata, uint32_t frame,uint16_t next_slot, LTE_DL_FRAME_PARMS *frame_parms); void do_OFDM_mod(int32_t **txdataF, int32_t **txdata, uint32_t frame,uint16_t next_slot, LTE_DL_FRAME_PARMS *frame_parms);
openair1/PHY/MODULATION/slot_fep.c
+212
View File
@@ -242,3 +242,215 @@ int slot_fep(PHY_VARS_UE *ue,
#endif #endif
return(0); return(0);
} }
int front_end_fft(PHY_VARS_UE *ue,
unsigned char l,
unsigned char Ns,
int sample_offset,
int no_prefix)
{
LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
LTE_UE_COMMON *common_vars = &ue->common_vars;
unsigned char aa;
unsigned char symbol = l+((7-frame_parms->Ncp)*(Ns&1)); ///symbol within sub-frame
unsigned int nb_prefix_samples = (no_prefix ? 0 : frame_parms->nb_prefix_samples);
unsigned int nb_prefix_samples0 = (no_prefix ? 0 : frame_parms->nb_prefix_samples0);
unsigned int subframe_offset;//,subframe_offset_F;
unsigned int slot_offset;
unsigned int frame_length_samples = frame_parms->samples_per_tti * 10;
unsigned int rx_offset;
/*LTE_UE_DLSCH_t **dlsch_ue = phy_vars_ue->dlsch_ue[eNB_id];
unsigned char harq_pid = dlsch_ue[0]->current_harq_pid;
LTE_DL_UE_HARQ_t *dlsch0_harq = dlsch_ue[0]->harq_processes[harq_pid];
int uespec_pilot[9][1200];*/
void (*dft)(int16_t *,int16_t *, int);
int tmp_dft_in[2048] __attribute__ ((aligned (32))); // This is for misalignment issues for 6 and 15 PRBs
switch (frame_parms->ofdm_symbol_size) {
case 128:
dft = dft128;
break;
case 256:
dft = dft256;
break;
case 512:
dft = dft512;
break;
case 1024:
dft = dft1024;
break;
case 1536:
dft = dft1536;
break;
case 2048:
dft = dft2048;
break;
default:
dft = dft512;
break;
}
if (no_prefix) {
subframe_offset = frame_parms->ofdm_symbol_size * frame_parms->symbols_per_tti * (Ns>>1);
slot_offset = frame_parms->ofdm_symbol_size * (frame_parms->symbols_per_tti>>1) * (Ns%2);
} else {
subframe_offset = frame_parms->samples_per_tti * (Ns>>1);
slot_offset = (frame_parms->samples_per_tti>>1) * (Ns%2);
}
// subframe_offset_F = frame_parms->ofdm_symbol_size * frame_parms->symbols_per_tti * (Ns>>1);
if (l<0 || l>=7-frame_parms->Ncp) {
printf("slot_fep: l must be between 0 and %d\n",7-frame_parms->Ncp);
return(-1);
}
if (Ns<0 || Ns>=20) {
printf("slot_fep: Ns must be between 0 and 19\n");
return(-1);
}
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
memset(&common_vars->common_vars_rx_data_per_thread[(Ns>>1)&0x1].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
rx_offset = sample_offset + slot_offset + nb_prefix_samples0 + subframe_offset - SOFFSET;
// Align with 256 bit
// rx_offset = rx_offset&0xfffffff8;
if (l==0) {
if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size))
memcpy((short *)&common_vars->rxdata[aa][frame_length_samples],
(short *)&common_vars->rxdata[aa][0],
frame_parms->ofdm_symbol_size*sizeof(int));
if ((rx_offset&7)!=0) { // if input to dft is not 256-bit aligned, issue for size 6,15 and 25 PRBs
memcpy((void *)tmp_dft_in,
(void *)&common_vars->rxdata[aa][rx_offset % frame_length_samples],
frame_parms->ofdm_symbol_size*sizeof(int));
dft((int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[(Ns>>1)&0x1].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
start_meas(&ue->rx_dft_stats);
dft((int16_t *)&common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[(Ns>>1)&0x1].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
stop_meas(&ue->rx_dft_stats);
}
} else {
rx_offset += (frame_parms->ofdm_symbol_size+nb_prefix_samples)*l;// +
// (frame_parms->ofdm_symbol_size+nb_prefix_samples)*(l-1);
#ifdef DEBUG_FEP
// if (ue->frame <100)
LOG_I(PHY,"slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, subframe_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx,Ns, symbol,
nb_prefix_samples,nb_prefix_samples0,slot_offset,subframe_offset,sample_offset,rx_offset,frame_length_samples);
#endif
if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size))
memcpy((void *)&common_vars->rxdata[aa][frame_length_samples],
(void *)&common_vars->rxdata[aa][0],
frame_parms->ofdm_symbol_size*sizeof(int));
start_meas(&ue->rx_dft_stats);
if ((rx_offset&7)!=0) { // if input to dft is not 128-bit aligned, issue for size 6 and 15 PRBs
memcpy((void *)tmp_dft_in,
(void *)&common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
frame_parms->ofdm_symbol_size*sizeof(int));
dft((int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[(Ns>>1)&0x1].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
dft((int16_t *)&common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[(Ns>>1)&0x1].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
}
stop_meas(&ue->rx_dft_stats);
}
#ifdef DEBUG_FEP
// if (ue->frame <100)
printf("slot_fep: frame %d: symbol %d rx_offset %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx, symbol,rx_offset);
#endif
}
return(0);
}
int front_end_chanEst(PHY_VARS_UE *ue,
unsigned char l,
unsigned char Ns,
int reset_freq_est)
{
LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
LTE_UE_COMMON *common_vars = &ue->common_vars;
uint8_t eNB_id = 0;//ue_common_vars->eNb_id;
unsigned char aa;
unsigned char symbol = l+((7-frame_parms->Ncp)*(Ns&1)); ///symbol within sub-frame
int i;
/*LTE_UE_DLSCH_t **dlsch_ue = phy_vars_ue->dlsch_ue[eNB_id];
unsigned char harq_pid = dlsch_ue[0]->current_harq_pid;
LTE_DL_UE_HARQ_t *dlsch0_harq = dlsch_ue[0]->harq_processes[harq_pid];
int uespec_pilot[9][1200];*/
if (ue->perfect_ce == 0) {
if ((l==0) || (l==(4-frame_parms->Ncp))) {
for (aa=0; aa<frame_parms->nb_antenna_ports_eNB; aa++) {
#ifdef DEBUG_FEP
printf("Channel estimation eNB %d, aatx %d, slot %d, symbol %d\n",eNB_id,aa,Ns,l);
#endif
start_meas(&ue->dlsch_channel_estimation_stats);
lte_dl_channel_estimation(ue,eNB_id,0,
Ns,
aa,
l,
symbol);
stop_meas(&ue->dlsch_channel_estimation_stats);
for (i=0; i<ue->measurements.n_adj_cells; i++) {
lte_dl_channel_estimation(ue,eNB_id,i+1,
Ns,
aa,
l,
symbol);
}
}
// do frequency offset estimation here!
// use channel estimates from current symbol (=ch_t) and last symbol (ch_{t-1})
#ifdef DEBUG_FEP
printf("Frequency offset estimation\n");
#endif
if (l==(4-frame_parms->Ncp)) {
start_meas(&ue->dlsch_freq_offset_estimation_stats);
lte_est_freq_offset(common_vars->common_vars_rx_data_per_thread[(Ns>>1)&0x1].dl_ch_estimates[0],
frame_parms,
l,
&common_vars->freq_offset,
reset_freq_est);
stop_meas(&ue->dlsch_freq_offset_estimation_stats);
}
}
}
return(0);
}
openair1/PHY/defs.h
+44 -5
View File
@@ -395,6 +395,32 @@ typedef struct {
pthread_mutex_t mutex_rxtx; pthread_mutex_t mutex_rxtx;
/// scheduling parameters for RXn-TXnp4 thread /// scheduling parameters for RXn-TXnp4 thread
struct sched_param sched_param_rxtx; struct sched_param sched_param_rxtx;
/// internal This variable is protected by ref mutex_fep_slot1.
//int instance_cnt_slot0_dl_processing;
int instance_cnt_slot1_dl_processing;
/// pthread descriptor fep_slot1 thread
//pthread_t pthread_slot0_dl_processing;
pthread_t pthread_slot1_dl_processing;
/// pthread attributes for fep_slot1 processing thread
// pthread_attr_t attr_slot0_dl_processing;
pthread_attr_t attr_slot1_dl_processing;
/// condition variable for UE fep_slot1 thread;
//pthread_cond_t cond_slot0_dl_processing;
pthread_cond_t cond_slot1_dl_processing;
/// mutex for UE synch thread
//pthread_mutex_t mutex_slot0_dl_processing;
pthread_mutex_t mutex_slot1_dl_processing;
//
uint8_t chan_est_pilot0_slot1_available;
uint8_t chan_est_slot1_available;
uint8_t llr_slot1_available;
uint8_t dci_slot0_available;
uint8_t first_symbol_available;
uint8_t channel_level;
/// scheduling parameters for fep_slot1 thread
struct sched_param sched_param_fep_slot1;
int sub_frame_start; int sub_frame_start;
int sub_frame_step; int sub_frame_step;
unsigned long long gotIQs; unsigned long long gotIQs;
@@ -875,9 +901,9 @@ typedef struct {
/// Transmission mode per eNB /// Transmission mode per eNB
uint8_t transmission_mode[NUMBER_OF_CONNECTED_eNB_MAX]; uint8_t transmission_mode[NUMBER_OF_CONNECTED_eNB_MAX];
time_stats_t phy_proc; time_stats_t phy_proc[RX_NB_TH];
time_stats_t phy_proc_tx; time_stats_t phy_proc_tx;
time_stats_t phy_proc_rx[2]; time_stats_t phy_proc_rx[RX_NB_TH];
uint32_t use_ia_receiver; uint32_t use_ia_receiver;
@@ -891,8 +917,13 @@ typedef struct {
time_stats_t ulsch_multiplexing_stats; time_stats_t ulsch_multiplexing_stats;
time_stats_t generic_stat; time_stats_t generic_stat;
time_stats_t pdsch_procedures_stat; time_stats_t generic_stat_bis[RX_NB_TH][LTE_SLOTS_PER_SUBFRAME];
time_stats_t dlsch_procedures_stat; time_stats_t ue_front_end_stat[RX_NB_TH];
time_stats_t ue_front_end_per_slot_stat[RX_NB_TH][LTE_SLOTS_PER_SUBFRAME];
time_stats_t pdcch_procedures_stat[RX_NB_TH];
time_stats_t pdsch_procedures_stat[RX_NB_TH];
time_stats_t pdsch_procedures_per_slot_stat[RX_NB_TH][LTE_SLOTS_PER_SUBFRAME];
time_stats_t dlsch_procedures_stat[RX_NB_TH];
time_stats_t ofdm_demod_stats; time_stats_t ofdm_demod_stats;
time_stats_t dlsch_rx_pdcch_stats; time_stats_t dlsch_rx_pdcch_stats;
@@ -904,7 +935,7 @@ typedef struct {
time_stats_t dlsch_rate_unmatching_stats; time_stats_t dlsch_rate_unmatching_stats;
time_stats_t dlsch_turbo_decoding_stats; time_stats_t dlsch_turbo_decoding_stats;
time_stats_t dlsch_deinterleaving_stats; time_stats_t dlsch_deinterleaving_stats;
time_stats_t dlsch_llr_stats; time_stats_t dlsch_llr_stats[RX_NB_TH][LTE_SLOTS_PER_SUBFRAME];
time_stats_t dlsch_unscrambling_stats; time_stats_t dlsch_unscrambling_stats;
time_stats_t dlsch_rate_matching_stats; time_stats_t dlsch_rate_matching_stats;
time_stats_t dlsch_turbo_encoding_stats; time_stats_t dlsch_turbo_encoding_stats;
@@ -934,6 +965,14 @@ typedef struct {
} PHY_VARS_UE; } PHY_VARS_UE;
/* this structure is used to pass both UE phy vars and
* proc to the function UE_thread_rxn_txnp4
*/
struct rx_tx_thread_data {
PHY_VARS_UE *UE;
UE_rxtx_proc_t *proc;
};
void exit_fun(const char* s); void exit_fun(const char* s);
static inline int wait_on_condition(pthread_mutex_t *mutex,pthread_cond_t *cond,int *instance_cnt,char *name) { static inline int wait_on_condition(pthread_mutex_t *mutex,pthread_cond_t *cond,int *instance_cnt,char *name) {
openair1/PHY/impl_defs_lte.h
+6
View File
@@ -40,6 +40,8 @@
#define RX_NB_TH_MAX 2 #define RX_NB_TH_MAX 2
#define RX_NB_TH 2 #define RX_NB_TH 2
#define LTE_SLOTS_PER_SUBFRAME 2
#define LTE_NUMBER_OF_SUBFRAMES_PER_FRAME 10 #define LTE_NUMBER_OF_SUBFRAMES_PER_FRAME 10
#define LTE_SLOTS_PER_FRAME 20 #define LTE_SLOTS_PER_FRAME 20
#define LTE_CE_FILTER_LENGTH 5 #define LTE_CE_FILTER_LENGTH 5
@@ -928,6 +930,10 @@ typedef struct {
//uint32_t *rb_alloc; //uint32_t *rb_alloc;
//uint8_t Qm[2]; //uint8_t Qm[2];
//MIMO_mode_t mimo_mode; //MIMO_mode_t mimo_mode;
// llr offset per ofdm symbol
uint32_t llr_offset[14];
// llr length per ofdm symbol
uint32_t llr_length[14];
} LTE_UE_PDSCH; } LTE_UE_PDSCH;
typedef struct { typedef struct {
openair1/SCHED/defs.h
+7
View File
@@ -43,6 +43,7 @@ enum THREAD_INDEX { OPENAIR_THREAD_INDEX = 0,
#define OPENAIR_THREAD_STACK_SIZE PTHREAD_STACK_MIN //4096 //RTL_PTHREAD_STACK_MIN*6 #define OPENAIR_THREAD_STACK_SIZE PTHREAD_STACK_MIN //4096 //RTL_PTHREAD_STACK_MIN*6
//#define DLC_THREAD_STACK_SIZE 4096 //DLC stack size //#define DLC_THREAD_STACK_SIZE 4096 //DLC stack size
//#define UE_SLOT_PARALLELISATION
enum openair_SCHED_STATUS { enum openair_SCHED_STATUS {
openair_SCHED_STOPPED=1, openair_SCHED_STOPPED=1,
@@ -139,6 +140,12 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t
@param phy_vars_rn pointer to RN variables @param phy_vars_rn pointer to RN variables
*/ */
int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn); int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn);
int phy_procedures_slot_parallelization_UE_RX(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,
uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,
relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn);
#ifdef UE_SLOT_PARALLELISATION
void *UE_thread_slot1_dl_processing(void *arg);
#endif
/*! \brief Scheduling for UE TX procedures in TDD S-subframes. /*! \brief Scheduling for UE TX procedures in TDD S-subframes.
@param phy_vars_ue Pointer to UE variables on which to act @param phy_vars_ue Pointer to UE variables on which to act
openair1/SCHED/phy_procedures_lte_ue.c
+869 -25
View File
@@ -30,12 +30,16 @@
* \warning * \warning
*/ */
#define _GNU_SOURCE
#include "assertions.h" #include "assertions.h"
#include "defs.h" #include "defs.h"
#include "PHY/defs.h" #include "PHY/defs.h"
#include "PHY/extern.h" #include "PHY/extern.h"
#include "SCHED/defs.h" #include "SCHED/defs.h"
#include "SCHED/extern.h" #include "SCHED/extern.h"
#include <sched.h>
#include "targets/RT/USER/lte-softmodem.h"
#ifdef EMOS #ifdef EMOS
#include "SCHED/phy_procedures_emos.h" #include "SCHED/phy_procedures_emos.h"
@@ -73,8 +77,6 @@ fifo_dump_emos_UE emos_dump_UE;
#define NS_PER_SLOT 500000 #define NS_PER_SLOT 500000
extern int oai_exit;
extern double cpuf; extern double cpuf;
@@ -2950,16 +2952,18 @@ void ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,UE_rxtx_proc_t *proc, uin
{ {
ue->proc.proc_rxtx[th_id].frame_rx = proc->frame_rx; ue->proc.proc_rxtx[th_id].frame_rx = proc->frame_rx;
ue->proc.proc_rxtx[th_id].frame_tx = proc->frame_tx; ue->proc.proc_rxtx[th_id].frame_tx = proc->frame_tx;
printf("[UE %d] frame %d, subframe %d: Adjusting frame counter (PBCH ant_tx=%d, frame_tx=%d, phase %d, rx_offset %d) => new frame %d\n",
ue->Mod_id,
ue->proc.proc_rxtx[th_id].frame_rx,
subframe_rx,
pbch_tx_ant,
frame_tx,
pbch_phase,
ue->rx_offset,
proc->frame_rx);
} }
LOG_I(PHY,"[UE %d] frame %d, subframe %d: Adjusting frame counter (PBCH ant_tx=%d, frame_tx=%d, phase %d, rx_offset %d) => new frame %d\n",
ue->Mod_id,
frame_rx,
subframe_rx,
pbch_tx_ant,
frame_tx,
pbch_phase,
ue->rx_offset,
proc->frame_rx);
frame_rx = proc->frame_rx; frame_rx = proc->frame_rx;
@@ -3190,6 +3194,8 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint
(void *)&dci_alloc_rx[i].dci_pdu, (void *)&dci_alloc_rx[i].dci_pdu,
ue->pdcch_vars[subframe_rx%RX_NB_TH][eNB_id]->crnti, ue->pdcch_vars[subframe_rx%RX_NB_TH][eNB_id]->crnti,
dci_alloc_rx[i].format, dci_alloc_rx[i].format,
ue->pdcch_vars[subframe_rx%RX_NB_TH][eNB_id],
ue->pdsch_vars[subframe_rx%RX_NB_TH][eNB_id],
ue->dlsch[subframe_rx%RX_NB_TH][eNB_id], ue->dlsch[subframe_rx%RX_NB_TH][eNB_id],
&ue->frame_parms, &ue->frame_parms,
ue->pdsch_config_dedicated, ue->pdsch_config_dedicated,
@@ -3257,6 +3263,8 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint
(void *)&dci_alloc_rx[i].dci_pdu, (void *)&dci_alloc_rx[i].dci_pdu,
SI_RNTI, SI_RNTI,
dci_alloc_rx[i].format, dci_alloc_rx[i].format,
ue->pdcch_vars[subframe_rx%RX_NB_TH][eNB_id],
ue->pdsch_vars_SI[eNB_id],
&ue->dlsch_SI[eNB_id], &ue->dlsch_SI[eNB_id],
&ue->frame_parms, &ue->frame_parms,
ue->pdsch_config_dedicated, ue->pdsch_config_dedicated,
@@ -3288,6 +3296,8 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint
(void *)&dci_alloc_rx[i].dci_pdu, (void *)&dci_alloc_rx[i].dci_pdu,
P_RNTI, P_RNTI,
dci_alloc_rx[i].format, dci_alloc_rx[i].format,
ue->pdcch_vars[subframe_rx%RX_NB_TH][eNB_id],
ue->pdsch_vars_p[eNB_id],
&ue->dlsch_SI[eNB_id], &ue->dlsch_SI[eNB_id],
&ue->frame_parms, &ue->frame_parms,
ue->pdsch_config_dedicated, ue->pdsch_config_dedicated,
@@ -3322,6 +3332,8 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint
(DCI1A_5MHz_TDD_1_6_t *)&dci_alloc_rx[i].dci_pdu, (DCI1A_5MHz_TDD_1_6_t *)&dci_alloc_rx[i].dci_pdu,
ue->prach_resources[eNB_id]->ra_RNTI, ue->prach_resources[eNB_id]->ra_RNTI,
format1A, format1A,
ue->pdcch_vars[subframe_rx%RX_NB_TH][eNB_id],
ue->pdsch_vars_ra[eNB_id],
&ue->dlsch_ra[eNB_id], &ue->dlsch_ra[eNB_id],
&ue->frame_parms, &ue->frame_parms,
ue->pdsch_config_dedicated, ue->pdsch_config_dedicated,
@@ -3674,14 +3686,18 @@ void ue_pdsch_procedures(PHY_VARS_UE *ue, UE_rxtx_proc_t *proc, int eNB_id, PDSC
} }
if ((m==s0) && (m<4)) if ((m==s0) && (m<4))
first_symbol_flag = 1; first_symbol_flag = 1;
else else
first_symbol_flag = 0; first_symbol_flag = 0;
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
start_meas(&ue->dlsch_llr_stats); uint8_t slot = 0;
if(m >= ue->frame_parms.symbols_per_tti>>1)
slot = 1;
start_meas(&ue->dlsch_llr_stats[subframe_rx%RX_NB_TH][slot]);
#endif #endif
// process DLSCH received in first slot // process DLSCH received in first slot
rx_pdsch(ue, rx_pdsch(ue,
proc,
pdsch, pdsch,
eNB_id, eNB_id,
eNB_id_i, eNB_id_i,
@@ -3693,8 +3709,20 @@ void ue_pdsch_procedures(PHY_VARS_UE *ue, UE_rxtx_proc_t *proc, int eNB_id, PDSC
i_mod, i_mod,
dlsch0->current_harq_pid); dlsch0->current_harq_pid);
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->dlsch_llr_stats); stop_meas(&ue->dlsch_llr_stats[subframe_rx%RX_NB_TH][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] LLR Computation Symbol %d %5.2f \n",proc->frame_rx,subframe_rx,m,ue->dlsch_llr_stats[subframe_rx%RX_NB_TH][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] LLR Computation Symbol %d %5.2f \n",proc->frame_rx,subframe_rx,m,ue->dlsch_llr_stats[subframe_rx%RX_NB_TH][slot].p_time/(cpuf*1000.0));
#endif #endif
#endif
if(first_symbol_flag)
{
proc->first_symbol_available = 1;
printf("Set first_symbol_available to 1 \n");
}
} // CRNTI active } // CRNTI active
} }
} }
@@ -4171,6 +4199,822 @@ void ue_dlsch_procedures(PHY_VARS_UE *ue,
} }
/*!
* \brief This is the UE synchronize thread.
* It performs band scanning and synchonization.
* \param arg is a pointer to a \ref PHY_VARS_UE structure.
* \returns a pointer to an int. The storage is not on the heap and must not be freed.
*/
#define FIFO_PRIORITY 40
void *UE_thread_slot1_dl_processing(void *arg) {
static __thread int UE_dl_slot1_processing_retval;
struct rx_tx_thread_data *rtd = arg;
UE_rxtx_proc_t *proc = rtd->proc;
PHY_VARS_UE *ue = rtd->UE;
int frame_rx;
uint8_t subframe_rx;
uint8_t pilot0;
uint8_t pilot1;
uint8_t slot1;
uint8_t next_subframe_rx;
uint8_t next_subframe_slot0;
proc->instance_cnt_slot1_dl_processing=-1;
proc->subframe_rx=proc->sub_frame_start;
char threadname[256];
sprintf(threadname,"UE_thread_slot1_dl_processing_%d", proc->sub_frame_start);
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
if ( (proc->sub_frame_start+1)%RX_NB_TH == 0 && threads.slot1_proc_one != -1 )
CPU_SET(threads.slot1_proc_one, &cpuset);
if ( (proc->sub_frame_start+1)%RX_NB_TH == 1 && threads.slot1_proc_two != -1 )
CPU_SET(threads.slot1_proc_two, &cpuset);
if ( (proc->sub_frame_start+1)%RX_NB_TH == 2 && threads.slot1_proc_three != -1 )
CPU_SET(threads.slot1_proc_three, &cpuset);
init_thread(900000,1000000 , FIFO_PRIORITY-1, &cpuset,
threadname);
while (!oai_exit) {
if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE slot1 dl processing\n" );
exit_fun("nothing to add");
}
while (proc->instance_cnt_slot1_dl_processing < 0) {
// most of the time, the thread is waiting here
pthread_cond_wait( &proc->cond_slot1_dl_processing, &proc->mutex_slot1_dl_processing );
}
if (pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE slot1 dl processing \n" );
exit_fun("nothing to add");
}
/*for(int th_idx=0; th_idx< RX_NB_TH; th_idx++)
{
frame_rx = ue->proc.proc_rxtx[0].frame_rx;
subframe_rx = ue->proc.proc_rxtx[0].subframe_rx;
printf("AbsSubframe %d.%d execute dl slot1 processing \n", frame_rx, subframe_rx);
}*/
frame_rx = proc->frame_rx;
subframe_rx = proc->subframe_rx;
next_subframe_rx = (1+subframe_rx)%10;
next_subframe_slot0 = next_subframe_rx<<1;
slot1 = (subframe_rx<<1) + 1;
pilot0 = 0;
printf("AbsSubframe %d.%d execute dl slot1 processing \n", frame_rx, subframe_rx);
if (ue->frame_parms.Ncp == 0) { // normal prefix
pilot1 = 4;
} else { // extended prefix
pilot1 = 3;
}
/**** Slot1 FE Processing ****/
#if UE_TIMING_TRACE
start_meas(&ue->ue_front_end_per_slot_stat[subframe_rx%RX_NB_TH][1]);
#endif
// I- start dl slot1 processing
// do first symbol of next downlink subframe for channel estimation
/*
// 1- perform FFT for pilot ofdm symbols first (ofdmSym0 next subframe ofdmSym11)
if (subframe_select(&ue->frame_parms,next_subframe_rx) != SF_UL)
{
front_end_fft(ue,
pilot0,
next_subframe_slot0,
0,
0);
}
front_end_fft(ue,
pilot1,
slot1,
0,
0);
*/
// 1- perform FFT
for (int l=1; l<ue->frame_parms.symbols_per_tti>>1; l++)
{
//if( (l != pilot0) && (l != pilot1))
{
#if UE_TIMING_TRACE
start_meas(&ue->ofdm_demod_stats);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
//printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,subframe_rx,slot1,l);
front_end_fft(ue,
l,
slot1,
0,
0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
stop_meas(&ue->ofdm_demod_stats);
#endif
}
} // for l=1..l2
if (subframe_select(&ue->frame_parms,next_subframe_rx) != SF_UL)
{
//printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,subframe_rx,next_subframe_slot0,pilot0);
front_end_fft(ue,
pilot0,
next_subframe_slot0,
0,
0);
}
// 2- perform Channel Estimation for slot1
for (int l=1; l<ue->frame_parms.symbols_per_tti>>1; l++)
{
if(l == pilot1)
{
//wait until channel estimation for pilot0/slot1 is available
uint32_t wait = 0;
while(proc->chan_est_pilot0_slot1_available == 0)
{
usleep(1);
wait++;
}
printf("[slot1 dl processing] ChanEst symbol %d slot %d wait%d\n",l,slot1,wait);
}
//printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,subframe_rx,slot1,l);
front_end_chanEst(ue,
l,
slot1,
0);
ue_measurement_procedures(l-1,ue,proc,0,1+(subframe_rx<<1),0,ue->mode);
}
//printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,subframe_rx,next_subframe_slot0,pilot0);
front_end_chanEst(ue,
pilot0,
next_subframe_slot0,
0);
if ( (subframe_rx == 0) && (ue->decode_MIB == 1))
{
ue_pbch_procedures(0,ue,proc,0);
}
proc->chan_est_slot1_available = 1;
printf("Set available slot 1channelEst to 1 AbsSubframe %d.%d \n",frame_rx,subframe_rx);
printf(" [slot1 dl processing] ==> FFT/CHanEst Done for AbsSubframe %d.%d \n", proc->frame_rx, proc->subframe_rx);
//printf(" [slot1 dl processing] ==> Start LLR Comuptation slot1 for AbsSubframe %d.%d \n", proc->frame_rx, proc->subframe_rx);
#if UE_TIMING_TRACE
stop_meas(&ue->ue_front_end_per_slot_stat[subframe_rx%RX_NB_TH][1]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",frame_rx,subframe_rx,ue->ue_front_end_per_slot_stat[subframe_rx%RX_NB_TH][1].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",frame_rx,subframe_rx,ue->ue_front_end_per_slot_stat[subframe_rx%RX_NB_TH][1].p_time/(cpuf*1000.0));
#endif
#endif
//wait until pdcch is decoded
uint32_t wait = 0;
while(proc->dci_slot0_available == 0)
{
usleep(1);
wait++;
}
printf("[slot1 dl processing] AbsSubframe %d.%d LLR Computation Start wait DCI %d\n",frame_rx,subframe_rx,wait);
/**** Pdsch Procedure Slot1 ****/
// start slot1 thread for Pdsch Procedure (slot1)
// do procedures for C-RNTI
printf("AbsSubframe %d.%d Pdsch Procedure (slot1)\n",frame_rx,subframe_rx);
#if UE_TIMING_TRACE
start_meas(&ue->pdsch_procedures_per_slot_stat[subframe_rx%RX_NB_TH][1]);
#endif
// start slave thread for Pdsch Procedure (slot1)
// do procedures for C-RNTI
uint8_t eNB_id = 0;
uint8_t abstraction_flag = 0;
if (ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][0]->active == 1) {
//wait until first ofdm symbol is processed
//wait = 0;
//while(proc->first_symbol_available == 0)
//{
// usleep(1);
// wait++;
//}
//printf("[slot1 dl processing] AbsSubframe %d.%d LLR Computation Start wait First Ofdm Sym %d\n",frame_rx,subframe_rx,wait);
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
ue_pdsch_procedures(ue,
proc,
eNB_id,
PDSCH,
ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][0],
NULL,
(ue->frame_parms.symbols_per_tti>>1),
ue->frame_parms.symbols_per_tti-1,
abstraction_flag);
LOG_D(PHY," ------ end PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, subframe_rx);
LOG_D(PHY," ------ --> PDSCH Turbo Decoder slot 0/1: AbsSubframe %d.%d ------ \n", frame_rx%1024, subframe_rx);
}
// do procedures for SI-RNTI
if ((ue->dlsch_SI[eNB_id]) && (ue->dlsch_SI[eNB_id]->active == 1)) {
ue_pdsch_procedures(ue,
proc,
eNB_id,
SI_PDSCH,
ue->dlsch_SI[eNB_id],
NULL,
(ue->frame_parms.symbols_per_tti>>1),
ue->frame_parms.symbols_per_tti-1,
abstraction_flag);
}
// do procedures for P-RNTI
if ((ue->dlsch_p[eNB_id]) && (ue->dlsch_p[eNB_id]->active == 1)) {
ue_pdsch_procedures(ue,
proc,
eNB_id,
P_PDSCH,
ue->dlsch_p[eNB_id],
NULL,
(ue->frame_parms.symbols_per_tti>>1),
ue->frame_parms.symbols_per_tti-1,
abstraction_flag);
}
// do procedures for RA-RNTI
if ((ue->dlsch_ra[eNB_id]) && (ue->dlsch_ra[eNB_id]->active == 1)) {
ue_pdsch_procedures(ue,
proc,
eNB_id,
RA_PDSCH,
ue->dlsch_ra[eNB_id],
NULL,
(ue->frame_parms.symbols_per_tti>>1),
ue->frame_parms.symbols_per_tti-1,
abstraction_flag);
}
proc->llr_slot1_available=1;
printf("Set available LLR slot1 to 1 AbsSubframe %d.%d \n",frame_rx,subframe_rx);
#if UE_TIMING_TRACE
stop_meas(&ue->pdsch_procedures_per_slot_stat[subframe_rx%RX_NB_TH][1]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot1: LLR Computation %5.2f \n",frame_rx,subframe_rx,ue->pdsch_procedures_per_slot_stat[subframe_rx%RX_NB_TH][1].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] Slot1: LLR Computation %5.2f \n",frame_rx,subframe_rx,ue->pdsch_procedures_per_slot_stat[subframe_rx%RX_NB_TH][1].p_time/(cpuf*1000.0));
#endif
#endif
if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE RXTX\n" );
exit_fun("noting to add");
}
proc->instance_cnt_slot1_dl_processing--;
if (pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE FEP Slo1\n" );
exit_fun("noting to add");
}
}
// thread finished
free(arg);
return &UE_dl_slot1_processing_retval;
}
int phy_procedures_slot_parallelization_UE_RX(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,
uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,
relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn) {
int l,l2;
int pmch_flag=0;
int frame_rx = proc->frame_rx;
int subframe_rx = proc->subframe_rx;
uint8_t pilot0;
uint8_t pilot1;
uint8_t slot0;
uint8_t slot1;
uint8_t first_ofdm_sym;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
#if T_TRACER
T(T_UE_PHY_DL_TICK, T_INT(ue->Mod_id), T_INT(frame_rx%1024), T_INT(subframe_rx));
T(T_UE_PHY_INPUT_SIGNAL, T_INT(ue->Mod_id), T_INT(frame_rx%1024), T_INT(subframe_rx), T_INT(0),
T_BUFFER(&ue->common_vars.rxdata[0][subframe_rx*ue->frame_parms.samples_per_tti],
ue->frame_parms.samples_per_tti * 4));
#endif
// start timers
#ifdef UE_DEBUG_TRACE
LOG_I(PHY," ****** start RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, subframe_rx);
#endif
#if UE_TIMING_TRACE
start_meas(&ue->phy_proc_rx[subframe_rx%RX_NB_TH]);
start_meas(&ue->ue_front_end_stat[subframe_rx%RX_NB_TH]);
#endif
pmch_flag = is_pmch_subframe(frame_rx,subframe_rx,&ue->frame_parms) ? 1 : 0;
if (do_pdcch_flag) {
// deactivate reception until we scan pdcch
if (ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][0])
ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][0]->active = 0;
if (ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][1])
ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][1]->active = 0;
if (ue->dlsch_SI[eNB_id])
ue->dlsch_SI[eNB_id]->active = 0;
if (ue->dlsch_p[eNB_id])
ue->dlsch_p[eNB_id]->active = 0;
if (ue->dlsch_ra[eNB_id])
ue->dlsch_ra[eNB_id]->active = 0;
}
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[%s %d] Frame %d subframe %d: Doing phy_procedures_UE_RX\n",
(r_type == multicast_relay) ? "RN/UE" : "UE",
ue->Mod_id,frame_rx, subframe_rx);
#endif
if (subframe_select(&ue->frame_parms,subframe_rx) == SF_S) { // S-subframe, do first 5 symbols only
l2 = 5;
} else if (pmch_flag == 1) { // do first 2 symbols only
l2 = 1;
} else { // normal subframe, last symbol to be processed is the first of the second slot
l2 = (ue->frame_parms.symbols_per_tti/2)-1;
}
int prev_subframe_rx = (subframe_rx - 1)<0? 9: (subframe_rx - 1);
if (subframe_select(&ue->frame_parms,prev_subframe_rx) != SF_DL) {
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
// RX processing of symbols l=0...l2
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
first_ofdm_sym = 0;
} else {
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
// RX processing of symbols l=1...l2 (l=0 is done in last scheduling epoch)
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
first_ofdm_sym = 1;
}
slot0 = (subframe_rx<<1);
slot1 = (subframe_rx<<1) + 1;
pilot0 = 0;
if (ue->frame_parms.Ncp == 0) { // normal prefix
pilot1 = 4;
} else { // extended prefix
pilot1 = 3;
}
//LOG_I(PHY,"Set available channelEst to 0 AbsSubframe %d.%d \n",frame_rx,subframe_rx);
//LOG_I(PHY,"Set available llrs slot1 to 0 AbsSubframe %d.%d \n",frame_rx,subframe_rx);
//LOG_I(PHY,"Set available dci info slot0 to 0 AbsSubframe %d.%d \n",frame_rx,subframe_rx);
proc->chan_est_pilot0_slot1_available=0;
proc->llr_slot1_available=0;
proc->dci_slot0_available=0;
proc->first_symbol_available=0;
proc->chan_est_slot1_available=0;
proc->channel_level=0;
if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) {
LOG_E( PHY, "[SCHED][UE %d][Slot0] error locking mutex for UE slot1 dl processing\n",ue->Mod_id );
exit_fun("nothing to add");
}
proc->instance_cnt_slot1_dl_processing++;
if (proc->instance_cnt_slot1_dl_processing == 0)
{
LOG_I(PHY,"unblock slot1 dl processing thread blocked on instance_cnt_slot1_dl_processing : %d \n", proc->instance_cnt_slot1_dl_processing );
if (pthread_cond_signal(&proc->cond_slot1_dl_processing) != 0) {
LOG_E( PHY, "[SCHED][UE %d][Slot0] ERROR pthread_cond_signal for UE slot1 processing thread\n", ue->Mod_id);
exit_fun("nothing to add");
}
if (pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) != 0) {
LOG_E( PHY, "[SCHED][UE %d][Slot0] error unlocking mutex for UE slot1 dl processing \n",ue->Mod_id );
exit_fun("nothing to add");
}
} else
{
LOG_E( PHY, "[SCHED][UE %d] UE RX thread busy (IC %d)!!\n", ue->Mod_id, proc->instance_cnt_slot1_dl_processing);
if (proc->instance_cnt_slot1_dl_processing > 2)
exit_fun("instance_cnt_slot1_dl_processing > 2");
}
//AssertFatal(pthread_cond_signal(&proc->cond_slot1_dl_processing) ==0 ,"");
AssertFatal(pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) ==0,"");
/**** Slot0 FE Processing ****/
// I- start main thread for FFT/ChanEst symbol: 0/1 --> 7
#if UE_TIMING_TRACE
start_meas(&ue->ue_front_end_per_slot_stat[subframe_rx%RX_NB_TH][0]);
#endif
// 1- perform FFT for pilot ofdm symbols first (ofdmSym7 ofdmSym4 or (ofdmSym6 ofdmSym3))
//printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,subframe_rx,slot1,pilot0);
front_end_fft(ue,
pilot0,
slot1,
0,
0);
//printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,subframe_rx,slot0,pilot1);
front_end_fft(ue,
pilot1,
slot0,
0,
0);
//printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,subframe_rx,slot0,pilot1);
front_end_chanEst(ue,
pilot1,
slot0,
0);
//printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,subframe_rx,slot1,pilot0);
front_end_chanEst(ue,
pilot0,
slot1,
0);
proc->chan_est_pilot0_slot1_available = 1;
printf("Set available channelEst to 1 AbsSubframe %d.%d \n",frame_rx,subframe_rx);
// 2- perform FFT for other ofdm symbols other than pilots
for (l=first_ofdm_sym; l<=l2; l++)
{
if( (l != pilot0) && (l != pilot1))
{
//printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,subframe_rx,slot0,l);
#if UE_TIMING_TRACE
start_meas(&ue->ofdm_demod_stats);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
front_end_fft(ue,
l,
slot0,
0,
0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
stop_meas(&ue->ofdm_demod_stats);
#endif
}
} // for l=1..l2
// 3- perform Channel Estimation for slot0
for (l=first_ofdm_sym; l<=l2; l++)
{
if( (l != pilot0) && (l != pilot1))
{
//printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,subframe_rx,slot0,l);
front_end_chanEst(ue,
l,
slot0,
0);
}
ue_measurement_procedures(l-1,ue,proc,eNB_id,(subframe_rx<<1),abstraction_flag,mode);
}
if (do_pdcch_flag) {
#if UE_TIMING_TRACE
start_meas(&ue->pdcch_procedures_stat[subframe_rx%RX_NB_TH]);
#endif
if (ue_pdcch_procedures(eNB_id,ue,proc,abstraction_flag) == -1) {
LOG_E(PHY,"[UE %d] Frame %d, subframe %d: Error in pdcch procedures\n",ue->Mod_id,frame_rx,subframe_rx);
#if UE_TIMING_TRACE
stop_meas(&ue->pdcch_procedures_stat[subframe_rx%RX_NB_TH]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,subframe_rx,ue->pdcch_procedures_stat[subframe_rx%RX_NB_TH].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,subframe_rx,ue->pdcch_procedures_stat[subframe_rx%RX_NB_TH].p_time/(cpuf*1000.0));
#endif
#endif
//proc->dci_slot0_available = 1;
return(-1);
}
//proc->dci_slot0_available=1;
#if UE_TIMING_TRACE
stop_meas(&ue->pdcch_procedures_stat[subframe_rx%RX_NB_TH]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,subframe_rx,ue->pdcch_procedures_stat[subframe_rx%RX_NB_TH].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,subframe_rx,ue->pdcch_procedures_stat[subframe_rx%RX_NB_TH].p_time/(cpuf*1000.0));
#endif
#endif
}
printf("num_pdcch_symbols %d\n",ue->pdcch_vars[subframe_rx%RX_NB_TH][eNB_id]->num_pdcch_symbols);
// first slot has been processed (FFTs + Channel Estimation, PCFICH/PHICH/PDCCH)
#if UE_TIMING_TRACE
stop_meas(&ue->ue_front_end_per_slot_stat[subframe_rx%RX_NB_TH][0]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot0: FFT + Channel Estimate + PCFICH/PHICH/PDCCH %5.2f \n",frame_rx,subframe_rx,ue->ue_front_end_per_slot_stat[subframe_rx%RX_NB_TH][0].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] Slot0: FFT + Channel Estimate + PCFICH/PHICH/PDCCH %5.2f \n",frame_rx,subframe_rx,ue->ue_front_end_per_slot_stat[subframe_rx%RX_NB_TH][0].p_time/(cpuf*1000.0));
#endif
#endif
//wait until slot1 FE is done
uint32_t wait = 0;
while(proc->chan_est_slot1_available == 0)
{
usleep(1);
wait++;
}
#if UE_TIMING_TRACE
stop_meas(&ue->ue_front_end_stat[subframe_rx%RX_NB_TH]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] FULL FE Processing %5.2f \n",frame_rx,subframe_rx,ue->ue_front_end_per_slot_stat[subframe_rx%RX_NB_TH][0].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] FULL FE Processing %5.2f \n",frame_rx,subframe_rx,ue->ue_front_end_per_slot_stat[subframe_rx%RX_NB_TH][0].p_time/(cpuf*1000.0));
#endif
#endif
/**** End Subframe FE Processing ****/
#if 0
//Trigger LLR parallelized for Slot 1
proc->dci_slot0_available=1;
printf("Set available dci slot0 to 1 AbsSubframe %d.%d \n",frame_rx%1024,subframe_rx);
#endif
/**** Pdsch Procedure Slot0 ****/
// start main thread for Pdsch Procedure (slot0)
// do procedures for C-RNTI
printf("AbsSubframe %d.%d Pdsch Procedure (slot0)\n",frame_rx%1024,subframe_rx);
printf("AbsSubframe %d.%d Pdsch Procedure PDSCH Active %d \n",frame_rx%1024,subframe_rx, ue->dlsch[subframe_rx%RX_NB_TH][0][0]->active);
#if UE_TIMING_TRACE
start_meas(&ue->pdsch_procedures_stat[subframe_rx%RX_NB_TH]);
#endif
#if UE_TIMING_TRACE
start_meas(&ue->pdsch_procedures_per_slot_stat[subframe_rx%RX_NB_TH][0]);
#endif
if (ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][0]->active == 1) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
ue_pdsch_procedures(ue,
proc,
eNB_id,
PDSCH,
ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][0],
NULL,
ue->pdcch_vars[subframe_rx%RX_NB_TH][eNB_id]->num_pdcch_symbols,
(ue->frame_parms.symbols_per_tti>>1)-1,
abstraction_flag);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
}
// do procedures for SI-RNTI
if ((ue->dlsch_SI[eNB_id]) && (ue->dlsch_SI[eNB_id]->active == 1)) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_IN);
ue_pdsch_procedures(ue,
proc,
eNB_id,
SI_PDSCH,
ue->dlsch_SI[eNB_id],
NULL,
ue->pdcch_vars[subframe_rx%RX_NB_TH][eNB_id]->num_pdcch_symbols,
(ue->frame_parms.symbols_per_tti>>1)-1,
abstraction_flag);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_OUT);
}
// do procedures for SI-RNTI
if ((ue->dlsch_p[eNB_id]) && (ue->dlsch_p[eNB_id]->active == 1)) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_FUNCTION_IN);
ue_pdsch_procedures(ue,
proc,
eNB_id,
P_PDSCH,
ue->dlsch_p[eNB_id],
NULL,
ue->pdcch_vars[subframe_rx%RX_NB_TH][eNB_id]->num_pdcch_symbols,
(ue->frame_parms.symbols_per_tti>>1)-1,
abstraction_flag);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_FUNCTION_OUT);
}
// do procedures for RA-RNTI
if ((ue->dlsch_ra[eNB_id]) && (ue->dlsch_ra[eNB_id]->active == 1)) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_IN);
ue_pdsch_procedures(ue,
proc,
eNB_id,
RA_PDSCH,
ue->dlsch_ra[eNB_id],
NULL,
ue->pdcch_vars[subframe_rx%RX_NB_TH][eNB_id]->num_pdcch_symbols,
(ue->frame_parms.symbols_per_tti>>1)-1,
abstraction_flag);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_OUT);
}
#if 1
// LLR linear
proc->dci_slot0_available=1;
printf("Set available dci slot0 to 1 AbsSubframe %d.%d \n",frame_rx%1024,subframe_rx);
#endif
#if UE_TIMING_TRACE
stop_meas(&ue->pdsch_procedures_per_slot_stat[subframe_rx%RX_NB_TH][0]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot0: LLR Computation %5.2f \n",frame_rx,subframe_rx,ue->pdsch_procedures_per_slot_stat[subframe_rx%RX_NB_TH][0].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] Slot0: LLR Computation %5.2f \n",frame_rx,subframe_rx,ue->pdsch_procedures_per_slot_stat[subframe_rx%RX_NB_TH][0].p_time/(cpuf*1000.0));
#endif
#endif
//wait until LLR Slot1 is done
wait = 0;
while(proc->llr_slot1_available == 0)
{
usleep(1);
wait++;
}
#if UE_TIMING_TRACE
stop_meas(&ue->pdsch_procedures_stat[subframe_rx%RX_NB_TH]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Full LLR Computation %5.2f \n",frame_rx,subframe_rx,ue->pdsch_procedures_stat[subframe_rx%RX_NB_TH].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] Full LLR Computation %5.2f \n",frame_rx,subframe_rx,ue->pdsch_procedures_stat[subframe_rx%RX_NB_TH].p_time/(cpuf*1000.0));
#endif
#endif
printf("[slot0 dl processing] AbsSubframe %d.%d Channel Decoder Start wait %d\n",frame_rx,subframe_rx,wait);
//=====================================================================//
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_procedures_stat[subframe_rx%RX_NB_TH]);
#endif
LOG_I(PHY,"==> Start Turbo Decoder active dlsch %d SI %d RA %d \n",ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][0]->active,
ue->dlsch_SI[eNB_id]->active,
//ue->dlsch_p[eNB_id]->active,
ue->dlsch_ra[eNB_id]->active);
// Start Turbo decoder
if (ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][0]->active == 1) {
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
ue_dlsch_procedures(ue,
proc,
eNB_id,
PDSCH,
ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][0],
ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][1],
&ue->dlsch_errors[eNB_id],
mode,
abstraction_flag);
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
}
// do procedures for SI-RNTI
if ((ue->dlsch_SI[eNB_id]) && (ue->dlsch_SI[eNB_id]->active == 1)) {
ue_dlsch_procedures(ue,
proc,
eNB_id,
SI_PDSCH,
ue->dlsch_SI[eNB_id],
NULL,
&ue->dlsch_SI_errors[eNB_id],
mode,
abstraction_flag);
ue->dlsch_SI[eNB_id]->active = 0;
}
// do procedures for P-RNTI
if ((ue->dlsch_p[eNB_id]) && (ue->dlsch_p[eNB_id]->active == 1)) {
ue_dlsch_procedures(ue,
proc,
eNB_id,
P_PDSCH,
ue->dlsch_p[eNB_id],
NULL,
&ue->dlsch_p_errors[eNB_id],
mode,
abstraction_flag);
ue->dlsch_p[eNB_id]->active = 0;
}
// do procedures for RA-RNTI
if ((ue->dlsch_ra[eNB_id]) && (ue->dlsch_ra[eNB_id]->active == 1)) {
ue_dlsch_procedures(ue,
proc,
eNB_id,
RA_PDSCH,
ue->dlsch_ra[eNB_id],
NULL,
&ue->dlsch_ra_errors[eNB_id],
mode,
abstraction_flag);
ue->dlsch_ra[eNB_id]->active = 0;
}
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_procedures_stat[subframe_rx%RX_NB_TH]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Channel Decoder: %5.2f \n",frame_rx,subframe_rx,ue->dlsch_procedures_stat[subframe_rx%RX_NB_TH].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] Channel Decoder: %5.2f \n",frame_rx,subframe_rx,ue->dlsch_procedures_stat[subframe_rx%RX_NB_TH].p_time/(cpuf*1000.0));
#endif
#endif
// duplicate harq structure
uint8_t current_harq_pid = ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][0]->current_harq_pid;
LTE_DL_UE_HARQ_t *current_harq_processes = ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][0]->harq_processes[current_harq_pid];
harq_status_t *current_harq_ack = &ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][0]->harq_ack[subframe_rx];
// For Debug parallelisation
if (current_harq_ack->ack == 0) {
printf("[slot0 dl processing][End of Channel Decoding] AbsSubframe %d.%d Decode Fail for HarqId%d Round%d\n",frame_rx,subframe_rx,current_harq_pid,current_harq_processes->round);
}
for(uint8_t rx_th_idx=0; rx_th_idx<RX_NB_TH; rx_th_idx++)
{
LTE_DL_UE_HARQ_t *harq_processes_dest = ue->dlsch[(subframe_rx+rx_th_idx)%RX_NB_TH][eNB_id][0]->harq_processes[current_harq_pid];
harq_status_t *harq_ack_dest = &ue->dlsch[(subframe_rx+rx_th_idx)%RX_NB_TH][eNB_id][0]->harq_ack[subframe_rx];
copy_harq_proc_struct(harq_processes_dest, current_harq_processes);
copy_ack_struct(harq_ack_dest, current_harq_ack);
}
/*
LTE_DL_UE_HARQ_t *harq_processes_dest = ue->dlsch[(subframe_rx+1)%RX_NB_TH][eNB_id][0]->harq_processes[current_harq_pid];
LTE_DL_UE_HARQ_t *harq_processes_dest1 = ue->dlsch[(subframe_rx+2)%RX_NB_TH][eNB_id][0]->harq_processes[current_harq_pid];
harq_status_t *current_harq_ack = &ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][0]->harq_ack[subframe_rx];
harq_status_t *harq_ack_dest = &ue->dlsch[(subframe_rx+1)%RX_NB_TH][eNB_id][0]->harq_ack[subframe_rx];
harq_status_t *harq_ack_dest1 = &ue->dlsch[(subframe_rx+2)%RX_NB_TH][eNB_id][0]->harq_ack[subframe_rx];
copy_harq_proc_struct(harq_processes_dest, current_harq_processes);
copy_ack_struct(harq_ack_dest, current_harq_ack);
copy_harq_proc_struct(harq_processes_dest1, current_harq_processes);
copy_ack_struct(harq_ack_dest1, current_harq_ack);
*/
if (subframe_rx==9) {
if (frame_rx % 10 == 0) {
if ((ue->dlsch_received[eNB_id] - ue->dlsch_received_last[eNB_id]) != 0)
ue->dlsch_fer[eNB_id] = (100*(ue->dlsch_errors[eNB_id] - ue->dlsch_errors_last[eNB_id]))/(ue->dlsch_received[eNB_id] - ue->dlsch_received_last[eNB_id]);
ue->dlsch_errors_last[eNB_id] = ue->dlsch_errors[eNB_id];
ue->dlsch_received_last[eNB_id] = ue->dlsch_received[eNB_id];
}
ue->bitrate[eNB_id] = (ue->total_TBS[eNB_id] - ue->total_TBS_last[eNB_id])*100;
ue->total_TBS_last[eNB_id] = ue->total_TBS[eNB_id];
LOG_D(PHY,"[UE %d] Calculating bitrate Frame %d: total_TBS = %d, total_TBS_last = %d, bitrate %f kbits\n",
ue->Mod_id,frame_rx,ue->total_TBS[eNB_id],
ue->total_TBS_last[eNB_id],(float) ue->bitrate[eNB_id]/1000.0);
#if UE_AUTOTEST_TRACE
if ((frame_rx % 100 == 0)) {
LOG_I(PHY,"[UE %d] AUTOTEST Metric : UE_DLSCH_BITRATE = %5.2f kbps (frame = %d) \n", ue->Mod_id, (float) ue->bitrate[eNB_id]/1000.0, frame_rx);
}
#endif
}
#ifdef EMOS
phy_procedures_emos_UE_RX(ue,slot,eNB_id);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
stop_meas(&ue->phy_proc_rx[subframe_rx%RX_NB_TH]);
#if DISABLE_LOG_X
printf("------FULL RX PROC [AbsSFN %d.%d]: %5.2f ------\n",frame_rx,subframe_rx,ue->phy_proc_rx[subframe_rx%RX_NB_TH].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "------FULL RX PROC [AbsSFN %d.%d]: %5.2f ------\n",frame_rx,subframe_rx,ue->phy_proc_rx[subframe_rx%RX_NB_TH].p_time/(cpuf*1000.0));
#endif
#endif
LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, subframe_rx);
return (0);
}
int phy_procedures_UE_RX(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id, int phy_procedures_UE_RX(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,
uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode, uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,
relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn) { relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn) {
@@ -4446,7 +5290,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,
if (ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][0]->active == 1) { if (ue->dlsch[subframe_rx%RX_NB_TH][eNB_id][0]->active == 1) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
start_meas(&ue->pdsch_procedures_stat); start_meas(&ue->pdsch_procedures_stat[subframe_rx%RX_NB_TH]);
#endif #endif
ue_pdsch_procedures(ue, ue_pdsch_procedures(ue,
proc, proc,
@@ -4460,8 +5304,8 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,
LOG_D(PHY," ------ end PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, subframe_rx); LOG_D(PHY," ------ end PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, subframe_rx);
LOG_D(PHY," ------ --> PDSCH Turbo Decoder slot 0/1: AbsSubframe %d.%d ------ \n", frame_rx%1024, subframe_rx); LOG_D(PHY," ------ --> PDSCH Turbo Decoder slot 0/1: AbsSubframe %d.%d ------ \n", frame_rx%1024, subframe_rx);
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->pdsch_procedures_stat); stop_meas(&ue->pdsch_procedures_stat[subframe_rx%RX_NB_TH]);
start_meas(&ue->dlsch_procedures_stat); start_meas(&ue->dlsch_procedures_stat[subframe_rx%RX_NB_TH]);
#endif #endif
ue_dlsch_procedures(ue, ue_dlsch_procedures(ue,
proc, proc,
@@ -4473,13 +5317,13 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,
mode, mode,
abstraction_flag); abstraction_flag);
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->dlsch_procedures_stat); stop_meas(&ue->dlsch_procedures_stat[subframe_rx%RX_NB_TH]);
#if DISABLE_LOG_X #if DISABLE_LOG_X
printf("[SFN %d] Slot1: Pdsch Proc %5.2f\n",subframe_rx,ue->pdsch_procedures_stat.p_time/(cpuf*1000.0)); printf("[SFN %d] Slot1: Pdsch Proc %5.2f\n",subframe_rx,ue->pdsch_procedures_stat[subframe_rx%RX_NB_TH].p_time/(cpuf*1000.0));
printf("[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",subframe_rx,ue->dlsch_procedures_stat.p_time/(cpuf*1000.0)); printf("[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",subframe_rx,ue->dlsch_procedures_stat[subframe_rx%RX_NB_TH].p_time/(cpuf*1000.0));
#else #else
LOG_D(PHY, "[SFN %d] Slot1: Pdsch Proc %5.2f\n",subframe_rx,ue->pdsch_procedures_stat.p_time/(cpuf*1000.0)); LOG_D(PHY, "[SFN %d] Slot1: Pdsch Proc %5.2f\n",subframe_rx,ue->pdsch_procedures_stat[subframe_rx%RX_NB_TH].p_time/(cpuf*1000.0));
LOG_D(PHY, "[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",subframe_rx,ue->dlsch_procedures_stat.p_time/(cpuf*1000.0)); LOG_D(PHY, "[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",subframe_rx,ue->dlsch_procedures_stat[subframe_rx%RX_NB_TH].p_time/(cpuf*1000.0));
#endif #endif
#endif #endif
@@ -4704,7 +5548,7 @@ void phy_procedures_UE_lte(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,u
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_LTE,1); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_LTE,1);
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
start_meas(&ue->phy_proc); start_meas(&ue->phy_proc[subframe_rx%RX_NB_TH]);
#endif #endif
#if defined(ENABLE_ITTI) #if defined(ENABLE_ITTI)
@@ -4798,7 +5642,7 @@ void phy_procedures_UE_lte(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,u
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_LTE,0); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_LTE,0);
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->phy_proc); stop_meas(&ue->phy_proc[subframe_rx%RX_NB_TH]);
#endif #endif
} // slot } // slot
} }
targets/COMMON/threads_t.h
+3
View File
@@ -6,6 +6,9 @@ typedef struct threads_s {
int one; int one;
int two; int two;
int three; int three;
int slot1_proc_one;
int slot1_proc_two;
int slot1_proc_three;
} threads_t; } threads_t;
#endif /* _THREADS_T_H_ */ #endif /* _THREADS_T_H_ */
targets/RT/USER/lte-softmodem.c
+16 -1
View File
@@ -222,7 +222,7 @@ double cpuf;
char uecap_xer[1024],uecap_xer_in=0; char uecap_xer[1024],uecap_xer_in=0;
int oaisim_flag=0; int oaisim_flag=0;
threads_t threads= {-1,-1,-1,-1}; threads_t threads= {-1,-1,-1,-1,-1,-1,-1};
/* see file openair2/LAYER2/MAC/main.c for why abstraction_flag is needed /* see file openair2/LAYER2/MAC/main.c for why abstraction_flag is needed
* this is very hackish - find a proper solution * this is very hackish - find a proper solution
@@ -640,6 +640,9 @@ static void get_options (int argc, char **argv) {
LONG_OPTION_THREADONESUBFRAME, LONG_OPTION_THREADONESUBFRAME,
LONG_OPTION_THREADTWOSUBFRAME, LONG_OPTION_THREADTWOSUBFRAME,
LONG_OPTION_THREADTHREESUBFRAME, LONG_OPTION_THREADTHREESUBFRAME,
LONG_OPTION_THREADSLOT1PROCONE,
LONG_OPTION_THREADSLOT1PROCTWO,
LONG_OPTION_THREADSLOT1PROCTHREE,
LONG_OPTION_DEMOD_SHIFT, LONG_OPTION_DEMOD_SHIFT,
#if T_TRACER #if T_TRACER
LONG_OPTION_T_PORT, LONG_OPTION_T_PORT,
@@ -677,6 +680,9 @@ static void get_options (int argc, char **argv) {
{"threadOneSubframe", required_argument, NULL, LONG_OPTION_THREADONESUBFRAME}, {"threadOneSubframe", required_argument, NULL, LONG_OPTION_THREADONESUBFRAME},
{"threadTwoSubframe", required_argument, NULL, LONG_OPTION_THREADTWOSUBFRAME}, {"threadTwoSubframe", required_argument, NULL, LONG_OPTION_THREADTWOSUBFRAME},
{"threadThreeSubframe", required_argument, NULL, LONG_OPTION_THREADTHREESUBFRAME}, {"threadThreeSubframe", required_argument, NULL, LONG_OPTION_THREADTHREESUBFRAME},
{"threadSlot1ProcOne", required_argument, NULL, LONG_OPTION_THREADSLOT1PROCONE},
{"threadSlot1ProcTwo", required_argument, NULL, LONG_OPTION_THREADSLOT1PROCTWO},
{"threadSlot1ProcThree", required_argument, NULL, LONG_OPTION_THREADSLOT1PROCTHREE},
{"dlsch-demod-shift", required_argument, NULL, LONG_OPTION_DEMOD_SHIFT}, {"dlsch-demod-shift", required_argument, NULL, LONG_OPTION_DEMOD_SHIFT},
#if T_TRACER #if T_TRACER
{"T_port", required_argument, 0, LONG_OPTION_T_PORT}, {"T_port", required_argument, 0, LONG_OPTION_T_PORT},
@@ -811,6 +817,15 @@ static void get_options (int argc, char **argv) {
case LONG_OPTION_THREADTHREESUBFRAME: case LONG_OPTION_THREADTHREESUBFRAME:
threads.three=atoi(optarg); threads.three=atoi(optarg);
break; break;
case LONG_OPTION_THREADSLOT1PROCONE:
threads.slot1_proc_one=atoi(optarg);
break;
case LONG_OPTION_THREADSLOT1PROCTWO:
threads.slot1_proc_two=atoi(optarg);
break;
case LONG_OPTION_THREADSLOT1PROCTHREE:
threads.slot1_proc_three=atoi(optarg);
break;
case LONG_OPTION_DEMOD_SHIFT: { case LONG_OPTION_DEMOD_SHIFT: {
extern int16_t dlsch_demod_shift; extern int16_t dlsch_demod_shift;
dlsch_demod_shift = atof(optarg); dlsch_demod_shift = atof(optarg);
targets/RT/USER/lte-softmodem.h
+1
View File
@@ -81,6 +81,7 @@ extern void kill_eNB_proc(int inst);
extern int setup_ue_buffers(PHY_VARS_UE **phy_vars_ue, openair0_config_t *openair0_cfg); extern int setup_ue_buffers(PHY_VARS_UE **phy_vars_ue, openair0_config_t *openair0_cfg);
extern void fill_ue_band_info(void); extern void fill_ue_band_info(void);
extern void init_UE(int); extern void init_UE(int);
extern void init_thread(int sched_runtime, int sched_deadline, int sched_fifo, cpu_set_t *cpuset, char * name);
extern void reset_opp_meas(void); extern void reset_opp_meas(void);
extern void print_opp_meas(void); extern void print_opp_meas(void);
targets/RT/USER/lte-ue.c
+21 -11
View File
@@ -476,15 +476,6 @@ static void *UE_thread_synch(void *arg) {
return &UE_thread_synch_retval; return &UE_thread_synch_retval;
} }
/* this structure is used to pass both UE phy vars and
* proc to the function UE_thread_rxn_txnp4
*/
struct rx_tx_thread_data {
PHY_VARS_UE *UE;
UE_rxtx_proc_t *proc;
};
/*! /*!
* \brief This is the UE thread for RX subframe n and TX subframe n+4. * \brief This is the UE thread for RX subframe n and TX subframe n+4.
* This thread performs the phy_procedures_UE_RX() on every received slot. * This thread performs the phy_procedures_UE_RX() on every received slot.
@@ -507,12 +498,13 @@ static void *UE_thread_rxn_txnp4(void *arg) {
sprintf(threadname,"UE_%d_proc_%d", UE->Mod_id, proc->sub_frame_start); sprintf(threadname,"UE_%d_proc_%d", UE->Mod_id, proc->sub_frame_start);
cpu_set_t cpuset; cpu_set_t cpuset;
CPU_ZERO(&cpuset); CPU_ZERO(&cpuset);
if ( (proc->sub_frame_start+1)%RX_NB_TH == 0 && threads.one != -1 ) if ( (proc->sub_frame_start+1)%RX_NB_TH == 0 && threads.one != -1 )
CPU_SET(threads.one, &cpuset); CPU_SET(threads.one, &cpuset);
if ( (proc->sub_frame_start+1)%RX_NB_TH == 1 && threads.two != -1 ) if ( (proc->sub_frame_start+1)%RX_NB_TH == 1 && threads.two != -1 )
CPU_SET(threads.two, &cpuset); CPU_SET(threads.two, &cpuset);
if ( (proc->sub_frame_start+1)%RX_NB_TH == 2 && threads.three != -1 ) if ( (proc->sub_frame_start+1)%RX_NB_TH == 2 && threads.three != -1 )
CPU_SET(threads.three, &cpuset); CPU_SET(threads.three, &cpuset);
//CPU_SET(threads.three, &cpuset); //CPU_SET(threads.three, &cpuset);
init_thread(900000,1000000 , FIFO_PRIORITY-1, &cpuset, init_thread(900000,1000000 , FIFO_PRIORITY-1, &cpuset,
threadname); threadname);
@@ -558,7 +550,11 @@ static void *UE_thread_rxn_txnp4(void *arg) {
(sf_type==SF_UL? "SF_UL" : (sf_type==SF_UL? "SF_UL" :
(sf_type==SF_S ? "SF_S" : "UNKNOWN_SF_TYPE")))); (sf_type==SF_S ? "SF_S" : "UNKNOWN_SF_TYPE"))));
} }
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_UE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else
phy_procedures_UE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL ); phy_procedures_UE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#endif
} }
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
@@ -871,6 +867,10 @@ void *UE_thread(void *arg) {
* - UE_thread_rxtx0 * - UE_thread_rxtx0
* - UE_thread_rxtx1 * - UE_thread_rxtx1
* - UE_thread_synch * - UE_thread_synch
* - UE_thread_fep_slot0
* - UE_thread_fep_slot1
* - UE_thread_dlsch_proc_slot0
* - UE_thread_dlsch_proc_slot1
* and the locking between them. * and the locking between them.
*/ */
void init_UE_threads(PHY_VARS_UE *UE) { void init_UE_threads(PHY_VARS_UE *UE) {
@@ -896,9 +896,19 @@ void init_UE_threads(PHY_VARS_UE *UE) {
UE->proc.proc_rxtx[i].sub_frame_step=nb_threads; UE->proc.proc_rxtx[i].sub_frame_step=nb_threads;
printf("Init_UE_threads rtd %d proc %d nb_threads %d i %d\n",rtd->proc->sub_frame_start, UE->proc.proc_rxtx[i].sub_frame_start,nb_threads, i); printf("Init_UE_threads rtd %d proc %d nb_threads %d i %d\n",rtd->proc->sub_frame_start, UE->proc.proc_rxtx[i].sub_frame_start,nb_threads, i);
pthread_create(&UE->proc.proc_rxtx[i].pthread_rxtx, NULL, UE_thread_rxn_txnp4, rtd); pthread_create(&UE->proc.proc_rxtx[i].pthread_rxtx, NULL, UE_thread_rxn_txnp4, rtd);
#ifdef UE_SLOT_PARALLELISATION
//pthread_mutex_init(&UE->proc.proc_rxtx[i].mutex_slot0_dl_processing,NULL);
//pthread_cond_init(&UE->proc.proc_rxtx[i].cond_slot0_dl_processing,NULL);
//pthread_create(&UE->proc.proc_rxtx[i].pthread_slot0_dl_processing,NULL,UE_thread_slot0_dl_processing, rtd);
pthread_mutex_init(&UE->proc.proc_rxtx[i].mutex_slot1_dl_processing,NULL);
pthread_cond_init(&UE->proc.proc_rxtx[i].cond_slot1_dl_processing,NULL);
pthread_create(&UE->proc.proc_rxtx[i].pthread_slot1_dl_processing,NULL,UE_thread_slot1_dl_processing, rtd);
#endif
} }
pthread_create(&UE->proc.pthread_synch,NULL,UE_thread_synch,(void*)UE); pthread_create(&UE->proc.pthread_synch,NULL,UE_thread_synch,(void*)UE);
} }
targets/SIMU/USER/oaisim.c
+1 -1
View File
@@ -184,7 +184,7 @@ extern LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
double cpuf; double cpuf;
#include "threads_t.h" #include "threads_t.h"
threads_t threads= {-1,-1,-1}; threads_t threads= {-1,-1,-1,-1,-1,-1,-1};
//#ifdef XFORMS //#ifdef XFORMS
int otg_enabled; int otg_enabled;