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Merge remote-tracking branch 'origin/uncompressed-f' into integration_2026_w05 (!3821)

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[FHI72] [xran F] Handle fragmented (un)compressed packets

In both E and F, the radio-transport fragmentation is not supported, and
all the "fragmented" (not seen as fragments in the xran, only as
sections) packets contain "E-bit" equal to 1. Per spec, the value 1 for
"E-bit" signifies the last fragment of one symbol. For more info, please
see "ecpriSeqid" section in the spec.

In E:

- nRBStart and nRBSize is updated according to the sent/received packet;
- max sections = 1;
- when a packet is fragmented, the xran uses memcpy(pos, iq_data_start,
  size) function, and nothing is stored in start_prbu , num_prbu ,...

In F:

- nRBStart and nRBSize is only used for C-plane messages;
- nPrbElm represents the number of sections for DL only;
- based on the nPrbElm, each section contains UP_nRBStart and UP_nRBSize
  parameters which represent the start and number of PRBs in one section
  or one fragment;
- when a packet is fragmented, the xran uses nSecDesc and sec_desc to
  extract the packet section content, and the data is stored in
  start_prbu , num_prbu ,...

Previous work on the fragmentation in F:

- #884
- !3394 - only increases the XRAN_MAX_FRAGMENT from 4 to 6, since it was
  only tested with BFP 8, but not end-to-end unfortunately. But this MR
  fixes all the issues.

Tested with VVDN RU, 2x2, 16 bits, 100MHz, 30kHz, MTU <= 9216 B, and
Quectel UE RM520N-GL Revision: RM520NGLAAR03A03M4G.
This commit is contained in:
Robert Schmidt
2026-01-29 17:20:54 +01:00
parent c8bcfedae0 b24fd337ba
commit bc6f710b23
19 changed files with 470 additions and 165 deletions
Download Patch File Download Diff File Expand all files Collapse all files
ci-scripts/conf_files/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf
+1 -1
View File
@@ -251,7 +251,7 @@ fhi_72 = {
io_core = 1; io_core = 1;
worker_cores = (2); worker_cores = (2);
ru_addr = ("98:ae:71:04:83:e3", "98:ae:71:04:83:e3"); ru_addr = ("98:ae:71:04:83:e3", "98:ae:71:04:83:e3");
mtu = 9600; mtu = 9216;
fh_config = ({ fh_config = ({
T1a_cp_dl = (285, 470); T1a_cp_dl = (285, 470);
T1a_cp_ul = (285, 429); T1a_cp_ul = (285, 429);
ci-scripts/conf_files/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf
+1 -1
View File
@@ -258,7 +258,7 @@ fhi_72 = {
io_core = 1; io_core = 1;
worker_cores = (2); worker_cores = (2);
ru_addr = ("70:b3:d5:e1:5b:81", "70:b3:d5:e1:5b:81"); ru_addr = ("70:b3:d5:e1:5b:81", "70:b3:d5:e1:5b:81");
mtu = 9600; mtu = 9216;
fh_config = ({ fh_config = ({
T1a_cp_dl = (419, 470); T1a_cp_dl = (419, 470);
T1a_cp_ul = (285, 336); T1a_cp_ul = (285, 336);
cmake_targets/tools/oran_fhi_integration_patches/F/oaioran_F.patch
+4 -4
View File
@@ -1,5 +1,5 @@
diff --git a/fhi_lib/app/src/common.h b/fhi_lib/app/src/common.h diff --git a/fhi_lib/app/src/common.h b/fhi_lib/app/src/common.h
index ac5f471..94c2d7c 100644 index ac5f471..ed9ab7d 100644
--- a/fhi_lib/app/src/common.h --- a/fhi_lib/app/src/common.h
+++ b/fhi_lib/app/src/common.h +++ b/fhi_lib/app/src/common.h
@@ -28,7 +28,7 @@ @@ -28,7 +28,7 @@
@@ -7,7 +7,7 @@ index ac5f471..94c2d7c 100644
#include <rte_mbuf.h> #include <rte_mbuf.h>
-#define VERSIONX "oran_f_release_v1.0" -#define VERSIONX "oran_f_release_v1.0"
+#define VERSIONX "oran_f_release_v1.6" +#define VERSIONX "oran_f_release_v1.7"
#define APP_O_DU 0 #define APP_O_DU 0
#define APP_O_RU 1 #define APP_O_RU 1
@@ -173,7 +173,7 @@ index eccc4ae..a97fdc6 100644
CPP_FLAGS_FULL := $(CPP_FLAGS) $(CPP_COMP) $(INC) $(DEF) CPP_FLAGS_FULL := $(CPP_FLAGS) $(CPP_COMP) $(INC) $(DEF)
CPP_FLAGS_FULL_SNC := $(CPP_FLAGS) $(CPP_COMP_SNC) $(INC) $(DEF) CPP_FLAGS_FULL_SNC := $(CPP_FLAGS) $(CPP_COMP_SNC) $(INC) $(DEF)
diff --git a/fhi_lib/lib/api/xran_fh_o_du.h b/fhi_lib/lib/api/xran_fh_o_du.h diff --git a/fhi_lib/lib/api/xran_fh_o_du.h b/fhi_lib/lib/api/xran_fh_o_du.h
index bacf597..2aeaaae 100644 index bacf597..18597d6 100644
--- a/fhi_lib/lib/api/xran_fh_o_du.h --- a/fhi_lib/lib/api/xran_fh_o_du.h
+++ b/fhi_lib/lib/api/xran_fh_o_du.h +++ b/fhi_lib/lib/api/xran_fh_o_du.h
@@ -141,8 +141,8 @@ extern "C" { @@ -141,8 +141,8 @@ extern "C" {
@@ -182,7 +182,7 @@ index bacf597..2aeaaae 100644
-#define XRAN_MAX_FRAGMENT (4) /**< Max number of fragmentations in single symbol */ -#define XRAN_MAX_FRAGMENT (4) /**< Max number of fragmentations in single symbol */
-#define XRAN_MAX_SET_BFWS (64) /**< Assumed 64Ant, BFP 9bit with 9K jumbo frame */ -#define XRAN_MAX_SET_BFWS (64) /**< Assumed 64Ant, BFP 9bit with 9K jumbo frame */
+#define XRAN_MAX_FRAGMENT (6) /**< Max number of fragmentations in single symbol */ +#define XRAN_MAX_FRAGMENT (7) /**< Max number of fragmentations in single symbol */
+#define XRAN_MAX_SET_BFWS (1) //(64) /**< Assumed 64Ant, BFP 9bit with 9K jumbo frame */ +#define XRAN_MAX_SET_BFWS (1) //(64) /**< Assumed 64Ant, BFP 9bit with 9K jumbo frame */
#define XRAN_MAX_PKT_BURST (448+4) /**< 4x14x8 symbols per ms */ #define XRAN_MAX_PKT_BURST (448+4) /**< 4x14x8 symbols per ms */
doc/ORAN_FHI7.2_Tutorial.md
+14 -13
View File
@@ -526,7 +526,7 @@ Contact the RU vendor and get the configuration manual to understand the below c
The OAI configuration file [`gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf) corresponds to: The OAI configuration file [`gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf) corresponds to:
- TDD pattern `DDDSU`, 2.5ms - TDD pattern `DDDSU`, 2.5ms
- Bandwidth 100MHz - Bandwidth 100MHz
- MTU 9600 - MTU 9216
- 4TX4R - 4TX4R
##### RU configuration ##### RU configuration
@@ -552,7 +552,7 @@ dl_ul_tuning_special_slot=0xfd00000
The OAI configuration file [`gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf) corresponds to: The OAI configuration file [`gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf) corresponds to:
- TDD pattern `DDDDDDDSUU`, 5ms - TDD pattern `DDDDDDDSUU`, 5ms
- Bandwidth 100MHz - Bandwidth 100MHz
- MTU 9600 - MTU 9216
- 4TX4R - 4TX4R
##### RU configuration ##### RU configuration
@@ -579,7 +579,7 @@ The OAI configuration file [`gnb.sa.band78.273prb.fhi72.4x4-liteon.conf`](../tar
- TDD pattern `DDDSU`, 2.5ms - TDD pattern `DDDSU`, 2.5ms
- Bandwidth 100MHz - Bandwidth 100MHz
- MTU 1500 - MTU 1500
- MTU 9600: v02.00.10 - MTU 9216: v02.00.10
##### RU configuration ##### RU configuration
@@ -618,7 +618,7 @@ jumboframe 1 # enable jumbo frame
The OAI configuration file [`gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf) corresponds to: The OAI configuration file [`gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf) corresponds to:
- TDD pattern `DDDSU`, 2.5ms - TDD pattern `DDDSU`, 2.5ms
- Bandwidth 100MHz - Bandwidth 100MHz
- MTU 9600 - MTU 9216
##### RU configuration ##### RU configuration
@@ -692,7 +692,7 @@ At this stage, RU must be rebooted so the changes apply.
The OAI configuration file [`gnb.sa.band78.273prb.fhi72.4X4-foxconn.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4X4-foxconn.conf) corresponds to: The OAI configuration file [`gnb.sa.band78.273prb.fhi72.4X4-foxconn.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4X4-foxconn.conf) corresponds to:
- TDD pattern `DDDSU`, 2.5ms - TDD pattern `DDDSU`, 2.5ms
- Bandwidth 100MHz - Bandwidth 100MHz
- MTU 9600 - MTU 9216
##### RU configuration ##### RU configuration
@@ -895,7 +895,7 @@ We recommand to put the above four steps into one script file to quickly repeat
set -x set -x
IF_NAME=eno12409 IF_NAME=eno12409
MAX_RING_BUFFER_SIZE=4096 MAX_RING_BUFFER_SIZE=4096
MTU=9600 MTU=9216
DU_U_PLANE_MAC_ADD=00:11:22:33:44:66 DU_U_PLANE_MAC_ADD=00:11:22:33:44:66
DU_C_PLANE_MAC_ADD=00:11:22:33:44:67 DU_C_PLANE_MAC_ADD=00:11:22:33:44:67
VLAN=3 VLAN=3
@@ -931,12 +931,13 @@ Sample configuration files for OAI gNB, specific to the manufacturer of the radi
2. VVDN RU: 2. VVDN RU:
[`gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf) [`gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf)
[`gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf) [`gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf)
[`gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf) [`gnb.sa.band77.273prb.fhi72.2x2-vvdn-16b.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn-16b.conf)
3. Benetel 650 RU: 3. Benetel 650 RU:
[`gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf) [`gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf)
4. Benetel 550 RU: 4. Benetel 550 RU:
[`gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf) [`gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf)
[`gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf) [`gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf)
[`gnb.sa.band78.273prb.fhi72.2x2-benetel550-16b.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.2x2-benetel550-16b.conf) - only with E release; with F, UL U-plane fragmentation is not correct
5. Metanoia RU: 5. Metanoia RU:
[`gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf) [`gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf)
@@ -970,7 +971,7 @@ Edit the sample OAI gNB configuration file and check following parameters:
* `io_core`: absolute CPU core ID for XRAN library, it should be an isolated core, in our environment we are using CPU 4 * `io_core`: absolute CPU core ID for XRAN library, it should be an isolated core, in our environment we are using CPU 4
* `worker_cores`: array of absolute CPU core IDs for XRAN library, they should be isolated cores, in our environment we are using CPU 2 * `worker_cores`: array of absolute CPU core IDs for XRAN library, they should be isolated cores, in our environment we are using CPU 2
* `ru_addr`: RU U- and C-plane MAC-addresses (format `UU:VV:WW:XX:YY:ZZ`, hexadecimal numbers) * `ru_addr`: RU U- and C-plane MAC-addresses (format `UU:VV:WW:XX:YY:ZZ`, hexadecimal numbers)
* `mtu`: Maximum Transmission Unit for the RU, specified by RU vendor; either 1500 or 9600 B (Jumbo Frames); if not set, 1500 is used * `mtu`: Maximum Transmission Unit for the RU, specified by RU vendor; either 1500 or 9600 B (Jumbo Frames); if not set, 1500 is used; if the testbed contains a switch, and its max supported MTU < 9600, then please set the same value in the config file as well
* `file_prefix` : used to specify a unique prefix for shared memory and files created by multiple DPDK processes; if not set, default value of `wls_0` is used * `file_prefix` : used to specify a unique prefix for shared memory and files created by multiple DPDK processes; if not set, default value of `wls_0` is used
* `dpdk_mem_size`: the huge page size that should be pre-allocated by DPDK * `dpdk_mem_size`: the huge page size that should be pre-allocated by DPDK
_for NUMA node 0_; by default, this is 8192 MiB (corresponding to 8 huge _for NUMA node 0_; by default, this is 8192 MiB (corresponding to 8 huge
@@ -1171,7 +1172,7 @@ fhi_72 = {
io_core = 1; io_core = 1;
worker_cores = (2); worker_cores = (2);
ru_addr = ("8c:1f:64:d1:10:46","8c:1f:64:d1:10:46","8c:1f:64:d1:10:43","8c:1f:64:d1:10:43") ru_addr = ("8c:1f:64:d1:10:46","8c:1f:64:d1:10:46","8c:1f:64:d1:10:43","8c:1f:64:d1:10:43")
mtu = 9600; mtu = 9216;
fh_config = ( fh_config = (
# RAN650 #1 # RAN650 #1
{ {
@@ -1587,11 +1588,11 @@ sequenceDiagram
[HW] [MPLANE] Watchdog timer answer: [HW] [MPLANE] Watchdog timer answer:
<next-update-at xmlns="urn:o-ran:supervision:1.0">2025-03-30T08:52:31+02:00</next-update-at> <next-update-at xmlns="urn:o-ran:supervision:1.0">2025-03-30T08:52:31+02:00</next-update-at>
[HW] [MPLANE] Interface MTU 1500 unreliable/not correctly reported by Benetel O-RU, hardcoding to 9600. [HW] [MPLANE] Interface MTU 1500 unreliable/not correctly reported by Benetel O-RU, hardcoding to 9216.
[HW] [MPLANE] IQ bitwidth 16 unreliable/not correctly reported by Benetel O-RU, hardcoding to 9. [HW] [MPLANE] IQ bitwidth 16 unreliable/not correctly reported by Benetel O-RU, hardcoding to 9.
[HW] [MPLANE] Storing the following information to forward to xran: [HW] [MPLANE] Storing the following information to forward to xran:
RU MAC address 8c:1f:64:d1:11:c0 RU MAC address 8c:1f:64:d1:11:c0
MTU 9600 MTU 9216
IQ bitwidth 9 IQ bitwidth 9
PRACH offset 4 PRACH offset 4
DU port bitmask 61440 DU port bitmask 61440
@@ -2238,11 +2239,11 @@ sequenceDiagram
[HW] [MPLANE] Watchdog timer answer: [HW] [MPLANE] Watchdog timer answer:
<next-update-at xmlns="urn:o-ran:supervision:1.0">2025-08-29T06:49:32+02:00</next-update-at> <next-update-at xmlns="urn:o-ran:supervision:1.0">2025-08-29T06:49:32+02:00</next-update-at>
[HW] [MPLANE] Interface MTU 1500 unreliable/not correctly reported by Benetel O-RU, hardcoding to 9600. [HW] [MPLANE] Interface MTU 1500 unreliable/not correctly reported by Benetel O-RU, hardcoding to 9216.
[HW] [MPLANE] IQ bitwidth 16 unreliable/not correctly reported by Benetel O-RU, hardcoding to 9. [HW] [MPLANE] IQ bitwidth 16 unreliable/not correctly reported by Benetel O-RU, hardcoding to 9.
[HW] [MPLANE] Storing the following information to forward to xran: [HW] [MPLANE] Storing the following information to forward to xran:
RU MAC address 70:b3:d5:e1:5b:81 RU MAC address 70:b3:d5:e1:5b:81
MTU 9600 MTU 9216
IQ bitwidth 9 IQ bitwidth 9
PRACH offset 4 PRACH offset 4
DU port bitmask 61440 DU port bitmask 61440
radio/fhi_72/CMakeLists.txt
+1 -1
View File
@@ -17,7 +17,7 @@ add_library(oran_fhlib_5g MODULE
) )
set(E_VERSION 5.1.6) set(E_VERSION 5.1.6)
set(F_VERSION 6.1.6) set(F_VERSION 6.1.7)
find_package(xran REQUIRED) find_package(xran REQUIRED)
if(xran_VERSION VERSION_EQUAL E_VERSION) if(xran_VERSION VERSION_EQUAL E_VERSION)
radio/fhi_72/oaioran.c
+160 -130
View File
@@ -363,7 +363,6 @@ int xran_fh_rx_read_slot(ru_info_t *ru, int *frame, int *slot)
read_prach_data(ru, *frame, *slot); read_prach_data(ru, *frame, *slot);
const struct xran_fh_init *fh_init = get_xran_fh_init(); const struct xran_fh_init *fh_init = get_xran_fh_init();
int nPRBs = fh_cfg->nULRBs;
int fftsize = 1 << fh_cfg->nULFftSize; int fftsize = 1 << fh_cfg->nULFftSize;
int slot_offset_rxdata = 3 & (*slot); int slot_offset_rxdata = 3 & (*slot);
@@ -386,93 +385,110 @@ int xran_fh_rx_read_slot(ru_info_t *ru, int *frame, int *slot)
if (!is_tdd_ul_symbol(frame_conf, *slot, sym_idx)) if (!is_tdd_ul_symbol(frame_conf, *slot, sym_idx))
continue; continue;
uint8_t *pData;
oran_buf_list_t *bufs = get_xran_buffers(ant_id / nb_rx_per_ru); oran_buf_list_t *bufs = get_xran_buffers(ant_id / nb_rx_per_ru);
uint8_t *pPrbMapData = bufs->dstcp[ant_id % nb_rx_per_ru][tti % XRAN_N_FE_BUF_LEN].pBuffers->pData; uint8_t *pPrbMapData = bufs->dstcp[ant_id % nb_rx_per_ru][tti % XRAN_N_FE_BUF_LEN].pBuffers->pData;
struct xran_prb_map *pPrbMap = (struct xran_prb_map *)pPrbMapData; struct xran_prb_map *pRbMap = (struct xran_prb_map *)pPrbMapData;
struct xran_prb_elm *pRbElm = &pPrbMap->prbMap[0];
#ifdef E_RELEASE
struct xran_section_desc *p_sec_desc = pRbElm->p_sec_desc[sym_idx][0];
#elif defined F_RELEASE
struct xran_section_desc *p_sec_desc = &pRbElm->sec_desc[sym_idx][0];
#endif
uint32_t one_rb_size =
(((pRbElm->iqWidth == 0) || (pRbElm->iqWidth == 16)) ? (N_SC_PER_PRB * 2 * 2) : (3 * pRbElm->iqWidth + 1));
if (fh_init->mtu < pRbElm->nRBSize * one_rb_size)
pData = bufs->dst[ant_id % nb_rx_per_ru][tti % XRAN_N_FE_BUF_LEN]
.pBuffers[sym_idx % XRAN_NUM_OF_SYMBOL_PER_SLOT]
.pData;
else
pData = p_sec_desc->pData;
ptr = pData;
pos = (int32_t *)(start_ptr + (4 * sym_idx * fftsize));
if (ptr == NULL || pos == NULL)
continue;
struct xran_prb_map *pRbMap = pPrbMap;
uint32_t idxElm = 0;
uint8_t *src = (uint8_t *)ptr; uint8_t *src = (uint8_t *)ptr;
LOG_D(HW, "pRbMap->nPrbElm %d\n", pRbMap->nPrbElm); // even when the fragmentation occurs, nRBSize & nRBStart carry the same values in each prbMap
for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) { // therefore, I took the liberty to just extract these values from the first prbMap
LOG_D(HW, int num_totalRB = pRbMap->prbMap[0].nRBSize;
"prbMap[%d] : PRBstart %d nPRBs %d\n", int start_totalRB = pRbMap->prbMap[0].nRBStart;
idxElm, int32_t local_dst[num_totalRB * N_SC_PER_PRB] __attribute__((aligned(64)));
pRbMap->prbMap[idxElm].nRBStart,
pRbMap->prbMap[idxElm].nRBSize);
pRbElm = &pRbMap->prbMap[idxElm];
int pos_len = 0;
int neg_len = 0;
if (pRbElm->nRBStart < (nPRBs >> 1)) // there are PRBs left of DC LOG_D(HW, "[%d.%d] pRbMap->nPrbElm %d\n", *frame, *slot, pRbMap->nPrbElm);
neg_len = min((nPRBs * 6) - (pRbElm->nRBStart * 12), pRbElm->nRBSize * N_SC_PER_PRB); for (uint32_t idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
pos_len = (pRbElm->nRBSize * N_SC_PER_PRB) - neg_len; int numRB, startRB;
uint8_t *pData;
src = pData; struct xran_section_desc *p_sec_desc = NULL;
// Calculation of the pointer for the section in the buffer. struct xran_prb_elm *pRbElm = &pRbMap->prbMap[idxElm];
// positive half #ifdef E_RELEASE
uint8_t *dst1 = (uint8_t *)(pos + (neg_len == 0 ? ((pRbElm->nRBStart * N_SC_PER_PRB) - (nPRBs * 6)) : 0)); uint32_t one_rb_size =
// negative half (((pRbElm->iqWidth == 0) || (pRbElm->iqWidth == 16)) ? (N_SC_PER_PRB * 2 * 2) : (3 * pRbElm->iqWidth + 1));
uint8_t *dst2 = (uint8_t *)(pos + (pRbElm->nRBStart * N_SC_PER_PRB) + fftsize - (nPRBs * 6)); if (fh_init->mtu < num_totalRB * one_rb_size)
int32_t local_dst[pRbElm->nRBSize * N_SC_PER_PRB] __attribute__((aligned(64))); pData = bufs->dst[ant_id % nb_rx_per_ru][tti % XRAN_N_FE_BUF_LEN]
if (pRbElm->compMethod == XRAN_COMPMETHOD_NONE) { .pBuffers[sym_idx % XRAN_NUM_OF_SYMBOL_PER_SLOT]
// NOTE: gcc 11 knows how to generate AVX2 for this! .pData;
for (idx = 0; idx < pRbElm->nRBSize * N_SC_PER_PRB * 2; idx++) else {
((int16_t *)local_dst)[idx] = ((int16_t)ntohs(((uint16_t *)src)[idx])) >> 2; p_sec_desc = pRbElm->p_sec_desc[sym_idx][0];
memcpy((void *)dst2, (void *)local_dst, neg_len * 4); pData = p_sec_desc->pData;
memcpy((void *)dst1, (void *)&local_dst[neg_len], pos_len * 4);
} else if (pRbElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) {
#if defined(__i386__) || defined(__x86_64__)
struct xranlib_decompress_request bfp_decom_req = {};
struct xranlib_decompress_response bfp_decom_rsp = {};
int16_t payload_len = (3 * pRbElm->iqWidth + 1) * pRbElm->nRBSize;
bfp_decom_req.data_in = (int8_t *)src;
bfp_decom_req.numRBs = pRbElm->nRBSize;
bfp_decom_req.len = payload_len;
bfp_decom_req.compMethod = pRbElm->compMethod;
bfp_decom_req.iqWidth = pRbElm->iqWidth;
bfp_decom_rsp.data_out = (int16_t *)local_dst;
bfp_decom_rsp.len = 0;
xranlib_decompress_avx512(&bfp_decom_req, &bfp_decom_rsp);
#elif defined(__arm__) || defined(__aarch64__)
armral_bfp_decompression(pRbElm->iqWidth, pRbElm->nRBSize, (int8_t *)src, (int16_t *)local_dst);
#else
AssertFatal(1 == 0, "BFP compression not supported on this architecture");
#endif
memcpy((void *)dst2, (void *)local_dst, neg_len * 4);
memcpy((void *)dst1, (void *)&local_dst[neg_len], pos_len * 4);
outcnt++;
} else {
printf("pRbElm->compMethod == %d is not supported\n", pRbElm->compMethod);
exit(-1);
} }
} numRB = num_totalRB;
startRB = start_totalRB;
{
{
#elif defined F_RELEASE
// UP_nRBSize & UP_nRBStart are for DL U-plane only
LOG_D(HW, "[%d.%d] idxElm[%d] startSym[%d]:numSym[%d] UP_startRB[%d]:UP_numRB[%d] sym_idx[%d] ant_id[%d] pRbElm->nRBStart[%d]:pRbElm->nRBSize[%d]\n", *frame, *slot, idxElm, pRbElm->nStartSymb, pRbElm->numSymb, pRbElm->UP_nRBStart, pRbElm->UP_nRBSize, sym_idx, ant_id, pRbElm->nRBStart, pRbElm->nRBSize);
for (int idxDesc = 0; idxDesc < XRAN_MAX_FRAGMENT; idxDesc++) {
p_sec_desc = &pRbElm->sec_desc[sym_idx][idxDesc];
if (p_sec_desc == NULL)
continue;
if (sym_idx >= pRbElm->nStartSymb && sym_idx < pRbElm->nStartSymb + pRbElm->numSymb) {
if (!p_sec_desc->pCtrl)
continue;
pData = p_sec_desc->pData;
numRB = p_sec_desc->num_prbu;
startRB = p_sec_desc->start_prbu;
// num_prbu & start_prbu are for UL U-plane only
LOG_D(HW, "p_sec_desc[%d] startRB[%d]:numRB[%d]\n", idxDesc, startRB, numRB);
#endif
ptr = pData;
pos = (int32_t *)(start_ptr + (4 * sym_idx * fftsize));
if (ptr == NULL || pos == NULL)
continue;
src = pData;
if (pRbElm->compMethod == XRAN_COMPMETHOD_NONE) {
// NOTE: gcc 11 knows how to generate AVX2 for this!
for (idx = 0; idx < (numRB * N_SC_PER_PRB) * 2; idx++)
((int16_t *)local_dst)[idx + startRB * N_SC_PER_PRB * 2] = ((int16_t)ntohs(((uint16_t *)src)[idx])) >> 2;
} else if (pRbElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) {
#if defined(__i386__) || defined(__x86_64__)
struct xranlib_decompress_request bfp_decom_req = {};
struct xranlib_decompress_response bfp_decom_rsp = {};
int16_t payload_len = (3 * pRbElm->iqWidth + 1) * numRB;
bfp_decom_req.data_in = (int8_t *)src;
bfp_decom_req.numRBs = numRB;
bfp_decom_req.len = payload_len;
bfp_decom_req.compMethod = pRbElm->compMethod;
bfp_decom_req.iqWidth = pRbElm->iqWidth;
bfp_decom_rsp.data_out = (int16_t *) (local_dst + startRB * N_SC_PER_PRB);
bfp_decom_rsp.len = 0;
xranlib_decompress_avx512(&bfp_decom_req, &bfp_decom_rsp);
#elif defined(__arm__) || defined(__aarch64__)
armral_bfp_decompression(pRbElm->iqWidth, numRB, (int8_t *)src, (int16_t *)local_dst);
#else
AssertFatal(1 == 0, "BFP compression not supported on this architecture");
#endif
outcnt++;
} else {
printf("pRbElm->compMethod == %d is not supported\n", pRbElm->compMethod);
exit(-1);
}
if ((startRB + numRB) == (start_totalRB + num_totalRB)) {
int pos_len = 0;
int neg_len = 0;
if (start_totalRB < (num_totalRB >> 1)) // there are PRBs left of DC
neg_len = min((num_totalRB * 6) - (start_totalRB * 12), num_totalRB * N_SC_PER_PRB);
pos_len = (num_totalRB * N_SC_PER_PRB) - neg_len;
// Calculation of the pointer for the section in the buffer.
// positive half
uint8_t *dst1 = (uint8_t *)(pos + (neg_len == 0 ? ((start_totalRB * N_SC_PER_PRB) - (num_totalRB * 6)) : 0));
// negative half
uint8_t *dst2 = (uint8_t *)(pos + (start_totalRB * N_SC_PER_PRB) + fftsize - (num_totalRB * 6));
memcpy((void *)dst2, (void *)local_dst, neg_len * 4);
memcpy((void *)dst1, (void *)&local_dst[neg_len], pos_len * 4);
}
}
} // idxDesc
} // idxElm
} // sym_ind } // sym_ind
} // ant_ind } // ant_ind
} // vv_inf } // vv_inf
@@ -521,7 +537,6 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
const struct xran_fh_init *fh_init = get_xran_fh_init(); const struct xran_fh_init *fh_init = get_xran_fh_init();
const struct xran_fh_config *fh_cfg = get_xran_fh_config(0); const struct xran_fh_config *fh_cfg = get_xran_fh_config(0);
int nPRBs = fh_cfg->nDLRBs;
int fftsize = 1 << fh_cfg->nDLFftSize; int fftsize = 1 << fh_cfg->nDLFftSize;
int nb_tx_per_ru = ru->nb_tx / fh_init->xran_ports; int nb_tx_per_ru = ru->nb_tx / fh_init->xran_ports;
int nb_rx_per_ru = ru->nb_rx / fh_init->xran_ports; int nb_rx_per_ru = ru->nb_rx / fh_init->xran_ports;
@@ -539,8 +554,7 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
} }
// This loop would better be more inner to avoid confusion and maybe also errors. // This loop would better be more inner to avoid confusion and maybe also errors.
for (int32_t sym_idx = 0; sym_idx < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx++) { for (int32_t sym_idx = 0; sym_idx < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx++) {
/* the callback is for mixed and UL slots. In mixed, we have to /* skip DL and guard symbols. */
* skip DL and guard symbols. */
if (!is_tdd_ul_symbol(frame_conf, slot, sym_idx)) { if (!is_tdd_ul_symbol(frame_conf, slot, sym_idx)) {
continue; continue;
} }
@@ -548,15 +562,18 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
uint8_t *pPrbMapData = bufs->dstcp[ant_id % nb_rx_per_ru][tti % XRAN_N_FE_BUF_LEN].pBuffers->pData; uint8_t *pPrbMapData = bufs->dstcp[ant_id % nb_rx_per_ru][tti % XRAN_N_FE_BUF_LEN].pBuffers->pData;
struct xran_prb_map *pPrbMap = (struct xran_prb_map *)pPrbMapData; struct xran_prb_map *pPrbMap = (struct xran_prb_map *)pPrbMapData;
struct xran_prb_elm *pRbElm = &pPrbMap->prbMap[0]; LOG_D(HW, "pPrbMap->nPrbElm %d\n", pPrbMap->nPrbElm);
for (uint32_t idxElm = 0; idxElm < pPrbMap->nPrbElm; idxElm++) {
struct xran_prb_map *pRbMap = pPrbMap; struct xran_prb_elm *pRbElm = &pPrbMap->prbMap[idxElm];
uint32_t idxElm = 0; int numRB, startRB;
#ifdef E_RELEASE
LOG_D(HW, "pRbMap->nPrbElm %d\n", pRbMap->nPrbElm); numRB = pRbElm->nRBSize;
for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) { startRB = pRbElm->nRBStart;
LOG_D(HW, "prbMap[%d] : PRBstart %d nPRBs %d\n", idxElm, pRbMap->prbMap[idxElm].nRBStart, pRbMap->prbMap[idxElm].nRBSize); #elif F_RELEASE
pRbElm = &pRbMap->prbMap[idxElm]; numRB = pRbElm->UP_nRBSize;
startRB = pRbElm->UP_nRBStart;
#endif
LOG_D(HW, "pPrbMap[%d] : PRBstart %d nPRBs %d\n", idxElm, startRB, numRB);
if (first) { if (first) {
// ant_id / no of antenna per beam gives the beam_nb // ant_id / no of antenna per beam gives the beam_nb
pRbElm->nBeamIndex = pRbElm->nBeamIndex =
@@ -583,9 +600,8 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
} }
// This loop would better be more inner to avoid confusion and maybe also errors. // This loop would better be more inner to avoid confusion and maybe also errors.
for (int32_t sym_idx = 0; sym_idx < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx++) { for (int32_t sym_idx = 0; sym_idx < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx++) {
/* the callback is for mixed and UL slots. In mixed, we have to /* skip UL and guard symbols. */
* skip UL and guard symbols. */ if (!is_tdd_dl_symbol(frame_conf, slot, sym_idx)) {
if (is_tdd_ul_symbol(frame_conf, slot, sym_idx)) {
continue; continue;
} }
uint8_t *pData = uint8_t *pData =
@@ -596,20 +612,36 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
pos = &ru->txdataF_BF[ant_id][sym_idx * fftsize]; pos = &ru->txdataF_BF[ant_id][sym_idx * fftsize];
uint8_t *u8dptr; uint8_t *u8dptr;
struct xran_prb_map *pRbMap = pPrbMap; // even when the fragmentation occurs, nRBSize & nRBStart carry the same values in each prbMap
int32_t sym_id = sym_idx % XRAN_NUM_OF_SYMBOL_PER_SLOT; // therefore, I took the liberty to just extract these values from the first prbMap
struct xran_prb_elm *p_prbMapElm = &pPrbMap->prbMap[0];
int num_totalRB = p_prbMapElm->nRBSize;
int start_totalRB = p_prbMapElm->nRBStart;
int pos_len = 0;
int neg_len = 0;
if (start_totalRB < (num_totalRB >> 1)) // there are PRBs left of DC
neg_len = min((num_totalRB * 6) - (start_totalRB * 12), num_totalRB * N_SC_PER_PRB);
pos_len = (num_totalRB * N_SC_PER_PRB) - neg_len;
// Calculation of the pointer for the section in the buffer.
// start of positive frequency component
uint16_t *src1 = (uint16_t *)&pos[(neg_len == 0) ? ((start_totalRB * N_SC_PER_PRB) - (num_totalRB * 6)) : 0];
// start of negative frequency component
uint16_t *src2 = (uint16_t *)&pos[(start_totalRB * N_SC_PER_PRB) + fftsize - (num_totalRB * 6)];
uint32_t local_src[num_totalRB * N_SC_PER_PRB] __attribute__((aligned(64)));
memcpy((void *)local_src, (void *)src2, neg_len * 4);
memcpy((void *)&local_src[neg_len], (void *)src1, pos_len * 4);
if (ptr && pos) { if (ptr && pos) {
uint32_t idxElm = 0;
u8dptr = (uint8_t *)ptr; u8dptr = (uint8_t *)ptr;
int16_t payload_len = 0; int16_t payload_len = 0;
uint8_t *dst = (uint8_t *)u8dptr; uint8_t *dst = (uint8_t *)u8dptr;
struct xran_prb_elm *p_prbMapElm = &pRbMap->prbMap[idxElm]; for (uint32_t idxElm = 0; idxElm < pPrbMap->nPrbElm; idxElm++) {
for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
struct xran_section_desc *p_sec_desc = NULL; struct xran_section_desc *p_sec_desc = NULL;
p_prbMapElm = &pRbMap->prbMap[idxElm]; struct xran_prb_elm *p_prbMapElm = &pPrbMap->prbMap[idxElm];
if (sym_idx == 0) { if (sym_idx == 0) {
// ant_id / no of antenna per beam gives the beam_nb // ant_id / no of antenna per beam gives the beam_nb
p_prbMapElm->nBeamIndex = ru->beam_id[ant_id / (ru->nb_tx / ru->num_beams_period)][slot * XRAN_NUM_OF_SYMBOL_PER_SLOT]; p_prbMapElm->nBeamIndex = ru->beam_id[ant_id / (ru->nb_tx / ru->num_beams_period)][slot * XRAN_NUM_OF_SYMBOL_PER_SLOT];
@@ -618,11 +650,18 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
p_prbMapElm->nBeamIndex = 0; p_prbMapElm->nBeamIndex = 0;
} }
// assumes one fragment per symbol // radio-transport fragmentation is not supported in both E and F releases;
// E-bit = 1 => each ethernet frame is considered as the last fragment;
// a group of PRBs per each symbol is encapsulated in one ethernet frame.
// => seems that the RUs don't check for E-bit
#ifdef E_RELEASE #ifdef E_RELEASE
p_sec_desc = p_prbMapElm->p_sec_desc[sym_id][0]; p_sec_desc = p_prbMapElm->p_sec_desc[sym_idx][0];
int16_t startRB = p_prbMapElm->nRBStart;
int16_t numRB = p_prbMapElm->nRBSize;
#elif F_RELEASE #elif F_RELEASE
p_sec_desc = &p_prbMapElm->sec_desc[sym_id][0]; p_sec_desc = &p_prbMapElm->sec_desc[sym_idx][0];
int16_t startRB = p_prbMapElm->UP_nRBStart;
int16_t numRB = p_prbMapElm->UP_nRBSize;
#endif #endif
dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod); dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);
@@ -633,36 +672,28 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
} }
uint16_t *dst16 = (uint16_t *)dst; uint16_t *dst16 = (uint16_t *)dst;
int pos_len = 0;
int neg_len = 0;
if (p_prbMapElm->nRBStart < (nPRBs >> 1)) // there are PRBs left of DC
neg_len = min((nPRBs * 6) - (p_prbMapElm->nRBStart * 12), p_prbMapElm->nRBSize * N_SC_PER_PRB);
pos_len = (p_prbMapElm->nRBSize * N_SC_PER_PRB) - neg_len;
// Calculation of the pointer for the section in the buffer.
// start of positive frequency component
uint16_t *src1 = (uint16_t *)&pos[(neg_len == 0) ? ((p_prbMapElm->nRBStart * N_SC_PER_PRB) - (nPRBs * 6)) : 0];
// start of negative frequency component
uint16_t *src2 = (uint16_t *)&pos[(p_prbMapElm->nRBStart * N_SC_PER_PRB) + fftsize - (nPRBs * 6)];
uint32_t local_src[p_prbMapElm->nRBSize * N_SC_PER_PRB] __attribute__((aligned(64)));
memcpy((void *)local_src, (void *)src2, neg_len * 4);
memcpy((void *)&local_src[neg_len], (void *)src1, pos_len * 4);
if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_NONE) { if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_NONE) {
payload_len = p_prbMapElm->nRBSize * N_SC_PER_PRB * 4L; payload_len = numRB * N_SC_PER_PRB * 4L;
/* convert to Network order */ /* convert to Network order */
// NOTE: ggc 11 knows how to generate AVX2 for this! // NOTE: ggc 11 knows how to generate AVX2 for this!
for (idx = 0; idx < (pos_len + neg_len) * 2; idx++) for (idx = 0; idx < (numRB * N_SC_PER_PRB) * 2; idx++)
((uint16_t *)dst16)[idx] = htons(((uint16_t *)local_src)[idx]); ((uint16_t *)dst16)[idx] = htons(((uint16_t *)local_src)[idx + startRB * N_SC_PER_PRB * 2]);
} else if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) { } else if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) {
payload_len = (3 * p_prbMapElm->iqWidth + 1) * p_prbMapElm->nRBSize; payload_len = (3 * p_prbMapElm->iqWidth + 1) * numRB;
#if defined(__i386__) || defined(__x86_64__) #if defined(__i386__) || defined(__x86_64__)
struct xranlib_compress_request bfp_com_req = {}; struct xranlib_compress_request bfp_com_req = {};
struct xranlib_compress_response bfp_com_rsp = {}; struct xranlib_compress_response bfp_com_rsp = {};
bfp_com_req.data_in = (int16_t *)local_src; uint32_t src_compr[num_totalRB * N_SC_PER_PRB] __attribute__((aligned(64)));
bfp_com_req.numRBs = p_prbMapElm->nRBSize; if (numRB == num_totalRB) {
bfp_com_req.data_in = (int16_t *)local_src;
} else {
memcpy(src_compr, local_src + (startRB * N_SC_PER_PRB), (numRB * N_SC_PER_PRB) * sizeof(*local_src));
bfp_com_req.data_in = (int16_t *)src_compr;
}
bfp_com_req.numRBs = numRB;
bfp_com_req.len = payload_len; bfp_com_req.len = payload_len;
bfp_com_req.compMethod = p_prbMapElm->compMethod; bfp_com_req.compMethod = p_prbMapElm->compMethod;
bfp_com_req.iqWidth = p_prbMapElm->iqWidth; bfp_com_req.iqWidth = p_prbMapElm->iqWidth;
@@ -672,11 +703,10 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
xranlib_compress_avx512(&bfp_com_req, &bfp_com_rsp); xranlib_compress_avx512(&bfp_com_req, &bfp_com_rsp);
#elif defined(__arm__) || defined(__aarch64__) #elif defined(__arm__) || defined(__aarch64__)
armral_bfp_compression(p_prbMapElm->iqWidth, p_prbMapElm->nRBSize, (int16_t *)local_src, (int8_t *)dst); armral_bfp_compression(p_prbMapElm->iqWidth, numRB, (int16_t *)local_src, (int8_t *)dst);
#else #else
AssertFatal(1 == 0, "BFP compression not supported on this architecture"); AssertFatal(1 == 0, "BFP compression not supported on this architecture");
#endif #endif
} else { } else {
printf("p_prbMapElm->compMethod == %d is not supported\n", p_prbMapElm->compMethod); printf("p_prbMapElm->compMethod == %d is not supported\n", p_prbMapElm->compMethod);
exit(-1); exit(-1);
@@ -690,7 +720,7 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
} }
// The tti should be updated as it increased. // The tti should be updated as it increased.
pRbMap->tti_id = tti; pPrbMap->tti_id = tti;
} else { } else {
printf("ptr ==NULL\n"); printf("ptr ==NULL\n");
radio/fhi_72/oran-config.c
+4 -4
View File
@@ -701,8 +701,8 @@ static bool set_fh_init(void *mplane_api, struct xran_fh_init *fh_init, enum xra
if (!set_fh_eaxcid_conf_mplane(&fh_init->eAxCId_conf, xran_cat, ru_session_list)) if (!set_fh_eaxcid_conf_mplane(&fh_init->eAxCId_conf, xran_cat, ru_session_list))
return false; return false;
/* maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be /* maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be
communicated in a single xRAN network layer transaction. Supported 1500 bytes and 9600 bytes (Jumbo Frame); communicated in a single xRAN network layer transaction. Based on the MTU size, xran calculates the number
xran only checks if (MTU <= 1500), therefore setting any value > 1500, xran assumes 9600 value is used */ of DL fragments (nPrbElm) needed for transmission of one symbol. */
fh_init->mtu = ru_session_list->ru_session[0].xran_mplane.mtu; // we suppose that each RU supports the same MTU size fh_init->mtu = ru_session_list->ru_session[0].xran_mplane.mtu; // we suppose that each RU supports the same MTU size
int num_ru_addr = (fh_init->io_cfg.one_vf_cu_plane) ? num_rus : 2*num_rus; int num_ru_addr = (fh_init->io_cfg.one_vf_cu_plane) ? num_rus : 2*num_rus;
@@ -724,8 +724,8 @@ static bool set_fh_init(void *mplane_api, struct xran_fh_init *fh_init, enum xra
if (!set_fh_eaxcid_conf(&fh_init->eAxCId_conf, xran_cat)) if (!set_fh_eaxcid_conf(&fh_init->eAxCId_conf, xran_cat))
return false; return false;
/* maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be /* maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be
communicated in a single xRAN network layer transaction. Supported 1500 bytes and 9600 bytes (Jumbo Frame); communicated in a single xRAN network layer transaction. Based on the MTU size, xran calculates the number
xran only checks if (MTU <= 1500), therefore setting any value > 1500, xran assumes 9600 value is used */ of DL fragments (nPrbElm) needed for transmission of one symbol. */
fh_init->mtu = *gpd(fhip, nump, ORAN_CONFIG_MTU)->uptr; fh_init->mtu = *gpd(fhip, nump, ORAN_CONFIG_MTU)->uptr;
fh_init->p_o_du_addr = NULL; // DPDK retreives DU MAC address within the xran library with rte_eth_macaddr_get() function fh_init->p_o_du_addr = NULL; // DPDK retreives DU MAC address within the xran library with rte_eth_macaddr_get() function
radio/fhi_72/oran-init.c
+1 -1
View File
@@ -92,7 +92,7 @@ static struct xran_prb_map get_xran_prb_map(const struct xran_fh_config *f, cons
.cc_id = 0, .cc_id = 0,
.ru_port_id = 0, .ru_port_id = 0,
.tti_id = 0, .tti_id = 0,
.nPrbElm = 1, .nPrbElm = 1, // represents the number of fragments on DL only; calculated in xran_init_PrbMap_from_cfg()/xran_init_PrbMap_by_symbol_from_cfg()
}; };
struct xran_prb_elm *e = &prbmap.prbMap[0]; struct xran_prb_elm *e = &prbmap.prbMap[0];
e->nStartSymb = start_sym; e->nStartSymb = start_sym;
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf
+1 -1
View File
@@ -237,7 +237,7 @@ fhi_72 = {
io_core = 1; io_core = 1;
worker_cores = (2); worker_cores = (2);
ru_addr = ("8c:1f:64:d1:10:46","8c:1f:64:d1:10:46"); ru_addr = ("8c:1f:64:d1:10:46","8c:1f:64:d1:10:46");
mtu = 9600; mtu = 9216;
fh_config = ({ fh_config = ({
T1a_cp_dl = (419, 470); T1a_cp_dl = (419, 470);
T1a_cp_ul = (285, 336); T1a_cp_ul = (285, 336);
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.4x4-das-benetel650_650.conf
+1 -1
View File
@@ -241,7 +241,7 @@ fhi_72 = {
io_core = 1; io_core = 1;
worker_cores = (2); worker_cores = (2);
ru_addr = ("8c:1f:64:d1:10:46","8c:1f:64:d1:10:46","8c:1f:64:d1:10:43","8c:1f:64:d1:10:43"); # if two VFs, set two RU MAC addresses (one per RU) ru_addr = ("8c:1f:64:d1:10:46","8c:1f:64:d1:10:46","8c:1f:64:d1:10:43","8c:1f:64:d1:10:43"); # if two VFs, set two RU MAC addresses (one per RU)
mtu = 9600; mtu = 9216;
fh_config = ( fh_config = (
# RAN650 #1 # RAN650 #1
{ {
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650.conf
+1 -1
View File
@@ -237,7 +237,7 @@ fhi_72 = {
io_core = 1; io_core = 1;
worker_cores = (2); worker_cores = (2);
ru_addr = ("8c:1f:64:d1:10:46","8c:1f:64:d1:10:46","8c:1f:64:d1:10:43","8c:1f:64:d1:10:43"); # if two VFs, set two RU MAC addresses (one per RU) ru_addr = ("8c:1f:64:d1:10:46","8c:1f:64:d1:10:46","8c:1f:64:d1:10:43","8c:1f:64:d1:10:43"); # if two VFs, set two RU MAC addresses (one per RU)
mtu = 9600; mtu = 9216;
fh_config = ( fh_config = (
# RAN650 #1 # RAN650 #1
{ {
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf
+1 -1
View File
@@ -256,7 +256,7 @@ fhi_72 = {
io_core = 1; io_core = 1;
worker_cores = (2); worker_cores = (2);
ru_addr = ("98:ae:71:04:83:e3", "98:ae:71:04:83:e3"); ru_addr = ("98:ae:71:04:83:e3", "98:ae:71:04:83:e3");
mtu = 9600; mtu = 9216;
fh_config = ({ fh_config = ({
T1a_cp_dl = (285, 470); T1a_cp_dl = (285, 470);
T1a_cp_ul = (285, 429); T1a_cp_ul = (285, 429);
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf → targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn-16b.conf
+1 -1
View File
@@ -253,7 +253,7 @@ fhi_72 = {
io_core = 1; io_core = 1;
worker_cores = (2); worker_cores = (2);
ru_addr = ("98:ae:71:04:83:e3", "98:ae:71:04:83:e3"); ru_addr = ("98:ae:71:04:83:e3", "98:ae:71:04:83:e3");
mtu = 9600; mtu = 9216;
fh_config = ({ fh_config = ({
T1a_cp_dl = (285, 470); T1a_cp_dl = (285, 470);
T1a_cp_ul = (285, 429); T1a_cp_ul = (285, 429);
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf
+1 -1
View File
@@ -255,7 +255,7 @@ fhi_72 = {
io_core = 1; io_core = 1;
worker_cores = (2); worker_cores = (2);
ru_addr = ("98:ae:71:04:83:e3", "98:ae:71:04:83:e3"); ru_addr = ("98:ae:71:04:83:e3", "98:ae:71:04:83:e3");
mtu = 9600; mtu = 9216;
fh_config = ({ fh_config = ({
T1a_cp_dl = (285, 470); T1a_cp_dl = (285, 470);
T1a_cp_ul = (285, 429); T1a_cp_ul = (285, 429);
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.2x2-benetel550-16b.conf
+274
View File
@@ -0,0 +1,274 @@
Active_gNBs = ( "gNB-OAI");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
gNB_name = "gNB-OAI";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({ mcc = 208; mnc = 99; mnc_length = 2; snssaiList = ( { sst = 1; }); });
nr_cellid = 1;
////////// Physical parameters:
pdsch_AntennaPorts_XP = 2;
pdsch_AntennaPorts_N1 = 1;
maxMIMO_layers = 2;
pusch_AntennaPorts = 2;
do_CSIRS = 1;
do_SRS = 0;
# force_UL256qam_off = 1;
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# n_TimingAdvanceOffset = 0;
# downlinkConfigCommon
#frequencyInfoDL
# center frequency = 3350.01 MHz
# selected SSB frequency = 3349.92 MHz
absoluteFrequencySSB = 623328;
dl_frequencyBand = 78;
# frequency point A = 3300.87 MHz
dl_absoluteFrequencyPointA = 620058;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 1;
dl_carrierBandwidth = 273;
#initialDownlinkBWP
#genericParameters
initialDLBWPlocationAndBandwidth = 1099; #38.101-1 Table 5.3.2-1
#
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 11;
initialDLBWPsearchSpaceZero = 0;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 1;
ul_carrierBandwidth = 273;
pMax = 23;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 1099;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 152;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 0;
preambleReceivedTargetPower = -100;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 8;
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 3;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#one (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 1,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# this is the offset between the last PRACH preamble power and the Msg3 PUSCH, 2 times the field value in dB
msg3_DeltaPreamble = 2;
p0_NominalWithGrant = -96;
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 0;
p0_nominal = -96;
ssb_PositionsInBurst_Bitmap = 0x1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 2;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 1;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 1;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7;
nrofDownlinkSymbols = 6;
nrofUplinkSlots = 2;
nrofUplinkSymbols = 4;
ssPBCH_BlockPower = 0;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ({ ipv4 = "172.21.6.5"; });
NETWORK_INTERFACES :
{
GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51";
GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 180;
pucch_TargetSNRx10 = 220;
dl_bler_target_upper = .35;
dl_bler_target_lower = .15;
ul_bler_target_upper = .35;
ul_bler_target_lower = .15;
pusch_FailureThres = 1000;
ul_max_mcs = 28;
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
prach_dtx_threshold = 100;
pucch0_dtx_threshold = 80;
pusch_dtx_threshold = 10;
max_ldpc_iterations = 15;
tx_amp_backoff_dB = 12; # needs to match O-RU configuration
L1_rx_thread_core = 8;
L1_tx_thread_core = 10;
phase_compensation = 0; # needs to match O-RU configuration
}
);
RUs = (
{
local_rf = "no";
nb_tx = 2;
nb_rx = 2;
att_tx = 0;
att_rx = 0;
bands = [78];
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
sf_extension = 0;
eNB_instances = [0];
ru_thread_core = 9;
sl_ahead = 10;
tr_preference = "raw_if4p5"; # important: activate FHI7.2
do_precoding = 0; # needs to match O-RU configuration
}
);
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level = "info";
hw_log_level = "info";
phy_log_level = "info";
mac_log_level = "info";
rlc_log_level = "info";
pdcp_log_level = "info";
rrc_log_level = "info";
ngap_log_level = "info";
f1ap_log_level = "info";
};
fhi_72 = {
dpdk_devices = ("0000:c1:11.0");
system_core = 0;
io_core = 1;
worker_cores = (2);
ru_addr = ("70:b3:d5:e1:5b:81");
mtu = 9216;
fh_config = ({
T1a_cp_dl = (419, 470);
T1a_cp_ul = (285, 336);
T1a_up = (294, 345);
Ta4 = (0, 200);
ru_config = {
iq_width = 16;
iq_width_prach = 16;
};
prach_config = {
eAxC_offset = 8;
};
});
};
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf
+1 -1
View File
@@ -255,7 +255,7 @@ fhi_72 = {
io_core = 1; io_core = 1;
worker_cores = (2); worker_cores = (2);
ru_addr = ("70:b3:d5:e1:5b:81", "70:b3:d5:e1:5b:81"); ru_addr = ("70:b3:d5:e1:5b:81", "70:b3:d5:e1:5b:81");
mtu = 9600; mtu = 9216;
fh_config = ({ fh_config = ({
T1a_cp_dl = (419, 470); T1a_cp_dl = (419, 470);
T1a_cp_ul = (285, 336); T1a_cp_ul = (285, 336);
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf
+1 -1
View File
@@ -257,7 +257,7 @@ fhi_72 = {
io_core = 1; io_core = 1;
worker_cores = (2); worker_cores = (2);
ru_addr = ("70:b3:d5:e1:5b:81", "70:b3:d5:e1:5b:81"); ru_addr = ("70:b3:d5:e1:5b:81", "70:b3:d5:e1:5b:81");
mtu = 9600; mtu = 9216;
fh_config = ({ fh_config = ({
T1a_cp_dl = (419, 470); T1a_cp_dl = (419, 470);
T1a_cp_ul = (285, 336); T1a_cp_ul = (285, 336);
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-foxconn.conf
+1 -1
View File
@@ -254,7 +254,7 @@ fhi_72 = {
io_core = 1; io_core = 1;
worker_cores = (2); worker_cores = (2);
ru_addr = ("6c:ad:ad:00:04:dc", "6c:ad:ad:00:04:dc"); ru_addr = ("6c:ad:ad:00:04:dc", "6c:ad:ad:00:04:dc");
mtu = 9600; mtu = 9216;
fh_config = ({ fh_config = ({
T1a_cp_dl = (285, 470); T1a_cp_dl = (285, 470);
T1a_cp_ul = (285, 429); T1a_cp_ul = (285, 429);
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf
+1 -1
View File
@@ -254,7 +254,7 @@ fhi_72 = {
io_core = 1; io_core = 1;
worker_cores = (2); worker_cores = (2);
ru_addr = ("e8:c7:4f:25:81:b3", "e8:c7:4f:25:81:b3"); ru_addr = ("e8:c7:4f:25:81:b3", "e8:c7:4f:25:81:b3");
mtu = 9600; # note: 1500 works as well, with both E and F releases mtu = 9216; # note: 1500 works as well, with both E and F releases
fh_config = ({ fh_config = ({
T1a_cp_dl = (285, 429); T1a_cp_dl = (285, 429);
T1a_cp_ul = (285, 429); T1a_cp_ul = (285, 429);