Implementation of functions required for the BWP switching based on RRC method
This commit is contained in:
@@ -615,6 +615,8 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
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LOG_I(NR_MAC,"Modified UE_id %d/%x with CellGroup\n",UE_id,rnti);
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LOG_I(NR_MAC,"Modified UE_id %d/%x with CellGroup\n",UE_id,rnti);
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process_CellGroup(CellGroup,&UE_info->UE_sched_ctrl[UE_id]);
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process_CellGroup(CellGroup,&UE_info->UE_sched_ctrl[UE_id]);
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NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
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NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
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sched_ctrl->update_pdsch_ps = true;
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sched_ctrl->update_pusch_ps = true;
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const NR_PDSCH_ServingCellConfig_t *pdsch = servingCellConfig ? servingCellConfig->pdsch_ServingCellConfig->choice.setup : NULL;
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const NR_PDSCH_ServingCellConfig_t *pdsch = servingCellConfig ? servingCellConfig->pdsch_ServingCellConfig->choice.setup : NULL;
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if (sched_ctrl->available_dl_harq.len == 0) {
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if (sched_ctrl->available_dl_harq.len == 0) {
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// add all available DL HARQ processes for this UE in SA
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// add all available DL HARQ processes for this UE in SA
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@@ -346,6 +346,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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LOG_I(NR_MAC,"Frame.Slot %d.%d\n%s\n",frame,slot,stats_output);
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LOG_I(NR_MAC,"Frame.Slot %d.%d\n%s\n",frame,slot,stats_output);
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}
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}
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// This schedules the BWP switching
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schedule_nr_bwp_switch(module_idP, frame, slot);
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// This schedules MIB
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// This schedules MIB
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schedule_nr_mib(module_idP, frame, slot);
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schedule_nr_mib(module_idP, frame, slot);
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@@ -500,14 +500,14 @@ void nr_store_dlsch_buffer(module_id_t module_id,
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0);
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0);
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stop_meas(&RC.nrmac[module_id]->rlc_status_ind);
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stop_meas(&RC.nrmac[module_id]->rlc_status_ind);
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}
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}
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if(sched_ctrl->rlc_status[DL_SCH_LCID_DCCH].bytes_in_buffer > 0){
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if(sched_ctrl->rlc_status[DL_SCH_LCID_DCCH].bytes_in_buffer > 0) {
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lcid = DL_SCH_LCID_DCCH;
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lcid = DL_SCH_LCID_DCCH;
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}
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} else if (sched_ctrl->rlc_status[DL_SCH_LCID_DCCH1].bytes_in_buffer > 0) {
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else if (sched_ctrl->rlc_status[DL_SCH_LCID_DCCH1].bytes_in_buffer > 0)
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{
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lcid = DL_SCH_LCID_DCCH1;
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lcid = DL_SCH_LCID_DCCH1;
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}else{
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} else if (sched_ctrl->bwp_switch_info.bwp_switch_state != BWP_SWITCH_RUNNING) {
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lcid = DL_SCH_LCID_DTCH;
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lcid = DL_SCH_LCID_DTCH;
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} else {
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continue;
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}
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}
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sched_ctrl->num_total_bytes += sched_ctrl->rlc_status[lcid].bytes_in_buffer;
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sched_ctrl->num_total_bytes += sched_ctrl->rlc_status[lcid].bytes_in_buffer;
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@@ -577,8 +577,10 @@ bool allocate_dl_retransmission(module_id_t module_id,
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}
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}
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/* check whether we need to switch the TDA allocation since the last
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/* check whether we need to switch the TDA allocation since the last
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* (re-)transmission */
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* (re-)transmission */
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if (ps->time_domain_allocation != tda)
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if (ps->time_domain_allocation != tda || sched_ctrl->update_pdsch_ps) {
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nr_set_pdsch_semi_static(scc, cg, sched_ctrl->active_bwp, bwpd, tda, f, ps);
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nr_set_pdsch_semi_static(scc, cg, sched_ctrl->active_bwp, bwpd, tda, f, ps);
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sched_ctrl->update_pdsch_ps = false;
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}
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} else {
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} else {
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/* the retransmission will use a different time domain allocation, check
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/* the retransmission will use a different time domain allocation, check
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* that we have enough resources */
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* that we have enough resources */
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@@ -838,8 +840,10 @@ void pf_dl(module_id_t module_id,
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NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
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NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
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NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
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NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
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const long f = (sched_ctrl->active_bwp || bwpd) ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
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const long f = (sched_ctrl->active_bwp || bwpd) ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
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if (ps->time_domain_allocation != tda)
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if (ps->time_domain_allocation != tda || sched_ctrl->update_pdsch_ps) {
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nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, f, ps);
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nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, f, ps);
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sched_ctrl->update_pdsch_ps = false;
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}
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const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
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const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
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// Freq-demain allocation
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// Freq-demain allocation
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@@ -964,6 +968,70 @@ nr_pp_impl_dl nr_init_fr1_dlsch_preprocessor(module_id_t module_id, int CC_id)
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return nr_fr1_dlsch_preprocessor;
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return nr_fr1_dlsch_preprocessor;
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}
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}
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void nr_bwp_switch(module_id_t module_id,
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frame_t frame,
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sub_frame_t slot,
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int UE_id,
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int bwp_id) {
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NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
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NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
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switch(sched_ctrl->bwp_switch_info.bwp_switch_state) {
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case BWP_SWITCH_TO_START:
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LOG_W(NR_MAC,"(%d.%d) [UE_id %d] Schedule BWP switch from bwp_id %ld to %d\n",
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frame, slot, UE_id, UE_info->UE_sched_ctrl[UE_id].active_bwp->bwp_Id, bwp_id);
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sched_ctrl->bwp_switch_info.bwp_switch_timer = 0;
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sched_ctrl->bwp_switch_info.bwp_switch_state = BWP_SWITCH_RUNNING;
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nr_mac_rrc_bwp_switch_req(module_id, frame, slot, UE_info->rnti[UE_id], bwp_id);
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break;
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case BWP_SWITCH_RUNNING:
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sched_ctrl->bwp_switch_info.bwp_switch_timer++;
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if(sched_ctrl->bwp_switch_info.bwp_switch_timer == sched_ctrl->bwp_switch_info.bwp_switch_delay) {
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const NR_ServingCellConfig_t *servingCellConfig = UE_info->CellGroup[UE_id] ? UE_info->CellGroup[UE_id]->spCellConfig->spCellConfigDedicated : NULL;
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const struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = servingCellConfig ? servingCellConfig->downlinkBWP_ToAddModList : NULL;
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const int bwp_id = servingCellConfig && servingCellConfig->firstActiveDownlinkBWP_Id ?
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*servingCellConfig->firstActiveDownlinkBWP_Id : 0;
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sched_ctrl->active_bwp = bwpList && bwp_id > 0 ? bwpList->list.array[bwp_id - 1] : NULL;
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const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = servingCellConfig ? servingCellConfig->uplinkConfig->uplinkBWP_ToAddModList : NULL;
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const int ubwp_id = servingCellConfig && servingCellConfig->uplinkConfig && servingCellConfig->uplinkConfig->firstActiveUplinkBWP_Id ?
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*servingCellConfig->uplinkConfig->firstActiveUplinkBWP_Id : 0;
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sched_ctrl->active_ubwp = ubwpList && ubwp_id > 0 ? ubwpList->list.array[ubwp_id - 1] : NULL;
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sched_ctrl->bwp_switch_info.bwp_switch_state = BWP_SWITCH_INACTIVE;
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}
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break;
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case BWP_SWITCH_INACTIVE:
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break;
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default:
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AssertFatal(1==0,"Invalid bwp switch state\n");
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break;
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}
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}
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void schedule_nr_bwp_switch(module_id_t module_id,
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frame_t frame,
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sub_frame_t slot) {
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NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
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const NR_list_t *UE_list = &UE_info->list;
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// TODO: Implementation of a algorithm to perform:
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// - the BWP switch trigger: sched_ctrl->bwp_switch_info.bwp_switch_state = BWP_SWITCH_TO_START
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// - the BWP selection: sched_ctrl->bwp_switch_info.next_bwp = bwp_id
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for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
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NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
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if(sched_ctrl->bwp_switch_info.bwp_switch_state > BWP_SWITCH_INACTIVE) {
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nr_bwp_switch(module_id, frame, slot, UE_id, sched_ctrl->bwp_switch_info.next_bwp);
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}
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}
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}
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void nr_schedule_ue_spec(module_id_t module_id,
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void nr_schedule_ue_spec(module_id_t module_id,
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frame_t frame,
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frame_t frame,
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sub_frame_t slot) {
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sub_frame_t slot) {
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@@ -2076,6 +2076,11 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG
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scc,
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scc,
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genericParameters,
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genericParameters,
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NULL);
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NULL);
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sched_ctrl->bwp_switch_info.current_bwp = bwp_id;
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sched_ctrl->bwp_switch_info.next_bwp = -1;
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sched_ctrl->bwp_switch_info.bwp_switch_timer = 0;
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sched_ctrl->bwp_switch_info.bwp_switch_state = BWP_SWITCH_INACTIVE;
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sched_ctrl->bwp_switch_info.bwp_switch_delay = 40;
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const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = servingCellConfig ? servingCellConfig->uplinkConfig->uplinkBWP_ToAddModList : NULL;
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const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = servingCellConfig ? servingCellConfig->uplinkConfig->uplinkBWP_ToAddModList : NULL;
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if (ubwpList) AssertFatal(ubwpList->list.count <= NR_MAX_NUM_BWP,
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if (ubwpList) AssertFatal(ubwpList->list.count <= NR_MAX_NUM_BWP,
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"uplinkBWP_ToAddModList has %d BWP!\n",
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"uplinkBWP_ToAddModList has %d BWP!\n",
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@@ -983,8 +983,11 @@ bool allocate_ul_retransmission(module_id_t module_id,
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if (ps->time_domain_allocation != tda
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if (ps->time_domain_allocation != tda
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|| ps->dci_format != dci_format
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|| ps->dci_format != dci_format
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|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data)
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|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data
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|| sched_ctrl->update_pusch_ps) {
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nr_set_pusch_semi_static(scc, sched_ctrl->active_ubwp, ubwpd, dci_format, tda, num_dmrs_cdm_grps_no_data, ps);
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nr_set_pusch_semi_static(scc, sched_ctrl->active_ubwp, ubwpd, dci_format, tda, num_dmrs_cdm_grps_no_data, ps);
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sched_ctrl->update_pusch_ps = false;
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}
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LOG_D(NR_MAC, "%s(): retransmission keeping TDA %d and TBS %d\n", __func__, tda, retInfo->tb_size);
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LOG_D(NR_MAC, "%s(): retransmission keeping TDA %d and TBS %d\n", __func__, tda, retInfo->tb_size);
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} else {
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} else {
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/* the retransmission will use a different time domain allocation, check
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/* the retransmission will use a different time domain allocation, check
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@@ -1163,6 +1166,10 @@ void pf_ul(module_id_t module_id,
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if (B == 0 && !do_sched)
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if (B == 0 && !do_sched)
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continue;
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continue;
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if(sched_ctrl->bwp_switch_info.bwp_switch_state == BWP_SWITCH_RUNNING) {
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continue;
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}
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/* Schedule UE on SR or UL inactivity and no data (otherwise, will be scheduled
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/* Schedule UE on SR or UL inactivity and no data (otherwise, will be scheduled
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* based on data to transmit) */
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* based on data to transmit) */
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if (B == 0 && do_sched) {
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if (B == 0 && do_sched) {
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@@ -1220,8 +1227,11 @@ void pf_ul(module_id_t module_id,
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const int tda = sched_ctrl->active_ubwp ? nrmac->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id][slot] : 0;
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const int tda = sched_ctrl->active_ubwp ? nrmac->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id][slot] : 0;
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if (ps->time_domain_allocation != tda
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if (ps->time_domain_allocation != tda
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|| ps->dci_format != dci_format
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|| ps->dci_format != dci_format
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|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data)
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|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data
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|| sched_ctrl->update_pusch_ps) {
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nr_set_pusch_semi_static(scc, sched_ctrl->active_ubwp, ubwpd, dci_format, tda, num_dmrs_cdm_grps_no_data, ps);
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nr_set_pusch_semi_static(scc, sched_ctrl->active_ubwp, ubwpd, dci_format, tda, num_dmrs_cdm_grps_no_data, ps);
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sched_ctrl->update_pusch_ps = false;
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}
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NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
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NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
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sched_pusch->mcs = 9;
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sched_pusch->mcs = 9;
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update_ul_ue_R_Qm(sched_pusch, ps);
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update_ul_ue_R_Qm(sched_pusch, ps);
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@@ -1337,8 +1347,11 @@ void pf_ul(module_id_t module_id,
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const int tda = sched_ctrl->active_ubwp ? nrmac->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id][slot] : 0;
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const int tda = sched_ctrl->active_ubwp ? nrmac->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id][slot] : 0;
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if (ps->time_domain_allocation != tda
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if (ps->time_domain_allocation != tda
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|| ps->dci_format != dci_format
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|| ps->dci_format != dci_format
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|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data)
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|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data
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|| sched_ctrl->update_pusch_ps) {
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nr_set_pusch_semi_static(scc, sched_ctrl->active_ubwp, ubwpd, dci_format, tda, num_dmrs_cdm_grps_no_data, ps);
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nr_set_pusch_semi_static(scc, sched_ctrl->active_ubwp, ubwpd, dci_format, tda, num_dmrs_cdm_grps_no_data, ps);
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sched_ctrl->update_pusch_ps = false;
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}
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update_ul_ue_R_Qm(sched_pusch, ps);
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update_ul_ue_R_Qm(sched_pusch, ps);
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/* Calculate the current scheduling bytes and the necessary RBs */
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/* Calculate the current scheduling bytes and the necessary RBs */
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@@ -64,6 +64,10 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
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void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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frame_t frame_rxP, sub_frame_t slot_rxP);
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frame_t frame_rxP, sub_frame_t slot_rxP);
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void schedule_nr_bwp_switch(module_id_t module_id,
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frame_t frame,
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sub_frame_t slot);
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/* \brief main DL scheduler function. Calls a preprocessor to decide on
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/* \brief main DL scheduler function. Calls a preprocessor to decide on
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* resource allocation, then "post-processes" resource allocation (nFAPI
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* resource allocation, then "post-processes" resource allocation (nFAPI
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* messages, statistics, HARQ handling, CEs, ... */
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* messages, statistics, HARQ handling, CEs, ... */
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@@ -551,6 +551,20 @@ typedef struct NR_UE_ul_harq {
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NR_sched_pusch_t sched_pusch;
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NR_sched_pusch_t sched_pusch;
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} NR_UE_ul_harq_t;
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} NR_UE_ul_harq_t;
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typedef enum {
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BWP_SWITCH_INACTIVE = 0,
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BWP_SWITCH_TO_START,
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BWP_SWITCH_RUNNING
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} NR_BWP_switch_states_t;
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typedef struct NR_BWP_switch_info {
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NR_BWP_Id_t current_bwp;
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NR_BWP_Id_t next_bwp;
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int bwp_switch_timer;
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uint8_t bwp_switch_delay;
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NR_BWP_switch_states_t bwp_switch_state;
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} NR_BWP_switch_info_t;
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/*! \brief scheduling control information set through an API */
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/*! \brief scheduling control information set through an API */
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#define MAX_CSI_REPORTS 48
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#define MAX_CSI_REPORTS 48
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typedef struct {
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typedef struct {
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@@ -558,6 +572,10 @@ typedef struct {
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NR_BWP_Downlink_t *active_bwp;
|
NR_BWP_Downlink_t *active_bwp;
|
||||||
/// the currently active BWP in UL
|
/// the currently active BWP in UL
|
||||||
NR_BWP_Uplink_t *active_ubwp;
|
NR_BWP_Uplink_t *active_ubwp;
|
||||||
|
|
||||||
|
/// the state of bwp switch procedure
|
||||||
|
NR_BWP_switch_info_t bwp_switch_info;
|
||||||
|
|
||||||
/// CCE index and aggregation, should be coherent with cce_list
|
/// CCE index and aggregation, should be coherent with cce_list
|
||||||
NR_SearchSpace_t *search_space;
|
NR_SearchSpace_t *search_space;
|
||||||
NR_ControlResourceSet_t *coreset;
|
NR_ControlResourceSet_t *coreset;
|
||||||
@@ -624,7 +642,8 @@ typedef struct {
|
|||||||
int ul_failure;
|
int ul_failure;
|
||||||
struct CSI_Report CSI_report[MAX_CSI_REPORTS];
|
struct CSI_Report CSI_report[MAX_CSI_REPORTS];
|
||||||
bool SR;
|
bool SR;
|
||||||
|
bool update_pdsch_ps;
|
||||||
|
bool update_pusch_ps;
|
||||||
/// information about every HARQ process
|
/// information about every HARQ process
|
||||||
NR_UE_harq_t harq_processes[NR_MAX_NB_HARQ_PROCESSES];
|
NR_UE_harq_t harq_processes[NR_MAX_NB_HARQ_PROCESSES];
|
||||||
/// HARQ processes that are free
|
/// HARQ processes that are free
|
||||||
|
|||||||
@@ -304,6 +304,19 @@ uint16_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
int8_t nr_mac_rrc_bwp_switch_req(const module_id_t module_idP,
|
||||||
|
const frame_t frameP,
|
||||||
|
const sub_frame_t sub_frameP,
|
||||||
|
const rnti_t rntiP,
|
||||||
|
const int bwp_id) {
|
||||||
|
|
||||||
|
struct rrc_gNB_ue_context_s *ue_context_p = rrc_gNB_get_ue_context(RC.nrrrc[module_idP], rntiP);
|
||||||
|
|
||||||
|
protocol_ctxt_t ctxt;
|
||||||
|
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, GNB_FLAG_YES, rntiP, frameP, sub_frameP, 0);
|
||||||
|
nr_rrc_reconfiguration_req(ue_context_p, &ctxt, bwp_id);
|
||||||
|
}
|
||||||
|
|
||||||
int8_t nr_mac_rrc_data_ind(const module_id_t module_idP,
|
int8_t nr_mac_rrc_data_ind(const module_id_t module_idP,
|
||||||
const int CC_id,
|
const int CC_id,
|
||||||
const frame_t frameP,
|
const frame_t frameP,
|
||||||
|
|||||||
@@ -2493,7 +2493,9 @@ int16_t do_RRCReconfiguration(
|
|||||||
enc_rval.failed_type->name, enc_rval.encoded);
|
enc_rval.failed_type->name, enc_rval.encoded);
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)cellGroupConfig);
|
if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) {
|
||||||
|
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void *) cellGroupConfig);
|
||||||
|
}
|
||||||
ie->nonCriticalExtension->masterCellGroup = calloc(1,sizeof(OCTET_STRING_t));
|
ie->nonCriticalExtension->masterCellGroup = calloc(1,sizeof(OCTET_STRING_t));
|
||||||
|
|
||||||
ie->nonCriticalExtension->masterCellGroup->buf = masterCellGroup_buf;
|
ie->nonCriticalExtension->masterCellGroup->buf = masterCellGroup_buf;
|
||||||
@@ -2502,9 +2504,9 @@ int16_t do_RRCReconfiguration(
|
|||||||
|
|
||||||
dl_dcch_msg.message.choice.c1->choice.rrcReconfiguration->criticalExtensions.choice.rrcReconfiguration = ie;
|
dl_dcch_msg.message.choice.c1->choice.rrcReconfiguration->criticalExtensions.choice.rrcReconfiguration = ie;
|
||||||
|
|
||||||
//if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) {
|
if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) {
|
||||||
xer_fprint(stdout, &asn_DEF_NR_DL_DCCH_Message, (void *)&dl_dcch_msg);
|
xer_fprint(stdout, &asn_DEF_NR_DL_DCCH_Message, (void *)&dl_dcch_msg);
|
||||||
//}
|
}
|
||||||
|
|
||||||
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_DL_DCCH_Message,
|
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_DL_DCCH_Message,
|
||||||
NULL,
|
NULL,
|
||||||
|
|||||||
@@ -178,6 +178,12 @@ int
|
|||||||
nr_rrc_mac_remove_ue(module_id_t mod_idP,
|
nr_rrc_mac_remove_ue(module_id_t mod_idP,
|
||||||
rnti_t rntiP);
|
rnti_t rntiP);
|
||||||
|
|
||||||
|
int8_t nr_mac_rrc_bwp_switch_req(const module_id_t module_idP,
|
||||||
|
const frame_t frameP,
|
||||||
|
const sub_frame_t sub_frameP,
|
||||||
|
const rnti_t rntiP,
|
||||||
|
const int bwp_id);
|
||||||
|
|
||||||
int8_t nr_mac_rrc_data_ind(
|
int8_t nr_mac_rrc_data_ind(
|
||||||
const module_id_t module_idP,
|
const module_id_t module_idP,
|
||||||
const int CC_id,
|
const int CC_id,
|
||||||
@@ -191,6 +197,10 @@ int8_t nr_mac_rrc_data_ind(
|
|||||||
const boolean_t brOption
|
const boolean_t brOption
|
||||||
);
|
);
|
||||||
|
|
||||||
|
int nr_rrc_reconfiguration_req(rrc_gNB_ue_context_t *const ue_context_pP,
|
||||||
|
protocol_ctxt_t *const ctxt_pP,
|
||||||
|
const int bwp_id);
|
||||||
|
|
||||||
int nr_rrc_gNB_decode_ccch(protocol_ctxt_t *const ctxt_pP,
|
int nr_rrc_gNB_decode_ccch(protocol_ctxt_t *const ctxt_pP,
|
||||||
const uint8_t *buffer,
|
const uint8_t *buffer,
|
||||||
int buffer_length,
|
int buffer_length,
|
||||||
|
|||||||
@@ -1775,6 +1775,44 @@ rrc_gNB_process_RRCConnectionReestablishmentComplete(
|
|||||||
}
|
}
|
||||||
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
||||||
|
|
||||||
|
int nr_rrc_reconfiguration_req(rrc_gNB_ue_context_t *const ue_context_pP,
|
||||||
|
protocol_ctxt_t *const ctxt_pP,
|
||||||
|
const int bwp_id) {
|
||||||
|
|
||||||
|
uint8_t buffer[RRC_BUF_SIZE];
|
||||||
|
memset(buffer, 0, sizeof(buffer));
|
||||||
|
uint8_t xid = rrc_gNB_get_next_transaction_identifier(ctxt_pP->module_id);
|
||||||
|
|
||||||
|
NR_CellGroupConfig_t *masterCellGroup = ue_context_pP->ue_context.masterCellGroup;
|
||||||
|
*masterCellGroup->spCellConfig->spCellConfigDedicated->firstActiveDownlinkBWP_Id = bwp_id;
|
||||||
|
*masterCellGroup->spCellConfig->spCellConfigDedicated->defaultDownlinkBWP_Id = bwp_id;
|
||||||
|
*masterCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id = bwp_id;
|
||||||
|
|
||||||
|
uint16_t size = do_RRCReconfiguration(ctxt_pP,
|
||||||
|
buffer,
|
||||||
|
sizeof(buffer),
|
||||||
|
xid,
|
||||||
|
NULL,
|
||||||
|
NULL,
|
||||||
|
NULL,
|
||||||
|
NULL,
|
||||||
|
NULL,
|
||||||
|
NULL,
|
||||||
|
NULL,
|
||||||
|
NULL,
|
||||||
|
masterCellGroup);
|
||||||
|
|
||||||
|
nr_rrc_data_req(ctxt_pP,
|
||||||
|
DCCH,
|
||||||
|
rrc_gNB_mui++,
|
||||||
|
SDU_CONFIRM_NO,
|
||||||
|
size,
|
||||||
|
buffer,
|
||||||
|
PDCP_TRANSMISSION_MODE_CONTROL);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
/*------------------------------------------------------------------------------*/
|
/*------------------------------------------------------------------------------*/
|
||||||
int nr_rrc_gNB_decode_ccch(protocol_ctxt_t *const ctxt_pP,
|
int nr_rrc_gNB_decode_ccch(protocol_ctxt_t *const ctxt_pP,
|
||||||
const uint8_t *buffer,
|
const uint8_t *buffer,
|
||||||
|
|||||||
Reference in New Issue
Block a user