Merge branch 'nr_pdcch_updates' into 'develop-nr'
Nr pdcch updates See merge request oai/openairinterface5g!514
This commit is contained in:
Florian Kaltenberger
@@ -1160,7 +1160,6 @@ uint32_t polar_decoder_int16(int16_t *input,
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out[0]=Ar;
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return(crc^rxcrc);
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@@ -54,13 +54,19 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
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//int i;
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unsigned int frame_length_samples = frame_parms->samples_per_subframe * 10;
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unsigned int rx_offset;
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NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns>>1]][0];
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uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset+((int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB)+pdcch_vars->coreset[0].rb_offset)*NR_NB_SC_PER_RB;
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uint16_t nb_rb_coreset = 24;
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uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset+516;
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NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns]][0];
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uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset;//+((int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB)+pdcch_vars->coreset[0].rb_offset)*NR_NB_SC_PER_RB;
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uint16_t nb_rb_coreset = 0;
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uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset;//+516;
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uint16_t nb_rb_pdsch = 50;
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uint8_t p=0;
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uint8_t l0 = 2;
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uint8_t l0 = pdcch_vars->coreset[0].duration;
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uint64_t coreset_freq_dom = pdcch_vars->coreset[0].frequencyDomainResources;
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for (int i = 0; i < 45; i++) {
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if (((coreset_freq_dom & 0x1FFFFFFFFFFF) >> i) & 0x1) nb_rb_coreset++;
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}
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nb_rb_coreset = 6 * nb_rb_coreset;
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//printf("corset duration %d nb_rb_coreset %d\n", l0, nb_rb_coreset);
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void (*dft)(int16_t *,int16_t *, int);
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int tmp_dft_in[8192] __attribute__ ((aligned (32))); // This is for misalignment issues for 6 and 15 PRBs
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@@ -104,9 +110,9 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
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}
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if (no_prefix) {
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slot_offset = frame_parms->ofdm_symbol_size * (frame_parms->symbols_per_slot*frame_parms->slots_per_subframe) * (Ns>>1);
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slot_offset = frame_parms->ofdm_symbol_size * (frame_parms->symbols_per_slot) * (Ns);
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} else {
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slot_offset = (frame_parms->samples_per_subframe) * (Ns>>1);
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slot_offset = (frame_parms->samples_per_slot) * (Ns);
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}
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/*if (l<0 || l>=7-frame_parms->Ncp) {
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@@ -122,7 +128,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
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for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
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memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
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memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
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rx_offset = sample_offset + slot_offset + nb_prefix_samples0 - SOFFSET;
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// Align with 256 bit
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@@ -130,7 +136,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
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#ifdef DEBUG_FEP
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// if (ue->frame <100)
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/*LOG_I(PHY,*/printf("slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx,Ns, symbol,
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/*LOG_I(PHY,*/printf("slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns)&1].frame_rx,Ns, symbol,
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nb_prefix_samples,nb_prefix_samples0,slot_offset,sample_offset,rx_offset,frame_length_samples);
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#endif
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@@ -146,14 +152,14 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
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(void *)&common_vars->rxdata[aa][rx_offset % frame_length_samples],
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frame_parms->ofdm_symbol_size*sizeof(int));
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dft((int16_t *)tmp_dft_in,
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(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
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(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
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} else { // use dft input from RX buffer directly
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#if UE_TIMING_TRACE
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start_meas(&ue->rx_dft_stats);
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#endif
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dft((int16_t *)&common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
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(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
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(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
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#if UE_TIMING_TRACE
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stop_meas(&ue->rx_dft_stats);
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#endif
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@@ -175,11 +181,11 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
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(void *)&common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
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frame_parms->ofdm_symbol_size*sizeof(int));
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dft((int16_t *)tmp_dft_in,
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(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
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(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
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} else { // use dft input from RX buffer directly
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dft((int16_t *)&common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
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(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
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(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
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}
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#if UE_TIMING_TRACE
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stop_meas(&ue->rx_dft_stats);
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@@ -32,6 +32,7 @@
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//#define NR_PBCH_DMRS_LENGTH_DWORD 5
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//#define NR_PBCH_DMRS_LENGTH 144
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//#define DEBUG_PDCCH
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#include "refsig_defs_ue.h"
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#include "PHY/defs_nr_UE.h"
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@@ -20,7 +20,7 @@
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*/
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/*! \file PHY/NR_TRANSPORT/nr_dci.c
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* \brief Implements DCI encoding and PDCCH TX procedures (38.212/38.213/38.214). V15.2.0 2018-06.
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* \brief Implements DCI encoding and PDCCH TX procedures (38.212/38.213/38.214). V15.4.0 2019-01.
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* \author Guy De Souza
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* \date 2018
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* \version 0.1
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@@ -35,7 +35,6 @@
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//#define DEBUG_PDCCH_DMRS
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//#define DEBUG_DCI
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//#define DEBUG_CHANNEL_CODING
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#define PDCCH_TEST_POLAR_TEMP_FIX
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extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
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@@ -154,7 +153,7 @@ void nr_pdcch_scrambling(uint32_t *in,
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}
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}
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(*out) ^= ((((*in)>>(i&0x1f))&1) ^ ((s>>(i&0x1f))&1))<<(i&0x1f);
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// printf("nr_pdcch_scrambling: in %d => out %d\n",((*in)>>(i&0x1f))&1,((*out)>>(i&0x1f))&1);
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//printf("nr_pdcch_scrambling: in %d seq 0x%08x => out %d\n",((*in)>>(i&0x1f))&1,s,((*out)>>(i&0x1f))&1);
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}
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}
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@@ -169,8 +168,10 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
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{
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int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1]; // 3 for the max coreset duration
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uint8_t idx=0;
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//uint16_t a;
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uint32_t dmrs_seq[NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD];
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uint16_t dmrs_offset=0;
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uint16_t cset_start_sc;
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uint8_t cset_start_symb, cset_nsymb;
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int k,l,k_prime,dci_idx, dmrs_idx;
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nr_cce_t cce;
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nr_reg_t reg;
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@@ -179,62 +180,88 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
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/*First iteration: single DCI*/
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NR_gNB_DCI_ALLOC_t dci_alloc = pdcch_vars.dci_alloc[0];
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nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params = dci_alloc.pdcch_params;
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uint16_t dmrs_length = dci_alloc.L*36; //2(QPSK)*3(per RB)*6(REG per CCE)
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uint16_t encoded_length = dci_alloc.L*108; //2(QPSK)*9(per RB)*6(REG per CCE)
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/*The coreset is initialised
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* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset
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* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0
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* or the rb_offset for other coresets
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* in time: by its first slot and its first symbol*/
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uint16_t cset_start_sc = frame_parms.first_carrier_offset + ((int)floor(frame_parms.ssb_start_subcarrier/NR_NB_SC_PER_RB)+pdcch_params.rb_offset)*NR_NB_SC_PER_RB;
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// uint8_t cset_start_symb = pdcch_params.first_slot*frame_parms.symbols_per_slot + pdcch_params.first_symbol;
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uint8_t cset_start_symb = pdcch_params.first_symbol;
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uint8_t cset_nsymb = pdcch_params.n_symb;
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if (pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_MIB_SIB1){
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cset_start_sc = frame_parms.first_carrier_offset + (frame_parms.ssb_start_subcarrier/NR_NB_SC_PER_RB +
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pdcch_params.rb_offset)*NR_NB_SC_PER_RB;
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}
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else
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cset_start_sc = frame_parms.first_carrier_offset + pdcch_params.rb_offset*NR_NB_SC_PER_RB;
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cset_start_symb = pdcch_params.first_symbol;
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cset_nsymb = pdcch_params.n_symb;
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dci_idx = 0;
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LOG_I(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb);
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// DMRS length is per OFDM symbol
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uint16_t dmrs_length = (pdcch_params.precoder_granularity == NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS)?
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(pdcch_params.n_rb*6) : (dci_alloc.L*36/cset_nsymb); //2(QPSK)*3(per RB)*6(REG per CCE)
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uint16_t encoded_length = dci_alloc.L*108; //2(QPSK)*9(per RB)*6(REG per CCE)
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LOG_I(PHY, "DMRS length per symbol %d\t DCI encoded length %d\n", dmrs_length, encoded_length);
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/// DMRS QPSK modulation
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/*There is a need to shift from which index the pregenerated DMRS sequence is used
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* see 38211 r15.2.0 section 7.4.1.3.2: assumption is the reference point for k refers to the DMRS sequence*/
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if (pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
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gold_pdcch_dmrs += ((int)floor(frame_parms.ssb_start_subcarrier/NR_NB_SC_PER_RB)+pdcch_params.rb_offset)*3/32;
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if (pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG) {
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for (int symb=cset_start_symb; symb<cset_start_symb + pdcch_params.n_symb; symb++)
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gold_pdcch_dmrs[symb] += (pdcch_params.rb_offset*3)>>5;
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dmrs_offset = (pdcch_params.rb_offset*3)&0x1f;
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LOG_I(PHY, "PDCCH DMRS offset %d\n", dmrs_offset);
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}
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for (int symb=cset_start_symb; symb<cset_start_symb + pdcch_params.n_symb; symb++) {
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for (int i=0; i<dmrs_length>>1; i++) {
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idx = ((((gold_pdcch_dmrs[symb][(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((gold_pdcch_dmrs[symb][((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
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mod_dmrs[symb][i<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
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mod_dmrs[symb][(i<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
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#ifdef DEBUG_PDCCH_DMRS
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printf("symb %d i %d idx %d gold seq %u b0-b1 %d-%d mod_dmrs %d %d\n", symb, i, idx, gold_pdcch_dmrs[symb][(i<<1)>>5],
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(((gold_pdcch_dmrs[symb][(i<<1)>>5])>>((i<<1)&0x1f))&1), (((gold_pdcch_dmrs[symb][((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1),
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mod_dmrs[symb][(i<<1)], mod_dmrs[symb][(i<<1)+1]);
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#endif
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if (dmrs_offset) {
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// a non zero offset requires the DMRS sequence to be rearranged
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memset(dmrs_seq,0, NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
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for (int i=0; i<dmrs_length; i++) {
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dmrs_seq[(i>>5)] |= ((gold_pdcch_dmrs[symb][(i+dmrs_offset)>>5]>>((i+dmrs_offset)&0x1f))&1)<<(i&0x1f);
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#ifdef DEBUG_PDCCH_DMRS
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//printf("out 0x%08x in 0x%08x \n", dmrs_seq[(i>>5)], gold_pdcch_dmrs[symb][(i+dmrs_offset)>>5]);
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#endif
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}
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nr_modulation(dmrs_seq, dmrs_length, MOD_QPSK, mod_dmrs[symb]);
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}
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else
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nr_modulation(gold_pdcch_dmrs[symb], dmrs_length, MOD_QPSK, mod_dmrs[symb]);
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#ifdef DEBUG_PDCCH_DMRS
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for (int i=0; i<dmrs_length>>1; i++)
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if (dmrs_offset)
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printf("symb %d i %d gold seq 0x%08x mod_dmrs %d %d\n", symb, i, dmrs_seq[i>>5],
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mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] );
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else
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printf("symb %d i %d gold seq 0x%08x mod_dmrs %d %d\n", symb, i,
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gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] );
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#endif
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}
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/// DCI payload processing
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// CRC attachment + Scrambling + Channel coding + Rate matching
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uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
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uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? ((pdcch_params.scrambling_id)?pdcch_params.rnti:0) : 0;
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uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
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//#ifdef PDCCH_TEST_POLAR_TEMP_FIX
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// nr_polar_init(¤tPtr, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
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// t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
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//#else
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uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.rnti:0;
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uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)?
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pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
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nr_polar_init(nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
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t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
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//#endif
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//polar_encoder_dci(dci_alloc.dci_pdu, encoder_output, currentPtr, pdcch_params.rnti);
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polar_encoder_fast(dci_alloc.dci_pdu, encoder_output, pdcch_params.rnti,currentPtr);
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#ifdef DEBUG_CHANNEL_CODING
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printf("polar rnti %d\n",pdcch_params.rnti);
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for (int i=0;i<54;i++) printf("Encoded Payload: [%d]->0x%08x \n", i,encoder_output[i]);
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printf("DCI PDU: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
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dci_alloc.dci_pdu[0], dci_alloc.dci_pdu[1], dci_alloc.dci_pdu[2], dci_alloc.dci_pdu[3]);
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printf("Encoded Payload: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
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encoder_output[0], encoder_output[1], encoder_output[2], encoder_output[3]);
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printf("DCI PDU: [0]->0x%lx \t [1]->0x%lx\n",
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dci_alloc.dci_pdu[0], dci_alloc.dci_pdu[1]);
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printf("Encoded Payload (length:%d dwords):\n", encoded_length>>5);
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for (int i=0;i<encoded_length>>5;i++)
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printf("[%d]->0x%08x \t", i,encoder_output[i]);
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printf("\n");
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#endif
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/// Scrambling
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@@ -247,17 +274,13 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0
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scrambled_output[6], scrambled_output[7], scrambled_output[8], scrambled_output[9], scrambled_output[10],scrambled_output[11] );
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#endif
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// QPSK modulation
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/// QPSK modulation
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int16_t mod_dci[NR_MAX_DCI_SIZE>>1];
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for (int i=0; i<encoded_length>>1; i++) {
|
||||
idx = ((((scrambled_output[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((scrambled_output[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
|
||||
mod_dci[i<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
|
||||
mod_dci[(i<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
|
||||
nr_modulation(scrambled_output, encoded_length, MOD_QPSK, mod_dci);
|
||||
#ifdef DEBUG_DCI
|
||||
printf("i %d idx %d b0-b1 %d-%d mod_dci %d %d\n", i, idx, (((scrambled_output[(i<<1)>>5])>>((i<<1)&0x1f))&1),
|
||||
(((scrambled_output[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), mod_dci[(i<<1)], mod_dci[(i<<1)+1]);
|
||||
for (int i=0; i<encoded_length>>1; i++)
|
||||
printf("i %d mod_dci %d %d\n", i, mod_dci[i<<1], mod_dci[(i<<1)+1] );
|
||||
#endif
|
||||
}
|
||||
|
||||
/// Resource mapping
|
||||
|
||||
@@ -289,10 +312,11 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0
|
||||
dmrs_idx = 0;
|
||||
k = cset_start_sc + 1;
|
||||
while (dmrs_idx<3*pdcch_params.n_rb) {
|
||||
((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[l][dmrs_idx<<1]) >> 15;
|
||||
((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
|
||||
((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = ((amp>>1) * mod_dmrs[l][dmrs_idx<<1]) >> 15;
|
||||
((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = ((amp>>1) * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
|
||||
#ifdef DEBUG_PDCCH_DMRS
|
||||
printf("symbol %d position %d => (%d,%d)\n",l,k,((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] , ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
|
||||
printf("symbol %d position %d => (%d,%d)\n",l,k,((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] ,
|
||||
((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
|
||||
#endif
|
||||
k+=4;
|
||||
if (k >= frame_parms.ofdm_symbol_size)
|
||||
@@ -315,19 +339,23 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0
|
||||
for (int m=0; m<NR_NB_SC_PER_RB; m++) {
|
||||
if ( m == (k_prime<<2)+1) { // DMRS if not already mapped
|
||||
if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_SAME_AS_REG_BUNDLE) {
|
||||
((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[l][dmrs_idx<<1]) >> 15;
|
||||
((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
|
||||
((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = ((amp>>1) * mod_dmrs[l][dmrs_idx<<1]) >> 15;
|
||||
((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = ((amp>>1) * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
|
||||
#ifdef DEBUG_PDCCH_DMRS
|
||||
printf("l %d position %d => (%d,%d)\n",l,k,((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] , ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
|
||||
printf("l %d position %d => (%d,%d)\n",l,k,((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] ,
|
||||
((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
|
||||
#endif
|
||||
k_prime++;
|
||||
dmrs_idx++;
|
||||
}
|
||||
k_prime++;
|
||||
}
|
||||
else { // DCI payload
|
||||
((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dci[dci_idx<<1]) >> 15;
|
||||
((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dci[(dci_idx<<1) + 1]) >> 15;
|
||||
//printf("dci output %d %d\n",(a * mod_dci[dci_idx<<1]) >> 15, (a * mod_dci[(dci_idx<<1) + 1]) >> 15);
|
||||
#ifdef DEBUG_DCI
|
||||
printf("l %d position %d => (%d,%d)\n",l,k,((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] ,
|
||||
((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
|
||||
#endif
|
||||
dci_idx++;
|
||||
}
|
||||
k++;
|
||||
|
||||
@@ -61,11 +61,13 @@ void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m
|
||||
else { //NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC
|
||||
}
|
||||
|
||||
uint8_t cond = N_reg%(bsize*R);
|
||||
AssertFatal(cond==0, "CCE to REG interleaving: Invalid configuration leading to non integer C\n");
|
||||
C = N_reg/(bsize*R);
|
||||
if (pdcch_params->cr_mapping_type == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
|
||||
AssertFatal((N_reg%(bsize*R))==0, "CCE to REG interleaving: Invalid configuration leading to non integer C (N_reg %d, bsize %d R %d)\n",
|
||||
N_reg, bsize, R);
|
||||
C = N_reg/(bsize*R);
|
||||
}
|
||||
|
||||
tmp = L * (( Y + (m*N_cce)/(L*M_s_max) + n_CI ) % (N_cce/L));
|
||||
tmp = L * (( Y + (m*N_cce)/(L*M_s_max) + n_CI ) % CEILIDIV(N_cce,L));
|
||||
|
||||
LOG_I(PHY, "CCE list generation for candidate %d: bundle size %d ilv size %d tmp %d\n", m, bsize, R, tmp);
|
||||
for (uint8_t cce_idx=0; cce_idx<L; cce_idx++) {
|
||||
@@ -189,14 +191,16 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
|
||||
#endif
|
||||
break;
|
||||
|
||||
case NFAPI_NR_RNTI_C:
|
||||
case NFAPI_NR_RNTI_C:
|
||||
|
||||
// indicating a DL DCI format 1bit
|
||||
pos++;
|
||||
*dci_pdu |= (pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos);
|
||||
|
||||
// Freq domain assignment (275rb >> fsize = 16)
|
||||
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
|
||||
pos+=fsize;
|
||||
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_alloc->size-pos));
|
||||
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_alloc->size-pos));
|
||||
|
||||
if (((pdu_rel15->frequency_domain_assignment+1)&1) ==0) //fsize are all 1 38.212 p86
|
||||
{
|
||||
@@ -223,8 +227,7 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
|
||||
// Time domain assignment 4bit
|
||||
|
||||
pos+=4;
|
||||
*dci_pdu |= ((pdu_rel15->time_domain_assignment&0xf) << (dci_alloc->size-pos));
|
||||
|
||||
*dci_pdu |= ((pdu_rel15->time_domain_assignment&0xf) << (dci_alloc->size-pos));
|
||||
|
||||
// VRB to PRB mapping 1bit
|
||||
pos++;
|
||||
@@ -244,7 +247,7 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
|
||||
|
||||
// HARQ process number 4bit
|
||||
pos+=4;
|
||||
*dci_pdu |= ((pdu_rel15->harq_pid&0xf)<<(dci_alloc->size-pos));
|
||||
*dci_pdu |= ((pdu_rel15->harq_pid&0xf)<<(dci_alloc->size-pos));
|
||||
|
||||
// Downlink assignment index 2bit
|
||||
pos+=2;
|
||||
@@ -252,15 +255,15 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
|
||||
|
||||
// TPC command for scheduled PUCCH 2bit
|
||||
pos+=2;
|
||||
*dci_pdu |= ((pdu_rel15->tpc&3)<<(dci_alloc->size-pos));
|
||||
*dci_pdu |= ((pdu_rel15->tpc&3)<<(dci_alloc->size-pos));
|
||||
|
||||
// PUCCH resource indicator 3bit
|
||||
pos+=3;
|
||||
*dci_pdu |= ((pdu_rel15->pucch_resource_indicator&0x7)<<(dci_alloc->size-pos));
|
||||
*dci_pdu |= ((pdu_rel15->pucch_resource_indicator&0x7)<<(dci_alloc->size-pos));
|
||||
|
||||
// PDSCH-to-HARQ_feedback timing indicator 3bit
|
||||
pos+=3;
|
||||
*dci_pdu |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator&0x7)<<(dci_alloc->size-pos));
|
||||
*dci_pdu |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator&0x7)<<(dci_alloc->size-pos));
|
||||
|
||||
} //end else
|
||||
break;
|
||||
|
||||
@@ -28,6 +28,7 @@
|
||||
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
|
||||
#include "filt16a_32.h"
|
||||
#include "T.h"
|
||||
//#define DEBUG_PDSCH
|
||||
//#define DEBUG_PDCCH
|
||||
|
||||
|
||||
@@ -271,8 +272,8 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
|
||||
|
||||
uint8_t nushift;
|
||||
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset];
|
||||
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF;
|
||||
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset];
|
||||
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
|
||||
|
||||
nushift = 1;
|
||||
ue->frame_parms.nushift = nushift;
|
||||
@@ -287,7 +288,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
k = coreset_start_subcarrier;
|
||||
|
||||
#ifdef DEBUG_PDCCH
|
||||
printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns>>1], eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
|
||||
printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns], eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
|
||||
ue->frame_parms.Ncp,l,Ns,k, symbol);
|
||||
#endif
|
||||
|
||||
@@ -297,7 +298,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
|
||||
|
||||
// generate pilot
|
||||
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns>>1][symbol], &pilot[0],2000,nb_rb_coreset);
|
||||
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[0],2000,nb_rb_coreset);
|
||||
|
||||
|
||||
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
|
||||
@@ -459,16 +460,16 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
break;
|
||||
}
|
||||
|
||||
//if( (Ns== 2) && (l == 0))
|
||||
if( (Ns== 1) && (l == 0))
|
||||
{
|
||||
// do ifft of channel estimate
|
||||
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++)
|
||||
for (p=0; p<ue->frame_parms.nb_antenna_ports_eNB; p++) {
|
||||
if (ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset][(p<<1)+aarx])
|
||||
if (ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset][(p<<1)+aarx])
|
||||
{
|
||||
LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d \n", Ns, ue->current_thread_id[Ns>>1], l);
|
||||
idft((int16_t*) &ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset][(p<<1)+aarx][0],
|
||||
(int16_t*) ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates_time[eNB_offset][(p<<1)+aarx],1);
|
||||
LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d \n", Ns, ue->current_thread_id[Ns], l);
|
||||
idft((int16_t*) &ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset][(p<<1)+aarx][0],
|
||||
(int16_t*) ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates_time[eNB_offset][(p<<1)+aarx],1);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -496,8 +497,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
|
||||
|
||||
uint8_t nushift;
|
||||
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset];
|
||||
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF;
|
||||
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset];
|
||||
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
|
||||
|
||||
nushift = (p>>1)&1;
|
||||
ue->frame_parms.nushift = nushift;
|
||||
|
||||
@@ -805,7 +805,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
|
||||
// For each BWP the number of CORESETs is limited to 3 (including initial CORESET Id=0 -> ControlResourceSetId (0..maxNrofControlReourceSets-1) (0..12-1)
|
||||
//uint32_t n_BWP_start = 0;
|
||||
//uint32_t n_rb_offset = 0;
|
||||
uint32_t n_rb_offset = pdcch_vars2->coreset[nb_coreset_active].rb_offset+(int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB);
|
||||
uint32_t n_rb_offset = pdcch_vars2->coreset[nb_coreset_active].rb_offset/*+(int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB)*/;
|
||||
// start time position for CORESET
|
||||
// parameter symbol_mon is a 14 bits bitmap indicating monitoring symbols within a slot
|
||||
uint8_t start_symbol = 0;
|
||||
@@ -1048,7 +1048,7 @@ void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8
|
||||
x2 = (((1<<16)*n_rnti)+n_id); //mod 2^31 is implicit //this is c_init in 38.211 v15.1.0 Section 7.3.2.3
|
||||
// x2 = (nr_tti_rx << 9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.8.2
|
||||
#ifdef NR_PDCCH_DCI_DEBUG
|
||||
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> (c_init=%d, n_id=%d, n_rnti=%d, length=%d)\n",x2,n_id,n_rnti,length);
|
||||
//printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> (c_init=%d, n_id=%d, n_rnti=%d, length=%d)\n",x2,n_id,n_rnti,length);
|
||||
#endif
|
||||
for (i = 0; i < length; i++) {
|
||||
if ((i & 0x1f) == 0) {
|
||||
@@ -1118,13 +1118,13 @@ void nr_dci_decoding_procedure0(int s,
|
||||
uint32_t *CCEmap1,
|
||||
uint32_t *CCEmap2) {
|
||||
|
||||
uint16_t crc, CCEind, nCCE[3];
|
||||
uint32_t crc, CCEind, nCCE[3];
|
||||
uint32_t *CCEmap = NULL, CCEmap_mask = 0;
|
||||
uint8_t L2 = (1 << L);
|
||||
unsigned int Yk, nb_candidates = 0, i, m;
|
||||
unsigned int CCEmap_cand;
|
||||
|
||||
int8_t decoderState=0;
|
||||
uint32_t decoderState=0;
|
||||
|
||||
// A[p], p is the current active CORESET
|
||||
uint16_t A[3]={39827,39829,39839};
|
||||
@@ -1361,17 +1361,17 @@ void nr_dci_decoding_procedure0(int s,
|
||||
#endif
|
||||
*/
|
||||
|
||||
uint32_t dci_estimation[4]={0};
|
||||
|
||||
uint64_t dci_estimation[2]={0};
|
||||
|
||||
nr_polar_init(&nrPolar_params, 1, sizeof_bits, L2);
|
||||
|
||||
|
||||
t_nrPolar_paramsPtr currentPtrDCI=nr_polar_params(nrPolar_params, 1, sizeof_bits, L2);
|
||||
decoderState = polar_decoder_int16(&pdcch_vars[eNB_id]->e_rx[CCEind*9*6*2],
|
||||
(uint64_t*)dci_estimation,
|
||||
dci_estimation,
|
||||
currentPtrDCI);
|
||||
crc = decoderState;
|
||||
crc = decoderState;
|
||||
|
||||
|
||||
//crc = (crc16(&dci_decoded_output[current_thread_id][0], sizeof_bits) >> 16) ^ extract_crc(&dci_decoded_output[current_thread_id][0], sizeof_bits);
|
||||
#ifdef NR_PDCCH_DCI_DEBUG
|
||||
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we end function dci_decoding() with crc=%x\n",crc);
|
||||
@@ -1451,12 +1451,12 @@ void nr_dci_decoding_procedure0(int s,
|
||||
dci_alloc[*dci_cnt].dci_pdu[1] = dci_estimation[1];
|
||||
dci_alloc[*dci_cnt].dci_pdu[2] = dci_estimation[2];
|
||||
dci_alloc[*dci_cnt].dci_pdu[3] = dci_estimation[3];
|
||||
#ifdef NR_PDCCH_DCI_DEBUG
|
||||
//#ifdef NR_PDCCH_DCI_DEBUG
|
||||
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> rnti matches -> DCI FOUND !!! crc =>%x, sizeof_bits %d, sizeof_bytes %d \n",
|
||||
dci_alloc[*dci_cnt].rnti, dci_alloc[*dci_cnt].dci_length, sizeof_bytes);
|
||||
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> dci_cnt %d (format_css %d crc_scrambled %d) L %d, firstCCE %d pdu[0] %x pdu[1] %x pdu[2] %x pdu[3] %x \n",
|
||||
*dci_cnt, format_css,*crc_scrambled,dci_alloc[*dci_cnt].L, dci_alloc[*dci_cnt].firstCCE,dci_alloc[*dci_cnt].dci_pdu[0],dci_alloc[*dci_cnt].dci_pdu[1],dci_alloc[*dci_cnt].dci_pdu[2],dci_alloc[*dci_cnt].dci_pdu[3]);
|
||||
#endif
|
||||
//#endif
|
||||
if ((format_css == cformat0_0_and_1_0) || (format_uss == uformat0_0_and_1_0)){
|
||||
if ((*crc_scrambled == _p_rnti) || (*crc_scrambled == _si_rnti) || (*crc_scrambled == _ra_rnti)){
|
||||
dci_alloc[*dci_cnt].format = format1_0;
|
||||
@@ -2675,7 +2675,7 @@ uint8_t nr_dci_decoding_procedure(int s,
|
||||
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
|
||||
css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
|
||||
#endif
|
||||
for (int aggregationLevel = 3; aggregationLevel<4 ; aggregationLevel++) { // We fix aggregationLevel to 3 for testing=> nbr of CCE=8
|
||||
for (int aggregationLevel = 0; aggregationLevel<5 ; aggregationLevel++) { // We fix aggregationLevel to 3 for testing=> nbr of CCE=8
|
||||
//for (int aggregationLevel = 2; aggregationLevel<5 ; aggregationLevel++) {
|
||||
// for aggregation level aggregationLevel. The number of candidates (for L2= 2^aggregationLevel) will be calculated in function nr_dci_decoding_procedure0
|
||||
#ifdef NR_PDCCH_DCI_DEBUG
|
||||
|
||||
@@ -52,7 +52,7 @@
|
||||
|
||||
//#define DEBUG_DCI
|
||||
#define NR_PDCCH_DCI_TOOLS
|
||||
#define NR_PDCCH_DCI_TOOLS_DEBUG
|
||||
//#define NR_PDCCH_DCI_TOOLS_DEBUG
|
||||
|
||||
typedef unsigned __int128 uint128_t;
|
||||
|
||||
|
||||
@@ -708,10 +708,10 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
|
||||
|
||||
#ifdef DEBUG_PBCH
|
||||
printf("xtra_byte %x payload %x\n", xtra_byte, payload);
|
||||
for (i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++){
|
||||
// printf("unscrambling pbch_a[%d] = %x \n", i,pbch_a[i]);
|
||||
printf("[PBCH] decoder payload[%d] = %x\n",i,decoded_output[i]);
|
||||
}
|
||||
for (int i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++){
|
||||
// printf("unscrambling pbch_a[%d] = %x \n", i,pbch_a[i]);
|
||||
printf("[PBCH] decoder payload[%d] = %x\n",i,decoded_output[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
ue->dl_indication.rx_ind = &ue->rx_ind; // hang on rx_ind instance
|
||||
|
||||
@@ -1032,7 +1032,7 @@ typedef struct {
|
||||
fapi_nr_dci_indication_t dci_ind;
|
||||
|
||||
// point to the current rxTx thread index
|
||||
uint8_t current_thread_id[10];
|
||||
uint8_t current_thread_id[40];
|
||||
|
||||
NR_UE_PDSCH *pdsch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_eNB_MAX+1]; // two RxTx Threads
|
||||
NR_UE_PDSCH_FLP *pdsch_vars_flp[NUMBER_OF_CONNECTED_eNB_MAX+1];
|
||||
|
||||
@@ -49,6 +49,9 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
|
||||
nr_frequency_range_e freq_range,
|
||||
uint8_t rmsi_pdcch_config,
|
||||
uint8_t ssb_idx,
|
||||
uint8_t k_ssb,
|
||||
uint16_t sfn_ssb,
|
||||
uint8_t n_ssb,
|
||||
uint16_t nb_slots_per_frame,
|
||||
uint16_t N_RB);
|
||||
|
||||
|
||||
@@ -48,11 +48,13 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
|
||||
/// component carrier id
|
||||
uint8_t cc_id = scheduled_response->CC_id;
|
||||
uint32_t i;
|
||||
int slot = scheduled_response->slot;
|
||||
uint8_t thread_id = PHY_vars_UE_g[module_id][cc_id]->current_thread_id[slot];
|
||||
|
||||
if(scheduled_response != NULL){
|
||||
// Note: we have to handle the thread IDs for this. To be revisited completely.
|
||||
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[0][0];
|
||||
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[0][0][0];
|
||||
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
|
||||
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[thread_id][0][0];
|
||||
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[0];
|
||||
NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms;
|
||||
PRACH_RESOURCES_t *prach_resources = PHY_vars_UE_g[module_id][cc_id]->prach_resources[0];
|
||||
@@ -88,8 +90,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
|
||||
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = dci_config->coreset.cce_reg_interleaved_interleaver_size;
|
||||
}else{ //CCE_REG_MAPPING_TYPE_NON_INTERLEAVED
|
||||
pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = 0;
|
||||
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = 0;
|
||||
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = 0;
|
||||
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = 6;
|
||||
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = 1;
|
||||
}
|
||||
|
||||
pdcch_vars2->coreset[i].precoderGranularity = dci_config->coreset.precoder_granularity;
|
||||
|
||||
@@ -56,7 +56,7 @@
|
||||
//#define DEBUG_PHY_PROC
|
||||
|
||||
#define NR_PDCCH_SCHED
|
||||
#define NR_PDCCH_SCHED_DEBUG
|
||||
//#define NR_PDCCH_SCHED_DEBUG
|
||||
//#define NR_PUCCH_SCHED
|
||||
//#define NR_PUCCH_SCHED_DEBUG
|
||||
|
||||
@@ -3078,6 +3078,8 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
|
||||
// Higher layers have updated the number of searchSpaces with are active in the current slot and this value is stored in variable nb_searchspace_total
|
||||
int nb_searchspace_total = pdcch_vars2->nb_search_space;
|
||||
|
||||
pdcch_vars[eNB_id]->crnti = 0x1234; //to be check how to set when using loop memory
|
||||
|
||||
uint16_t c_rnti=pdcch_vars[eNB_id]->crnti;
|
||||
uint16_t cs_rnti,new_rnti,tc_rnti;
|
||||
uint16_t p_rnti=P_RNTI;
|
||||
@@ -3153,7 +3155,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
|
||||
// FIXME! A table of five enum elements
|
||||
// searchSpaceType indicates whether this is a common search space or a UE-specific search space
|
||||
//int searchSpaceType = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceType.type;
|
||||
NR_SEARCHSPACE_TYPE_t searchSpaceType = common;
|
||||
NR_SEARCHSPACE_TYPE_t searchSpaceType = ue_specific;//common;
|
||||
#ifdef NR_PDCCH_SCHED_DEBUG
|
||||
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> searchSpaceType=%d is hardcoded THIS HAS TO BE FIXED!!!\n",
|
||||
searchSpaceType);
|
||||
@@ -4964,96 +4966,21 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
|
||||
|
||||
int frame_rx = proc->frame_rx;
|
||||
int nr_tti_rx = proc->nr_tti_rx;
|
||||
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][0];
|
||||
uint16_t nb_symb_sch = 8; // to be updated by higher layer
|
||||
uint8_t nb_symb_pdcch =2;
|
||||
//proc->decoder_switch = 0;
|
||||
//int counter_decoder = 0;
|
||||
uint8_t nb_symb_pdcch = pdcch_vars->coreset[0].duration;
|
||||
|
||||
LOG_D(PHY," ****** start RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
|
||||
LOG_D(PHY," ****** start RX-Chain for Frame.Slot %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
|
||||
|
||||
uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1);
|
||||
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
|
||||
|
||||
#if 0
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
|
||||
|
||||
#if T_TRACER
|
||||
T(T_UE_PHY_DL_TICK, T_INT(ue->Mod_id), T_INT(frame_rx%1024), T_INT(nr_tti_rx));
|
||||
|
||||
T(T_UE_PHY_INPUT_SIGNAL, T_INT(ue->Mod_id), T_INT(frame_rx%1024), T_INT(nr_tti_rx), T_INT(0),
|
||||
T_BUFFER(&ue->common_vars.rxdata[0][nr_tti_rx*ue->frame_parms.samples_per_subframe],
|
||||
ue->frame_parms.samples_per_subframe * 4));
|
||||
#endif
|
||||
|
||||
// start timers
|
||||
//#ifdef UE_DEBUG_TRACE
|
||||
LOG_I(PHY," ****** start RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
|
||||
//#endif
|
||||
|
||||
#if UE_TIMING_TRACE
|
||||
start_meas(&ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]]);
|
||||
start_meas(&ue->generic_stat);
|
||||
#endif
|
||||
|
||||
if (do_pdcch_flag) {
|
||||
// deactivate reception until we scan pdcch
|
||||
if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0])
|
||||
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active = 0;
|
||||
if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1])
|
||||
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1]->active = 0;
|
||||
|
||||
if (ue->dlsch_SI[eNB_id])
|
||||
ue->dlsch_SI[eNB_id]->active = 0;
|
||||
if (ue->dlsch_p[eNB_id])
|
||||
ue->dlsch_p[eNB_id]->active = 0;
|
||||
if (ue->dlsch_ra[eNB_id])
|
||||
ue->dlsch_ra[eNB_id]->active = 0;
|
||||
}
|
||||
|
||||
#ifdef DEBUG_PHY_PROC
|
||||
LOG_D(PHY,"[%s %d] Frame %d nr_tti_rx %d: Doing phy_procedures_UE_RX\n",
|
||||
(r_type == multicast_relay) ? "RN/UE" : "UE",
|
||||
ue->Mod_id,frame_rx, nr_tti_rx);
|
||||
#endif
|
||||
|
||||
|
||||
if (ue->frame_parms.Ncp == 0) { // normal prefix
|
||||
pilot1 = 4;
|
||||
} else { // extended prefix
|
||||
pilot1 = 3;
|
||||
}
|
||||
|
||||
/*
|
||||
if (nr_subframe_select(&ue->frame_parms,nr_tti_rx) == SF_S) { // S-subframe, do first 5 symbols only
|
||||
l2 = 5;
|
||||
} else */
|
||||
{ // normal nr_tti_rx, last symbol to be processed is the first of the second slot
|
||||
l2 = (ue->frame_parms.symbols_per_tti/2)-1;
|
||||
}
|
||||
|
||||
int prev_nr_tti_rx = (nr_tti_rx - 1)<0? 9: (nr_tti_rx - 1);/*
|
||||
if (nr_subframe_select(&ue->frame_parms,prev_nr_tti_rx) != SF_DL) {
|
||||
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
// RX processing of symbols l=0...l2
|
||||
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
l=0;
|
||||
} else */
|
||||
{
|
||||
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
// RX processing of symbols l=1...l2 (l=0 is done in last scheduling epoch)
|
||||
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
l=1;
|
||||
}
|
||||
|
||||
LOG_D(PHY," ------ slot 0 Processing: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
|
||||
LOG_D(PHY," ------ --> FFT/ChannelEst/PDCCH slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
|
||||
#endif
|
||||
|
||||
#ifdef NR_PDCCH_SCHED
|
||||
//nr_gold_pdcch(ue,0, 2);
|
||||
nr_gold_pdcch(ue,0, 2);
|
||||
|
||||
if (nr_tti_rx==1){
|
||||
for (uint16_t l=0; l<nb_symb_pdcch; l++) {
|
||||
//if (nr_tti_rx==1){
|
||||
LOG_D(PHY," ------ --> PDCCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
|
||||
for (uint16_t l=0; l<nb_symb_pdcch; l++) {
|
||||
|
||||
#if UE_TIMING_TRACE
|
||||
start_meas(&ue->ofdm_demod_stats);
|
||||
@@ -5061,7 +4988,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
|
||||
nr_slot_fep(ue,
|
||||
l,
|
||||
nr_tti_rx<<1,
|
||||
nr_tti_rx,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
@@ -5072,7 +4999,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
|
||||
#endif
|
||||
|
||||
//printf("phy procedure pdcch start measurement l =%d\n",l);
|
||||
nr_ue_measurement_procedures(l,ue,proc,eNB_id,(nr_tti_rx<<1),mode);
|
||||
nr_ue_measurement_procedures(l,ue,proc,eNB_id,(nr_tti_rx),mode);
|
||||
|
||||
}
|
||||
|
||||
@@ -5080,19 +5007,19 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
|
||||
LOG_E(PHY,"[UE %d] Frame %d, nr_tti_rx %d: Error in pdcch procedures\n",ue->Mod_id,frame_rx,nr_tti_rx);
|
||||
return(-1);
|
||||
}
|
||||
}
|
||||
//}
|
||||
#endif //NR_PDCCH_SCHED
|
||||
|
||||
LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
|
||||
|
||||
if (nr_tti_rx==1){
|
||||
LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
|
||||
//to update from pdsch config
|
||||
nr_gold_pdsch(ue,nb_symb_pdcch,0, 1);
|
||||
|
||||
for (uint16_t m=nb_symb_pdcch;m<=(nb_symb_sch+nb_symb_pdcch-1) ; m++){
|
||||
nr_slot_fep(ue,
|
||||
m, //to be updated from higher layer
|
||||
nr_tti_rx<<1,
|
||||
nr_tti_rx,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
@@ -5126,7 +5053,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
|
||||
}
|
||||
|
||||
LOG_D(PHY," ------ end PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
|
||||
// do procedures for SI-RNTI
|
||||
if ((ue->dlsch_SI[eNB_id]) && (ue->dlsch_SI[eNB_id]->active == 1)) {
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_IN);
|
||||
@@ -5168,62 +5094,12 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
|
||||
ue->frame_parms.symbols_per_tti>>1);
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_OUT);
|
||||
}
|
||||
//#if 0
|
||||
LOG_D(PHY," ------ slot 1 Processing: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
|
||||
LOG_D(PHY," ------ --> FFT/ChannelEst/PDCCH slot 1: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
|
||||
|
||||
/*if (nr_subframe_select(&ue->frame_parms,nr_tti_rx) != SF_S)*/
|
||||
{ // do front-end processing for second slot, and first symbol of next nr_tti_rx
|
||||
for (l=1; l<ue->frame_parms.symbols_per_tti>>1; l++) {
|
||||
#if UE_TIMING_TRACE
|
||||
start_meas(&ue->ofdm_demod_stats);
|
||||
#endif
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
|
||||
/*nr_slot_fep(ue,
|
||||
l,
|
||||
1+(nr_tti_rx<<1),
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
NR_PDSCH_EST);*/
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
|
||||
|
||||
#if UE_TIMING_TRACE
|
||||
stop_meas(&ue->ofdm_demod_stats);
|
||||
#endif
|
||||
|
||||
|
||||
//ue_measurement_procedures(l-1,ue,proc,eNB_id,1+(nr_tti_rx<<1),abstraction_flag,mode);
|
||||
|
||||
} // for l=1..l2
|
||||
|
||||
// do first symbol of next downlink nr_tti_rx for channel estimation
|
||||
int next_nr_tti_rx = (1+nr_tti_rx)%10;
|
||||
/* if (nr_subframe_select(&ue->frame_parms,next_nr_tti_rx) != SF_UL)*/
|
||||
{
|
||||
/*nr_slot_fep(ue,
|
||||
0,
|
||||
(next_nr_tti_rx<<1),
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
NR_PDSCH_EST);*/
|
||||
}
|
||||
} // not an S-subframe
|
||||
#if UE_TIMING_TRACE
|
||||
stop_meas(&ue->generic_stat);
|
||||
#if DISABLE_LOG_X
|
||||
printf("[SFN %d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",nr_tti_rx,ue->generic_stat.p_time/(cpuf*1000.0));
|
||||
#else
|
||||
LOG_D(PHY, "[SFN %d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",nr_tti_rx,ue->generic_stat.p_time/(cpuf*1000.0));
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
//LOG_D(PHY," ------ end FFT/ChannelEst/PDCCH slot 1: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
|
||||
|
||||
if ( (nr_tti_rx == 0) && (ue->decode_MIB == 1))
|
||||
{
|
||||
LOG_D(PHY," ------ PBCH ChannelComp/LLR: frame.slot %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
|
||||
for (int i=0; i<3; i++)
|
||||
nr_slot_fep(ue,
|
||||
(5+i), //mu=1 case B
|
||||
@@ -5237,7 +5113,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
|
||||
}
|
||||
|
||||
// do procedures for C-RNTI
|
||||
LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
|
||||
if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active == 1) {
|
||||
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
|
||||
|
||||
@@ -157,6 +157,7 @@ int main(int argc, char **argv)
|
||||
int frame=0,slot=1;
|
||||
int frame_length_complex_samples;
|
||||
int frame_length_complex_samples_no_prefix;
|
||||
int slot_length_complex_samples_no_prefix;
|
||||
NR_DL_FRAME_PARMS *frame_parms;
|
||||
nfapi_nr_config_request_t *gNB_config;
|
||||
gNB_L1_rxtx_proc_t gNB_proc;
|
||||
@@ -399,7 +400,7 @@ int main(int argc, char **argv)
|
||||
// call MAC to configure common parameters
|
||||
|
||||
phy_init_nr_gNB(gNB,0,0);
|
||||
|
||||
mac_top_init_gNB();
|
||||
|
||||
|
||||
double fs,bw;
|
||||
@@ -437,7 +438,8 @@ int main(int argc, char **argv)
|
||||
}
|
||||
|
||||
frame_length_complex_samples = frame_parms->samples_per_subframe*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
|
||||
frame_length_complex_samples_no_prefix = frame_parms->samples_per_subframe_wCP;
|
||||
frame_length_complex_samples_no_prefix = frame_parms->samples_per_subframe_wCP*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
|
||||
slot_length_complex_samples_no_prefix = frame_parms->samples_per_slot_wCP;
|
||||
|
||||
s_re = malloc(2*sizeof(double*));
|
||||
s_im = malloc(2*sizeof(double*));
|
||||
@@ -480,6 +482,7 @@ int main(int argc, char **argv)
|
||||
else {UE->is_synchronized = 1; UE->UE_mode[0]=PUSCH;}
|
||||
|
||||
UE->perfect_ce = 0;
|
||||
for (i=0;i<10;i++) UE->current_thread_id[i] = 0;
|
||||
|
||||
if (init_nr_ue_signal(UE, 1, 0) != 0)
|
||||
{
|
||||
@@ -501,6 +504,8 @@ int main(int argc, char **argv)
|
||||
|
||||
nr_l2_init_ue();
|
||||
UE_mac = get_mac_inst(0);
|
||||
|
||||
UE->pdcch_vars[0][0]->crnti = 0x1234;
|
||||
|
||||
UE->if_inst = nr_ue_if_module_init(0);
|
||||
UE->if_inst->scheduled_response = nr_ue_scheduled_response;
|
||||
@@ -517,7 +522,7 @@ int main(int argc, char **argv)
|
||||
gNB->pbch_configured = 1;
|
||||
for (int i=0;i<4;i++) gNB->pbch_pdu[i]=i+1;
|
||||
|
||||
nr_schedule_css_dlsch_phytest(0,frame,slot);
|
||||
nr_schedule_uss_dlsch_phytest(0,frame,slot);
|
||||
Sched_INFO.module_id = 0;
|
||||
Sched_INFO.CC_id = 0;
|
||||
Sched_INFO.frame = frame;
|
||||
@@ -534,22 +539,24 @@ int main(int argc, char **argv)
|
||||
|
||||
//nr_common_signal_procedures (gNB,frame,subframe);
|
||||
|
||||
LOG_M("txsigF0.m","txsF0", gNB->common_vars.txdataF[0],frame_length_complex_samples_no_prefix,1,1);
|
||||
if (gNB->frame_parms.nb_antennas_tx>1)
|
||||
LOG_M("txsigF1.m","txsF1", gNB->common_vars.txdataF[1],frame_length_complex_samples_no_prefix,1,1);
|
||||
LOG_M("txsigF0.m","txsF0", gNB->common_vars.txdataF[0],frame_length_complex_samples_no_prefix,1,1);
|
||||
if (gNB->frame_parms.nb_antennas_tx>1)
|
||||
LOG_M("txsigF1.m","txsF1", gNB->common_vars.txdataF[1],frame_length_complex_samples_no_prefix,1,1);
|
||||
|
||||
int tx_offset = slot*frame_parms->samples_per_slot;
|
||||
|
||||
//TODO: loop over slots
|
||||
for (aa=0; aa<gNB->frame_parms.nb_antennas_tx; aa++) {
|
||||
if (gNB_config->subframe_config.dl_cyclic_prefix_type.value == 1) {
|
||||
PHY_ofdm_mod(gNB->common_vars.txdataF[aa],
|
||||
txdata[aa],
|
||||
&txdata[aa][tx_offset],
|
||||
frame_parms->ofdm_symbol_size,
|
||||
12,
|
||||
frame_parms->nb_prefix_samples,
|
||||
CYCLIC_PREFIX);
|
||||
} else {
|
||||
nr_normal_prefix_mod(gNB->common_vars.txdataF[aa],
|
||||
txdata[aa],
|
||||
&txdata[aa][tx_offset],
|
||||
14,
|
||||
frame_parms);
|
||||
}
|
||||
@@ -562,7 +569,7 @@ int main(int argc, char **argv)
|
||||
frame_length_complex_samples,
|
||||
input_fd) != frame_length_complex_samples) {
|
||||
printf("error reading from file\n");
|
||||
exit(-1);
|
||||
//exit(-1);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -598,7 +605,7 @@ int main(int argc, char **argv)
|
||||
// Type0 PDCCH search space
|
||||
dl_config.number_pdus = 1;
|
||||
dl_config.dl_config_list[0].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
|
||||
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 3; // to be set
|
||||
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 0x1234; // to be set
|
||||
|
||||
uint64_t mask = 0x0;
|
||||
uint16_t num_rbs=24;
|
||||
@@ -613,9 +620,9 @@ int main(int argc, char **argv)
|
||||
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.rb_offset = rb_offset; // additional parameter other than coreset
|
||||
|
||||
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.duration = num_symbols;
|
||||
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_mapping_type =CCE_REG_MAPPING_TYPE_INTERLEAVED;
|
||||
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L 38.211 7.3.2.2
|
||||
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_interleaver_size = 2; // R 38.211 7.3.2.2
|
||||
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_mapping_type =CCE_REG_MAPPING_TYPE_NON_INTERLEAVED;
|
||||
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_reg_bundle_size = 0; // L 38.211 7.3.2.2
|
||||
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_interleaver_size = 0; // R 38.211 7.3.2.2
|
||||
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_shift_index = cell_id;
|
||||
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE;
|
||||
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.pdcch_dmrs_scrambling_id = cell_id;
|
||||
@@ -663,7 +670,7 @@ int main(int argc, char **argv)
|
||||
|
||||
if (n_trials==1) {
|
||||
LOG_M("rxsig0.m","rxs0", UE->common_vars.rxdata[0],frame_length_complex_samples,1,1);
|
||||
if (gNB->frame_parms.nb_antennas_tx>1)
|
||||
if (UE->frame_parms.nb_antennas_rx>1)
|
||||
LOG_M("rxsig1.m","rxs1", UE->common_vars.rxdata[1],frame_length_complex_samples,1,1);
|
||||
}
|
||||
if (UE->is_synchronized == 0) {
|
||||
@@ -689,7 +696,12 @@ int main(int argc, char **argv)
|
||||
do_pdcch_flag,
|
||||
normal_txrx);
|
||||
|
||||
|
||||
if (n_trials==1) {
|
||||
LOG_M("rxsigF0.m","rxsF0", UE->common_vars.common_vars_rx_data_per_thread[0].rxdataF[0],slot_length_complex_samples_no_prefix,1,1);
|
||||
if (UE->frame_parms.nb_antennas_rx>1)
|
||||
LOG_M("rxsigF1.m","rxsF1", UE->common_vars.common_vars_rx_data_per_thread[0].rxdataF[1],slot_length_complex_samples_no_prefix,1,1);
|
||||
}
|
||||
|
||||
if (UE->dci_ind.number_of_dcis==0) n_errors++;
|
||||
}
|
||||
} //noise trials
|
||||
|
||||
Reference in New Issue
Block a user