Merge branch 'develop' into NR_RRC_harq_hacks
This commit is contained in:
@@ -79,7 +79,6 @@
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* the key length is 32 bytes (256 bits)
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*/
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#define SECURITY_KEY_LENGTH 32
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#ifndef OCP_FRAMEWORK
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typedef enum cell_type_e {
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CELL_MACRO_ENB,
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CELL_HOME_ENB,
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@@ -111,7 +110,6 @@ typedef enum cn_domain_s {
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CN_DOMAIN_PS = 1,
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CN_DOMAIN_CS = 2
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} cn_domain_t;
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#endif
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typedef struct net_ip_address_s {
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unsigned ipv4:1;
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@@ -127,7 +125,6 @@ typedef struct ambr_s {
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bitrate_t br_dl;
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} ambr_t;
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#ifndef OCP_FRAMEWORK
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typedef enum priority_level_s {
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PRIORITY_LEVEL_SPARE = 0,
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PRIORITY_LEVEL_HIGHEST = 1,
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@@ -146,7 +143,6 @@ typedef enum pre_emp_vulnerability_e {
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PRE_EMPTION_VULNERABILITY_DISABLED = 1,
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PRE_EMPTION_VULNERABILITY_MAX,
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} pre_emp_vulnerability_t;
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#endif
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typedef struct allocation_retention_priority_s {
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priority_level_t priority_level;
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@@ -31,6 +31,9 @@
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* \warning this is a warning
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*/
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#ifndef __DOCS_TEMPLATES_CODE_EXAMPLE_DOXY__H__
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#define __DOCS_TEMPLATES_CODE_EXAMPLE_DOXY__H__
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//-----------------------------------begin group-----------------------------
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@@ -138,3 +141,4 @@ struct frame {
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int init(int src, int dst);
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//-----------------------end func proto-------------------
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#endif
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@@ -1579,10 +1579,6 @@ int flexran_agent_unregister_mac_xface(mid_t mod_id)
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return 0;
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}
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AGENT_MAC_xface *flexran_agent_get_mac_xface(mid_t mod_id)
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{
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return agent_mac_xface[mod_id];
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}
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void flexran_create_config_structures(mid_t mod_id)
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{
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@@ -921,7 +921,4 @@ int flexran_agent_unregister_rrc_xface(mid_t mod_id)
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return 0;
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}
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AGENT_RRC_xface *flexran_agent_get_rrc_xface(mid_t mod_id)
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{
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return agent_rrc_xface[mod_id];
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}
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@@ -30,6 +30,8 @@
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* \warning
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*/
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#ifndef __ENB_APP_L1_PARAMDEF__H__
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#define __ENB_APP_L1_PARAMDEF__H__
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/*-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
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@@ -114,3 +116,5 @@
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#define L1_PUCCH1_DTX_EMTC3_THRESHOLD_IDX 22
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#define L1_PUCCH1AB_DTX_EMTC3_THRESHOLD_IDX 23
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/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
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#endif
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@@ -31,6 +31,8 @@
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*/
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#ifndef __ENB_APP_MACRLC_PARAMDEF__H__
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#define __ENB_APP_MACRLC_PARAMDEF__H__
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/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
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@@ -104,3 +106,5 @@
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#define MACRLC_PUSCH10xSNR_IDX 18
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#define MACRLC_PUCCH10xSNR_IDX 19
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/*---------------------------------------------------------------------------------------------------------------------------------------------------------*/
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#endif
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@@ -30,6 +30,9 @@
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* \warning
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*/
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#ifndef __ENB_APP_NB_IOT_PARAMDEF__H__
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#define __ENB_APP_NB_IOT_PARAMDEF__H__
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#include "common/config/config_paramdesc.h"
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#include "SystemInformationBlockType2.h"
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#include "DL-GapConfig-NB-r13.h"
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@@ -398,3 +401,5 @@
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/*-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
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/* NB IoT L1 configuration list section name */
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#define NBIOT_L1LIST_CONFIG_STRING "NB-IoT_L1s"
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#endif
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@@ -30,6 +30,9 @@
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* \warning
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*/
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#ifndef __ENB_APP_ENB_PARAMDEF_EMTC__H__
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#define __ENB_APP_ENB_PARAMDEF_EMTC__H__
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#include "common/config/config_paramdesc.h"
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#include "RRC_paramsvalues.h"
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@@ -405,3 +408,5 @@ typedef struct ccparams_eMTC_s {
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{"sib2_interval_ULHoppingConfigCommonModeB_r13_val", NULL, 0, iptr:&eMTCconfig->sib2_interval_ULHoppingConfigCommonModeB_r13_val, defintval:0, TYPE_UINT, 0}, \
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{"sib2_mpdcch_pdsch_hoppingOffset_r13", NULL, 0, iptr:&eMTCconfig->sib2_mpdcch_pdsch_hoppingOffset_r13, defintval:1, TYPE_UINT, 0} \
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}
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#endif
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@@ -30,6 +30,9 @@
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* \warning
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*/
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#ifndef __ENB_APP_ENB_PARAMDEF_MCE__H__
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#define __ENB_APP_ENB_PARAMDEF_MCE__H__
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#include "common/config/config_paramdesc.h"
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#include "RRC_paramsvalues.h"
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@@ -235,5 +238,4 @@
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#define MCE_CONFIG_STRING_NUM_FRAME_IDX 2
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#define MCE_CONFIG_STRING_SUBFRAME_ALLOCATION_IDX 3
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#endif
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@@ -30,6 +30,9 @@
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* \warning
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*/
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#ifndef __ENB_APP_ENB_PARAMDEF_MME__H__
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#define __ENB_APP_ENB_PARAMDEF_MME__H__
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#include "common/config/config_paramdesc.h"
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#include "RRC_paramsvalues.h"
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@@ -77,6 +80,4 @@
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{MME_CONFIG_STRING_MME_PORT_FOR_M3C, NULL, 0, uptr:&mme_port_for_m3c, defintval:36444L, TYPE_UINT, 0}, \
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}
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#endif
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@@ -41,10 +41,15 @@
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AGENT_PHY_xface *flexran_agent_get_phy_xface(mid_t mod_id);
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/* Control module interface for the communication of the MAC Control Module with the agent */
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AGENT_MAC_xface *flexran_agent_get_mac_xface(mid_t mod_id);
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extern AGENT_MAC_xface *agent_mac_xface[NUM_MAX_ENB];
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#define flexran_agent_get_mac_xface(mod_id) (agent_mac_xface[mod_id])
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/* Control module interface for the communication of the RRC Control Module with the agent */
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/* Control module interface for the communication of the RRC Control Module with the agent */
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AGENT_RRC_xface *flexran_agent_get_rrc_xface(mid_t mod_id);
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// AGENT_RRC_xface *flexran_agent_get_rrc_xface(mid_t mod_id);
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extern AGENT_RRC_xface *agent_rrc_xface[NUM_MAX_ENB];
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#define flexran_agent_get_rrc_xface(mod_id) (agent_rrc_xface[mod_id])
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/* Control module interface for the communication of the RRC Control Module with the agent */
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AGENT_PDCP_xface *flexran_agent_get_pdcp_xface(mid_t mod_id);
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@@ -30,6 +30,8 @@
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* \warning
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*/
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#ifndef __GNB_APP_L1_NR_PARAMDEF__H__
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#define __GNB_APP_L1_NR_PARAMDEF__H__
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/*-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
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@@ -71,3 +73,4 @@
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#define L1_REMOTE_N_PORTD_IDX 8
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/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
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#endif
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@@ -31,6 +31,8 @@
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*/
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#ifndef __GNB_APP_MACRLC_NR_PARAMDEF__H__
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#define __GNB_APP_MACRLC_NR_PARAMDEF__H__
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/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
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@@ -96,3 +98,4 @@
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#define MACRLC_LOCAL_S_PORTD_IDX 15
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#define MACRLC_REMOTE_S_PORTD_IDX 16
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/*---------------------------------------------------------------------------------------------------------------------------------------------------------*/
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#endif
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@@ -131,7 +131,6 @@ void *gNB_app_task(void *args_p)
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uint32_t gnb_nb = RC.nb_nr_inst;
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uint32_t gnb_id_start = 0;
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uint32_t gnb_id_end = gnb_id_start + gnb_nb;
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uint32_t x2_register_gnb_pending = 0;
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uint32_t register_gnb_pending=0;
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uint32_t gnb_id;
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MessageDef *msg_p = NULL;
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@@ -171,7 +170,7 @@ void *gNB_app_task(void *args_p)
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if (is_x2ap_enabled() ) { //&& !NODE_IS_DU(RC.rrc[0]->node_type)
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LOG_I(X2AP, "X2AP enabled \n");
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x2_register_gnb_pending = gNB_app_register_x2 (gnb_id_start, gnb_id_end);
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__attribute__((unused)) uint32_t x2_register_gnb_pending = gNB_app_register_x2 (gnb_id_start, gnb_id_end);
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}
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if (EPC_MODE_ENABLED) {
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@@ -30,6 +30,9 @@
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* \warning
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*/
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#ifndef __GNB_APP_GNB_PARAMDEF__H__
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#define __GNB_APP_GNB_PARAMDEF__H__
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#include "common/config/config_paramdesc.h"
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#include "RRC_nr_paramsvalues.h"
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@@ -430,3 +433,4 @@ typedef struct ccparams_nr_x2 {
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#define CONFIG_HLP_WORKER "coding and FEP worker thread WORKER_DISABLE or WORKER_ENABLE\n"
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#define CONFIG_HLP_PARALLEL "PARALLEL_SINGLE_THREAD, PARALLEL_RU_L1_SPLIT, or PARALLEL_RU_L1_TRX_SPLIT(RU_L1_TRX_SPLIT by defult)\n"
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/*-------------------------------------------------------------------------------------------------------------------------------------------------------------*/
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#endif
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@@ -8,8 +8,8 @@
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*
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*/
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#ifndef _CONFIG_H_
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#define _CONFIG_H_
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#ifndef __LAYER2_MAC_CONFIG_NB_IOT__H__
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#define __LAYER2_MAC_CONFIG_NB_IOT__H__
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//#include "NB_IoT_Message_definitions.h"
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@@ -60,7 +60,7 @@ extern uint16_t NB_THREAD_INST;
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extern unsigned char NB_RN_INST;
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extern unsigned short NODE_ID[1];
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extern int cqi_to_mcs[16];
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extern const int cqi_to_mcs[16];
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extern uint32_t RRC_CONNECTION_FLAG;
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@@ -36,6 +36,7 @@
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#include "LAYER2/MAC/mac.h"
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#include "LAYER2/MAC/mac_proto.h"
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#include "LAYER2/MAC/mac_extern.h"
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#include <openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h>
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#include "common/utils/LOG/log.h"
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#include "common/utils/LOG/vcd_signal_dumper.h"
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#include "UTIL/OPT/opt.h"
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@@ -1166,6 +1166,47 @@ nr_bandentry_t nr_bandtable[] = {
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{261,27500000,28350000,27500000,28350000, 2,2070833, 120}
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};
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// TS 38.211 Table 6.4.1.1.3-3: PUSCH DMRS positions l' within a slot for single-symbol DMRS and intra-slot frequency hopping disabled.
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// The first 4 colomns are PUSCH mapping type A and the last 4 colomns are PUSCH mapping type B.
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// When l' = l0, it is represented by 1
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// E.g. when symbol duration is 12 in colomn 7, value 1057 ('10000100001') which means l' = l0, 5, 10.
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|
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int32_t table_6_4_1_1_3_3_pusch_dmrs_positions_l [12][8] = { // Duration in symbols
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||||
{-1, -1, -1, -1, 1, 1, 1, 1}, //<4 // (DMRS l' position)
|
||||
{1, 1, 1, 1, 1, 1, 1, 1}, //4 // (DMRS l' position)
|
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{1, 1, 1, 1, 1, 5, 5, 5}, //5 // (DMRS l' position)
|
||||
{1, 1, 1, 1, 1, 5, 5, 5}, //6 // (DMRS l' position)
|
||||
{1, 1, 1, 1, 1, 5, 5, 5}, //7 // (DMRS l' position)
|
||||
{1, 129, 129, 129, 1, 65, 73, 73}, //8 // (DMRS l' position)
|
||||
{1, 129, 129, 129, 1, 65, 73, 73}, //9 // (DMRS l' position)
|
||||
{1, 513, 577, 577, 1, 257, 273, 585}, //10 // (DMRS l' position)
|
||||
{1, 513, 577, 577, 1, 257, 273, 585}, //11 // (DMRS l' position)
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{1, 513, 577, 2337, 1, 1025, 1057, 585}, //12 // (DMRS l' position)
|
||||
{1, 2049, 2177, 2337, 1, 1025, 1057, 585}, //13 // (DMRS l' position)
|
||||
{1, 2049, 2177, 2337, 1, 1025, 1057, 585}, //14 // (DMRS l' position)
|
||||
};
|
||||
|
||||
|
||||
// TS 38.211 Table 6.4.1.1.3-4: PUSCH DMRS positions l' within a slot for double-symbol DMRS and intra-slot frequency hopping disabled.
|
||||
// The first 4 colomns are PUSCH mapping type A and the last 4 colomns are PUSCH mapping type B.
|
||||
// When l' = l0, it is represented by 1
|
||||
|
||||
int32_t table_6_4_1_1_3_4_pusch_dmrs_positions_l [12][8] = { // Duration in symbols
|
||||
{-1, -1, -1, -1, -1, -1, -1, -1}, //<4 // (DMRS l' position)
|
||||
{1, 1, -1, -1, -1, -1, -1, -1}, //4 // (DMRS l' position)
|
||||
{1, 1, -1, -1, 1, 1, -1, -1}, //5 // (DMRS l' position)
|
||||
{1, 1, -1, -1, 1, 1, -1, -1}, //6 // (DMRS l' position)
|
||||
{1, 1, -1, -1, 1, 1, -1, -1}, //7 // (DMRS l' position)
|
||||
{1, 1, -1, -1, 1, 33, -1, -1}, //8 // (DMRS l' position)
|
||||
{1, 1, -1, -1, 1, 33, -1, -1}, //9 // (DMRS l' position)
|
||||
{1, 257, -1, -1, 1, 129, -1, -1}, //10 // (DMRS l' position)
|
||||
{1, 257, -1, -1, 1, 129, -1, -1}, //11 // (DMRS l' position)
|
||||
{1, 257, -1, -1, 1, 513, -1, -1}, //12 // (DMRS l' position)
|
||||
{1, 1025, -1, -1, 1, 513, -1, -1}, //13 // (DMRS l' position)
|
||||
{1, 1025, -1, -1, 1, 513, -1, -1}, //14 // (DMRS l' position)
|
||||
};
|
||||
|
||||
#define NR_BANDTABLE_SIZE (sizeof(nr_bandtable)/sizeof(nr_bandentry_t))
|
||||
|
||||
void get_band(uint64_t downlink_frequency,
|
||||
@@ -1656,6 +1697,113 @@ uint8_t getAntPortBitWidth(NR_SetupRelease_DMRS_DownlinkConfig_t *typeA, NR_Setu
|
||||
return nbits;
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************
|
||||
*
|
||||
* NAME : get_l0_ul
|
||||
*
|
||||
* PARAMETERS : mapping_type : PUSCH mapping type
|
||||
* dmrs_typeA_position : higher layer parameter
|
||||
*
|
||||
* RETURN : demodulation reference signal for PUSCH
|
||||
*
|
||||
* DESCRIPTION : see TS 38.211 V15.4.0 Demodulation reference signals for PUSCH
|
||||
*
|
||||
*********************************************************************/
|
||||
|
||||
uint8_t get_l0_ul(uint8_t mapping_type, uint8_t dmrs_typeA_position) {
|
||||
|
||||
return ((mapping_type==typeA)?dmrs_typeA_position:0);
|
||||
|
||||
}
|
||||
|
||||
int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmrs_AdditionalPosition_t additional_pos, pusch_maxLength_t pusch_maxLength) {
|
||||
|
||||
uint8_t row, colomn;
|
||||
int32_t l_prime;
|
||||
|
||||
colomn = additional_pos;
|
||||
|
||||
if (mapping_type == typeB)
|
||||
colomn += 4;
|
||||
|
||||
if (duration_in_symbols < 4)
|
||||
row = 0;
|
||||
else
|
||||
row = duration_in_symbols - 3;
|
||||
|
||||
if (pusch_maxLength == pusch_len1)
|
||||
l_prime = table_6_4_1_1_3_3_pusch_dmrs_positions_l[row][colomn];
|
||||
else
|
||||
l_prime = table_6_4_1_1_3_4_pusch_dmrs_positions_l[row][colomn];
|
||||
|
||||
AssertFatal(l_prime>0,"invalid l_prime < 0\n");
|
||||
|
||||
return l_prime;
|
||||
}
|
||||
|
||||
/*******************************************************************
|
||||
*
|
||||
* NAME : get_L_ptrs
|
||||
*
|
||||
* PARAMETERS : mcs(i) higher layer parameter in PTRS-UplinkConfig
|
||||
* I_mcs MCS index used for PUSCH
|
||||
* mcs_table 0 for table 5.1.3.1-1, 1 for table 5.1.3.1-1
|
||||
*
|
||||
* RETURN : the parameter L_ptrs
|
||||
*
|
||||
* DESCRIPTION : 3GPP TS 38.214 section 6.2.3.1
|
||||
*
|
||||
*********************************************************************/
|
||||
|
||||
uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint8_t mcs_table) {
|
||||
|
||||
uint8_t mcs4;
|
||||
|
||||
if(mcs_table == 0)
|
||||
mcs4 = 29;
|
||||
else
|
||||
mcs4 = 28;
|
||||
|
||||
if (I_mcs < mcs1) {
|
||||
LOG_I(PHY, "PUSH PT-RS is not present.\n");
|
||||
return -1;
|
||||
} else if (I_mcs >= mcs1 && I_mcs < mcs2)
|
||||
return 2;
|
||||
else if (I_mcs >= mcs2 && I_mcs < mcs3)
|
||||
return 1;
|
||||
else if (I_mcs >= mcs3 && I_mcs < mcs4)
|
||||
return 0;
|
||||
else {
|
||||
LOG_I(PHY, "PT-RS time-density determination is obtained from the DCI for the same transport block in the initial transmission\n");
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************
|
||||
*
|
||||
* NAME : get_K_ptrs
|
||||
*
|
||||
* PARAMETERS : ptrs_UplinkConfig PTRS uplink configuration
|
||||
* N_RB number of RBs scheduled for PUSCH
|
||||
*
|
||||
* RETURN : the parameter K_ptrs
|
||||
*
|
||||
* DESCRIPTION : 3GPP TS 38.214 6.2.3 Table 6.2.3.1-2
|
||||
*
|
||||
*********************************************************************/
|
||||
|
||||
uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB) {
|
||||
|
||||
if (N_RB < nrb0) {
|
||||
LOG_I(PHY,"PUSH PT-RS is not present.\n");
|
||||
return -1;
|
||||
} else if (N_RB >= nrb0 && N_RB < nrb1)
|
||||
return 0;
|
||||
else
|
||||
return 1;
|
||||
}
|
||||
|
||||
uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup,
|
||||
dci_pdu_rel15_t *dci_pdu,
|
||||
nr_dci_format_t format,
|
||||
|
||||
@@ -43,7 +43,7 @@ extern const uint8_t cqi2fmt0_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE];
|
||||
extern const uint8_t cqi2fmt1x_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE];
|
||||
extern const uint8_t cqi2fmt2x_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE];
|
||||
extern UE_RRC_INST *UE_rrc_inst;
|
||||
extern int cqi_to_mcs[16];
|
||||
extern const int cqi_to_mcs[16];
|
||||
extern uint32_t RRC_CONNECTION_FLAG;
|
||||
extern uint8_t rb_table[34];
|
||||
extern mac_rlc_am_muilist_t rlc_am_mui;
|
||||
|
||||
@@ -129,7 +129,7 @@ int8_t nr_ue_process_dlsch(module_id_t module_id,
|
||||
//fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
|
||||
nr_phy_config_t *phy_config = &mac->phy_config;
|
||||
|
||||
//ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti;
|
||||
//ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.rnti = rnti;
|
||||
// First we need to verify if DCI ind contains a ul-sch to be perfomred. If it does, we will handle a PUSCH in the UL_CONFIG_REQ.
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUCCH;
|
||||
for (int i=0; i<10; i++) {
|
||||
@@ -139,29 +139,28 @@ int8_t nr_ue_process_dlsch(module_id_t module_id,
|
||||
}
|
||||
if (ul_config->ul_config_list[ul_config->number_pdus].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH) {
|
||||
// fill in the elements in config request inside P5 message
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.bandwidth_part_ind = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.number_rbs = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.start_rb = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.frame_offset = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.number_symbols = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.start_symbol = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.pusch_freq_hopping = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.mcs = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.ndi = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.rv = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.harq_process_nbr = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.accumulated_delta_PUSCH = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.absolute_delta_PUSCH = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.tpmi = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_dmrs_cdm_groups = 0;
|
||||
for (int i=0;i<4;i++) ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.dmrs_ports[i]=0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_front_load_symb = 0;
|
||||
//ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.srs_config = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.csi_reportTriggerSize = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.maxCodeBlockGroupsPerTransportBlock = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.ptrs_dmrs_association_port = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.beta_offset_ind = 0;
|
||||
//ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.bandwidth_part_ind = 0; //FIXME
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.rb_size = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.rb_start = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.nr_of_symbols = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.start_symbol_index = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.frequency_hopping = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.mcs_index = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.pusch_data.new_data_indicator = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.pusch_data.rv_index = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.pusch_data.harq_process_id = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.absolute_delta_PUSCH = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.nrOfLayers = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.transform_precoding = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.num_dmrs_cdm_grps_no_data = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.dmrs_ports = 0;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.dmrs_config_type = 0;
|
||||
//ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.n_front_load_symb = 0; //FIXME
|
||||
//ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.srs_config = 0; //FIXME
|
||||
//ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.csi_reportTriggerSize = 0; //FIXME
|
||||
//ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.maxCodeBlockGroupsPerTransportBlock = 0; //FIXME
|
||||
//ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.ptrs_dmrs_association_port = 0; FIXME
|
||||
//ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.beta_offset_ind = 0; //FIXME
|
||||
} else { // If DCI ind is not format 0_0 or 0_1, we will handle a PUCCH in the UL_CONFIG_REQ
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUCCH;
|
||||
// If we handle PUCCH common
|
||||
@@ -1863,7 +1862,7 @@ uint8_t table_7_3_2_3_3_4_twoCodeword[6][10] = {
|
||||
{2,0,1,2,3,6,7,8,0,2},
|
||||
{2,0,1,2,3,6,7,8,9,2}
|
||||
};
|
||||
int8_t nr_ue_process_dci_freq_dom_resource_assignment(fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu,
|
||||
int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
|
||||
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
|
||||
uint16_t n_RB_ULBWP,
|
||||
uint16_t n_RB_DLBWP,
|
||||
@@ -1886,7 +1885,7 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(fapi_nr_ul_config_pusch_pd
|
||||
dlsch_config_pdu->start_rb = NRRIV2PRBOFFSET(riv,n_RB_DLBWP);
|
||||
|
||||
}
|
||||
if(ulsch_config_pdu != NULL){
|
||||
if(pusch_config_pdu != NULL){
|
||||
/*
|
||||
* TS 38.214 subclause 6.1.2.2 Resource allocation in frequency domain (uplink)
|
||||
*/
|
||||
@@ -1897,14 +1896,14 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(fapi_nr_ul_config_pusch_pd
|
||||
* TS 38.214 subclause 6.1.2.2.2 Uplink resource allocation type 1
|
||||
*/
|
||||
|
||||
ulsch_config_pdu->number_rbs = NRRIV2BW(riv,n_RB_ULBWP);
|
||||
ulsch_config_pdu->start_rb = NRRIV2PRBOFFSET(riv,n_RB_ULBWP);
|
||||
pusch_config_pdu->rb_size = NRRIV2BW(riv,n_RB_ULBWP);
|
||||
pusch_config_pdu->rb_start = NRRIV2PRBOFFSET(riv,n_RB_ULBWP);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
|
||||
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu,
|
||||
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
|
||||
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
|
||||
uint8_t time_domain_ind
|
||||
){
|
||||
@@ -2043,9 +2042,6 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
|
||||
SLIV2SL(startSymbolAndLength,&S,&L);
|
||||
dlsch_config_pdu->start_symbol=S;
|
||||
dlsch_config_pdu->number_symbols=L;
|
||||
dlsch_config_pdu->frame_offset = pdsch_TimeDomainAllocationList->list.array[time_domain_ind]->k0!=NULL ?
|
||||
*pdsch_TimeDomainAllocationList->list.array[time_domain_ind]->k0 :
|
||||
0;
|
||||
}
|
||||
else {// Default configuration from tables
|
||||
k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0];
|
||||
@@ -2060,14 +2056,13 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
|
||||
// k_offset = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][0];
|
||||
// sliv_S = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][1];
|
||||
// sliv_L = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][2];
|
||||
dlsch_config_pdu->frame_offset = k_offset;
|
||||
dlsch_config_pdu->number_symbols = sliv_L;
|
||||
dlsch_config_pdu->start_symbol = sliv_S;
|
||||
}
|
||||
} /*
|
||||
* TS 38.214 subclause 6.1.2.1 Resource allocation in time domain (uplink)
|
||||
*/
|
||||
if(ulsch_config_pdu != NULL){
|
||||
if(pusch_config_pdu != NULL){
|
||||
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
|
||||
if (mac->ULbwp[0]->bwp_Dedicated->pusch_Config)
|
||||
pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup;
|
||||
@@ -2079,12 +2074,8 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
|
||||
int startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[time_domain_ind]->startSymbolAndLength;
|
||||
int S,L;
|
||||
SLIV2SL(startSymbolAndLength,&S,&L);
|
||||
ulsch_config_pdu->start_symbol=S;
|
||||
ulsch_config_pdu->number_symbols=L;
|
||||
ulsch_config_pdu->frame_offset = pusch_TimeDomainAllocationList->list.array[time_domain_ind]->k2!=NULL ?
|
||||
*pusch_TimeDomainAllocationList->list.array[time_domain_ind]->k2 :
|
||||
mac->ULbwp[0]->bwp_Common->genericParameters.subcarrierSpacing < NR_SubcarrierSpacing_kHz60 ? 1 :
|
||||
mac->ULbwp[0]->bwp_Common->genericParameters.subcarrierSpacing < NR_SubcarrierSpacing_kHz120 ? 2 : 3;
|
||||
pusch_config_pdu->start_symbol_index=S;
|
||||
pusch_config_pdu->nr_of_symbols=L;
|
||||
}
|
||||
else {
|
||||
k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0];
|
||||
@@ -2093,9 +2084,8 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
|
||||
// k_offset = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0];
|
||||
// sliv_S = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1];
|
||||
// sliv_L = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2];
|
||||
ulsch_config_pdu->frame_offset = k_offset;
|
||||
ulsch_config_pdu->number_symbols = sliv_L;
|
||||
ulsch_config_pdu->start_symbol = sliv_S;
|
||||
pusch_config_pdu->nr_of_symbols = sliv_L;
|
||||
pusch_config_pdu->start_symbol_index = sliv_S;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
@@ -2148,45 +2138,42 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
|
||||
* 50 SUL_IND_0_0:
|
||||
*/
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti;
|
||||
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu_0_0 = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.rnti = rnti;
|
||||
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu_0_0 = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu;
|
||||
/* IDENTIFIER_DCI_FORMATS */
|
||||
/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
|
||||
nr_ue_process_dci_freq_dom_resource_assignment(ulsch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->frequency_domain_assignment.val);
|
||||
nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->frequency_domain_assignment.val);
|
||||
/* TIME_DOM_RESOURCE_ASSIGNMENT */
|
||||
nr_ue_process_dci_time_dom_resource_assignment(mac,
|
||||
ulsch_config_pdu_0_0,NULL,
|
||||
pusch_config_pdu_0_0,NULL,
|
||||
dci->time_domain_assignment.val);
|
||||
|
||||
/* FREQ_HOPPING_FLAG */
|
||||
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0))
|
||||
ulsch_config_pdu_0_0->pusch_freq_hopping = (dci->frequency_hopping_flag.val == 0)? pusch_freq_hopping_disabled:pusch_freq_hopping_enabled;
|
||||
pusch_config_pdu_0_0->frequency_hopping = dci->frequency_hopping_flag.val;
|
||||
|
||||
/* MCS */
|
||||
ulsch_config_pdu_0_0->mcs = dci->mcs;
|
||||
pusch_config_pdu_0_0->mcs_index = dci->mcs;
|
||||
/* NDI */
|
||||
ulsch_config_pdu_0_0->ndi = dci->ndi;
|
||||
pusch_config_pdu_0_0->pusch_data.new_data_indicator = dci->ndi;
|
||||
/* RV */
|
||||
ulsch_config_pdu_0_0->rv = dci->rv;
|
||||
pusch_config_pdu_0_0->pusch_data.rv_index = dci->rv;
|
||||
/* HARQ_PROCESS_NUMBER */
|
||||
ulsch_config_pdu_0_0->harq_process_nbr = dci->harq_pid;
|
||||
pusch_config_pdu_0_0->pusch_data.harq_process_id = dci->harq_pid;
|
||||
/* TPC_PUSCH */
|
||||
// according to TS 38.213 Table Table 7.1.1-1
|
||||
if (dci->tpc == 0) {
|
||||
ulsch_config_pdu_0_0->accumulated_delta_PUSCH = -1;
|
||||
ulsch_config_pdu_0_0->absolute_delta_PUSCH = -4;
|
||||
pusch_config_pdu_0_0->absolute_delta_PUSCH = -4;
|
||||
}
|
||||
if (dci->tpc == 1) {
|
||||
ulsch_config_pdu_0_0->accumulated_delta_PUSCH = 0;
|
||||
ulsch_config_pdu_0_0->absolute_delta_PUSCH = -1;
|
||||
pusch_config_pdu_0_0->absolute_delta_PUSCH = -1;
|
||||
}
|
||||
if (dci->tpc == 2) {
|
||||
ulsch_config_pdu_0_0->accumulated_delta_PUSCH = 1;
|
||||
ulsch_config_pdu_0_0->absolute_delta_PUSCH = 1;
|
||||
pusch_config_pdu_0_0->absolute_delta_PUSCH = 1;
|
||||
}
|
||||
if (dci->tpc == 3) {
|
||||
ulsch_config_pdu_0_0->accumulated_delta_PUSCH = 3;
|
||||
ulsch_config_pdu_0_0->absolute_delta_PUSCH = 4;
|
||||
pusch_config_pdu_0_0->absolute_delta_PUSCH = 4;
|
||||
}
|
||||
/* SUL_IND_0_0 */ // To be implemented, FIXME!!!
|
||||
|
||||
@@ -2223,49 +2210,45 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
|
||||
* 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
|
||||
*/
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti;
|
||||
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu_0_1 = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15;
|
||||
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.rnti = rnti;
|
||||
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu_0_1 = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu;
|
||||
/* IDENTIFIER_DCI_FORMATS */
|
||||
/* CARRIER_IND */
|
||||
/* SUL_IND_0_1 */
|
||||
/* BANDWIDTH_PART_IND */
|
||||
ulsch_config_pdu_0_1->bandwidth_part_ind = dci->bwp_indicator.val;
|
||||
//pusch_config_pdu_0_1->bandwidth_part_ind = dci->bwp_indicator.val;
|
||||
/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
|
||||
nr_ue_process_dci_freq_dom_resource_assignment(ulsch_config_pdu_0_1,NULL,n_RB_ULBWP,0,dci->frequency_domain_assignment.val);
|
||||
nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu_0_1,NULL,n_RB_ULBWP,0,dci->frequency_domain_assignment.val);
|
||||
/* TIME_DOM_RESOURCE_ASSIGNMENT */
|
||||
nr_ue_process_dci_time_dom_resource_assignment(mac,ulsch_config_pdu_0_1,NULL,
|
||||
nr_ue_process_dci_time_dom_resource_assignment(mac,pusch_config_pdu_0_1,NULL,
|
||||
dci->time_domain_assignment.val);
|
||||
/* FREQ_HOPPING_FLAG */
|
||||
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0))
|
||||
ulsch_config_pdu_0_1->pusch_freq_hopping = (dci->frequency_hopping_flag.val == 0)? pusch_freq_hopping_disabled:pusch_freq_hopping_enabled;
|
||||
pusch_config_pdu_0_1->frequency_hopping = dci->frequency_hopping_flag.val;
|
||||
/* MCS */
|
||||
ulsch_config_pdu_0_1->mcs = dci->mcs;
|
||||
pusch_config_pdu_0_1->mcs_index = dci->mcs;
|
||||
/* NDI */
|
||||
ulsch_config_pdu_0_1->ndi = dci->ndi;
|
||||
pusch_config_pdu_0_1->pusch_data.new_data_indicator = dci->ndi;
|
||||
/* RV */
|
||||
ulsch_config_pdu_0_1->rv = dci->rv;
|
||||
pusch_config_pdu_0_1->pusch_data.rv_index = dci->rv;
|
||||
/* HARQ_PROCESS_NUMBER */
|
||||
ulsch_config_pdu_0_1->harq_process_nbr = dci->harq_pid;
|
||||
pusch_config_pdu_0_1->pusch_data.harq_process_id = dci->harq_pid;
|
||||
/* FIRST_DAI */ //To be implemented, FIXME!!!
|
||||
/* SECOND_DAI */ //To be implemented, FIXME!!!
|
||||
/* TPC_PUSCH */
|
||||
// according to TS 38.213 Table Table 7.1.1-1
|
||||
if (dci->tpc == 0) {
|
||||
ulsch_config_pdu_0_1->accumulated_delta_PUSCH = -1;
|
||||
ulsch_config_pdu_0_1->absolute_delta_PUSCH = -4;
|
||||
pusch_config_pdu_0_1->absolute_delta_PUSCH = -4;
|
||||
}
|
||||
if (dci->tpc == 1) {
|
||||
ulsch_config_pdu_0_1->accumulated_delta_PUSCH = 0;
|
||||
ulsch_config_pdu_0_1->absolute_delta_PUSCH = -1;
|
||||
pusch_config_pdu_0_1->absolute_delta_PUSCH = -1;
|
||||
}
|
||||
if (dci->tpc == 2) {
|
||||
ulsch_config_pdu_0_1->accumulated_delta_PUSCH = 1;
|
||||
ulsch_config_pdu_0_1->absolute_delta_PUSCH = 1;
|
||||
pusch_config_pdu_0_1->absolute_delta_PUSCH = 1;
|
||||
}
|
||||
if (dci->tpc == 3) {
|
||||
ulsch_config_pdu_0_1->accumulated_delta_PUSCH = 3;
|
||||
ulsch_config_pdu_0_1->absolute_delta_PUSCH = 4;
|
||||
pusch_config_pdu_0_1->absolute_delta_PUSCH = 4;
|
||||
}
|
||||
/* SRS_RESOURCE_IND */
|
||||
//FIXME!!
|
||||
@@ -2282,16 +2265,16 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 3) ||
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 4))){
|
||||
if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_fullyAndPartialAndNonCoherent) {
|
||||
ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][0];
|
||||
ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][1];
|
||||
pusch_config_pdu_0_1->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][0];
|
||||
pusch_config_pdu_0_1->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][1];
|
||||
}
|
||||
if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_partialAndNonCoherent){
|
||||
ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][2];
|
||||
ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][3];
|
||||
pusch_config_pdu_0_1->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][2];
|
||||
pusch_config_pdu_0_1->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][3];
|
||||
}
|
||||
if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_nonCoherent){
|
||||
ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][4];
|
||||
ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][5];
|
||||
pusch_config_pdu_0_1->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][4];
|
||||
pusch_config_pdu_0_1->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][5];
|
||||
}
|
||||
}
|
||||
// Table 7.3.1.1.2-3: transformPrecoder= enabled, or transformPrecoder=disabled and maxRank = 1
|
||||
@@ -2299,16 +2282,16 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
|
||||
|| (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled))
|
||||
&& (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 1)){
|
||||
if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_fullyAndPartialAndNonCoherent) {
|
||||
ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][6];
|
||||
ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][7];
|
||||
pusch_config_pdu_0_1->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][6];
|
||||
pusch_config_pdu_0_1->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][7];
|
||||
}
|
||||
if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_partialAndNonCoherent){
|
||||
ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][8];
|
||||
ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][9];
|
||||
pusch_config_pdu_0_1->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][8];
|
||||
pusch_config_pdu_0_1->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][9];
|
||||
}
|
||||
if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_nonCoherent){
|
||||
ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][10];
|
||||
ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][11];
|
||||
pusch_config_pdu_0_1->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][10];
|
||||
pusch_config_pdu_0_1->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][11];
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -2317,12 +2300,12 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
|
||||
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled)
|
||||
&& (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 2)){
|
||||
if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_fullyAndPartialAndNonCoherent) {
|
||||
ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][12];
|
||||
ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][13];
|
||||
pusch_config_pdu_0_1->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][12];
|
||||
pusch_config_pdu_0_1->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][13];
|
||||
}
|
||||
if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_nonCoherent){
|
||||
ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][14];
|
||||
ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][15];
|
||||
pusch_config_pdu_0_1->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][14];
|
||||
pusch_config_pdu_0_1->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][15];
|
||||
}
|
||||
}
|
||||
// Table 7.3.1.1.2-5: transformPrecoder= enabled, or transformPrecoder= disabled and maxRank = 1
|
||||
@@ -2330,12 +2313,12 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
|
||||
|| (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled))
|
||||
&& (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 1)){
|
||||
if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_fullyAndPartialAndNonCoherent) {
|
||||
ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][16];
|
||||
ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][17];
|
||||
pusch_config_pdu_0_1->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][16];
|
||||
pusch_config_pdu_0_1->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][17];
|
||||
}
|
||||
if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_nonCoherent){
|
||||
ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][18];
|
||||
ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][19];
|
||||
pusch_config_pdu_0_1->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][18];
|
||||
pusch_config_pdu_0_1->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][19];
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -2345,146 +2328,158 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
|
||||
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_enabled) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 1) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 1)) { // tables 7.3.1.1.2-6
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = dci->antenna_ports.val;
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = 2; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = dci->antenna_ports.val; //TBC
|
||||
}
|
||||
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_enabled) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 1) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 2)) { // tables 7.3.1.1.2-7
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports.val > 3)?(dci->antenna_ports.val-4):(dci->antenna_ports.val);
|
||||
ulsch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports.val > 3)?2:1;
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = 2; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = (dci->antenna_ports.val > 3)?(dci->antenna_ports.val-4):(dci->antenna_ports.val); //TBC
|
||||
//pusch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports > 3)?2:1; //FIXME
|
||||
}
|
||||
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 1) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 1)) { // tables 7.3.1.1.2-8/9/10/11
|
||||
if (rank == 1){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports.val > 1)?2:1;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val-2):(dci->antenna_ports.val);
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 1)?2:1; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val-2):(dci->antenna_ports.val); //TBC
|
||||
}
|
||||
if (rank == 2){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports.val > 0)?2:1;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val > 2 ?0:2):0;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[1] = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val > 2 ?2:3):1;
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?2:1; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = 0; //FIXME
|
||||
//pusch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports > 1)?(dci->antenna_ports > 2 ?0:2):0;
|
||||
//pusch_config_pdu_0_1->dmrs_ports[1] = (dci->antenna_ports > 1)?(dci->antenna_ports > 2 ?2:3):1;
|
||||
}
|
||||
if (rank == 3){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = 0;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[1] = 1;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[2] = 2;
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = 2; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = 0; //FIXME
|
||||
//pusch_config_pdu_0_1->dmrs_ports[0] = 0;
|
||||
//pusch_config_pdu_0_1->dmrs_ports[1] = 1;
|
||||
//pusch_config_pdu_0_1->dmrs_ports[2] = 2;
|
||||
}
|
||||
if (rank == 4){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = 0;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[1] = 1;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[2] = 2;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[3] = 3;
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = 2; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = 0; //FIXME
|
||||
//pusch_config_pdu_0_1->dmrs_ports[0] = 0;
|
||||
//pusch_config_pdu_0_1->dmrs_ports[1] = 1;
|
||||
//pusch_config_pdu_0_1->dmrs_ports[2] = 2;
|
||||
//pusch_config_pdu_0_1->dmrs_ports[3] = 3;
|
||||
}
|
||||
}
|
||||
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 1) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 2)) { // tables 7.3.1.1.2-12/13/14/15
|
||||
if (rank == 1){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports.val > 1)?2:1;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val > 5 ?(dci->antenna_ports.val-6):(dci->antenna_ports.val-2)):dci->antenna_ports.val;
|
||||
ulsch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports.val > 6)?2:1;
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 1)?2:1; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val > 5 ?(dci->antenna_ports.val-6):(dci->antenna_ports.val-2)):dci->antenna_ports.val; //TBC
|
||||
//pusch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports.val > 6)?2:1; //FIXME
|
||||
}
|
||||
if (rank == 2){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports.val > 0)?2:1;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_13[dci->antenna_ports.val][1];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_13[dci->antenna_ports.val][2];
|
||||
ulsch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports.val > 3)?2:1;
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?2:1; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = 0; //FIXME
|
||||
//pusch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_13[dci->antenna_ports.val][1];
|
||||
//pusch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_13[dci->antenna_ports.val][2];
|
||||
//pusch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports.val > 3)?2:1; // FIXME
|
||||
}
|
||||
if (rank == 3){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_14[dci->antenna_ports.val][1];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_14[dci->antenna_ports.val][2];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_14[dci->antenna_ports.val][3];
|
||||
ulsch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports.val > 1)?2:1;
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = 2; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = 0; //FIXME
|
||||
//pusch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_14[dci->antenna_ports.val][1];
|
||||
//pusch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_14[dci->antenna_ports.val][2];
|
||||
//pusch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_14[dci->antenna_ports.val][3];
|
||||
//pusch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports.val > 1)?2:1; //FIXME
|
||||
}
|
||||
if (rank == 4){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_15[dci->antenna_ports.val][1];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_15[dci->antenna_ports.val][2];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_15[dci->antenna_ports.val][3];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[3] = table_7_3_1_1_2_15[dci->antenna_ports.val][4];
|
||||
ulsch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports.val > 1)?2:1;
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = 2; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = 0; //FIXME
|
||||
//pusch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_15[dci->antenna_ports.val][1];
|
||||
//pusch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_15[dci->antenna_ports.val][2];
|
||||
//pusch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_15[dci->antenna_ports.val][3];
|
||||
//pusch_config_pdu_0_1->dmrs_ports[3] = table_7_3_1_1_2_15[dci->antenna_ports.val][4];
|
||||
//pusch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports.val > 1)?2:1; //FIXME
|
||||
}
|
||||
}
|
||||
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 2) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 1)) { // tables 7.3.1.1.2-16/17/18/19
|
||||
if (rank == 1){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports.val > 1)?((dci->antenna_ports.val > 5)?3:2):1;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val > 5 ?(dci->antenna_ports.val-6):(dci->antenna_ports.val-2)):dci->antenna_ports.val;
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 1)?((dci->antenna_ports.val > 5)?3:2):1; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val > 5 ?(dci->antenna_ports.val-6):(dci->antenna_ports.val-2)):dci->antenna_ports.val; //TBC
|
||||
}
|
||||
if (rank == 2){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports.val > 0)?((dci->antenna_ports.val > 2)?3:2):1;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_17[dci->antenna_ports.val][1];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_17[dci->antenna_ports.val][2];
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?((dci->antenna_ports.val > 2)?3:2):1; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = 0; //FIXME
|
||||
//pusch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_17[dci->antenna_ports.val][1];
|
||||
//pusch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_17[dci->antenna_ports.val][2];
|
||||
}
|
||||
if (rank == 3){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports.val > 0)?3:2;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_18[dci->antenna_ports.val][1];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_18[dci->antenna_ports.val][2];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_18[dci->antenna_ports.val][3];
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?3:2; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = 0; //FIXME
|
||||
//pusch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_18[dci->antenna_ports.val][1];
|
||||
//pusch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_18[dci->antenna_ports.val][2];
|
||||
//pusch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_18[dci->antenna_ports.val][3];
|
||||
}
|
||||
if (rank == 4){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = dci->antenna_ports.val + 2;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = 0;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[1] = 1;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[2] = 2;
|
||||
ulsch_config_pdu_0_1->dmrs_ports[3] = 3;
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = dci->antenna_ports.val + 2; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = 0; //FIXME
|
||||
//pusch_config_pdu_0_1->dmrs_ports[0] = 0;
|
||||
//pusch_config_pdu_0_1->dmrs_ports[1] = 1;
|
||||
//pusch_config_pdu_0_1->dmrs_ports[2] = 2;
|
||||
//pusch_config_pdu_0_1->dmrs_ports[3] = 3;
|
||||
}
|
||||
}
|
||||
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 2) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 2)) { // tables 7.3.1.1.2-20/21/22/23
|
||||
if (rank == 1){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = table_7_3_1_1_2_20[dci->antenna_ports.val][0];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_20[dci->antenna_ports.val][1];
|
||||
ulsch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_20[dci->antenna_ports.val][2];
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_20[dci->antenna_ports.val][0]; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = table_7_3_1_1_2_20[dci->antenna_ports.val][1]; //TBC
|
||||
//pusch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_20[dci->antenna_ports.val][2]; //FIXME
|
||||
}
|
||||
if (rank == 2){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = table_7_3_1_1_2_21[dci->antenna_ports.val][0];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_21[dci->antenna_ports.val][1];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_21[dci->antenna_ports.val][2];
|
||||
ulsch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_21[dci->antenna_ports.val][3];
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_21[dci->antenna_ports.val][0]; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = 0; //FIXME
|
||||
//pusch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_21[dci->antenna_ports.val][1];
|
||||
//pusch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_21[dci->antenna_ports.val][2];
|
||||
//pusch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_21[dci->antenna_ports.val][3]; //FIXME
|
||||
}
|
||||
if (rank == 3){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = table_7_3_1_1_2_22[dci->antenna_ports.val][0];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_22[dci->antenna_ports.val][1];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_22[dci->antenna_ports.val][2];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_22[dci->antenna_ports.val][3];
|
||||
ulsch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_22[dci->antenna_ports.val][4];
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_22[dci->antenna_ports.val][0]; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = 0; //FIXME
|
||||
//pusch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_22[dci->antenna_ports.val][1];
|
||||
//pusch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_22[dci->antenna_ports.val][2];
|
||||
//pusch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_22[dci->antenna_ports.val][3];
|
||||
//pusch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_22[dci->antenna_ports.val][4]; //FIXME
|
||||
}
|
||||
if (rank == 4){
|
||||
ulsch_config_pdu_0_1->n_dmrs_cdm_groups = table_7_3_1_1_2_23[dci->antenna_ports.val][0];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_23[dci->antenna_ports.val][1];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_23[dci->antenna_ports.val][2];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_23[dci->antenna_ports.val][3];
|
||||
ulsch_config_pdu_0_1->dmrs_ports[3] = table_7_3_1_1_2_23[dci->antenna_ports.val][4];
|
||||
ulsch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_23[dci->antenna_ports.val][5];
|
||||
pusch_config_pdu_0_1->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_23[dci->antenna_ports.val][0]; //TBC
|
||||
pusch_config_pdu_0_1->dmrs_ports = 0; //FIXME
|
||||
//pusch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_23[dci->antenna_ports.val][1];
|
||||
//pusch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_23[dci->antenna_ports.val][2];
|
||||
//pusch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_23[dci->antenna_ports.val][3];
|
||||
//pusch_config_pdu_0_1->dmrs_ports[3] = table_7_3_1_1_2_23[dci->antenna_ports.val][4];
|
||||
//pusch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_23[dci->antenna_ports.val][5]; //FIXME
|
||||
}
|
||||
}
|
||||
/* SRS_REQUEST */
|
||||
// if SUL is supported in the cell, there is an additional bit in thsi field and the value of this bit represents table 7.1.1.1-1 TS 38.212 FIXME!!!
|
||||
ulsch_config_pdu_0_1->srs_config.aperiodicSRS_ResourceTrigger = (dci->srs_request.val & 0x11); // as per Table 7.3.1.1.2-24 TS 38.212
|
||||
//pusch_config_pdu_0_1->srs_config.aperiodicSRS_ResourceTrigger = (dci->srs_request.val & 0x11); // as per Table 7.3.1.1.2-24 TS 38.212 //FIXME
|
||||
/* CSI_REQUEST */
|
||||
ulsch_config_pdu_0_1->csi_reportTriggerSize = dci->csi_request.val;
|
||||
//pusch_config_pdu_0_1->csi_reportTriggerSize = dci->csi_request.val; //FIXME
|
||||
/* CBGTI */
|
||||
ulsch_config_pdu_0_1->maxCodeBlockGroupsPerTransportBlock = dci->cbgti.val;
|
||||
//pusch_config_pdu_0_1->maxCodeBlockGroupsPerTransportBlock = dci->cbgti.val; //FIXME
|
||||
/* PTRS_DMRS */
|
||||
if (((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.ptrs_uplink_config == 0)) ||
|
||||
((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_enabled) &&
|
||||
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 1))){
|
||||
} else {
|
||||
ulsch_config_pdu_0_1->ptrs_dmrs_association_port = dci->ptrs_dmrs_association.val;
|
||||
//pusch_config_pdu_0_1->ptrs_dmrs_association_port = dci->ptrs_dmrs_association.val; //FIXME
|
||||
}
|
||||
/* BETA_OFFSET_IND */
|
||||
// Table 9.3-3 in [5, TS 38.213]
|
||||
ulsch_config_pdu_0_1->beta_offset_ind = dci->beta_offset_indicator.val;
|
||||
//pusch_config_pdu_0_1->beta_offset_ind = dci->beta_offset_indicator.val; //FIXME
|
||||
/* DMRS_SEQ_INI */
|
||||
// FIXME!!
|
||||
/* UL_SCH_IND */
|
||||
|
||||
@@ -368,6 +368,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
|
||||
|
||||
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
|
||||
NR_UE_list_t *UE_list = &gNB->UE_list;
|
||||
|
||||
NR_UE_sched_ctrl_t *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
|
||||
NR_COMMON_channels_t *cc = RC.nrmac[module_idP]->common_channels;
|
||||
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
|
||||
|
||||
@@ -798,13 +798,7 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
|
||||
pusch_pdu->transform_precoding = 0;
|
||||
pusch_pdu->data_scrambling_id = 0; //It equals the higher-layer parameter Data-scrambling-Identity if configured and the RNTI equals the C-RNTI, otherwise L2 needs to set it to physical cell id.;
|
||||
pusch_pdu->nrOfLayers = 1;
|
||||
//DMRS
|
||||
pusch_pdu->ul_dmrs_symb_pos = 1<<2; //for now the gnb assumes dmrs in the first symbol of the scheduled pusch resource
|
||||
pusch_pdu->dmrs_config_type = 0; //dmrs-type 1 (the one with a single DMRS symbol in the beginning)
|
||||
pusch_pdu->ul_dmrs_scrambling_id = 0; //If provided and the PUSCH is not a msg3 PUSCH, otherwise, L2 should set this to physical cell id.
|
||||
pusch_pdu->scid = 0; //DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]. Should match what is sent in DCI 0_1, otherwise set to 0.
|
||||
pusch_pdu->num_dmrs_cdm_grps_no_data = 1;
|
||||
//pusch_pdu->dmrs_ports; //DMRS ports. [TS38.212 7.3.1.1.2] provides description between DCI 0-1 content and DMRS ports. Bitmap occupying the 11 LSBs with: bit 0: antenna port 1000 bit 11: antenna port 1011 and for each bit 0: DMRS port not used 1: DMRS port used
|
||||
|
||||
//Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2]
|
||||
pusch_pdu->resource_alloc = 1; //type 1
|
||||
//pusch_pdu->rb_bitmap;// for ressource alloc type 0
|
||||
@@ -817,6 +811,40 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
|
||||
//Resource Allocation in time domain
|
||||
pusch_pdu->start_symbol_index = 2;
|
||||
pusch_pdu->nr_of_symbols = 12;
|
||||
|
||||
// --------------------
|
||||
// ------- DMRS -------
|
||||
// --------------------
|
||||
uint16_t l_prime_mask = get_l_prime(pusch_pdu->nr_of_symbols, typeB, pusch_dmrs_pos0, pusch_len1);
|
||||
pusch_pdu->ul_dmrs_symb_pos = l_prime_mask << pusch_pdu->start_symbol_index;
|
||||
pusch_pdu->dmrs_config_type = 0; // dmrs-type 1 (the one with a single DMRS symbol in the beginning)
|
||||
pusch_pdu->ul_dmrs_scrambling_id = 0; // If provided and the PUSCH is not a msg3 PUSCH, otherwise, L2 should set this to physical cell id
|
||||
pusch_pdu->scid = 0; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]
|
||||
// Should match what is sent in DCI 0_1, otherwise set to 0
|
||||
pusch_pdu->num_dmrs_cdm_grps_no_data = 1;
|
||||
//pusch_pdu->dmrs_ports; // DMRS ports. [TS38.212 7.3.1.1.2] provides description between DCI 0-1 content and DMRS ports
|
||||
// Bitmap occupying the 11 LSBs with: bit 0: antenna port 1000 bit 11: antenna port 1011,
|
||||
// and for each bit 0: DMRS port not used 1: DMRS port used
|
||||
// --------------------------------------------------------------------------------------------------------------------------------------------
|
||||
|
||||
// --------------------
|
||||
// ------- PTRS -------
|
||||
// --------------------
|
||||
uint8_t ptrs_mcs1 = 2; // higher layer parameter in PTRS-UplinkConfig
|
||||
uint8_t ptrs_mcs2 = 4; // higher layer parameter in PTRS-UplinkConfig
|
||||
uint8_t ptrs_mcs3 = 10; // higher layer parameter in PTRS-UplinkConfig
|
||||
uint16_t n_rb0 = 25; // higher layer parameter in PTRS-UplinkConfig
|
||||
uint16_t n_rb1 = 75; // higher layer parameter in PTRS-UplinkConfig
|
||||
pusch_pdu->pusch_ptrs.ptrs_time_density = get_L_ptrs(ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, pusch_pdu->mcs_index, pusch_pdu->mcs_table);
|
||||
pusch_pdu->pusch_ptrs.ptrs_freq_density = get_K_ptrs(n_rb0, n_rb1, pusch_pdu->rb_size);
|
||||
pusch_pdu->pusch_ptrs.ptrs_ports_list = (nfapi_nr_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ptrs_ports_t));
|
||||
pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0;
|
||||
|
||||
if(1<<pusch_pdu->pusch_ptrs.ptrs_time_density >= pusch_pdu->nr_of_symbols)
|
||||
pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS
|
||||
// --------------------------------------------------------------------------------------------------------------------------------------------
|
||||
|
||||
//Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2]
|
||||
//Optional Data only included if indicated in pduBitmap
|
||||
pusch_pdu->pusch_data.rv_index = 0;
|
||||
pusch_pdu->pusch_data.harq_process_id = 0;
|
||||
|
||||
@@ -270,7 +270,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
|
||||
int current_rnti = 0, UE_id = -1, harq_pid = 0;
|
||||
gNB_MAC_INST *gNB_mac = NULL;
|
||||
NR_UE_list_t *UE_list = NULL;
|
||||
UE_sched_ctrl_t *UE_scheduling_control = NULL;
|
||||
NR_UE_sched_ctrl_t *UE_scheduling_control = NULL;
|
||||
|
||||
current_rnti = rntiP;
|
||||
UE_id = find_nr_UE_id(gnb_mod_idP, current_rnti);
|
||||
@@ -280,13 +280,12 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
|
||||
if (UE_id != -1) {
|
||||
UE_scheduling_control = &(UE_list->UE_sched_ctrl[UE_id]);
|
||||
|
||||
LOG_D(MAC, "[gNB %d][PUSCH %d] CC_id %d %d.%d Received ULSCH sdu round %d from PHY (rnti %x, UE_id %d) ul_cqi %d\n",
|
||||
LOG_D(MAC, "[gNB %d][PUSCH %d] CC_id %d %d.%d Received ULSCH sdu from PHY (rnti %x, UE_id %d) ul_cqi %d\n",
|
||||
gnb_mod_idP,
|
||||
harq_pid,
|
||||
CC_idP,
|
||||
frameP,
|
||||
slotP,
|
||||
UE_scheduling_control->round_UL[CC_idP][harq_pid],
|
||||
current_rnti,
|
||||
UE_id,
|
||||
ul_cqi);
|
||||
@@ -302,7 +301,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
|
||||
#endif
|
||||
|
||||
if (sduP != NULL){
|
||||
UE_scheduling_control->ta_update = timing_advance;
|
||||
//UE_scheduling_control->ta_update = timing_advance;
|
||||
LOG_D(MAC, "Received PDU at MAC gNB \n");
|
||||
nr_process_mac_pdu(gnb_mod_idP, CC_idP, frameP, sduP, sdu_lenP);
|
||||
}
|
||||
|
||||
@@ -247,6 +247,11 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP);
|
||||
int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP);
|
||||
|
||||
int get_num_dmrs(uint16_t dmrs_mask );
|
||||
uint8_t get_l0_ul(uint8_t mapping_type, uint8_t dmrs_typeA_position);
|
||||
int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmrs_AdditionalPosition_t additional_pos, pusch_maxLength_t pusch_maxLength);
|
||||
|
||||
uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint8_t mcs_table);
|
||||
uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB);
|
||||
|
||||
uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup,
|
||||
dci_pdu_rel15_t *dci_pdu,
|
||||
|
||||
@@ -1,70 +0,0 @@
|
||||
/*
|
||||
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership.
|
||||
* The OpenAirInterface Software Alliance licenses this file to You under
|
||||
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
|
||||
* except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.openairinterface.org/?page_id=698
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*-------------------------------------------------------------------------------
|
||||
* For more information about the OpenAirInterface (OAI) Software Alliance:
|
||||
* contact@openairinterface.org
|
||||
*/
|
||||
|
||||
/*
|
||||
pdcp_proto_extern.h
|
||||
-------------------
|
||||
AUTHOR : Lionel GAUTHIER
|
||||
COMPANY : EURECOM
|
||||
EMAIL : Lionel.Gauthier@eurecom.fr
|
||||
|
||||
***************************************************************************/
|
||||
#ifndef __PDCP_PROTO_EXTERN_H__
|
||||
# define __PDCP_PROTO_EXTERN_H__
|
||||
|
||||
//# include "pdcp_entity.h"
|
||||
//# include "rb_mux.h"
|
||||
# include "mem_block.h"
|
||||
|
||||
#ifdef ROHC
|
||||
extern void pdcp_data_ind (module_id_t module_idP, rb_id_t rab_idP, sdu_size_t data_sizeP, mem_block_t *sduP);
|
||||
extern void pdcp_data_req (struct pdcp_entity *pdcpP, mem_block *sduP);
|
||||
extern void send_pdcp_control_primitive (struct pdcp_entity *pdcpP, mem_block *cprimitiveP);
|
||||
extern void control_pdcp (struct pdcp_entity *pdcpP);
|
||||
extern void pdcp_process_input_sdus_high(struct pdcp_entity *pdcpP);
|
||||
extern void pdcp_process_input_sdus_am (struct pdcp_entity *pdcpP, uint16_t data_sizeP, mem_block *sduP);
|
||||
extern void pdcp_process_output_sdus (struct pdcp_entity *pdcpP, mem_block *sduP, uint8_t rb_idP);
|
||||
extern void pdcp_process_output_sdus_high (struct pdcp_entity *pdcpP, mem_block *sduP, uint16_t data_sizeP, uint16_t rb_idP);
|
||||
extern void pdcp_process_input_sdus_um (struct pdcp_entity *pdcpP, uint16_t data_sizeP, mem_block *sduP);
|
||||
extern void pdcp_process_input_sdus_tr (struct pdcp_entity *pdcpP, uint16_t data_sizeP, mem_block *sduP);
|
||||
extern void init_pdcp (struct pdcp_entity *pdcpP, struct rb_dispatcher *rbP, uint8_t rb_idP);
|
||||
extern void *pdcp_tx (struct pdcp_entity *pdcpP, uint16_t data_sizeP, mem_block *sduP);
|
||||
extern int reception_from_rohc_mt(void);
|
||||
extern int reception_from_rohc_bs(void);
|
||||
#else
|
||||
extern BOOL pdcp_data_ind (module_id_t module_idP, rb_id_t rab_idP, sdu_size_t data_sizeP, mem_block_t *sduP, uint8_t is_data_plane);
|
||||
extern BOOL pdcp_data_req (module_id_t module_id, uint32_t frame, uint8_t eNB_flag, rb_id_t rab_id, uint32_t muiP, uint32_t confirmP, sdu_size_t sdu_buffer_size, unsigned char *sdu_buffer,
|
||||
uint8_t is_data_pdu,const uint32_t *const sourceL2Id,const uint32_t *const destinationL2Id
|
||||
);
|
||||
//extern BOOL pdcp_data_req (struct pdcp_entity *pdcpP, mem_block * sduP);
|
||||
extern void send_pdcp_control_primitive (struct pdcp_entity *pdcpP, mem_block *cprimitiveP);
|
||||
extern void control_pdcp (struct pdcp_entity *pdcpP);
|
||||
extern void pdcp_process_input_sdus_am (struct pdcp_entity *pdcpP);
|
||||
extern void pdcp_process_output_sdus (struct pdcp_entity *pdcpP, mem_block *sduP, uint8_t rb_idP);
|
||||
extern void pdcp_process_input_sdus_um (struct pdcp_entity *pdcpP);
|
||||
extern void pdcp_process_input_sdus_tr (struct pdcp_entity *pdcpP);
|
||||
extern void init_pdcp (struct pdcp_entity *pdcpP, struct rb_dispatcher *rbP, uint8_t rb_idP);
|
||||
extern void *pdcp_tx (void *argP);
|
||||
#endif
|
||||
|
||||
extern void pdcp_pc5_socket_init(void);
|
||||
|
||||
#endif
|
||||
@@ -26,8 +26,8 @@
|
||||
* \version 0.1
|
||||
*/
|
||||
|
||||
#ifndef M2AP_MCE_HANDLERS_H_
|
||||
#define M2AP_MCE_HANDLERS_H_
|
||||
#ifndef __M2AP_MCE_HANDLERS__H__
|
||||
#define __M2AP_MCE_HANDLERS__H__
|
||||
|
||||
#include "m2ap_MCE_defs.h"
|
||||
|
||||
@@ -40,4 +40,4 @@ int m2ap_MCE_handle_message(instance_t instance, uint32_t assoc_id, int32_t stre
|
||||
//const uint8_t * const data, const uint32_t data_length);
|
||||
|
||||
|
||||
#endif /* M2AP_MCE_HANDLERS_H_ */
|
||||
#endif /* __M2AP_MCE_HANDLERS__H__ */
|
||||
|
||||
@@ -26,8 +26,8 @@
|
||||
* \version 0.1
|
||||
*/
|
||||
|
||||
#ifndef M2AP_MCE_MANAGEMENT_PROCEDURES_H_
|
||||
#define M2AP_MCE_MANAGEMENT_PROCEDURES_H
|
||||
#ifndef __M2AP_MCE_MANAGEMENT_PROCEDURES__H__
|
||||
#define __M2AP_MCE_MANAGEMENT_PROCEDURES__H__
|
||||
|
||||
void m2ap_MCE_prepare_internal_data(void);
|
||||
|
||||
@@ -51,4 +51,4 @@ struct m2ap_MCE_data_s *m2ap_get_MCE(m2ap_MCE_instance_t *instance_p,
|
||||
int32_t assoc_id,
|
||||
uint16_t cnx_id);
|
||||
|
||||
#endif /* M2AP_MCE_MANAGEMENT_PROCEDURES_H_ */
|
||||
#endif /* __M2AP_MCE_MANAGEMENT_PROCEDURES__H__ */
|
||||
|
||||
@@ -26,8 +26,8 @@
|
||||
* \version 0.1
|
||||
*/
|
||||
|
||||
#ifndef M2AP_ENB_GENERATE_MESSAGES_H_
|
||||
#define M2AP_ENB_GENERATE_MESSAGES_H_
|
||||
#ifndef __M2AP_ENB_GENERATE_MESSAGES__H__
|
||||
#define __M2AP_ENB_GENERATE_MESSAGES__H__
|
||||
|
||||
#include "m2ap_eNB_defs.h"
|
||||
#include "m2ap_common.h"
|
||||
@@ -60,4 +60,4 @@ int m2ap_eNB_set_cause (M2AP_Cause_t * cause_p,
|
||||
// int m2_ue_id,
|
||||
// m2ap_handover_cancel_cause_t cause);
|
||||
|
||||
#endif /* M2AP_ENB_GENERATE_MESSAGES_H_ */
|
||||
#endif /* __M2AP_ENB_GENERATE_MESSAGES__H__ */
|
||||
|
||||
@@ -26,8 +26,8 @@
|
||||
* \version 0.1
|
||||
*/
|
||||
|
||||
#ifndef M2AP_ENB_MANAGEMENT_PROCEDURES_H_
|
||||
#define M2AP_ENB_MANAGEMENT_PROCEDURES_H
|
||||
#ifndef __M2AP_ENB_MANAGEMENT_PROCEDURES__H__
|
||||
#define __M2AP_ENB_MANAGEMENT_PROCEDURES__H__
|
||||
|
||||
void m2ap_eNB_prepare_internal_data(void);
|
||||
|
||||
@@ -51,4 +51,4 @@ struct m2ap_eNB_data_s *m2ap_get_eNB(m2ap_eNB_instance_t *instance_p,
|
||||
int32_t assoc_id,
|
||||
uint16_t cnx_id);
|
||||
|
||||
#endif /* M2AP_ENB_MANAGEMENT_PROCEDURES_H_ */
|
||||
#endif /* __M2AP_ENB_MANAGEMENT_PROCEDURES__H__ */
|
||||
|
||||
@@ -30,8 +30,8 @@
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#ifndef _NAS_PROTO_H
|
||||
#define _NAS_PROTO_H
|
||||
#ifndef __NETWORK_DRIVER_LITE_PROTO_EXTERN__H__
|
||||
#define __NETWORK_DRIVER_LITE_PROTO_EXTERN__H__
|
||||
|
||||
#include <linux/if_arp.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
@@ -29,8 +29,8 @@
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#ifndef _NAS_PROTO_H
|
||||
#define _NAS_PROTO_H
|
||||
#ifndef __NETWORK_DRIVER_MESH_PROTO_EXTERN__H__
|
||||
#define __NETWORK_DRIVER_MESH_PROTO_EXTERN__H__
|
||||
|
||||
#include <linux/if_arp.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
@@ -6693,14 +6693,6 @@ char openair_rrc_eNB_configuration(
|
||||
LOG_I(RRC,
|
||||
PROTOCOL_RRC_CTXT_FMT" Init...\n",
|
||||
PROTOCOL_RRC_CTXT_ARGS(&ctxt));
|
||||
#if OCP_FRAMEWORK
|
||||
|
||||
while ( RC.rrc[enb_mod_idP] == NULL ) {
|
||||
LOG_E(RRC, "RC.rrc not yet initialized, waiting 1 second\n");
|
||||
sleep(1);
|
||||
}
|
||||
|
||||
#endif
|
||||
AssertFatal(RC.rrc[enb_mod_idP] != NULL, "RC.rrc not initialized!");
|
||||
AssertFatal(MAX_MOBILES_PER_ENB < (module_id_t)0xFFFFFFFFFFFFFFFF, " variable overflow");
|
||||
AssertFatal(configuration!=NULL,"configuration input is null\n");
|
||||
|
||||
@@ -28,6 +28,8 @@
|
||||
* \email: lionel.gauthier@eurecom.fr
|
||||
*/
|
||||
#ifndef __RRC_ENB_UE_CONTEXT_H__
|
||||
#define __RRC_ENB_UE_CONTEXT_H__
|
||||
|
||||
#include "collection/tree.h"
|
||||
#include "COMMON/platform_types.h"
|
||||
#include "rrc_defs.h"
|
||||
|
||||
@@ -268,13 +268,6 @@ char openair_rrc_gNB_configuration(const module_id_t gnb_mod_idP, gNB_RrcConfigu
|
||||
LOG_I(NR_RRC,
|
||||
PROTOCOL_NR_RRC_CTXT_FMT" Init...\n",
|
||||
PROTOCOL_NR_RRC_CTXT_ARGS(&ctxt));
|
||||
#if OCP_FRAMEWORK
|
||||
|
||||
while (rrc == NULL ) {
|
||||
LOG_E(NR_RRC, "RC.nrrrc not yet initialized, waiting 1 second\n");
|
||||
sleep(1);
|
||||
}
|
||||
#endif
|
||||
AssertFatal(rrc != NULL, "RC.nrrrc not initialized!");
|
||||
AssertFatal(NUMBER_OF_UE_MAX < (module_id_t)0xFFFFFFFFFFFFFFFF, " variable overflow");
|
||||
AssertFatal(configuration!=NULL,"configuration input is null\n");
|
||||
|
||||
@@ -27,8 +27,9 @@
|
||||
* \company Eurecom
|
||||
* \email: lionel.gauthier@eurecom.fr
|
||||
*/
|
||||
#ifndef __RRC_ENB_UE_CONTEXT_H__
|
||||
#define __RRC_ENB_UE_CONTEXT_H__
|
||||
#ifndef __RRC_GNB_UE_CONTEXT_H__
|
||||
#define __RRC_GNB_UE_CONTEXT_H__
|
||||
|
||||
#include "collection/tree.h"
|
||||
#include "COMMON/platform_types.h"
|
||||
#include "nr_rrc_defs.h"
|
||||
|
||||
@@ -139,8 +139,8 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
|
||||
ue_context_p->ue_id_rnti = ue_context_p->ue_context.secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity;
|
||||
NR_CG_Config_t *CG_Config = calloc(1,sizeof(*CG_Config));
|
||||
memset((void*)CG_Config,0,sizeof(*CG_Config));
|
||||
//int CG_Config_size = generate_CG_Config(rrc,CG_Config,ue_context_p->ue_context.reconfig,ue_context_p->ue_context.rb_config);
|
||||
generate_CG_Config(rrc,CG_Config,ue_context_p->ue_context.reconfig,ue_context_p->ue_context.rb_config);
|
||||
|
||||
__attribute__((unused))int CG_Config_size = generate_CG_Config(rrc,CG_Config,ue_context_p->ue_context.reconfig,ue_context_p->ue_context.rb_config);
|
||||
|
||||
if(m!=NULL){
|
||||
uint8_t inde_list[m->nb_e_rabs_tobeadded];
|
||||
@@ -212,7 +212,6 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
|
||||
LOG_W(RRC, "No E-RAB to be added received from SgNB Addition Request message \n");
|
||||
}
|
||||
|
||||
|
||||
//X2AP_ENDC_SGNB_ADDITION_REQ_ACK(msg).rrc_buffer_size = CG_Config_size; //Need to verify correct value for the buffer_size
|
||||
// Send to X2 entity to transport to MeNB
|
||||
asn_enc_rval_t enc_rval = uper_encode_to_buffer(&asn_DEF_NR_CG_Config,
|
||||
|
||||
@@ -30,8 +30,8 @@
|
||||
* \warning
|
||||
*/
|
||||
|
||||
#ifndef __CONFIGEN_IF_H__
|
||||
#define __CONFIG_IF_H__
|
||||
#ifndef __UTIL_OCG_OCG_IF__H__
|
||||
#define __UTIL_OCG_OCG_IF__H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
||||
@@ -1,3 +1,6 @@
|
||||
#ifndef __UTIL_OPT_MAC_PCAP__H__
|
||||
#define __UTIL_OPT_MAC_PCAP__H__
|
||||
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <arpa/inet.h>
|
||||
@@ -42,4 +45,4 @@ typedef struct MAC_Context_Info_t {
|
||||
unsigned int subframesSinceCaptureStart;
|
||||
} MAC_Context_Info_t;
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
@@ -88,16 +88,12 @@ typedef guint8 gboolean;
|
||||
{ .s5= {NULL }} , \
|
||||
}
|
||||
|
||||
#ifdef OCP_FRAMEWORK
|
||||
#include <enums.h>
|
||||
#else
|
||||
typedef enum trace_mode_e {
|
||||
OPT_WIRESHARK,
|
||||
OPT_PCAP,
|
||||
OPT_TSHARK,
|
||||
OPT_NONE
|
||||
} trace_mode_t;
|
||||
#endif
|
||||
|
||||
typedef enum radio_type_e {
|
||||
RADIO_TYPE_FDD = 1,
|
||||
|
||||
@@ -22,6 +22,8 @@
|
||||
modified to be used in OpenAir to create the LTE MAC/RLC encapsulated in UDP as per Wireshark feature
|
||||
*/
|
||||
|
||||
#ifndef __UTIL_OPT_PACKET_MAC_LTE__H__
|
||||
#define __UTIL_OPT_PACKET_MAC_LTE__H__
|
||||
|
||||
#include "ws_symbol_export.h"
|
||||
|
||||
@@ -376,3 +378,5 @@ typedef enum {
|
||||
* vi: set shiftwidth=4 tabstop=8 expandtab:
|
||||
* :indentSize=4:tabSize=8:noTabs=true:
|
||||
*/
|
||||
|
||||
#endif
|
||||
|
||||
@@ -29,8 +29,8 @@
|
||||
* @ingroup security
|
||||
*/
|
||||
|
||||
#ifndef SECU_DEFS_H_
|
||||
#define SECU_DEFS_H_
|
||||
#ifndef __UTIL_OSA_OSA_DEFS__H__
|
||||
#define __UTIL_OSA_OSA_DEFS__H__
|
||||
|
||||
#define EIA0_ALG_ID 0x00
|
||||
#define EIA1_128_ALG_ID 0x01
|
||||
@@ -115,4 +115,4 @@ int stream_decrypt(uint8_t algorithm, stream_cipher_t *stream_cipher, uint8_t **
|
||||
int stream_check_integrity(uint8_t algorithm, stream_cipher_t *stream_cipher, uint8_t *expected);
|
||||
#undef SECU_DEBUG
|
||||
|
||||
#endif /* SECU_DEFS_H_ */
|
||||
#endif /* __UTIL_OSA_OSA_DEFS__H__ */
|
||||
|
||||
@@ -19,6 +19,9 @@
|
||||
* contact@openairinterface.org
|
||||
*/
|
||||
|
||||
#ifndef __UTIL_OTG_TRAFFIC_CONFIG__H__
|
||||
#define __UTIL_OTG_TRAFFIC_CONFIG__H__
|
||||
|
||||
//IDT DISTRIBUTION PARAMETERS
|
||||
#define IDT_DIST GAUSSIAN
|
||||
#define IDT_MIN 2
|
||||
@@ -40,3 +43,5 @@
|
||||
//SOCKET MODE
|
||||
#define DST_PORT 1234;
|
||||
#define DST_IP "127.0.0.1"
|
||||
|
||||
#endif
|
||||
|
||||
@@ -26,8 +26,8 @@
|
||||
* \version 1.0
|
||||
*/
|
||||
|
||||
#ifndef X2AP_ENB_MANAGEMENT_PROCEDURES_H_
|
||||
#define X2AP_ENB_MANAGEMENT_PROCEDURES_H
|
||||
#ifndef __X2AP_ENB_MANAGEMENT_PROCEDURES__H__
|
||||
#define __X2AP_ENB_MANAGEMENT_PROCEDURES__H__
|
||||
|
||||
void x2ap_eNB_prepare_internal_data(void);
|
||||
|
||||
@@ -51,4 +51,4 @@ struct x2ap_eNB_data_s *x2ap_get_eNB(x2ap_eNB_instance_t *instance_p,
|
||||
int32_t assoc_id,
|
||||
uint16_t cnx_id);
|
||||
|
||||
#endif /* X2AP_ENB_MANAGEMENT_PROCEDURES_H_ */
|
||||
#endif /* __X2AP_ENB_MANAGEMENT_PROCEDURES__H__ */
|
||||
|
||||
Reference in New Issue
Block a user