From 70938bb907e7e38b3c950db0341edbed797937ef Mon Sep 17 00:00:00 2001 From: rmagueta Date: Fri, 22 Jan 2021 17:18:37 +0000 Subject: [PATCH 1/7] Fix REG to CCE mapping at gNB --- openair1/PHY/NR_TRANSPORT/nr_dci.c | 108 +++++++++++-------- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 2 +- openair2/RRC/NR/MESSAGES/asn1_msg.c | 46 +++++++- 3 files changed, 109 insertions(+), 47 deletions(-) diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c index a4acaf9476..dfdadba7f0 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c @@ -102,8 +102,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, LOG_D(PHY, "Coreset rb_offset %d, nb_rb %d\n",rb_offset,n_rb); LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb); // DMRS length is per OFDM symbol - uint32_t dmrs_length = (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED)? - (n_rb*6) : (pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*36/cset_nsymb); //2(QPSK)*3(per RB)*6(REG per CCE) + uint32_t dmrs_length = n_rb*6; //2(QPSK)*3(per RB)*6(REG per CCE) uint32_t encoded_length = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*108; //2(QPSK)*9(per RB)*6(REG per CCE) LOG_D(PHY, "DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d)\n", dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType); dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset @@ -164,62 +163,81 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, printf("i %d mod_dci %d %d\n", i, mod_dci[i<<1], mod_dci[(i<<1)+1] ); #endif - + /// Resource mapping - + if (cset_start_sc >= frame_parms.ofdm_symbol_size) cset_start_sc -= frame_parms.ofdm_symbol_size; - - /*Reorder REG list for a freq first mapping*/ - uint8_t reg_idx0 = pdcch_pdu_rel15->dci_pdu.CceIndex[d]*NR_NB_REG_PER_CCE; - uint8_t nb_regs = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*NR_NB_REG_PER_CCE; + + // Get cce_list indices by reg_idx in ascending order + int reg_list_index = 0; + int reg_list_order[MAX_DCI_CORESET] = {}; + for (int p = 0; p < MAX_DCI_CORESET; p++) { + for(int p2 = 0; p2 < pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]; p2++) { + if(gNB->cce_list[d][p2].reg_list[0].reg_idx == p * NR_NB_REG_PER_CCE) { + reg_list_order[reg_list_index] = p2; + reg_list_index++; + break; + } + } + } /*Mapping the encoded DCI along with the DMRS */ - for (int reg_idx=reg_idx0; reg_idx<(nb_regs+reg_idx0); reg_idx++) { - k = cset_start_sc + (12*reg_idx/cset_nsymb); - - if (k >= frame_parms.ofdm_symbol_size) - k -= frame_parms.ofdm_symbol_size; - - l = cset_start_symb + ((reg_idx/cset_nsymb)%cset_nsymb); - - // dmrs index depends on reference point for k according to 38.211 7.4.1.3.2 - if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG) - dmrs_idx = (reg_idx/cset_nsymb)*3; - else - dmrs_idx = ((reg_idx/cset_nsymb)+rb_offset)*3; - - k_prime = 0; - - for (int m=0; mCceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED) { - ((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[l][dmrs_idx<<1]) >> 15; - ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15; + for (int cce_count = 0; cce_count < pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]; cce_count ++) { + + int8_t cce_idx = reg_list_order[cce_count]; + + for (int reg_in_cce_idx = 0; reg_in_cce_idx < NR_NB_REG_PER_CCE; reg_in_cce_idx++) { + + k = cset_start_sc + gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].start_sc_idx; + + if (k >= frame_parms.ofdm_symbol_size) + k -= frame_parms.ofdm_symbol_size; + + l = cset_start_symb + gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].symb_idx; + + // dmrs index depends on reference point for k according to 38.211 7.4.1.3.2 + if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG) + dmrs_idx =gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx * 3; + else + dmrs_idx = (gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx + rb_offset) * 3; + + k_prime = 0; + + for (int m = 0; m < NR_NB_SC_PER_RB; m++) { + if (m == (k_prime << 2) + 1) { // DMRS if not already mapped + ((int16_t *) txdataF)[(l * frame_parms.ofdm_symbol_size + k) << 1] = + (amp * mod_dmrs[l][dmrs_idx << 1]) >> 15; + ((int16_t *) txdataF)[((l * frame_parms.ofdm_symbol_size + k) << 1) + 1] = + (amp * mod_dmrs[l][(dmrs_idx << 1) + 1]) >> 15; + #ifdef DEBUG_PDCCH_DMRS printf("PDCCH DMRS: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1], ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]); #endif - dmrs_idx++; - //} - - k_prime++; - } else { // DCI payload - ((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dci[dci_idx<<1]) >> 15; - ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dci[(dci_idx<<1) + 1]) >> 15; + + dmrs_idx++; + k_prime++; + + } else { // DCI payload + ((int16_t *) txdataF)[(l * frame_parms.ofdm_symbol_size + k) << 1] = (amp * mod_dci[dci_idx << 1]) >> 15; + ((int16_t *) txdataF)[((l * frame_parms.ofdm_symbol_size + k) << 1) + 1] = + (amp * mod_dci[(dci_idx << 1) + 1]) >> 15; #ifdef DEBUG_DCI printf("PDCCH: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1], ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]); #endif - dci_idx++; - } - - k++; - - if (k >= frame_parms.ofdm_symbol_size) - k -= frame_parms.ofdm_symbol_size; - } // m - } // reg_idx + dci_idx++; + } + + k++; + + if (k >= frame_parms.ofdm_symbol_size) + k -= frame_parms.ofdm_symbol_size; + + } // m + } // reg_in_cce_idx + } // cce_count LOG_I(PHY, "DCI: payloadSize = %d | payload = %llx\n", *pdcch_pdu_rel15->dci_pdu.PayloadSizeBits,*(unsigned long long*)pdcch_pdu_rel15->dci_pdu.Payload); diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index be476c2775..b69ecafc89 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -987,7 +987,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id, LOG_D(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred); LOG_D(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection); LOG_D(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit); - LOG_I(MAC,"ssb index(extra bits): %d\n", (int)ssb_index); + LOG_D(MAC,"ssb index(extra bits): %d\n", (int)ssb_index); //storing ssb index in the mac structure mac->mib_ssb = ssb_index; diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.c b/openair2/RRC/NR/MESSAGES/asn1_msg.c index 042c419241..88c6d0eda6 100644 --- a/openair2/RRC/NR/MESSAGES/asn1_msg.c +++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c @@ -420,7 +420,51 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier, sib1->servingCellConfigCommon->uplinkConfigCommon->initialUplinkBWP.pucch_ConfigCommon = configuration->scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon; sib1->servingCellConfigCommon->n_TimingAdvanceOffset = configuration->scc->n_TimingAdvanceOffset; - sib1->servingCellConfigCommon->ssb_PositionsInBurst.inOneGroup = configuration->scc->ssb_PositionsInBurst->choice.shortBitmap; + + sib1->servingCellConfigCommon->ssb_PositionsInBurst.inOneGroup.buf = calloc(1, sizeof(uint8_t)); + uint8_t bitmap8,temp_bitmap=0; + switch (configuration->scc->ssb_PositionsInBurst->present) { + case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_shortBitmap: + sib1->servingCellConfigCommon->ssb_PositionsInBurst.inOneGroup = configuration->scc->ssb_PositionsInBurst->choice.shortBitmap; + break; + case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap: + sib1->servingCellConfigCommon->ssb_PositionsInBurst.inOneGroup = configuration->scc->ssb_PositionsInBurst->choice.mediumBitmap; + break; + /* + groupPresence: This field is present when maximum number of SS/PBCH blocks per half frame equals to 64 as defined in TS 38.213 [13], clause 4.1. + The first/leftmost bit corresponds to the SS/PBCH index 0-7, the second bit corresponds to SS/PBCH block 8-15, and so on. + Value 0 in the bitmap indicates that the SSBs according to inOneGroup are absent. Value 1 indicates that the SS/PBCH blocks are transmitted in accordance with inOneGroup. + inOneGroup: When maximum number of SS/PBCH blocks per half frame equals to 64 as defined in TS 38.213 [13], clause 4.1, all 8 bit are valid; + The first/ leftmost bit corresponds to the first SS/PBCH block index in the group (i.e., to SSB index 0, 8, and so on); the second bit corresponds to the second SS/PBCH block index in the group + (i.e., to SSB index 1, 9, and so on), and so on. Value 0 in the bitmap indicates that the corresponding SS/PBCH block is not transmitted while value 1 indicates that the corresponding SS/PBCH block is transmitted. + */ + case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_longBitmap: + sib1->servingCellConfigCommon->ssb_PositionsInBurst.inOneGroup.size = 1; + sib1->servingCellConfigCommon->ssb_PositionsInBurst.inOneGroup.bits_unused = 0; + sib1->servingCellConfigCommon->ssb_PositionsInBurst.groupPresence = calloc(1, sizeof(BIT_STRING_t)); + memset(sib1->servingCellConfigCommon->ssb_PositionsInBurst.groupPresence, 0, sizeof(BIT_STRING_t)); + sib1->servingCellConfigCommon->ssb_PositionsInBurst.groupPresence->size = 1; + sib1->servingCellConfigCommon->ssb_PositionsInBurst.groupPresence->bits_unused = 0; + sib1->servingCellConfigCommon->ssb_PositionsInBurst.groupPresence->buf = calloc(1, sizeof(uint8_t)); + sib1->servingCellConfigCommon->ssb_PositionsInBurst.groupPresence->buf[0] = 0; + for (int i=0; i<8; i++){ + bitmap8 = configuration->scc->ssb_PositionsInBurst->choice.longBitmap.buf[i]; + if (bitmap8!=0){ + if(temp_bitmap==0) + temp_bitmap = bitmap8; + else + AssertFatal(temp_bitmap==bitmap8,"For longBitmap the groups of 8 SSBs containing at least 1 transmitted SSB should be all the same\n"); + + sib1->servingCellConfigCommon->ssb_PositionsInBurst.inOneGroup.buf[0] = bitmap8; + sib1->servingCellConfigCommon->ssb_PositionsInBurst.groupPresence->buf[0] |= 1<<(7-i); + } + } + break; + default: + AssertFatal(false,"ssb_PositionsInBurst not present\n"); + break; + } + sib1->servingCellConfigCommon->ssb_PeriodicityServingCell = *configuration->scc->ssb_periodicityServingCell; sib1->servingCellConfigCommon->tdd_UL_DL_ConfigurationCommon = CALLOC(1,sizeof(struct NR_TDD_UL_DL_ConfigCommon)); sib1->servingCellConfigCommon->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing = configuration->scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing; From e2df86be88251f434b7af2ac6e7dd7050475a9cd Mon Sep 17 00:00:00 2001 From: rmagueta Date: Sat, 23 Jan 2021 15:54:16 +0000 Subject: [PATCH 2/7] Fix PDCCH extract RBs --- openair1/PHY/NR_UE_TRANSPORT/dci_nr.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c index a63d8d60e7..8504750a57 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c @@ -386,14 +386,14 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, rxF=NULL; // first we set initial conditions for pointer to rxdataF depending on the situation of the first RB within the CORESET (c_rb = n_BWP_start) - if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) { + if (((c_rb + n_BWP_start) < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) { //if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): even case rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; LOG_DDD("in even case c_rb (%d) is lower than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n", c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))); } - if ((c_rb >= (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) { + if (((c_rb + n_BWP_start) >= (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) { // number of RBs is even and c_rb is higher than half system bandwidth (we don't skip DC) // if these conditions are true the pointer has to be situated at the 1st part of the rxdataF rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol @@ -406,7 +406,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, //#endif } - if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { + if (((c_rb + n_BWP_start) < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { //if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): odd case rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; #ifdef NR_PDCCH_DCI_DEBUG @@ -415,7 +415,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, #endif } - if ((c_rb > (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { + if (((c_rb + n_BWP_start) > (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { // number of RBs is odd and c_rb is higher than half system bandwidth + 1 // if these conditions are true the pointer has to be situated at the 1st part of the rxdataF just after the first IQ symbols of the RB containing DC rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol @@ -425,7 +425,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, #endif } - if ((c_rb == (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { // treatment of RB containing the DC + if (((c_rb + n_BWP_start) == (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { // treatment of RB containing the DC // if odd number RBs in system bandwidth and first RB to be treated is higher than middle system bandwidth (around DC) // we have to treat the RB in two parts: first part from i=0 to 5, the data is at the end of rxdataF (pointing at the end of the table) rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; From 094f21a165d497b97e91be8b3e05535fc8076be3 Mon Sep 17 00:00:00 2001 From: rmagueta Date: Sat, 23 Jan 2021 18:40:30 +0000 Subject: [PATCH 3/7] Fix REG to CCE mapping at UE --- openair1/PHY/NR_UE_TRANSPORT/dci_nr.c | 68 +++++++++++++------ openair2/LAYER2/NR_MAC_UE/config_ue.c | 6 +- .../NR_MAC_UE/nr_ue_dci_configuration.c | 17 ----- openair2/RRC/NR/rrc_gNB_reconfig.c | 4 +- openair2/RRC/NR_UE/rrc_UE.c | 5 +- .../gnb.sa.band78.fr1.106PRB.usrpb210.conf | 4 +- 6 files changed, 60 insertions(+), 44 deletions(-) diff --git a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c index 8504750a57..8893fc3e31 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c @@ -81,12 +81,14 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr, uint32_t *z, - NR_DL_FRAME_PARMS *frame_parms, uint8_t coreset_time_dur, uint32_t coreset_nbr_rb, uint8_t reg_bundle_size_L, uint8_t coreset_interleaver_size_R, - uint8_t n_shift) { + uint8_t n_shift, + uint8_t number_of_candidates, + uint16_t *CCE, + uint8_t *L) { /* * This function will do demapping and deinterleaving from llr containing demodulated symbols * Demapping will regroup in REG and bundles @@ -122,35 +124,61 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr, | REG 0 (bundle 0) bundle 0 bundle 0 */ - int c=0,r=0; - uint16_t bundle_j=0, f_bundle_j=0,f_reg=0; - uint32_t coreset_C=0; + int c = 0, r = 0; + uint16_t bundle_j = 0, f_bundle_j = 0, f_reg = 0; + uint32_t coreset_C = 0; uint16_t index_z, index_llr; int coreset_interleaved = 0; - if (reg_bundle_size_L!=0) { // interleaving will be done only if reg_bundle_size_L != 0 - coreset_interleaved=1; - coreset_C = (uint32_t)((coreset_nbr_rb * coreset_time_dur)/ (coreset_interleaver_size_R*reg_bundle_size_L)); + if (reg_bundle_size_L != 0) { // interleaving will be done only if reg_bundle_size_L != 0 + coreset_interleaved = 1; + coreset_C = (uint32_t) ((coreset_nbr_rb * coreset_time_dur) / (coreset_interleaver_size_R * reg_bundle_size_L)); } else { - reg_bundle_size_L=6; + reg_bundle_size_L = 6; } - for(int reg=0; reg<((coreset_nbr_rb*coreset_time_dur)); reg++) { - if ((reg%reg_bundle_size_L) == 0) { + + int f_bundle_j_list[MAX_DCI_CORESET] = {}; + + for (int reg = 0; reg < ((coreset_nbr_rb * coreset_time_dur)); reg++) { + if ((reg % reg_bundle_size_L) == 0) { if (r == coreset_interleaver_size_R) { - r=0; + r = 0; c++; } - bundle_j = (c*coreset_interleaver_size_R)+r; - f_bundle_j = ((r*coreset_C)+c+n_shift)%((coreset_nbr_rb*coreset_time_dur)/reg_bundle_size_L); + bundle_j = (c * coreset_interleaver_size_R) + r; + f_bundle_j = ((r * coreset_C) + c + n_shift) % ((coreset_nbr_rb * coreset_time_dur) / reg_bundle_size_L); - if (coreset_interleaved==0) f_bundle_j=bundle_j; + if (coreset_interleaved == 0) f_bundle_j = bundle_j; + + f_bundle_j_list[reg / 6] = f_bundle_j; - LOG_DNL("[r=%d,c=%d] bundle_j(%d) interleaved at f_bundle_j(%d)\n",r,c,bundle_j,f_bundle_j); } + if ((reg % reg_bundle_size_L) == 0) r++; + } - f_reg = (f_bundle_j*reg_bundle_size_L)+(reg%reg_bundle_size_L); + + // Get cce_list indices by reg_idx in ascending order + int f_bundle_j_list_id = 0; + int f_bundle_j_list_ord[MAX_DCI_CORESET] = {}; + for (int c_id = 0; c_id < number_of_candidates; c_id++ ) { + f_bundle_j_list_id = CCE[c_id]; + for (int p = 0; p < MAX_DCI_CORESET; p++) { + for (int p2 = CCE[c_id]; p2 < CCE[c_id] + L[c_id]; p2++) { + if (f_bundle_j_list[p2] == p) { + f_bundle_j_list_ord[f_bundle_j_list_id] = p; + f_bundle_j_list_id++; + break; + } + } + } + } + + + for(int reg=0; reg<((coreset_nbr_rb*coreset_time_dur)); reg++) { + + f_reg = (f_bundle_j_list_ord[reg/6]*reg_bundle_size_L)+(reg%reg_bundle_size_L); index_z = 9*reg; index_llr = 9*((uint16_t)floor(f_reg/coreset_time_dur)+((f_reg%coreset_time_dur)*(coreset_nbr_rb))); @@ -760,12 +788,14 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, LOG_D(PHY,"we enter nr_pdcch_demapping_deinterleaving()\n"); nr_pdcch_demapping_deinterleaving((uint32_t *) pdcch_vars->llr, (uint32_t *) pdcch_vars->e_rx, - frame_parms, rel15->coreset.duration, n_rb, rel15->coreset.RegBundleSize, rel15->coreset.InterleaverSize, - rel15->coreset.ShiftIndex); + rel15->coreset.ShiftIndex, + rel15->number_of_candidates, + rel15->CCE, + rel15->L); /* nr_pdcch_unscrambling(rel15->rnti, frame_parms, diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index 20fe84d819..75c479322d 100755 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -421,8 +421,8 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){ // FIXME: update values from TS38.213 Section 10.1 Table 10.1-1: CCE aggregation levels and maximum number of PDCCH candidates per CCE aggregation level for CSS sets configured by searchSpaceSIB1 mac->search_space_zero->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0; mac->search_space_zero->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0; - mac->search_space_zero->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n0; - mac->search_space_zero->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n1; + mac->search_space_zero->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n2; + mac->search_space_zero->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0; mac->search_space_zero->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0; mac->search_space_zero->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common; @@ -440,7 +440,9 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){ mac->coreset0->frequencyDomainResources.size = 6; mac->coreset0->frequencyDomainResources.bits_unused = 3; mac->coreset0->duration = 1; + mac->coreset0->cce_REG_MappingType.present=NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved; mac->coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*mac->coreset0->cce_REG_MappingType.choice.interleaved)); + mac->coreset0->cce_REG_MappingType.choice.interleaved->reg_BundleSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6; mac->coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2; mac->coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = NULL; mac->coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c index 4ecfc82c3f..c972f4f109 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c @@ -55,23 +55,6 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd LOG_D(MAC,"Filling search candidates for DCI\n"); - if(ss->searchSpaceId == 0) { - // TODO: Update the maximum number of PDCCH candidates accordingly with Aggregation Level - rel15->number_of_candidates=1; - rel15->CCE[0]=0; - rel15->L[0]=6; - } else { - rel15->number_of_candidates=4; - rel15->CCE[0]=0; - rel15->L[0]=4; - rel15->CCE[1]=4; - rel15->L[1]=4; - rel15->CCE[2]=8; - rel15->L[2]=4; - rel15->CCE[3]=12; - rel15->L[3]=4; - } - uint8_t aggregation; find_aggregation_candidates(&aggregation, &rel15->number_of_candidates, diff --git a/openair2/RRC/NR/rrc_gNB_reconfig.c b/openair2/RRC/NR/rrc_gNB_reconfig.c index a9e48efe28..249d1d2aaa 100644 --- a/openair2/RRC/NR/rrc_gNB_reconfig.c +++ b/openair2/RRC/NR/rrc_gNB_reconfig.c @@ -135,8 +135,8 @@ void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0) { // FIXME: update values from TS38.213 Section 10.1 Table 10.1-1: CCE aggregation levels and maximum number of PDCCH candidates per CCE aggregation level for CSS sets configured by searchSpaceSIB1 ss0->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0; ss0->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0; - ss0->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n0; - ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n1; + ss0->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n1; + ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0; ss0->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0; ss0->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common; diff --git a/openair2/RRC/NR_UE/rrc_UE.c b/openair2/RRC/NR_UE/rrc_UE.c index 093ecdf788..a43e8d53c1 100755 --- a/openair2/RRC/NR_UE/rrc_UE.c +++ b/openair2/RRC/NR_UE/rrc_UE.c @@ -1500,8 +1500,9 @@ int8_t nr_rrc_ue_decode_NR_SIB1_Message(module_id_t module_id, uint8_t gNB_index } sib1 = bcch_message->message.choice.c1->choice.systemInformationBlockType1; if (*(int64_t*)sib1 != 1) { - LOG_D(RRC, "SIB1 address: %lx\n", *(int64_t*)sib1); - xer_fprint(stdout, &asn_DEF_NR_SIB1, (const void*)sib1); + LOG_I(RRC, "SIB1 decoded\n"); + if( g_log->log_component[RRC].level >= OAILOG_DEBUG ) + xer_fprint(stdout, &asn_DEF_NR_SIB1, (const void*)sib1); } else LOG_E(PHY, "sib1 is starting by 8 times 0\n"); diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf index 3d4c3ff92e..4373f38e7b 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf @@ -38,10 +38,10 @@ gNBs = # downlinkConfigCommon #frequencyInfoDL # this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP) - absoluteFrequencySSB = 641272; + absoluteFrequencySSB = 641280; dl_frequencyBand = 78; # this is 3600 MHz - dl_absoluteFrequencyPointA = 640000; + dl_absoluteFrequencyPointA = 640008; #scs-SpecificCarrierList dl_offstToCarrier = 0; # subcarrierSpacing From 73b34936be65c7596c2ae27893b0e5717b2ad6bf Mon Sep 17 00:00:00 2001 From: rmagueta Date: Sat, 23 Jan 2021 20:16:05 +0000 Subject: [PATCH 4/7] Update MAX_DCI_CORESET to 16 as in 3GPP Rel 15 --- nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h index c254e1a028..774520cde7 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h @@ -626,7 +626,7 @@ typedef struct { //table 3-37 #define DCI_PAYLOAD_BYTE_LEN 8 // 12 ? TS38.212 sec 7.3.1 -#define MAX_DCI_CORESET 8 +#define MAX_DCI_CORESET 16 // 3GPP TS 38.211 v15.8 Section 7.3.2 Table 7.3.2.1-1: Supported PDCCH aggregation levels typedef struct { // The RNTI used for identifying the UE when receiving the PDU Value: 1 -> 65535. From 583d2cc0d4c05eb94b15fd9a06a827b0051fd258 Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Sun, 24 Jan 2021 12:14:48 +0000 Subject: [PATCH 5/7] Fix for NR_MAX_PDCCH_AGG_LEVEL --- nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h | 2 +- openair1/PHY/NR_TRANSPORT/nr_dci.c | 4 ++-- openair1/PHY/NR_UE_TRANSPORT/dci_nr.c | 6 +++--- openair1/PHY/defs_nr_common.h | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h index 774520cde7..c254e1a028 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h @@ -626,7 +626,7 @@ typedef struct { //table 3-37 #define DCI_PAYLOAD_BYTE_LEN 8 // 12 ? TS38.212 sec 7.3.1 -#define MAX_DCI_CORESET 16 // 3GPP TS 38.211 v15.8 Section 7.3.2 Table 7.3.2.1-1: Supported PDCCH aggregation levels +#define MAX_DCI_CORESET 8 typedef struct { // The RNTI used for identifying the UE when receiving the PDU Value: 1 -> 65535. diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c index dfdadba7f0..7395586dd6 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c @@ -171,8 +171,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, // Get cce_list indices by reg_idx in ascending order int reg_list_index = 0; - int reg_list_order[MAX_DCI_CORESET] = {}; - for (int p = 0; p < MAX_DCI_CORESET; p++) { + int reg_list_order[NR_MAX_PDCCH_AGG_LEVEL] = {}; + for (int p = 0; p < NR_MAX_PDCCH_AGG_LEVEL; p++) { for(int p2 = 0; p2 < pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]; p2++) { if(gNB->cce_list[d][p2].reg_list[0].reg_idx == p * NR_NB_REG_PER_CCE) { reg_list_order[reg_list_index] = p2; diff --git a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c index 8893fc3e31..fb53f8460d 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c @@ -138,7 +138,7 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr, } - int f_bundle_j_list[MAX_DCI_CORESET] = {}; + int f_bundle_j_list[NR_MAX_PDCCH_AGG_LEVEL] = {}; for (int reg = 0; reg < ((coreset_nbr_rb * coreset_time_dur)); reg++) { if ((reg % reg_bundle_size_L) == 0) { @@ -161,10 +161,10 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr, // Get cce_list indices by reg_idx in ascending order int f_bundle_j_list_id = 0; - int f_bundle_j_list_ord[MAX_DCI_CORESET] = {}; + int f_bundle_j_list_ord[NR_MAX_PDCCH_AGG_LEVEL] = {}; for (int c_id = 0; c_id < number_of_candidates; c_id++ ) { f_bundle_j_list_id = CCE[c_id]; - for (int p = 0; p < MAX_DCI_CORESET; p++) { + for (int p = 0; p < NR_MAX_PDCCH_AGG_LEVEL; p++) { for (int p2 = CCE[c_id]; p2 < CCE[c_id] + L[c_id]; p2++) { if (f_bundle_j_list[p2] == p) { f_bundle_j_list_ord[f_bundle_j_list_id] = p; diff --git a/openair1/PHY/defs_nr_common.h b/openair1/PHY/defs_nr_common.h index 08b54c5c98..aa3c7bc15e 100644 --- a/openair1/PHY/defs_nr_common.h +++ b/openair1/PHY/defs_nr_common.h @@ -94,7 +94,7 @@ #define NR_MAX_NUM_BWP 4 -#define NR_MAX_PDCCH_AGG_LEVEL 16 +#define NR_MAX_PDCCH_AGG_LEVEL 16 // 3GPP TS 38.211 V15.8 Section 7.3.2 Table 7.3.2.1-1: Supported PDCCH aggregation levels #define NR_MAX_CSET_DURATION 3 #define NR_MAX_NB_RBG 18 From 6e917c539fa7a3c6fd900b92620bf2d2da56e2c0 Mon Sep 17 00:00:00 2001 From: rmagueta Date: Mon, 25 Jan 2021 23:18:35 +0000 Subject: [PATCH 6/7] Fill SIB1 with more contents --- openair2/LAYER2/NR_MAC_UE/config_ue.c | 2 +- openair2/RRC/NR/MESSAGES/asn1_msg.c | 160 ++++++++++++++++-- openair2/RRC/NR/rrc_gNB_reconfig.c | 2 +- .../gnb.sa.band78.fr1.106PRB.usrpb210.conf | 34 ++-- 4 files changed, 167 insertions(+), 31 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index 75c479322d..b135d461a2 100755 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -414,7 +414,7 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){ mac->search_space_zero->duration=NULL; // should be '1100 0000 0000 00'B (LSB first!), first two symbols in slot, adjust if needed mac->search_space_zero->monitoringSymbolsWithinSlot->buf[1] = 0; - mac->search_space_zero->monitoringSymbolsWithinSlot->buf[0] = (1<<7) | (1<<6); + mac->search_space_zero->monitoringSymbolsWithinSlot->buf[0] = (1<<7); mac->search_space_zero->monitoringSymbolsWithinSlot->size = 2; mac->search_space_zero->monitoringSymbolsWithinSlot->bits_unused = 2; diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.c b/openair2/RRC/NR/MESSAGES/asn1_msg.c index 88c6d0eda6..9754189203 100644 --- a/openair2/RRC/NR/MESSAGES/asn1_msg.c +++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c @@ -324,7 +324,7 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier, // cellSelectionInfo sib1->cellSelectionInfo = CALLOC(1,sizeof(struct NR_SIB1__cellSelectionInfo)); - sib1->cellSelectionInfo->q_RxLevMin = -50; + sib1->cellSelectionInfo->q_RxLevMin = -65; // cellAccessRelatedInfo struct NR_PLMN_IdentityInfo *nr_plmn_info=CALLOC(1,sizeof(struct NR_PLMN_IdentityInfo)); @@ -357,7 +357,7 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier, nr_plmn_info->cellIdentity.buf[4]= (configuration->cell_identity << 4) & 0xff; nr_plmn_info->cellIdentity.size= 5; nr_plmn_info->cellIdentity.bits_unused= 4; - nr_plmn_info->cellReservedForOperatorUse = NR_PLMN_IdentityInfo__cellReservedForOperatorUse_reserved; + nr_plmn_info->cellReservedForOperatorUse = NR_PLMN_IdentityInfo__cellReservedForOperatorUse_notReserved; nr_plmn_info->trackingAreaCode = CALLOC(1,sizeof(NR_TrackingAreaCode_t)); nr_plmn_info->trackingAreaCode->buf = CALLOC(1,3); @@ -373,17 +373,35 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier, // TODO: add connEstFailureControl //si-SchedulingInfo - /*sib1->si_SchedulingInfo = CALLOC(1,sizeof(struct NR_SI_SchedulingInfo)); + sib1->si_SchedulingInfo = CALLOC(1,sizeof(struct NR_SI_SchedulingInfo)); asn_set_empty(&sib1->si_SchedulingInfo->schedulingInfoList.list); - sib1->si_SchedulingInfo->si_WindowLength = NR_SI_SchedulingInfo__si_WindowLength_s20; + sib1->si_SchedulingInfo->si_WindowLength = NR_SI_SchedulingInfo__si_WindowLength_s40; struct NR_SchedulingInfo *schedulingInfo = CALLOC(1,sizeof(struct NR_SchedulingInfo)); schedulingInfo->si_BroadcastStatus = NR_SchedulingInfo__si_BroadcastStatus_broadcasting; schedulingInfo->si_Periodicity = NR_SchedulingInfo__si_Periodicity_rf8; asn_set_empty(&schedulingInfo->sib_MappingInfo.list); - e_NR_SIB_TypeInfo__type *sib_type = CALLOC(1,sizeof(e_NR_SIB_TypeInfo__type)); - *sib_type = NR_SIB_TypeInfo__type_sibType3; - ASN_SEQUENCE_ADD(&schedulingInfo->sib_MappingInfo.list,sib_type); - ASN_SEQUENCE_ADD(&sib1->si_SchedulingInfo->schedulingInfoList.list,schedulingInfo);*/ + + NR_SIB_TypeInfo_t *sib_type3 = CALLOC(1,sizeof(e_NR_SIB_TypeInfo__type)); + sib_type3->type = NR_SIB_TypeInfo__type_sibType3; + sib_type3->valueTag = CALLOC(1,sizeof(sib_type3->valueTag)); + ASN_SEQUENCE_ADD(&schedulingInfo->sib_MappingInfo.list,sib_type3); + + NR_SIB_TypeInfo_t *sib_type5 = CALLOC(1,sizeof(e_NR_SIB_TypeInfo__type)); + sib_type5->type = NR_SIB_TypeInfo__type_sibType5; + sib_type5->valueTag = CALLOC(1,sizeof(sib_type5->valueTag)); + ASN_SEQUENCE_ADD(&schedulingInfo->sib_MappingInfo.list,sib_type5); + + NR_SIB_TypeInfo_t *sib_type4 = CALLOC(1,sizeof(e_NR_SIB_TypeInfo__type)); + sib_type4->type = NR_SIB_TypeInfo__type_sibType4; + sib_type4->valueTag = CALLOC(1,sizeof(sib_type4->valueTag)); + ASN_SEQUENCE_ADD(&schedulingInfo->sib_MappingInfo.list,sib_type4); + + NR_SIB_TypeInfo_t *sib_type2 = CALLOC(1,sizeof(e_NR_SIB_TypeInfo__type)); + sib_type2->type = NR_SIB_TypeInfo__type_sibType2; + sib_type2->valueTag = CALLOC(1,sizeof(sib_type2->valueTag)); + ASN_SEQUENCE_ADD(&schedulingInfo->sib_MappingInfo.list,sib_type2); + + ASN_SEQUENCE_ADD(&sib1->si_SchedulingInfo->schedulingInfoList.list,schedulingInfo); // servingCellConfigCommon sib1->servingCellConfigCommon = CALLOC(1,sizeof(struct NR_ServingCellConfigCommonSIB)); @@ -402,23 +420,134 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier, for(int i = 0; i< configuration->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.count; i++) { ASN_SEQUENCE_ADD(&sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list,configuration->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[i]); } + sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon = configuration->scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon; + sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon->choice.setup->commonSearchSpaceList = CALLOC(1,sizeof(struct NR_PDCCH_ConfigCommon__commonSearchSpaceList)); + asn_set_empty(&sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon->choice.setup->commonSearchSpaceList->list); + + NR_SearchSpace_t *ss1 = calloc(1,sizeof(*ss1)); + ss1->searchSpaceId = 1; + ss1->controlResourceSetId=calloc(1,sizeof(*ss1->controlResourceSetId)); + *ss1->controlResourceSetId=0; + ss1->monitoringSlotPeriodicityAndOffset = calloc(1,sizeof(*ss1->monitoringSlotPeriodicityAndOffset)); + ss1->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1; + ss1->monitoringSymbolsWithinSlot = calloc(1,sizeof(*ss1->monitoringSymbolsWithinSlot)); + ss1->monitoringSymbolsWithinSlot->buf = calloc(1,2); + // should be '1100 0000 0000 00'B (LSB first!), first two symols in slot, adjust if needed + ss1->monitoringSymbolsWithinSlot->buf[1] = 0; + ss1->monitoringSymbolsWithinSlot->buf[0] = (1<<7); + ss1->monitoringSymbolsWithinSlot->size = 2; + ss1->monitoringSymbolsWithinSlot->bits_unused = 2; + ss1->nrofCandidates = calloc(1,sizeof(*ss1->nrofCandidates)); + ss1->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0; + ss1->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0; + ss1->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n1; + ss1->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0; + ss1->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0; + ss1->searchSpaceType = calloc(1,sizeof(*ss1->searchSpaceType)); + ss1->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common; + ss1->searchSpaceType->choice.common=calloc(1,sizeof(*ss1->searchSpaceType->choice.common)); + ss1->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 = calloc(1,sizeof(*ss1->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0)); + ASN_SEQUENCE_ADD(&sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon->choice.setup->commonSearchSpaceList->list,ss1); + + NR_SearchSpace_t *ss5 = calloc(1,sizeof(*ss5)); + ss5->searchSpaceId = 5; + ss5->controlResourceSetId=calloc(1,sizeof(*ss5->controlResourceSetId)); + *ss5->controlResourceSetId=0; + ss5->monitoringSlotPeriodicityAndOffset = calloc(1,sizeof(*ss5->monitoringSlotPeriodicityAndOffset)); + ss5->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl5; + ss5->monitoringSlotPeriodicityAndOffset->choice.sl5 = 0; + ss5->duration = calloc(1,sizeof(*ss5->duration)); + *ss5->duration = 2; + ss5->monitoringSymbolsWithinSlot = calloc(1,sizeof(*ss5->monitoringSymbolsWithinSlot)); + ss5->monitoringSymbolsWithinSlot->buf = calloc(1,2); + // should be '1100 0000 0000 00'B (LSB first!), first two symols in slot, adjust if needed + ss5->monitoringSymbolsWithinSlot->buf[1] = 0; + ss5->monitoringSymbolsWithinSlot->buf[0] = (1<<7); + ss5->monitoringSymbolsWithinSlot->size = 2; + ss5->monitoringSymbolsWithinSlot->bits_unused = 2; + ss5->nrofCandidates = calloc(1,sizeof(*ss5->nrofCandidates)); + ss5->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0; + ss5->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0; + ss5->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n4; + ss5->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n2; + ss5->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n1; + ss5->searchSpaceType = calloc(1,sizeof(*ss5->searchSpaceType)); + ss5->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common; + ss5->searchSpaceType->choice.common=calloc(1,sizeof(*ss5->searchSpaceType->choice.common)); + ss5->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 = calloc(1,sizeof(*ss5->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0)); + ASN_SEQUENCE_ADD(&sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon->choice.setup->commonSearchSpaceList->list,ss5); + + NR_SearchSpace_t *ss7 = calloc(1,sizeof(*ss7)); + ss7->searchSpaceId = 7; + ss7->controlResourceSetId=calloc(1,sizeof(*ss7->controlResourceSetId)); + *ss7->controlResourceSetId=0; + ss7->monitoringSlotPeriodicityAndOffset = calloc(1,sizeof(*ss7->monitoringSlotPeriodicityAndOffset)); + ss7->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1; + ss7->monitoringSymbolsWithinSlot = calloc(1,sizeof(*ss7->monitoringSymbolsWithinSlot)); + ss7->monitoringSymbolsWithinSlot->buf = calloc(1,2); + // should be '1100 0000 0000 00'B (LSB first!), first two symols in slot, adjust if needed + ss7->monitoringSymbolsWithinSlot->buf[1] = 0; + ss7->monitoringSymbolsWithinSlot->buf[0] = (1<<7); + ss7->monitoringSymbolsWithinSlot->size = 2; + ss7->monitoringSymbolsWithinSlot->bits_unused = 2; + ss7->nrofCandidates = calloc(1,sizeof(*ss7->nrofCandidates)); + ss7->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0; + ss7->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0; + ss7->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n4; + ss7->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n2; + ss7->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n1; + ss7->searchSpaceType = calloc(1,sizeof(*ss7->searchSpaceType)); + ss7->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common; + ss7->searchSpaceType->choice.common=calloc(1,sizeof(*ss7->searchSpaceType->choice.common)); + ss7->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 = calloc(1,sizeof(*ss7->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0)); + ASN_SEQUENCE_ADD(&sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon->choice.setup->commonSearchSpaceList->list,ss7); + + sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 = calloc(1,sizeof(NR_SearchSpaceId_t)); + *sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 = 0; + sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon->choice.setup->searchSpaceOtherSystemInformation = calloc(1,sizeof(NR_SearchSpaceId_t)); + *sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon->choice.setup->searchSpaceOtherSystemInformation = 7; + sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon->choice.setup->pagingSearchSpace = calloc(1,sizeof(NR_SearchSpaceId_t)); + *sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon->choice.setup->pagingSearchSpace = 5; + sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon->choice.setup->ra_SearchSpace = calloc(1,sizeof(NR_SearchSpaceId_t)); + *sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon->choice.setup->ra_SearchSpace = 1; + sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon = configuration->scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon; sib1->servingCellConfigCommon->downlinkConfigCommon.bcch_Config.modificationPeriodCoeff = NR_BCCH_Config__modificationPeriodCoeff_n2; - sib1->servingCellConfigCommon->downlinkConfigCommon.pcch_Config.defaultPagingCycle = 0; - sib1->servingCellConfigCommon->downlinkConfigCommon.pcch_Config.nAndPagingFrameOffset.present = NR_PCCH_Config__nAndPagingFrameOffset_PR_oneT; - sib1->servingCellConfigCommon->downlinkConfigCommon.pcch_Config.ns = NR_PCCH_Config__ns_four; + sib1->servingCellConfigCommon->downlinkConfigCommon.pcch_Config.defaultPagingCycle = NR_PagingCycle_rf256; + sib1->servingCellConfigCommon->downlinkConfigCommon.pcch_Config.nAndPagingFrameOffset.present = NR_PCCH_Config__nAndPagingFrameOffset_PR_quarterT; + sib1->servingCellConfigCommon->downlinkConfigCommon.pcch_Config.nAndPagingFrameOffset.choice.quarterT = 1; + sib1->servingCellConfigCommon->downlinkConfigCommon.pcch_Config.ns = NR_PCCH_Config__ns_one; + + sib1->servingCellConfigCommon->downlinkConfigCommon.pcch_Config.firstPDCCH_MonitoringOccasionOfPO = calloc(1,sizeof(struct NR_PCCH_Config__firstPDCCH_MonitoringOccasionOfPO)); + sib1->servingCellConfigCommon->downlinkConfigCommon.pcch_Config.firstPDCCH_MonitoringOccasionOfPO->present = NR_PCCH_Config__firstPDCCH_MonitoringOccasionOfPO_PR_sCS120KHZoneT_SCS60KHZhalfT_SCS30KHZquarterT_SCS15KHZoneEighthT; + + sib1->servingCellConfigCommon->downlinkConfigCommon.pcch_Config.firstPDCCH_MonitoringOccasionOfPO->choice.sCS120KHZoneT_SCS60KHZhalfT_SCS30KHZquarterT_SCS15KHZoneEighthT = CALLOC(1,sizeof(struct NR_PCCH_Config__firstPDCCH_MonitoringOccasionOfPO__sCS120KHZoneT_SCS60KHZhalfT_SCS30KHZquarterT_SCS15KHZoneEighthT)); + asn_set_empty(&sib1->servingCellConfigCommon->downlinkConfigCommon.pcch_Config.firstPDCCH_MonitoringOccasionOfPO->choice.sCS120KHZoneT_SCS60KHZhalfT_SCS30KHZquarterT_SCS15KHZoneEighthT->list); + + long *sCS120KHZoneT_SCS60KHZhalfT_SCS30KHZquarterT_SCS15KHZoneEighthT = calloc(1,sizeof(long)); + *sCS120KHZoneT_SCS60KHZhalfT_SCS30KHZquarterT_SCS15KHZoneEighthT = 0; + ASN_SEQUENCE_ADD(&sib1->servingCellConfigCommon->downlinkConfigCommon.pcch_Config.firstPDCCH_MonitoringOccasionOfPO->choice.sCS120KHZoneT_SCS60KHZhalfT_SCS30KHZquarterT_SCS15KHZoneEighthT->list,sCS120KHZoneT_SCS60KHZhalfT_SCS30KHZquarterT_SCS15KHZoneEighthT); sib1->servingCellConfigCommon->uplinkConfigCommon = CALLOC(1,sizeof(struct NR_UplinkConfigCommonSIB)); asn_set_empty(&sib1->servingCellConfigCommon->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list); for(int i = 0; i< configuration->scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.count; i++) { ASN_SEQUENCE_ADD(&sib1->servingCellConfigCommon->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list,configuration->scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[i]); } + + sib1->servingCellConfigCommon->uplinkConfigCommon->frequencyInfoUL.p_Max = CALLOC(1,sizeof(NR_P_Max_t)); + *sib1->servingCellConfigCommon->uplinkConfigCommon->frequencyInfoUL.p_Max = 23; + sib1->servingCellConfigCommon->uplinkConfigCommon->initialUplinkBWP.genericParameters = configuration->scc->uplinkConfigCommon->initialUplinkBWP->genericParameters; sib1->servingCellConfigCommon->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon = configuration->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon; + sib1->servingCellConfigCommon->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon = configuration->scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon; + sib1->servingCellConfigCommon->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->groupHoppingEnabledTransformPrecoding = null; + sib1->servingCellConfigCommon->uplinkConfigCommon->initialUplinkBWP.pucch_ConfigCommon = configuration->scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon; + sib1->servingCellConfigCommon->uplinkConfigCommon->timeAlignmentTimerCommon = NR_TimeAlignmentTimer_infinity; + sib1->servingCellConfigCommon->n_TimingAdvanceOffset = configuration->scc->n_TimingAdvanceOffset; sib1->servingCellConfigCommon->ssb_PositionsInBurst.inOneGroup.buf = calloc(1, sizeof(uint8_t)); @@ -479,7 +608,14 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier, // TODO: add eCallOverIMS-Support // ue-TimersAndConstants - // TODO: add ue-TimersAndConstants + sib1->ue_TimersAndConstants = CALLOC(1,sizeof(struct NR_UE_TimersAndConstants)); + sib1->ue_TimersAndConstants->t300 = NR_UE_TimersAndConstants__t300_ms400; + sib1->ue_TimersAndConstants->t301 = NR_UE_TimersAndConstants__t301_ms400; + sib1->ue_TimersAndConstants->t310 = NR_UE_TimersAndConstants__t310_ms2000; + sib1->ue_TimersAndConstants->n310 = NR_UE_TimersAndConstants__n310_n10; + sib1->ue_TimersAndConstants->t311 = NR_UE_TimersAndConstants__t311_ms3000; + sib1->ue_TimersAndConstants->n311 = NR_UE_TimersAndConstants__n311_n1; + sib1->ue_TimersAndConstants->t319 = NR_UE_TimersAndConstants__t319_ms400; // uac-BarringInfo /*sib1->uac_BarringInfo = CALLOC(1, sizeof(struct NR_SIB1__uac_BarringInfo)); diff --git a/openair2/RRC/NR/rrc_gNB_reconfig.c b/openair2/RRC/NR/rrc_gNB_reconfig.c index 249d1d2aaa..be5d0f3f46 100644 --- a/openair2/RRC/NR/rrc_gNB_reconfig.c +++ b/openair2/RRC/NR/rrc_gNB_reconfig.c @@ -128,7 +128,7 @@ void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0) { // should be '1100 0000 0000 00'B (LSB first!), first two symols in slot, adjust if needed ss0->monitoringSymbolsWithinSlot->buf[1] = 0; - ss0->monitoringSymbolsWithinSlot->buf[0] = (1<<7) | (1<<6); + ss0->monitoringSymbolsWithinSlot->buf[0] = (1<<7); ss0->monitoringSymbolsWithinSlot->size = 2; ss0->monitoringSymbolsWithinSlot->bits_unused = 2; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf index 4373f38e7b..fdcb835e24 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf @@ -24,8 +24,8 @@ gNBs = pdcch_ConfigSIB1 = ( { - controlResourceSetZero = 12; - searchSpaceZero = 0; + controlResourceSetZero = 10; + searchSpaceZero = 4; } ); @@ -51,13 +51,13 @@ gNBs = #initialDownlinkBWP #genericParameters # this is RBstart=41,L=24 (275*(L-1))+RBstart - initialDLBWPlocationAndBandwidth = 6366; # 6366 12925 12956 28875 + initialDLBWPlocationAndBandwidth = 13039; # 6366 12925 12956 28875 # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 initialDLBWPsubcarrierSpacing = 1; #pdcch-ConfigCommon - initialDLBWPcontrolResourceSetZero = 12; - initialDLBWPsearchSpaceZero = 0; + initialDLBWPcontrolResourceSetZero = 10; + initialDLBWPsearchSpaceZero = 4; #pdsch-ConfigCommon #pdschTimeDomainAllocationList (up to 16 entries) initialDLBWPk0_0 = 0; @@ -99,7 +99,7 @@ gNBs = pMax = 20; #initialUplinkBWP #genericParameters - initialULBWPlocationAndBandwidth = 6366; + initialULBWPlocationAndBandwidth = 13039; # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 initialULBWPsubcarrierSpacing = 1; @@ -111,15 +111,15 @@ gNBs = prach_msg1_FDM = 0; prach_msg1_FrequencyStart = 0; zeroCorrelationZoneConfig = 13; - preambleReceivedTargetPower = -100; + preambleReceivedTargetPower = -96; #preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) - preambleTransMax = 6; + preambleTransMax = 10; #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; #ra_ReponseWindow #1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; + ra_ResponseWindow = 7; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; @@ -128,11 +128,11 @@ gNBs = #ra_ContentionResolutionTimer #(0..7) 8,16,24,32,40,48,56,64 ra_ContentionResolutionTimer = 7; - rsrp_ThresholdSSB = 19; + rsrp_ThresholdSSB = 11; #prach-RootSequenceIndex_PR #1 = 839, 2 = 139 prach_RootSequenceIndex_PR = 2; - prach_RootSequenceIndex = 1; + prach_RootSequenceIndex = 0; # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex # msg1_SubcarrierSpacing = 1, @@ -163,7 +163,7 @@ gNBs = # pucchGroupHopping # 0 = neither, 1= group hopping, 2=sequence hopping pucchGroupHopping = 0; - hoppingId = 40; + hoppingId = 31; p0_nominal = -90; # ssb_PositionsInBurs_BitmapPR # 1=short, 2=medium, 3=long @@ -190,11 +190,11 @@ gNBs = # pattern1 # dl_UL_TransmissionPeriodicity # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 - dl_UL_TransmissionPeriodicity = 6; - nrofDownlinkSlots = 7; - nrofDownlinkSymbols = 6; - nrofUplinkSlots = 2; - nrofUplinkSymbols = 4; + dl_UL_TransmissionPeriodicity = 5; + nrofDownlinkSlots = 3; + nrofDownlinkSymbols = 10; + nrofUplinkSlots = 1; + nrofUplinkSymbols = 2; ssPBCH_BlockPower = 10; } From 62bc47c82062cf8a73eb6a1ff0cd813fe4b99bc8 Mon Sep 17 00:00:00 2001 From: rmagueta Date: Thu, 28 Jan 2021 16:04:41 +0000 Subject: [PATCH 7/7] Minor update in SIB1 contents. do_SIB1_NR() only if SA. --- openair2/RRC/NR/MESSAGES/asn1_msg.c | 6 +- openair2/RRC/NR/rrc_gNB.c | 6 +- .../gnb.sa.band41.fr1.106PRB.usrpb210.conf | 316 ++++++++++++++++++ .../gnb.sa.band78.fr1.106PRB.usrpb210.conf | 34 +- 4 files changed, 341 insertions(+), 21 deletions(-) create mode 100644 targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.c b/openair2/RRC/NR/MESSAGES/asn1_msg.c index 9754189203..be7c822ec7 100644 --- a/openair2/RRC/NR/MESSAGES/asn1_msg.c +++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c @@ -324,7 +324,7 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier, // cellSelectionInfo sib1->cellSelectionInfo = CALLOC(1,sizeof(struct NR_SIB1__cellSelectionInfo)); - sib1->cellSelectionInfo->q_RxLevMin = -65; + sib1->cellSelectionInfo->q_RxLevMin = -50; // cellAccessRelatedInfo struct NR_PLMN_IdentityInfo *nr_plmn_info=CALLOC(1,sizeof(struct NR_PLMN_IdentityInfo)); @@ -373,7 +373,7 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier, // TODO: add connEstFailureControl //si-SchedulingInfo - sib1->si_SchedulingInfo = CALLOC(1,sizeof(struct NR_SI_SchedulingInfo)); + /*sib1->si_SchedulingInfo = CALLOC(1,sizeof(struct NR_SI_SchedulingInfo)); asn_set_empty(&sib1->si_SchedulingInfo->schedulingInfoList.list); sib1->si_SchedulingInfo->si_WindowLength = NR_SI_SchedulingInfo__si_WindowLength_s40; struct NR_SchedulingInfo *schedulingInfo = CALLOC(1,sizeof(struct NR_SchedulingInfo)); @@ -401,7 +401,7 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier, sib_type2->valueTag = CALLOC(1,sizeof(sib_type2->valueTag)); ASN_SEQUENCE_ADD(&schedulingInfo->sib_MappingInfo.list,sib_type2); - ASN_SEQUENCE_ADD(&sib1->si_SchedulingInfo->schedulingInfoList.list,schedulingInfo); + ASN_SEQUENCE_ADD(&sib1->si_SchedulingInfo->schedulingInfoList.list,schedulingInfo);*/ // servingCellConfigCommon sib1->servingCellConfigCommon = CALLOC(1,sizeof(struct NR_ServingCellConfigCommonSIB)); diff --git a/openair2/RRC/NR/rrc_gNB.c b/openair2/RRC/NR/rrc_gNB.c index 251d9d8e04..bc86fdd3fa 100644 --- a/openair2/RRC/NR/rrc_gNB.c +++ b/openair2/RRC/NR/rrc_gNB.c @@ -212,7 +212,11 @@ static void init_NR_SI(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration LOG_D(RRC,"%s()\n\n\n\n",__FUNCTION__); rrc->carrier.MIB = (uint8_t *) malloc16(4); rrc->carrier.sizeof_MIB = do_MIB_NR(rrc,0); - rrc->carrier.sizeof_SIB1 = do_SIB1_NR(&rrc->carrier,configuration); + + if(get_softmodem_params()->sa) { + rrc->carrier.sizeof_SIB1 = do_SIB1_NR(&rrc->carrier,configuration); + } + LOG_I(NR_RRC,"Done init_NR_SI\n"); rrc_mac_config_req_gNB(rrc->module_id, rrc->carrier.ssb_SubcarrierOffset, diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf new file mode 100644 index 0000000000..108cf06033 --- /dev/null +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf @@ -0,0 +1,316 @@ +Active_gNBs = ( "gNB-Eurecom-5GNRBox"); +# Asn1_verbosity, choice in: none, info, annoying +Asn1_verbosity = "none"; + +gNBs = +( + { + ////////// Identification parameters: + gNB_ID = 0xe00; + + cell_type = "CELL_MACRO_GNB"; + gNB_name = "gNB-Eurecom-5GNRBox"; + + // Tracking area code, 0x0000 and 0xfffe are reserved values + tracking_area_code = 1; + plmn_list = ({mcc = 222; mnc = 93; mnc_length = 2;}); + + tr_s_preference = "local_mac" + + ////////// Physical parameters: + + ssb_SubcarrierOffset = 0; + pdsch_AntennaPorts = 1; + + pdcch_ConfigSIB1 = ( + { + controlResourceSetZero = 12; + searchSpaceZero = 0; + } + ); + + servingCellConfigCommon = ( + { + #spCellConfigCommon + + physCellId = 0; + +# downlinkConfigCommon + #frequencyInfoDL + # this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP) + absoluteFrequencySSB = 518670; + dl_frequencyBand = 41; + # this is 3600 MHz + dl_absoluteFrequencyPointA = 514854; + #scs-SpecificCarrierList + dl_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + dl_subcarrierSpacing = 1; + dl_carrierBandwidth = 106; + #initialDownlinkBWP + #genericParameters + # this is RBstart=41,L=24 (275*(L-1))+RBstart + initialDLBWPlocationAndBandwidth = 6366; # 6366 12925 12956 28875 +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialDLBWPsubcarrierSpacing = 1; + #pdcch-ConfigCommon + initialDLBWPcontrolResourceSetZero = 12; + initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; + #initialULBWPmappingType + #0=typeA,1=typeB + initialDLBWPmappingType_0 = 0; + #this is SS=2,L=12 + initialDLBWPstartSymbolAndLength_0 = 53; + + initialDLBWPk0_1 = 0; + initialDLBWPmappingType_1 = 0; + #this is SS=2,L=10 + initialDLBWPstartSymbolAndLength_1 = 81; + + initialDLBWPk0_2 = 0; + initialDLBWPmappingType_2 = 0; + #this is SS=1,L=12 + initialDLBWPstartSymbolAndLength_2 = 95; + + initialDLBWPk0_3 = 0; + initialDLBWPmappingType_3 = 0; + #this is SS=2,L=7 + initialDLBWPstartSymbolAndLength_3 = 86; + + initialDLBWPk0_4 = 0; + initialDLBWPmappingType_4 = 0; + #this is SS=2,L=5 + initialDLBWPstartSymbolAndLength_4 = 58; + + #uplinkConfigCommon + #frequencyInfoUL + ul_frequencyBand = 41; + #scs-SpecificCarrierList + ul_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + ul_subcarrierSpacing = 1; + ul_carrierBandwidth = 106; + pMax = 20; + #initialUplinkBWP + #genericParameters + initialULBWPlocationAndBandwidth = 6366; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialULBWPsubcarrierSpacing = 1; + #rach-ConfigCommon + #rach-ConfigGeneric + prach_ConfigurationIndex = 98; +#prach_msg1_FDM +#0 = one, 1=two, 2=four, 3=eight + prach_msg1_FDM = 0; + prach_msg1_FrequencyStart = 0; + zeroCorrelationZoneConfig = 13; + preambleReceivedTargetPower = -100; +#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) + preambleTransMax = 6; +#powerRampingStep +# 0=dB0,1=dB2,2=dB4,3=dB6 + powerRampingStep = 1; +#ra_ReponseWindow +#1,2,4,8,10,20,40,80 + ra_ResponseWindow = 4; +#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR +#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen + ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; +#oneHalf (0..15) 4,8,12,16,...60,64 + ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 14; +#ra_ContentionResolutionTimer +#(0..7) 8,16,24,32,40,48,56,64 + ra_ContentionResolutionTimer = 7; + rsrp_ThresholdSSB = 19; +#prach-RootSequenceIndex_PR +#1 = 839, 2 = 139 + prach_RootSequenceIndex_PR = 2; + prach_RootSequenceIndex = 1; + # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex + # + msg1_SubcarrierSpacing = 1, +# restrictedSetConfig +# 0=unrestricted, 1=restricted type A, 2=restricted type B + restrictedSetConfig = 0, + + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; + initialULBWPmappingType_0 = 1 + # this is SS=0 L=11 + initialULBWPstartSymbolAndLength_0 = 55; + + initialULBWPk2_1 = 6; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=12 + initialULBWPstartSymbolAndLength_1 = 69; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; + + msg3_DeltaPreamble = 1; + p0_NominalWithGrant =-90; + +# pucch-ConfigCommon setup : +# pucchGroupHopping +# 0 = neither, 1= group hopping, 2=sequence hopping + pucchGroupHopping = 0; + hoppingId = 40; + p0_nominal = -90; +# ssb_PositionsInBurs_BitmapPR +# 1=short, 2=medium, 3=long + ssb_PositionsInBurst_PR = 2; + ssb_PositionsInBurst_Bitmap = 1; + +# ssb_periodicityServingCell +# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 + ssb_periodicityServingCell = 2; + +# dmrs_TypeA_position +# 0 = pos2, 1 = pos3 + dmrs_TypeA_Position = 0; + +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + subcarrierSpacing = 1; + + + #tdd-UL-DL-ConfigurationCommon +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + referenceSubcarrierSpacing = 1; + # pattern1 + # dl_UL_TransmissionPeriodicity + # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 + dl_UL_TransmissionPeriodicity = 6; + nrofDownlinkSlots = 7; + nrofDownlinkSymbols = 6; + nrofUplinkSlots = 2; + nrofUplinkSymbols = 4; + + ssPBCH_BlockPower = 10; + } + + ); + + + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 2; + SCTP_OUTSTREAMS = 2; + }; + + + ////////// MME parameters: + mme_ip_address = ( { ipv4 = "192.168.12.26"; + ipv6 = "192:168:30::17"; + active = "yes"; + preference = "ipv4"; + } + ); + + ///X2 + enable_x2 = "no"; + t_reloc_prep = 1000; /* unit: millisecond */ + tx2_reloc_overall = 2000; /* unit: millisecond */ + t_dc_prep = 1000; /* unit: millisecond */ + t_dc_overall = 2000; /* unit: millisecond */ + target_enb_x2_ip_address = ( + { ipv4 = "CI_FR1_CTL_ENB_IP_ADDR"; + ipv6 = "192:168:30::17"; + preference = "ipv4"; + } + ); + + NETWORK_INTERFACES : + { + GNB_INTERFACE_NAME_FOR_S1_MME = "eth0"; + GNB_IPV4_ADDRESS_FOR_S1_MME = "CI_GNB_IP_ADDR"; + GNB_INTERFACE_NAME_FOR_S1U = "eth0"; + GNB_IPV4_ADDRESS_FOR_S1U = "CI_GNB_IP_ADDR"; + GNB_PORT_FOR_S1U = 2152; # Spec 2152 + GNB_IPV4_ADDRESS_FOR_X2C = "CI_GNB_IP_ADDR"; + GNB_PORT_FOR_X2C = 36422; # Spec 36422 + }; + + } +); + +MACRLCs = ( + { + num_cc = 1; + tr_s_preference = "local_L1"; + tr_n_preference = "local_RRC"; + } +); + +L1s = ( + { + num_cc = 1; + tr_n_preference = "local_mac"; + } +); + +RUs = ( + { + local_rf = "yes" + nb_tx = 1 + nb_rx = 1 + att_tx = 0 + att_rx = 0; + bands = [7]; + max_pdschReferenceSignalPower = -27; + max_rxgain = 114; + eNB_instances = [0]; + #beamforming 1x4 matrix: + bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000]; + clock_src = "internal"; + } +); + +THREAD_STRUCT = ( + { + #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" + parallel_config = "PARALLEL_SINGLE_THREAD"; + #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" + worker_config = "WORKER_ENABLE"; + } +); + +rfsimulator : +{ + serveraddr = "server"; + serverport = "4043"; + options = (); #("saviq"); or/and "chanmod" + modelname = "AWGN"; + IQfile = "/tmp/rfsimulator.iqs"; +}; + + log_config : + { + global_log_level ="info"; + global_log_verbosity ="medium"; + hw_log_level ="info"; + hw_log_verbosity ="medium"; + phy_log_level ="info"; + phy_log_verbosity ="medium"; + mac_log_level ="info"; + mac_log_verbosity ="high"; + rlc_log_level ="info"; + rlc_log_verbosity ="medium"; + pdcp_log_level ="info"; + pdcp_log_verbosity ="medium"; + rrc_log_level ="info"; + rrc_log_verbosity ="medium"; + }; + diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf index fdcb835e24..4373f38e7b 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf @@ -24,8 +24,8 @@ gNBs = pdcch_ConfigSIB1 = ( { - controlResourceSetZero = 10; - searchSpaceZero = 4; + controlResourceSetZero = 12; + searchSpaceZero = 0; } ); @@ -51,13 +51,13 @@ gNBs = #initialDownlinkBWP #genericParameters # this is RBstart=41,L=24 (275*(L-1))+RBstart - initialDLBWPlocationAndBandwidth = 13039; # 6366 12925 12956 28875 + initialDLBWPlocationAndBandwidth = 6366; # 6366 12925 12956 28875 # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 initialDLBWPsubcarrierSpacing = 1; #pdcch-ConfigCommon - initialDLBWPcontrolResourceSetZero = 10; - initialDLBWPsearchSpaceZero = 4; + initialDLBWPcontrolResourceSetZero = 12; + initialDLBWPsearchSpaceZero = 0; #pdsch-ConfigCommon #pdschTimeDomainAllocationList (up to 16 entries) initialDLBWPk0_0 = 0; @@ -99,7 +99,7 @@ gNBs = pMax = 20; #initialUplinkBWP #genericParameters - initialULBWPlocationAndBandwidth = 13039; + initialULBWPlocationAndBandwidth = 6366; # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 initialULBWPsubcarrierSpacing = 1; @@ -111,15 +111,15 @@ gNBs = prach_msg1_FDM = 0; prach_msg1_FrequencyStart = 0; zeroCorrelationZoneConfig = 13; - preambleReceivedTargetPower = -96; + preambleReceivedTargetPower = -100; #preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) - preambleTransMax = 10; + preambleTransMax = 6; #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; #ra_ReponseWindow #1,2,4,8,10,20,40,80 - ra_ResponseWindow = 7; + ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; @@ -128,11 +128,11 @@ gNBs = #ra_ContentionResolutionTimer #(0..7) 8,16,24,32,40,48,56,64 ra_ContentionResolutionTimer = 7; - rsrp_ThresholdSSB = 11; + rsrp_ThresholdSSB = 19; #prach-RootSequenceIndex_PR #1 = 839, 2 = 139 prach_RootSequenceIndex_PR = 2; - prach_RootSequenceIndex = 0; + prach_RootSequenceIndex = 1; # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex # msg1_SubcarrierSpacing = 1, @@ -163,7 +163,7 @@ gNBs = # pucchGroupHopping # 0 = neither, 1= group hopping, 2=sequence hopping pucchGroupHopping = 0; - hoppingId = 31; + hoppingId = 40; p0_nominal = -90; # ssb_PositionsInBurs_BitmapPR # 1=short, 2=medium, 3=long @@ -190,11 +190,11 @@ gNBs = # pattern1 # dl_UL_TransmissionPeriodicity # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 - dl_UL_TransmissionPeriodicity = 5; - nrofDownlinkSlots = 3; - nrofDownlinkSymbols = 10; - nrofUplinkSlots = 1; - nrofUplinkSymbols = 2; + dl_UL_TransmissionPeriodicity = 6; + nrofDownlinkSlots = 7; + nrofDownlinkSymbols = 6; + nrofUplinkSlots = 2; + nrofUplinkSymbols = 4; ssPBCH_BlockPower = 10; }