From 75a1562d7f1e0d17a155c51247f7f031feba9512 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 9 Nov 2020 15:04:57 +0100 Subject: [PATCH 01/56] Remove unused (commented) copy_nr_ulreq() --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 29 ---------------------- 1 file changed, 29 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index e4c2e11d7d..659873c6a6 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -285,35 +285,6 @@ void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subfram */ -/* -void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) -{ - int CC_id; - gNB_MAC_INST *mac = RC.nrmac[module_idP]; - - for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { - - nfapi_ul_config_request_t *ul_req = &mac->UL_tti_req[CC_id]; - - *ul_req = *ul_req_tmp; - - // Restore the pointer - ul_req->ul_config_request_body.ul_config_pdu_list = ul_req_pdu; - ul_req->sfn_sf = (frameP<<7) + slotP; - ul_req_tmp->ul_config_request_body.number_of_pdus = 0; - - if (ul_req->ul_config_request_body.number_of_pdus>0) - { - LOG_D(PHY, "%s() active NOW (frameP:%d slotP:%d) pdus:%d\n", __FUNCTION__, frameP, slotP, ul_req->ul_config_request_body.number_of_pdus); - } - - memcpy((void*)ul_req->ul_config_request_body.ul_config_pdu_list, - (void*)ul_req_tmp->ul_config_request_body.ul_config_pdu_list, - ul_req->ul_config_request_body.number_of_pdus*sizeof(nfapi_ul_config_request_pdu_t)); - } -} -*/ - void nr_schedule_pusch(int Mod_idP, int UE_id, int num_slots_per_tdd, From 24810751229b94fd2e10d9bc6bd8d5f79cd366e7 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 13 Nov 2020 14:50:58 +0100 Subject: [PATCH 02/56] Add debug output for nr_rate_matching_ldpc() asserts --- openair1/PHY/CODING/nr_rate_matching.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/openair1/PHY/CODING/nr_rate_matching.c b/openair1/PHY/CODING/nr_rate_matching.c index efa5abdc90..e4097ade9d 100644 --- a/openair1/PHY/CODING/nr_rate_matching.c +++ b/openair1/PHY/CODING/nr_rate_matching.c @@ -407,8 +407,16 @@ int nr_rate_matching_ldpc(uint8_t Ilbrm, #ifdef RM_DEBUG printf("nr_rate_matching_ldpc: E %d, F %d, Foffset %d, k0 %d, Ncb %d, rvidx %d\n", E, F, Foffset,ind, Ncb, rvidx); #endif - AssertFatal(Foffset <= E,"Foffset %d > E %d\n",Foffset,E); - AssertFatal(Foffset <= Ncb,"Foffset %d > Ncb %d\n",Foffset,Ncb); + AssertFatal(Foffset <= E, + "Foffset %d > E %d " + "(Ilbrm %d, Tbslbrm %d, Z %d, BG %d, C %d)\n", + Foffset, E, + Ilbrm, Tbslbrm, Z, BG, C); + AssertFatal(Foffset <= Ncb, + "Foffset %d > Ncb %d " + "(Ilbrm %d, Tbslbrm %d, Z %d, BG %d, C %d)\n", + Foffset, Ncb, + Ilbrm, Tbslbrm, Z, BG, C); if (ind >= Foffset && ind < (F+Foffset)) ind = F+Foffset; From c8e607a18cf940bcff41454de0203c67c911cfce Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 15 Oct 2020 09:47:40 +0200 Subject: [PATCH 03/56] Create separate nr_schedule_ulsch(), move helper functions --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 6 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 43 -- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 379 +++++++++++++++++- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 8 + 4 files changed, 389 insertions(+), 47 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 659873c6a6..4665f45258 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -432,9 +432,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, // The decision about whether to schedule is done for each UE independently // inside if (UE_info->active[UE_id] && slot < 10) { - - int tda = 1; // time domain assignment hardcoded for now - schedule_fapi_ul_pdu(module_idP, frame, slot, num_slots_per_tdd, nr_ulmix_slots, tda, ulsch_in_slot_bitmap); + //int tda = 1; // time domain assignment hardcoded for now + //schedule_fapi_ul_pdu(module_idP, frame, slot, num_slots_per_tdd, nr_ulmix_slots, tda, ulsch_in_slot_bitmap); + nr_schedule_ulsch(module_idP, frame, slot, num_slots_per_tdd, nr_ulmix_slots, ulsch_in_slot_bitmap); nr_schedule_pusch(module_idP, UE_id, num_slots_per_tdd, nr_ulmix_slots, frame, slot); } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index e14afacf09..1df61528ca 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -427,49 +427,6 @@ void config_uldci(NR_BWP_Uplink_t *ubwp, dci_pdu_rel15->rv); } - -int8_t select_ul_harq_pid(NR_UE_sched_ctrl_t *sched_ctrl) { - - uint8_t hrq_id; - uint8_t max_ul_harq_pids = 3; // temp: for testing - // schedule active harq processes - NR_UE_ul_harq_t cur_harq; - for (hrq_id=0; hrq_id < max_ul_harq_pids; hrq_id++) { - cur_harq = sched_ctrl->ul_harq_processes[hrq_id]; - if (cur_harq.state==ACTIVE_NOT_SCHED) { -#ifdef UL_HARQ_PRINT - printf("[SCHED] Found ulharq id %d, scheduling it for retransmission\n",hrq_id); -#endif - return hrq_id; - } - } - - // schedule new harq processes - for (hrq_id=0; hrq_id < max_ul_harq_pids; hrq_id++) { - cur_harq = sched_ctrl->ul_harq_processes[hrq_id]; - if (cur_harq.state==INACTIVE) { -#ifdef UL_HARQ_PRINT - printf("[SCHED] Found new ulharq id %d, scheduling it\n",hrq_id); -#endif - return hrq_id; - } - } - LOG_E(MAC,"All UL HARQ processes are busy. Cannot schedule ULSCH\n"); - return -1; -} - -long get_K2(NR_BWP_Uplink_t *ubwp, int time_domain_assignment, int mu) { - DevAssert(ubwp); - const NR_PUSCH_TimeDomainResourceAllocation_t *tda_list = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[time_domain_assignment]; - if (tda_list->k2) - return *tda_list->k2; - else if (mu < 2) - return 1; - else if (mu == 2) - return 2; - else - return 3; -} void schedule_fapi_ul_pdu(int Mod_idP, frame_t frameP, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 76c9dedf30..1f0018e31a 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -31,7 +31,7 @@ #include "LAYER2/NR_MAC_gNB/mac_proto.h" #include "executables/softmodem-common.h" -//#define ENABLE_MAC_PAYLOAD_DEBUG 1 +#include "common/utils/nr/nr_common.h" void nr_process_mac_pdu( @@ -418,5 +418,382 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, return; } } +} +long get_K2(NR_BWP_Uplink_t *ubwp, int time_domain_assignment, int mu) { + DevAssert(ubwp); + const NR_PUSCH_TimeDomainResourceAllocation_t *tda_list = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[time_domain_assignment]; + if (tda_list->k2) + return *tda_list->k2; + else if (mu < 2) + return 1; + else if (mu == 2) + return 2; + else + return 3; +} + +int8_t select_ul_harq_pid(NR_UE_sched_ctrl_t *sched_ctrl) { + + uint8_t hrq_id; + uint8_t max_ul_harq_pids = 3; // temp: for testing + // schedule active harq processes + NR_UE_ul_harq_t cur_harq; + for (hrq_id=0; hrq_id < max_ul_harq_pids; hrq_id++) { + cur_harq = sched_ctrl->ul_harq_processes[hrq_id]; + if (cur_harq.state==ACTIVE_NOT_SCHED) { +#ifdef UL_HARQ_PRINT + printf("[SCHED] Found ulharq id %d, scheduling it for retransmission\n",hrq_id); +#endif + return hrq_id; + } + } + + // schedule new harq processes + for (hrq_id=0; hrq_id < max_ul_harq_pids; hrq_id++) { + cur_harq = sched_ctrl->ul_harq_processes[hrq_id]; + if (cur_harq.state==INACTIVE) { +#ifdef UL_HARQ_PRINT + printf("[SCHED] Found new ulharq id %d, scheduling it\n",hrq_id); +#endif + return hrq_id; + } + } + LOG_E(MAC,"All UL HARQ processes are busy. Cannot schedule ULSCH\n"); + return -1; +} + +void nr_schedule_ulsch(module_id_t module_id, + frame_t frame, + sub_frame_t slot, + int num_slots_per_tdd, + int ul_slots, + uint64_t ulsch_in_slot_bitmap) { + gNB_MAC_INST *nr_mac = RC.nrmac[module_id]; + NR_COMMON_channels_t *cc = nr_mac->common_channels; + NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; + + const int bwp_id=1; + const int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; + const int UE_id = 0; + NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; + AssertFatal(UE_info->active[UE_id],"Cannot find UE_id %d is not active\n",UE_id); + + NR_CellGroupConfig_t *secondaryCellGroup = UE_info->secondaryCellGroup[UE_id]; + AssertFatal(secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count == 1, + "downlinkBWP_ToAddModList has %d BWP!\n", + secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count); + NR_BWP_Uplink_t *ubwp = + secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig + ->uplinkBWP_ToAddModList->list.array[bwp_id - 1]; + const int n_ubwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count; + NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1]; + NR_PUSCH_Config_t *pusch_Config = ubwp->bwp_Dedicated->pusch_Config->choice.setup; + + const int tda = 1; // hardcoded for the moment + AssertFatal(tdabwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count, + "time domain assignment %d >= %d\n",tda,ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count); + + int K2 = get_K2(ubwp, tda, mu); + /* check if slot is UL, and for phy test verify that it is in first TDD + * period, slot 8 (for K2=2, this is at slot 6 in the gNB; because of UE + * limitations). Note that if K2 or the TDD configuration is changed, below + * conditions might exclude each other and never be true */ + const int slot_idx = (slot + K2) % num_slots_per_tdd; + if (is_xlsch_in_slot(ulsch_in_slot_bitmap, slot_idx) + && (!get_softmodem_params()->phy_test || slot_idx == 8)) { + nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[module_id]->UL_dci_req[0]; + UL_dci_req->SFN = frame; + UL_dci_req->Slot = slot; + nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu; + + AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList!=NULL,"searchPsacesToAddModList is null\n"); + AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count>0, + "searchPsacesToAddModList is empty\n"); + + uint16_t rnti = UE_info->rnti[UE_id]; + + int first_ul_slot = num_slots_per_tdd - ul_slots; + NR_sched_pusch *pusch_sched = &UE_info->UE_sched_ctrl[UE_id].sched_pusch[slot+K2-first_ul_slot]; + pusch_sched->frame = frame; + pusch_sched->slot = slot + K2; + pusch_sched->active = true; + nfapi_nr_pusch_pdu_t *pusch_pdu = &pusch_sched->pusch_pdu; + memset(pusch_pdu,0,sizeof(nfapi_nr_pusch_pdu_t)); + + LOG_D(MAC, "Scheduling UE specific PUSCH\n"); + //UL_tti_req = &nr_mac->UL_tti_req[CC_id]; + + int dci_formats[2]; + int rnti_types[2]; + + NR_SearchSpace_t *ss; + int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; + + AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList!=NULL,"searchPsacesToAddModList is null\n"); + AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count>0, + "searchPsacesToAddModList is empty\n"); + + int found=0; + + for (int i=0;ibwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count;i++) { + ss=bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.array[i]; + AssertFatal(ss->controlResourceSetId != NULL,"ss->controlResourceSetId is null\n"); + AssertFatal(ss->searchSpaceType != NULL,"ss->searchSpaceType is null\n"); + if (ss->searchSpaceType->present == target_ss) { + found=1; + break; + } + } + AssertFatal(found==1,"Couldn't find an adequate searchspace\n"); + + if (ss->searchSpaceType->choice.ue_Specific->dci_Formats) + dci_formats[0] = NR_UL_DCI_FORMAT_0_1; + else + dci_formats[0] = NR_UL_DCI_FORMAT_0_0; + + rnti_types[0] = NR_RNTI_C; + + //Resource Allocation in time domain + int startSymbolAndLength=0; + int StartSymbolIndex,NrOfSymbols,mapping_type; + + startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[tda]->startSymbolAndLength; + SLIV2SL(startSymbolAndLength,&StartSymbolIndex,&NrOfSymbols); + pusch_pdu->start_symbol_index = StartSymbolIndex; + pusch_pdu->nr_of_symbols = NrOfSymbols; + + mapping_type = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[tda]->mappingType; + + pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; + pusch_pdu->rnti = rnti; + pusch_pdu->handle = 0; //not yet used + + pusch_pdu->bwp_size = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); + pusch_pdu->bwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); + pusch_pdu->subcarrier_spacing = ubwp->bwp_Common->genericParameters.subcarrierSpacing; + pusch_pdu->cyclic_prefix = 0; + + if (pusch_Config->transformPrecoder == NULL) { + if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder == NULL) + pusch_pdu->transform_precoding = 1; + else + pusch_pdu->transform_precoding = 0; + } + else + pusch_pdu->transform_precoding = *pusch_Config->transformPrecoder; + if (pusch_Config->dataScramblingIdentityPUSCH != NULL) + pusch_pdu->data_scrambling_id = *pusch_Config->dataScramblingIdentityPUSCH; + else + pusch_pdu->data_scrambling_id = *scc->physCellId; + + pusch_pdu->mcs_index = 9; + if (pusch_pdu->transform_precoding) + pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, 0, + dci_formats[0], rnti_types[0], target_ss, false); + else + pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_TableTransformPrecoder, 1, + dci_formats[0], rnti_types[0], target_ss, false); + + pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); + pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); + if (pusch_Config->tp_pi2BPSK!=NULL) { + if(((pusch_pdu->mcs_table==3)&&(pusch_pdu->mcs_index<2)) || + ((pusch_pdu->mcs_table==4)&&(pusch_pdu->mcs_index<6))) { + pusch_pdu->target_code_rate = pusch_pdu->target_code_rate>>1; + pusch_pdu->qam_mod_order = pusch_pdu->qam_mod_order<<1; + } + } + pusch_pdu->nrOfLayers = 1; + + //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2] + if (pusch_Config->resourceAllocation==NR_PUSCH_Config__resourceAllocation_resourceAllocationType1) { + pusch_pdu->resource_alloc = 1; //type 1 + pusch_pdu->rb_start = 0; + if (get_softmodem_params()->phy_test==1) + pusch_pdu->rb_size = 50; + else + pusch_pdu->rb_size = pusch_pdu->bwp_size; + } + else + AssertFatal(1==0,"Only frequency resource allocation type 1 is currently supported\n"); + + pusch_pdu->vrb_to_prb_mapping = 0; + + if (pusch_Config->frequencyHopping==NULL) + pusch_pdu->frequency_hopping = 0; + else + pusch_pdu->frequency_hopping = 1; + + //pusch_pdu->tx_direct_current_location;//The uplink Tx Direct Current location for the carrier. Only values in the value range of this field between 0 and 3299, which indicate the subcarrier index within the carrier corresponding 1o the numerology of the corresponding uplink BWP and value 3300, which indicates "Outside the carrier" and value 3301, which indicates "Undetermined position within the carrier" are used. [TS38.331, UplinkTxDirectCurrentBWP IE] + //pusch_pdu->uplink_frequency_shift_7p5khz = 0; + + + // -------------------- + // ------- DMRS ------- + // -------------------- + NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig; + if (mapping_type == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA) + NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup; + else + NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; + if (NR_DMRS_UplinkConfig->dmrs_Type == NULL) + pusch_pdu->dmrs_config_type = 0; + else + pusch_pdu->dmrs_config_type = 1; + pusch_pdu->scid = 0; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1] + if (pusch_pdu->transform_precoding) { // transform precoding disabled + long *scramblingid; + if (pusch_pdu->scid == 0) + scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID0; + else + scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID1; + if (scramblingid == NULL) + pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; + else + pusch_pdu->ul_dmrs_scrambling_id = *scramblingid; + } + else { + pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; + if (NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity != NULL) + pusch_pdu->pusch_identity = *NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity; + else + pusch_pdu->pusch_identity = *scc->physCellId; + } + pusch_dmrs_AdditionalPosition_t additional_pos; + if (NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NULL) + additional_pos = 2; + else { + if (*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos3) + additional_pos = 3; + else + additional_pos = *NR_DMRS_UplinkConfig->dmrs_AdditionalPosition; + } + pusch_maxLength_t pusch_maxLength; + if (NR_DMRS_UplinkConfig->maxLength == NULL) + pusch_maxLength = 1; + else + pusch_maxLength = 2; + uint16_t l_prime_mask = get_l_prime(pusch_pdu->nr_of_symbols, mapping_type, additional_pos, pusch_maxLength); + pusch_pdu->ul_dmrs_symb_pos = l_prime_mask << pusch_pdu->start_symbol_index; + + pusch_pdu->num_dmrs_cdm_grps_no_data = 1; + pusch_pdu->dmrs_ports = 1; + // -------------------------------------------------------------------------------------------------------------------------------------------- + + // -------------------- + // ------- PTRS ------- + // -------------------- + if (NR_DMRS_UplinkConfig->phaseTrackingRS != NULL) { + // TODO to be fixed from RRC config + uint8_t ptrs_mcs1 = 2; // higher layer parameter in PTRS-UplinkConfig + uint8_t ptrs_mcs2 = 4; // higher layer parameter in PTRS-UplinkConfig + uint8_t ptrs_mcs3 = 10; // higher layer parameter in PTRS-UplinkConfig + uint16_t n_rb0 = 25; // higher layer parameter in PTRS-UplinkConfig + uint16_t n_rb1 = 75; // higher layer parameter in PTRS-UplinkConfig + pusch_pdu->pusch_ptrs.ptrs_time_density = get_L_ptrs(ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, pusch_pdu->mcs_index, pusch_pdu->mcs_table); + pusch_pdu->pusch_ptrs.ptrs_freq_density = get_K_ptrs(n_rb0, n_rb1, pusch_pdu->rb_size); + pusch_pdu->pusch_ptrs.ptrs_ports_list = (nfapi_nr_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ptrs_ports_t)); + pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0; + + pusch_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS; // enable PUSCH PTRS + } + else{ + pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS + } + + // -------------------------------------------------------------------------------------------------------------------------------------------- + + //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2] + //Optional Data only included if indicated in pduBitmap + int8_t harq_id = select_ul_harq_pid(&UE_info->UE_sched_ctrl[UE_id]); + if (harq_id < 0) return; + NR_UE_ul_harq_t *cur_harq = &UE_info->UE_sched_ctrl[UE_id].ul_harq_processes[harq_id]; + pusch_pdu->pusch_data.harq_process_id = harq_id; + pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi; + pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; + + cur_harq->state = ACTIVE_SCHED; + cur_harq->last_tx_slot = pusch_sched->slot; + + uint8_t num_dmrs_symb = 0; + + for(int dmrs_counter = pusch_pdu->start_symbol_index; dmrs_counter < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; dmrs_counter++) + num_dmrs_symb += ((pusch_pdu->ul_dmrs_symb_pos >> dmrs_counter) & 1); + + uint8_t N_PRB_DMRS; + if (pusch_pdu->dmrs_config_type == 0) { + N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*6; + } + else { + N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*4; + } + + pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order, + pusch_pdu->target_code_rate, + pusch_pdu->rb_size, + pusch_pdu->nr_of_symbols, + N_PRB_DMRS * num_dmrs_symb, + 0, //nb_rb_oh + 0, + pusch_pdu->nrOfLayers)>>3; + + UE_info->mac_stats[UE_id].ulsch_rounds[cur_harq->round]++; + if (cur_harq->round == 0) UE_info->mac_stats[UE_id].ulsch_total_bytes_scheduled+=pusch_pdu->pusch_data.tb_size; + + pusch_pdu->pusch_data.num_cb = 0; //CBG not supported + //pusch_pdu->pusch_data.cb_present_and_position; + //pusch_pdu->pusch_uci; + //pusch_pdu->pusch_ptrs; + //pusch_pdu->dfts_ofdm; + //beamforming + //pusch_pdu->beamforming; //not used for now + + + ul_dci_request_pdu = &UL_dci_req->ul_dci_pdu_list[UL_dci_req->numPdus]; + memset((void*)ul_dci_request_pdu,0,sizeof(nfapi_nr_ul_dci_request_pdus_t)); + ul_dci_request_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE; + ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; + UL_dci_req->numPdus+=1; + + + LOG_D(MAC,"Configuring ULDCI/PDCCH in %d.%d\n", frame,slot); + + uint8_t nr_of_candidates, aggregation_level; + find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss); + NR_ControlResourceSet_t *coreset = get_coreset(bwp, ss, 1 /* dedicated */); + int cid = coreset->controlResourceSetId; + const uint16_t Y = UE_info->Y[UE_id][cid][slot]; + const int m = UE_info->num_pdcch_cand[UE_id][cid]; + int CCEIndex = allocate_nr_CCEs(nr_mac, + bwp, + coreset, + aggregation_level, + Y, + m, + nr_of_candidates); + if (CCEIndex < 0) { + LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__); + pusch_sched->active = false; + return; + } + else { + UE_info->num_pdcch_cand[UE_id][cid]++; + nr_configure_pdcch(nr_mac, + pdcch_pdu_rel15, + UE_info->rnti[UE_id], + ss, + coreset, + scc, + bwp, + aggregation_level, + CCEIndex); + + dci_pdu_rel15_t *dci_pdu_rel15 = calloc(MAX_DCI_CORESET,sizeof(dci_pdu_rel15_t)); + config_uldci(ubwp,pusch_pdu,pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types,tda,UE_info->UE_sched_ctrl[UE_id].tpc0,n_ubwp,bwp_id); + fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pusch_pdu->bwp_size,bwp_id); + free(dci_pdu_rel15); + } + } } diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 7bb08e4f04..ce57e45164 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -88,6 +88,14 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id, void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP, uint8_t slots_per_frame); +/// uplink scheduler +void nr_schedule_ulsch(module_id_t module_id, + frame_t frame, + sub_frame_t slot, + int num_slots_per_tdd, + int ul_slots, + uint64_t ulsch_in_slot_bitmap); + /////// Random Access MAC-PHY interface functions and primitives /////// void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP); From 53d8fbf4871104ad424581340fae6350d76fd69b Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 9 Nov 2020 11:35:34 +0100 Subject: [PATCH 04/56] Remove schedule_fapi_ul_pdu() --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 2 - .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 336 ------------------ openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 8 - 3 files changed, 346 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 4665f45258..743af1d029 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -432,8 +432,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, // The decision about whether to schedule is done for each UE independently // inside if (UE_info->active[UE_id] && slot < 10) { - //int tda = 1; // time domain assignment hardcoded for now - //schedule_fapi_ul_pdu(module_idP, frame, slot, num_slots_per_tdd, nr_ulmix_slots, tda, ulsch_in_slot_bitmap); nr_schedule_ulsch(module_idP, frame, slot, num_slots_per_tdd, nr_ulmix_slots, ulsch_in_slot_bitmap); nr_schedule_pusch(module_idP, UE_id, num_slots_per_tdd, nr_ulmix_slots, frame, slot); } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 1df61528ca..13505fd5f6 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -427,339 +427,3 @@ void config_uldci(NR_BWP_Uplink_t *ubwp, dci_pdu_rel15->rv); } - -void schedule_fapi_ul_pdu(int Mod_idP, - frame_t frameP, - sub_frame_t slotP, - int num_slots_per_tdd, - int ul_slots, - int time_domain_assignment, - uint64_t ulsch_in_slot_bitmap) { - - gNB_MAC_INST *nr_mac = RC.nrmac[Mod_idP]; - NR_COMMON_channels_t *cc = nr_mac->common_channels; - NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; - - int bwp_id=1; - int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; - int UE_id = 0; - NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info; - AssertFatal(UE_info->active[UE_id],"Cannot find UE_id %d is not active\n",UE_id); - - NR_CellGroupConfig_t *secondaryCellGroup = UE_info->secondaryCellGroup[UE_id]; - AssertFatal(secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count == 1, - "downlinkBWP_ToAddModList has %d BWP!\n", - secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count); - NR_BWP_Uplink_t *ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1]; - int n_ubwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count; - NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1]; - NR_PUSCH_Config_t *pusch_Config = ubwp->bwp_Dedicated->pusch_Config->choice.setup; - - AssertFatal(time_domain_assignmentbwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count, - "time_domain_assignment %d>=%d\n",time_domain_assignment,ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count); - - int K2 = get_K2(ubwp, time_domain_assignment,mu); - /* check if slot is UL, and for phy test verify that it is in first TDD - * period, slot 8 (for K2=2, this is at slot 6 in the gNB; because of UE - * limitations). Note that if K2 or the TDD configuration is changed, below - * conditions might exclude each other and never be true */ - const int slot_idx = (slotP + K2) % num_slots_per_tdd; - if (is_xlsch_in_slot(ulsch_in_slot_bitmap, slot_idx) - && (!get_softmodem_params()->phy_test || slot_idx == 8)) { - - nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[Mod_idP]->UL_dci_req[0]; - UL_dci_req->SFN = frameP; - UL_dci_req->Slot = slotP; - nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu; - - AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList!=NULL,"searchPsacesToAddModList is null\n"); - AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count>0, - "searchPsacesToAddModList is empty\n"); - - uint16_t rnti = UE_info->rnti[UE_id]; - - int first_ul_slot = num_slots_per_tdd - ul_slots; - NR_sched_pusch *pusch_sched = &UE_info->UE_sched_ctrl[UE_id].sched_pusch[slotP+K2-first_ul_slot]; - pusch_sched->frame = frameP; - pusch_sched->slot = slotP + K2; - pusch_sched->active = true; - nfapi_nr_pusch_pdu_t *pusch_pdu = &pusch_sched->pusch_pdu; - memset(pusch_pdu,0,sizeof(nfapi_nr_pusch_pdu_t)); - - LOG_D(MAC, "Scheduling UE specific PUSCH\n"); - //UL_tti_req = &nr_mac->UL_tti_req[CC_id]; - - int dci_formats[2]; - int rnti_types[2]; - - NR_SearchSpace_t *ss; - int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; - - AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList!=NULL,"searchPsacesToAddModList is null\n"); - AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count>0, - "searchPsacesToAddModList is empty\n"); - - int found=0; - - for (int i=0;ibwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count;i++) { - ss=bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.array[i]; - AssertFatal(ss->controlResourceSetId != NULL,"ss->controlResourceSetId is null\n"); - AssertFatal(ss->searchSpaceType != NULL,"ss->searchSpaceType is null\n"); - if (ss->searchSpaceType->present == target_ss) { - found=1; - break; - } - } - AssertFatal(found==1,"Couldn't find an adequate searchspace\n"); - - if (ss->searchSpaceType->choice.ue_Specific->dci_Formats) - dci_formats[0] = NR_UL_DCI_FORMAT_0_1; - else - dci_formats[0] = NR_UL_DCI_FORMAT_0_0; - - rnti_types[0] = NR_RNTI_C; - - //Resource Allocation in time domain - int startSymbolAndLength=0; - int StartSymbolIndex,NrOfSymbols,mapping_type; - - startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[time_domain_assignment]->startSymbolAndLength; - SLIV2SL(startSymbolAndLength,&StartSymbolIndex,&NrOfSymbols); - pusch_pdu->start_symbol_index = StartSymbolIndex; - pusch_pdu->nr_of_symbols = NrOfSymbols; - - mapping_type = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[time_domain_assignment]->mappingType; - - pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; - pusch_pdu->rnti = rnti; - pusch_pdu->handle = 0; //not yet used - - pusch_pdu->bwp_size = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); - pusch_pdu->bwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); - pusch_pdu->subcarrier_spacing = ubwp->bwp_Common->genericParameters.subcarrierSpacing; - pusch_pdu->cyclic_prefix = 0; - - if (pusch_Config->transformPrecoder == NULL) { - if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder == NULL) - pusch_pdu->transform_precoding = 1; - else - pusch_pdu->transform_precoding = 0; - } - else - pusch_pdu->transform_precoding = *pusch_Config->transformPrecoder; - if (pusch_Config->dataScramblingIdentityPUSCH != NULL) - pusch_pdu->data_scrambling_id = *pusch_Config->dataScramblingIdentityPUSCH; - else - pusch_pdu->data_scrambling_id = *scc->physCellId; - - pusch_pdu->mcs_index = 9; - if (pusch_pdu->transform_precoding) - pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, 0, - dci_formats[0], rnti_types[0], target_ss, false); - else - pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_TableTransformPrecoder, 1, - dci_formats[0], rnti_types[0], target_ss, false); - - pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); - pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); - if (pusch_Config->tp_pi2BPSK!=NULL) { - if(((pusch_pdu->mcs_table==3)&&(pusch_pdu->mcs_index<2)) || - ((pusch_pdu->mcs_table==4)&&(pusch_pdu->mcs_index<6))) { - pusch_pdu->target_code_rate = pusch_pdu->target_code_rate>>1; - pusch_pdu->qam_mod_order = pusch_pdu->qam_mod_order<<1; - } - } - pusch_pdu->nrOfLayers = 1; - - //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2] - if (pusch_Config->resourceAllocation==NR_PUSCH_Config__resourceAllocation_resourceAllocationType1) { - pusch_pdu->resource_alloc = 1; //type 1 - pusch_pdu->rb_start = 0; - if (get_softmodem_params()->phy_test==1) - pusch_pdu->rb_size = min(pusch_pdu->bwp_size,50); - else - pusch_pdu->rb_size = pusch_pdu->bwp_size; - } - else - AssertFatal(1==0,"Only frequency resource allocation type 1 is currently supported\n"); - - pusch_pdu->vrb_to_prb_mapping = 0; - - if (pusch_Config->frequencyHopping==NULL) - pusch_pdu->frequency_hopping = 0; - else - pusch_pdu->frequency_hopping = 1; - - //pusch_pdu->tx_direct_current_location;//The uplink Tx Direct Current location for the carrier. Only values in the value range of this field between 0 and 3299, which indicate the subcarrier index within the carrier corresponding 1o the numerology of the corresponding uplink BWP and value 3300, which indicates "Outside the carrier" and value 3301, which indicates "Undetermined position within the carrier" are used. [TS38.331, UplinkTxDirectCurrentBWP IE] - //pusch_pdu->uplink_frequency_shift_7p5khz = 0; - - - // -------------------- - // ------- DMRS ------- - // -------------------- - NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig; - if (mapping_type == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA) - NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup; - else - NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; - if (NR_DMRS_UplinkConfig->dmrs_Type == NULL) - pusch_pdu->dmrs_config_type = 0; - else - pusch_pdu->dmrs_config_type = 1; - pusch_pdu->scid = 0; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1] - if (pusch_pdu->transform_precoding) { // transform precoding disabled - long *scramblingid; - if (pusch_pdu->scid == 0) - scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID0; - else - scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID1; - if (scramblingid == NULL) - pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; - else - pusch_pdu->ul_dmrs_scrambling_id = *scramblingid; - } - else { - pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; - if (NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity != NULL) - pusch_pdu->pusch_identity = *NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity; - else - pusch_pdu->pusch_identity = *scc->physCellId; - } - pusch_dmrs_AdditionalPosition_t additional_pos; - if (NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NULL) - additional_pos = 2; - else { - if (*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos3) - additional_pos = 3; - else - additional_pos = *NR_DMRS_UplinkConfig->dmrs_AdditionalPosition; - } - pusch_maxLength_t pusch_maxLength; - if (NR_DMRS_UplinkConfig->maxLength == NULL) - pusch_maxLength = 1; - else - pusch_maxLength = 2; - uint16_t l_prime_mask = get_l_prime(pusch_pdu->nr_of_symbols, mapping_type, additional_pos, pusch_maxLength); - pusch_pdu->ul_dmrs_symb_pos = l_prime_mask << pusch_pdu->start_symbol_index; - - pusch_pdu->num_dmrs_cdm_grps_no_data = 1; - pusch_pdu->dmrs_ports = 1; - // -------------------------------------------------------------------------------------------------------------------------------------------- - - // -------------------- - // ------- PTRS ------- - // -------------------- - if (NR_DMRS_UplinkConfig->phaseTrackingRS != NULL) { - // TODO to be fixed from RRC config - uint8_t ptrs_mcs1 = 2; // higher layer parameter in PTRS-UplinkConfig - uint8_t ptrs_mcs2 = 4; // higher layer parameter in PTRS-UplinkConfig - uint8_t ptrs_mcs3 = 10; // higher layer parameter in PTRS-UplinkConfig - uint16_t n_rb0 = 25; // higher layer parameter in PTRS-UplinkConfig - uint16_t n_rb1 = 75; // higher layer parameter in PTRS-UplinkConfig - pusch_pdu->pusch_ptrs.ptrs_time_density = get_L_ptrs(ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, pusch_pdu->mcs_index, pusch_pdu->mcs_table); - pusch_pdu->pusch_ptrs.ptrs_freq_density = get_K_ptrs(n_rb0, n_rb1, pusch_pdu->rb_size); - pusch_pdu->pusch_ptrs.ptrs_ports_list = (nfapi_nr_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ptrs_ports_t)); - pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0; - - pusch_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS; // enable PUSCH PTRS - } - else{ - pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS - } - - // -------------------------------------------------------------------------------------------------------------------------------------------- - - //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2] - //Optional Data only included if indicated in pduBitmap - int8_t harq_id = select_ul_harq_pid(&UE_info->UE_sched_ctrl[UE_id]); - if (harq_id < 0) return; - NR_UE_ul_harq_t *cur_harq = &UE_info->UE_sched_ctrl[UE_id].ul_harq_processes[harq_id]; - pusch_pdu->pusch_data.harq_process_id = harq_id; - pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi; - pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; - - cur_harq->state = ACTIVE_SCHED; - cur_harq->last_tx_slot = pusch_sched->slot; - - uint8_t num_dmrs_symb = 0; - - for(int dmrs_counter = pusch_pdu->start_symbol_index; dmrs_counter < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; dmrs_counter++) - num_dmrs_symb += ((pusch_pdu->ul_dmrs_symb_pos >> dmrs_counter) & 1); - - uint8_t N_PRB_DMRS; - if (pusch_pdu->dmrs_config_type == 0) { - N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*6; - } - else { - N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*4; - } - - pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order, - pusch_pdu->target_code_rate, - pusch_pdu->rb_size, - pusch_pdu->nr_of_symbols, - N_PRB_DMRS * num_dmrs_symb, - 0, //nb_rb_oh - 0, - pusch_pdu->nrOfLayers)>>3; - - UE_info->mac_stats[UE_id].ulsch_rounds[cur_harq->round]++; - if (cur_harq->round == 0) UE_info->mac_stats[UE_id].ulsch_total_bytes_scheduled+=pusch_pdu->pusch_data.tb_size; - - pusch_pdu->pusch_data.num_cb = 0; //CBG not supported - //pusch_pdu->pusch_data.cb_present_and_position; - //pusch_pdu->pusch_uci; - //pusch_pdu->pusch_ptrs; - //pusch_pdu->dfts_ofdm; - //beamforming - //pusch_pdu->beamforming; //not used for now - - - ul_dci_request_pdu = &UL_dci_req->ul_dci_pdu_list[UL_dci_req->numPdus]; - memset((void*)ul_dci_request_pdu,0,sizeof(nfapi_nr_ul_dci_request_pdus_t)); - ul_dci_request_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE; - ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; - UL_dci_req->numPdus+=1; - - - LOG_D(MAC,"Configuring ULDCI/PDCCH in %d.%d\n", frameP,slotP); - - uint8_t nr_of_candidates, aggregation_level; - find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss); - NR_ControlResourceSet_t *coreset = get_coreset(bwp, ss, 1 /* dedicated */); - const int cid = coreset->controlResourceSetId; - const uint16_t Y = UE_info->Y[UE_id][cid][nr_mac->current_slot]; - const int m = UE_info->num_pdcch_cand[UE_id][cid]; - int CCEIndex = allocate_nr_CCEs(nr_mac, - bwp, - coreset, - aggregation_level, - Y, - m, - nr_of_candidates); - if (CCEIndex < 0) { - LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__); - pusch_sched->active = false; - return; - } - else { - UE_info->num_pdcch_cand[UE_id][cid]++; - nr_configure_pdcch(nr_mac, - pdcch_pdu_rel15, - UE_info->rnti[UE_id], - ss, - coreset, - scc, - bwp, - aggregation_level, - CCEIndex); - - dci_pdu_rel15_t *dci_pdu_rel15 = calloc(MAX_DCI_CORESET,sizeof(dci_pdu_rel15_t)); - config_uldci(ubwp,pusch_pdu,pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types,time_domain_assignment,UE_info->UE_sched_ctrl[UE_id].tpc0,n_ubwp,bwp_id); - fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pusch_pdu->bwp_size,bwp_id); - free(dci_pdu_rel15); - } - } -} - diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index ce57e45164..7810967e67 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -363,14 +363,6 @@ void nr_generate_Msg2(module_id_t module_idP, void nr_schedule_reception_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP); -void schedule_fapi_ul_pdu(int Mod_idP, - frame_t frameP, - sub_frame_t slotP, - int num_slots_per_tdd, - int ul_slots, - int time_domain_assignment, - uint64_t ulsch_in_slot_bitmap); - void nr_process_mac_pdu( module_id_t module_idP, rnti_t rnti, From 5244da263ed9092a5d268f3d77f32637c00a30a3 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 15 Oct 2020 11:17:08 +0200 Subject: [PATCH 05/56] Clean up select_ul_harq_pid() and nr_schedule_ulsch() --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 168 ++++++++---------- 1 file changed, 74 insertions(+), 94 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 1f0018e31a..aa58605e74 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -434,32 +434,25 @@ long get_K2(NR_BWP_Uplink_t *ubwp, int time_domain_assignment, int mu) { } int8_t select_ul_harq_pid(NR_UE_sched_ctrl_t *sched_ctrl) { - - uint8_t hrq_id; - uint8_t max_ul_harq_pids = 3; // temp: for testing + const uint8_t max_ul_harq_pids = 3; // temp: for testing // schedule active harq processes - NR_UE_ul_harq_t cur_harq; - for (hrq_id=0; hrq_id < max_ul_harq_pids; hrq_id++) { - cur_harq = sched_ctrl->ul_harq_processes[hrq_id]; - if (cur_harq.state==ACTIVE_NOT_SCHED) { -#ifdef UL_HARQ_PRINT - printf("[SCHED] Found ulharq id %d, scheduling it for retransmission\n",hrq_id); -#endif + for (uint8_t hrq_id = 0; hrq_id < max_ul_harq_pids; hrq_id++) { + NR_UE_ul_harq_t *cur_harq = &sched_ctrl->ul_harq_processes[hrq_id]; + if (cur_harq->state == ACTIVE_NOT_SCHED) { + LOG_D(MAC, "Found ulharq id %d, scheduling it for retransmission\n", hrq_id); return hrq_id; } } // schedule new harq processes - for (hrq_id=0; hrq_id < max_ul_harq_pids; hrq_id++) { - cur_harq = sched_ctrl->ul_harq_processes[hrq_id]; - if (cur_harq.state==INACTIVE) { -#ifdef UL_HARQ_PRINT - printf("[SCHED] Found new ulharq id %d, scheduling it\n",hrq_id); -#endif + for (uint8_t hrq_id=0; hrq_id < max_ul_harq_pids; hrq_id++) { + NR_UE_ul_harq_t *cur_harq = &sched_ctrl->ul_harq_processes[hrq_id]; + if (cur_harq->state == INACTIVE) { + LOG_D(MAC, "Found new ulharq id %d, scheduling it\n", hrq_id); return hrq_id; } } - LOG_E(MAC,"All UL HARQ processes are busy. Cannot schedule ULSCH\n"); + LOG_E(MAC, "All UL HARQ processes are busy. Cannot schedule ULSCH\n"); return -1; } @@ -483,16 +476,23 @@ void nr_schedule_ulsch(module_id_t module_id, AssertFatal(secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count == 1, "downlinkBWP_ToAddModList has %d BWP!\n", secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count); + NR_BWP_Downlink_t *bwp = + secondaryCellGroup->spCellConfig->spCellConfigDedicated + ->downlinkBWP_ToAddModList->list.array[bwp_id - 1]; + NR_BWP_Uplink_t *ubwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig ->uplinkBWP_ToAddModList->list.array[bwp_id - 1]; const int n_ubwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count; - NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1]; NR_PUSCH_Config_t *pusch_Config = ubwp->bwp_Dedicated->pusch_Config->choice.setup; const int tda = 1; // hardcoded for the moment - AssertFatal(tdabwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count, - "time domain assignment %d >= %d\n",tda,ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count); + const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = + ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; + AssertFatal(tda < tdaList->list.count, + "time domain assignment %d >= %d\n", + tda, + tdaList->list.count); int K2 = get_K2(ubwp, tda, mu); /* check if slot is UL, and for phy test verify that it is in first TDD @@ -507,10 +507,6 @@ void nr_schedule_ulsch(module_id_t module_id, UL_dci_req->Slot = slot; nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu; - AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList!=NULL,"searchPsacesToAddModList is null\n"); - AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count>0, - "searchPsacesToAddModList is empty\n"); - uint16_t rnti = UE_info->rnti[UE_id]; int first_ul_slot = num_slots_per_tdd - ul_slots; @@ -518,52 +514,32 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_sched->frame = frame; pusch_sched->slot = slot + K2; pusch_sched->active = true; - nfapi_nr_pusch_pdu_t *pusch_pdu = &pusch_sched->pusch_pdu; - memset(pusch_pdu,0,sizeof(nfapi_nr_pusch_pdu_t)); LOG_D(MAC, "Scheduling UE specific PUSCH\n"); //UL_tti_req = &nr_mac->UL_tti_req[CC_id]; + + const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; + NR_SearchSpace_t *ss = get_searchspace(bwp, target_ss); + int dci_formats[2]; - int rnti_types[2]; - - NR_SearchSpace_t *ss; - int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; - - AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList!=NULL,"searchPsacesToAddModList is null\n"); - AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count>0, - "searchPsacesToAddModList is empty\n"); - - int found=0; - - for (int i=0;ibwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count;i++) { - ss=bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.array[i]; - AssertFatal(ss->controlResourceSetId != NULL,"ss->controlResourceSetId is null\n"); - AssertFatal(ss->searchSpaceType != NULL,"ss->searchSpaceType is null\n"); - if (ss->searchSpaceType->present == target_ss) { - found=1; - break; - } - } - AssertFatal(found==1,"Couldn't find an adequate searchspace\n"); - if (ss->searchSpaceType->choice.ue_Specific->dci_Formats) dci_formats[0] = NR_UL_DCI_FORMAT_0_1; else dci_formats[0] = NR_UL_DCI_FORMAT_0_0; - rnti_types[0] = NR_RNTI_C; + int rnti_types[2] = { NR_RNTI_C, 0 }; + nfapi_nr_pusch_pdu_t *pusch_pdu = &pusch_sched->pusch_pdu; + memset(pusch_pdu,0,sizeof(nfapi_nr_pusch_pdu_t)); //Resource Allocation in time domain - int startSymbolAndLength=0; - int StartSymbolIndex,NrOfSymbols,mapping_type; - - startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[tda]->startSymbolAndLength; + const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; + int StartSymbolIndex, NrOfSymbols; SLIV2SL(startSymbolAndLength,&StartSymbolIndex,&NrOfSymbols); pusch_pdu->start_symbol_index = StartSymbolIndex; pusch_pdu->nr_of_symbols = NrOfSymbols; - mapping_type = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[tda]->mappingType; + const int mapping_type = tdaList->list.array[tda]->mappingType; pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; pusch_pdu->rnti = rnti; @@ -574,32 +550,38 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->subcarrier_spacing = ubwp->bwp_Common->genericParameters.subcarrierSpacing; pusch_pdu->cyclic_prefix = 0; - if (pusch_Config->transformPrecoder == NULL) { - if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder == NULL) - pusch_pdu->transform_precoding = 1; - else - pusch_pdu->transform_precoding = 0; - } + if (!pusch_Config->transformPrecoder) + pusch_pdu->transform_precoding = !scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder; else pusch_pdu->transform_precoding = *pusch_Config->transformPrecoder; - if (pusch_Config->dataScramblingIdentityPUSCH != NULL) + + if (pusch_Config->dataScramblingIdentityPUSCH) pusch_pdu->data_scrambling_id = *pusch_Config->dataScramblingIdentityPUSCH; else pusch_pdu->data_scrambling_id = *scc->physCellId; pusch_pdu->mcs_index = 9; if (pusch_pdu->transform_precoding) - pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, 0, - dci_formats[0], rnti_types[0], target_ss, false); + pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, + 0, + dci_formats[0], + rnti_types[0], + target_ss, + false); else - pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_TableTransformPrecoder, 1, - dci_formats[0], rnti_types[0], target_ss, false); + pusch_pdu->mcs_table = + get_pusch_mcs_table(pusch_Config->mcs_TableTransformPrecoder, + 1, + dci_formats[0], + rnti_types[0], + target_ss, + false); pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); - if (pusch_Config->tp_pi2BPSK!=NULL) { - if(((pusch_pdu->mcs_table==3)&&(pusch_pdu->mcs_index<2)) || - ((pusch_pdu->mcs_table==4)&&(pusch_pdu->mcs_index<6))) { + if (pusch_Config->tp_pi2BPSK) { + if (((pusch_pdu->mcs_table == 3) && (pusch_pdu->mcs_index < 2)) + || ((pusch_pdu->mcs_table == 4) && (pusch_pdu->mcs_index < 6))) { pusch_pdu->target_code_rate = pusch_pdu->target_code_rate>>1; pusch_pdu->qam_mod_order = pusch_pdu->qam_mod_order<<1; } @@ -607,16 +589,14 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->nrOfLayers = 1; //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2] - if (pusch_Config->resourceAllocation==NR_PUSCH_Config__resourceAllocation_resourceAllocationType1) { - pusch_pdu->resource_alloc = 1; //type 1 - pusch_pdu->rb_start = 0; - if (get_softmodem_params()->phy_test==1) - pusch_pdu->rb_size = 50; - else - pusch_pdu->rb_size = pusch_pdu->bwp_size; - } + AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, + "Only frequency resource allocation type 1 is currently supported\n"); + pusch_pdu->resource_alloc = 1; //type 1 + pusch_pdu->rb_start = 0; + if (get_softmodem_params()->phy_test) + pusch_pdu->rb_size = 50; else - AssertFatal(1==0,"Only frequency resource allocation type 1 is currently supported\n"); + pusch_pdu->rb_size = pusch_pdu->bwp_size; pusch_pdu->vrb_to_prb_mapping = 0; @@ -739,7 +719,8 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->nrOfLayers)>>3; UE_info->mac_stats[UE_id].ulsch_rounds[cur_harq->round]++; - if (cur_harq->round == 0) UE_info->mac_stats[UE_id].ulsch_total_bytes_scheduled+=pusch_pdu->pusch_data.tb_size; + if (cur_harq->round == 0) + UE_info->mac_stats[UE_id].ulsch_total_bytes_scheduled += pusch_pdu->pusch_data.tb_size; pusch_pdu->pusch_data.num_cb = 0; //CBG not supported //pusch_pdu->pusch_data.cb_present_and_position; @@ -778,22 +759,21 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_sched->active = false; return; } - else { - UE_info->num_pdcch_cand[UE_id][cid]++; - nr_configure_pdcch(nr_mac, - pdcch_pdu_rel15, - UE_info->rnti[UE_id], - ss, - coreset, - scc, - bwp, - aggregation_level, - CCEIndex); + UE_info->num_pdcch_cand[UE_id][cid]++; - dci_pdu_rel15_t *dci_pdu_rel15 = calloc(MAX_DCI_CORESET,sizeof(dci_pdu_rel15_t)); - config_uldci(ubwp,pusch_pdu,pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types,tda,UE_info->UE_sched_ctrl[UE_id].tpc0,n_ubwp,bwp_id); - fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pusch_pdu->bwp_size,bwp_id); - free(dci_pdu_rel15); - } + nr_configure_pdcch(nr_mac, + pdcch_pdu_rel15, + UE_info->rnti[UE_id], + ss, + coreset, + scc, + bwp, + aggregation_level, + CCEIndex); + + dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET]; + memset(dci_pdu_rel15, 0, sizeof(dci_pdu_rel15)); + config_uldci(ubwp,pusch_pdu,pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types,tda,UE_info->UE_sched_ctrl[UE_id].tpc0,n_ubwp,bwp_id); + fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pusch_pdu->bwp_size,bwp_id); } } From c0e5a180bcd87f3ac77e7cf3f5c9ea2ab1910cdd Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 15 Oct 2020 11:47:00 +0200 Subject: [PATCH 06/56] Separate CCE allocation, MCS, RB Alloc in UL sched --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 61 +++++++++---------- 1 file changed, 30 insertions(+), 31 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index aa58605e74..88a481ccb4 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -502,6 +502,33 @@ void nr_schedule_ulsch(module_id_t module_id, const int slot_idx = (slot + K2) % num_slots_per_tdd; if (is_xlsch_in_slot(ulsch_in_slot_bitmap, slot_idx) && (!get_softmodem_params()->phy_test || slot_idx == 8)) { + + const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; + NR_SearchSpace_t *ss = get_searchspace(bwp, target_ss); + uint8_t nr_of_candidates, aggregation_level; + find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss); + NR_ControlResourceSet_t *coreset = get_coreset(bwp, ss, 1 /* dedicated */); + const int cid = coreset->controlResourceSetId; + const uint16_t Y = UE_info->Y[UE_id][cid][nr_mac->current_slot]; + const int m = UE_info->num_pdcch_cand[UE_id][cid]; + int CCEIndex = allocate_nr_CCEs(nr_mac, + bwp, + coreset, + aggregation_level, + Y, + m, + nr_of_candidates); + if (CCEIndex < 0) { + LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__); + return; + } + UE_info->num_pdcch_cand[UE_id][cid]++; + + const uint8_t mcs = 9; + const uint16_t rbStart = 0; + const uint16_t rbSize = get_softmodem_params()->phy_test ? + 50 : NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); + nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[module_id]->UL_dci_req[0]; UL_dci_req->SFN = frame; UL_dci_req->Slot = slot; @@ -519,9 +546,6 @@ void nr_schedule_ulsch(module_id_t module_id, //UL_tti_req = &nr_mac->UL_tti_req[CC_id]; - const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; - NR_SearchSpace_t *ss = get_searchspace(bwp, target_ss); - int dci_formats[2]; if (ss->searchSpaceType->choice.ue_Specific->dci_Formats) dci_formats[0] = NR_UL_DCI_FORMAT_0_1; @@ -560,7 +584,7 @@ void nr_schedule_ulsch(module_id_t module_id, else pusch_pdu->data_scrambling_id = *scc->physCellId; - pusch_pdu->mcs_index = 9; + pusch_pdu->mcs_index = mcs; if (pusch_pdu->transform_precoding) pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, 0, @@ -592,12 +616,8 @@ void nr_schedule_ulsch(module_id_t module_id, AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, "Only frequency resource allocation type 1 is currently supported\n"); pusch_pdu->resource_alloc = 1; //type 1 - pusch_pdu->rb_start = 0; - if (get_softmodem_params()->phy_test) - pusch_pdu->rb_size = 50; - else - pusch_pdu->rb_size = pusch_pdu->bwp_size; - + pusch_pdu->rb_start = rbStart; + pusch_pdu->rb_size = rbSize; pusch_pdu->vrb_to_prb_mapping = 0; if (pusch_Config->frequencyHopping==NULL) @@ -738,29 +758,8 @@ void nr_schedule_ulsch(module_id_t module_id, nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; UL_dci_req->numPdus+=1; - LOG_D(MAC,"Configuring ULDCI/PDCCH in %d.%d\n", frame,slot); - uint8_t nr_of_candidates, aggregation_level; - find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss); - NR_ControlResourceSet_t *coreset = get_coreset(bwp, ss, 1 /* dedicated */); - int cid = coreset->controlResourceSetId; - const uint16_t Y = UE_info->Y[UE_id][cid][slot]; - const int m = UE_info->num_pdcch_cand[UE_id][cid]; - int CCEIndex = allocate_nr_CCEs(nr_mac, - bwp, - coreset, - aggregation_level, - Y, - m, - nr_of_candidates); - if (CCEIndex < 0) { - LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__); - pusch_sched->active = false; - return; - } - UE_info->num_pdcch_cand[UE_id][cid]++; - nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, UE_info->rnti[UE_id], From 1cd46f4dfcb22629bc89db7d7ccec87ea70cdc7e Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 23 Nov 2020 16:12:04 +0100 Subject: [PATCH 07/56] Clean up nr_schedule_ulsch() --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 27 +++++-------------- 1 file changed, 6 insertions(+), 21 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 88a481ccb4..edc5f5c6b4 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -563,8 +563,6 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->start_symbol_index = StartSymbolIndex; pusch_pdu->nr_of_symbols = NrOfSymbols; - const int mapping_type = tdaList->list.array[tda]->mappingType; - pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; pusch_pdu->rnti = rnti; pusch_pdu->handle = 0; //not yet used @@ -625,13 +623,11 @@ void nr_schedule_ulsch(module_id_t module_id, else pusch_pdu->frequency_hopping = 1; - //pusch_pdu->tx_direct_current_location;//The uplink Tx Direct Current location for the carrier. Only values in the value range of this field between 0 and 3299, which indicate the subcarrier index within the carrier corresponding 1o the numerology of the corresponding uplink BWP and value 3300, which indicates "Outside the carrier" and value 3301, which indicates "Undetermined position within the carrier" are used. [TS38.331, UplinkTxDirectCurrentBWP IE] - //pusch_pdu->uplink_frequency_shift_7p5khz = 0; - // -------------------- // ------- DMRS ------- // -------------------- + const int mapping_type = tdaList->list.array[tda]->mappingType; NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig; if (mapping_type == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA) NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup; @@ -679,7 +675,6 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->num_dmrs_cdm_grps_no_data = 1; pusch_pdu->dmrs_ports = 1; - // -------------------------------------------------------------------------------------------------------------------------------------------- // -------------------- // ------- PTRS ------- @@ -717,17 +712,14 @@ void nr_schedule_ulsch(module_id_t module_id, cur_harq->last_tx_slot = pusch_sched->slot; uint8_t num_dmrs_symb = 0; - - for(int dmrs_counter = pusch_pdu->start_symbol_index; dmrs_counter < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; dmrs_counter++) - num_dmrs_symb += ((pusch_pdu->ul_dmrs_symb_pos >> dmrs_counter) & 1); + for(int i = pusch_pdu->start_symbol_index; i < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; i++) + num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1; uint8_t N_PRB_DMRS; - if (pusch_pdu->dmrs_config_type == 0) { + if (pusch_pdu->dmrs_config_type == 0) N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*6; - } - else { + else N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*4; - } pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order, pusch_pdu->target_code_rate, @@ -743,13 +735,6 @@ void nr_schedule_ulsch(module_id_t module_id, UE_info->mac_stats[UE_id].ulsch_total_bytes_scheduled += pusch_pdu->pusch_data.tb_size; pusch_pdu->pusch_data.num_cb = 0; //CBG not supported - //pusch_pdu->pusch_data.cb_present_and_position; - //pusch_pdu->pusch_uci; - //pusch_pdu->pusch_ptrs; - //pusch_pdu->dfts_ofdm; - //beamforming - //pusch_pdu->beamforming; //not used for now - ul_dci_request_pdu = &UL_dci_req->ul_dci_pdu_list[UL_dci_req->numPdus]; memset((void*)ul_dci_request_pdu,0,sizeof(nfapi_nr_ul_dci_request_pdus_t)); @@ -762,7 +747,7 @@ void nr_schedule_ulsch(module_id_t module_id, nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, - UE_info->rnti[UE_id], + rnti, ss, coreset, scc, From ee9268feee8150d301b3936842f66f18854170c6 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Sat, 7 Nov 2020 14:44:52 +0100 Subject: [PATCH 08/56] Remove second clear_nr_nfapi_information call --- openair2/NR_PHY_INTERFACE/NR_IF_Module.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c index 4e1a8ae131..788db592bc 100644 --- a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c @@ -216,8 +216,6 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) { ifi->CC_mask |= (1<frame,UL_info->slot); handle_nr_rach(UL_info); handle_nr_uci(UL_info,&mac->UE_info.UE_sched_ctrl[0],&mac->UE_info.mac_stats[0],mac->pucch_target_snrx10); From f45e8bbe0ea03940e6892f0ce8a0ecee3cf9bc47 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 23 Nov 2020 16:16:31 +0100 Subject: [PATCH 09/56] UL_tti_req_ahead: Create PUSCH PDU directly within nr_fill_nfapi_ul_pdu() Use a "future" UL_tti_req structure to save in between scheduling and reception slots. Should also work for FDD. --- openair2/LAYER2/NR_MAC_gNB/config.c | 7 +++ openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 48 +++++++++++-------- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 32 +++++++------ openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 7 +-- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 3 ++ 5 files changed, 57 insertions(+), 40 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index ab49fcdc8c..35648f0cfe 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -322,6 +322,13 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, if (scc != NULL ) { AssertFatal((scc->ssb_PositionsInBurst->present > 0) && (scc->ssb_PositionsInBurst->present < 4), "SSB Bitmap type %d is not valid\n",scc->ssb_PositionsInBurst->present); + /* dimension UL_tti_req_ahead for number of slots in frame */ + const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160}; + const int n = slots_per_frame[*scc->ssbSubcarrierSpacing]; + RC.nrmac[Mod_idP]->UL_tti_req_ahead[0] = calloc(n, sizeof(nfapi_nr_ul_tti_request_t)); + AssertFatal(RC.nrmac[Mod_idP]->UL_tti_req_ahead[0], + "could not allocate memory for RC.nrmac[]->UL_tti_req_ahead[]\n"); + LOG_I(MAC,"Configuring common parameters from NR ServingCellConfig\n"); config_common(Mod_idP, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 743af1d029..b9f3630c6d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -285,26 +285,34 @@ void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subfram */ -void nr_schedule_pusch(int Mod_idP, - int UE_id, - int num_slots_per_tdd, - int ul_slots, - frame_t frameP, - sub_frame_t slotP) { +void nr_schedule_pusch(int mod_id, frame_t frame, sub_frame_t slot) { + nfapi_nr_ul_tti_request_t *ul_tti_req = &RC.nrmac[mod_id]->UL_tti_req[0]; + nfapi_nr_ul_tti_request_t *future_ul_tti_req = + &RC.nrmac[mod_id]->UL_tti_req_ahead[0][slot]; - nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0]; - NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info; - int k = slotP + ul_slots - num_slots_per_tdd; - NR_sched_pusch *pusch = &UE_info->UE_sched_ctrl[UE_id].sched_pusch[k]; - if ((pusch->active == true) && (frameP == pusch->frame) && (slotP == pusch->slot)) { - UL_tti_req->SFN = pusch->frame; - UL_tti_req->Slot = pusch->slot; - UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; - UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); - UL_tti_req->pdus_list[UL_tti_req->n_pdus].pusch_pdu = pusch->pusch_pdu; - UL_tti_req->n_pdus+=1; - memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pusch[k], - 0, sizeof(NR_sched_pusch)); + if (future_ul_tti_req->Slot == slot + && future_ul_tti_req->SFN == frame + && future_ul_tti_req->n_pdus > 0) { + LOG_D(MAC, "%4d.%2d copy %d PDUs from future_ul_tti_req\n", frame, slot, future_ul_tti_req->n_pdus); + /* the future_UL_tti_req_has data for the current frame/slot pair, copy + * everything into the "real" UL_tti_req */ + ul_tti_req->SFN = future_ul_tti_req->SFN; + ul_tti_req->Slot = future_ul_tti_req->Slot; + ul_tti_req->n_pdus = future_ul_tti_req->n_pdus; + ul_tti_req->rach_present = future_ul_tti_req->rach_present; + ul_tti_req->n_ulsch = future_ul_tti_req->n_ulsch; + ul_tti_req->n_ulcch = future_ul_tti_req->n_ulcch; + ul_tti_req->n_group = future_ul_tti_req->n_group; + memcpy(ul_tti_req->pdus_list, + future_ul_tti_req->pdus_list, + ul_tti_req->n_pdus * sizeof(nfapi_nr_ul_tti_request_number_of_pdus_t)); + memcpy(ul_tti_req->groups_list, + future_ul_tti_req->groups_list, + ul_tti_req->n_group * sizeof(nfapi_nr_ul_tti_request_number_of_groups_t)); + future_ul_tti_req->n_pdus = 0; + future_ul_tti_req->n_ulsch = 0; + future_ul_tti_req->n_ulcch = 0; + future_ul_tti_req->n_group = 0; } } @@ -433,9 +441,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, // inside if (UE_info->active[UE_id] && slot < 10) { nr_schedule_ulsch(module_idP, frame, slot, num_slots_per_tdd, nr_ulmix_slots, ulsch_in_slot_bitmap); - nr_schedule_pusch(module_idP, UE_id, num_slots_per_tdd, nr_ulmix_slots, frame, slot); } + nr_schedule_pusch(module_idP, frame, slot); if (UE_info->active[UE_id] && (is_xlsch_in_slot(dlsch_in_slot_bitmap, slot % num_slots_per_tdd)) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index edc5f5c6b4..0540eba78e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -499,9 +499,10 @@ void nr_schedule_ulsch(module_id_t module_id, * period, slot 8 (for K2=2, this is at slot 6 in the gNB; because of UE * limitations). Note that if K2 or the TDD configuration is changed, below * conditions might exclude each other and never be true */ - const int slot_idx = (slot + K2) % num_slots_per_tdd; - if (is_xlsch_in_slot(ulsch_in_slot_bitmap, slot_idx) - && (!get_softmodem_params()->phy_test || slot_idx == 8)) { + const int sched_frame = frame + (slot + K2 >= num_slots_per_tdd); + const int sched_slot = (slot + K2) % num_slots_per_tdd; + if (is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot) + && (!get_softmodem_params()->phy_test || sched_slot == 8)) { const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; NR_SearchSpace_t *ss = get_searchspace(bwp, target_ss); @@ -536,15 +537,20 @@ void nr_schedule_ulsch(module_id_t module_id, uint16_t rnti = UE_info->rnti[UE_id]; - int first_ul_slot = num_slots_per_tdd - ul_slots; - NR_sched_pusch *pusch_sched = &UE_info->UE_sched_ctrl[UE_id].sched_pusch[slot+K2-first_ul_slot]; - pusch_sched->frame = frame; - pusch_sched->slot = slot + K2; - pusch_sched->active = true; - - LOG_D(MAC, "Scheduling UE specific PUSCH\n"); - //UL_tti_req = &nr_mac->UL_tti_req[CC_id]; + /* PUSCH in a later slot, but corresponding DCI now! */ + nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_slot]; + future_ul_tti_req->SFN = sched_frame; + future_ul_tti_req->Slot = sched_slot; + nfapi_nr_ul_dci_request_t *ul_dci_req = &RC.nrmac[module_id]->UL_dci_req[0]; + ul_dci_req->SFN = frame; + ul_dci_req->Slot = slot; + future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; + future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); + nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu; + memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t)); + future_ul_tti_req->n_pdus += 1; + LOG_D(MAC, "%4d.%2d Scheduling UE specific PUSCH\n", frame, slot); int dci_formats[2]; if (ss->searchSpaceType->choice.ue_Specific->dci_Formats) @@ -554,8 +560,6 @@ void nr_schedule_ulsch(module_id_t module_id, int rnti_types[2] = { NR_RNTI_C, 0 }; - nfapi_nr_pusch_pdu_t *pusch_pdu = &pusch_sched->pusch_pdu; - memset(pusch_pdu,0,sizeof(nfapi_nr_pusch_pdu_t)); //Resource Allocation in time domain const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; int StartSymbolIndex, NrOfSymbols; @@ -709,7 +713,7 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; cur_harq->state = ACTIVE_SCHED; - cur_harq->last_tx_slot = pusch_sched->slot; + cur_harq->last_tx_slot = sched_slot; uint8_t num_dmrs_symb = 0; for(int i = pusch_pdu->start_symbol_index; i < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; i++) diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 7810967e67..a598c381ca 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -178,12 +178,7 @@ void config_uldci(NR_BWP_Uplink_t *ubwp, int time_domain_assignment, uint8_t tpc, int n_ubwp, int bwp_id); -void nr_schedule_pusch(int Mod_idP, - int UE_id, - int num_slots_per_tdd, - int ul_slots, - frame_t frameP, - sub_frame_t slotP); +void nr_schedule_pusch(int Mod_idP, frame_t frameP, sub_frame_t slotP); void nr_schedule_pucch(int Mod_idP, int UE_id, diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 656d1c3e7c..ce9649c41d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -469,6 +469,9 @@ typedef struct gNB_MAC_INST_s { nfapi_nr_dl_tti_request_t DL_req[NFAPI_CC_MAX]; /// NFAPI UL TTI Request Structure (this is from the new SCF specs) nfapi_nr_ul_tti_request_t UL_tti_req[NFAPI_CC_MAX]; + /// NFAPI UL TTI Request Structure for future TTIs, dynamically allocated + /// because length depends on number of slots + nfapi_nr_ul_tti_request_t *UL_tti_req_ahead[NFAPI_CC_MAX]; /// NFAPI HI/DCI0 Config Request Structure nfapi_nr_ul_dci_request_t UL_dci_req[NFAPI_CC_MAX]; /// NFAPI DL PDU structure From f3b00ff14494e8eaee685a44c221468a9333d666 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Sat, 7 Nov 2020 13:45:00 +0100 Subject: [PATCH 10/56] UL_tti_req_ahead: pre-set slot and frame --- openair2/LAYER2/NR_MAC_gNB/config.c | 13 +++++++++++++ openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 12 ++++++++++++ openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 10 ++++++++-- 3 files changed, 33 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index 35648f0cfe..c471eb94f2 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -309,6 +309,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm +extern uint16_t sl_ahead; int rrc_mac_config_req_gNB(module_id_t Mod_idP, int ssb_SubcarrierOffset, int pdsch_AntennaPorts, @@ -328,6 +329,18 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, RC.nrmac[Mod_idP]->UL_tti_req_ahead[0] = calloc(n, sizeof(nfapi_nr_ul_tti_request_t)); AssertFatal(RC.nrmac[Mod_idP]->UL_tti_req_ahead[0], "could not allocate memory for RC.nrmac[]->UL_tti_req_ahead[]\n"); + /* fill in slot/frame numbers: slot is fixed, frame will be updated by + * scheduler */ + for (int i = 0; i < n; ++i) { + nfapi_nr_ul_tti_request_t *req = &RC.nrmac[Mod_idP]->UL_tti_req_ahead[0][i]; + /* consider that scheduler runs sl_ahead: the first sl_ahead slots are + * already "in the past" and thus we put frame 1 instead of 0! Note that + * variable sl_ahead seems to not be correctly initialized, but I leave + * it for information purposes here (the fix would always put 0, what + * happens now, too) */ + req->SFN = i < sl_ahead; + req->Slot = i; + } LOG_I(MAC,"Configuring common parameters from NR ServingCellConfig\n"); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index b9f3630c6d..7b92545c83 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -92,9 +92,13 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, int CC_idP, frame_t frameP, sub_frame_t slotP){ + NR_ServingCellConfigCommon_t *scc = gNB->common_channels->ServingCellConfigCommon; + const int num_slots = slots_per_frame[*scc->ssbSubcarrierSpacing]; nfapi_nr_dl_tti_request_t *DL_req = &gNB->DL_req[0]; nfapi_nr_ul_tti_request_t *UL_tti_req = &gNB->UL_tti_req[0]; + nfapi_nr_ul_tti_request_t *future_ul_tti_req = + &gNB->UL_tti_req_ahead[CC_idP][(slotP + num_slots - 1) % num_slots]; nfapi_nr_ul_dci_request_t *UL_dci_req = &gNB->UL_dci_req[0]; nfapi_nr_tx_data_request_t *TX_req = &gNB->TX_req[0]; @@ -119,6 +123,14 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, UL_tti_req[CC_idP].n_ulcch = 0; UL_tti_req[CC_idP].n_group = 0; + /* advance last round's future UL_tti_req to be ahead of current frame/slot */ + future_ul_tti_req->SFN = (slotP == 0 ? frameP : frameP + 1) % 1024; + /* future_ul_tti_req->Slot is fixed! */ + future_ul_tti_req->n_pdus = 0; + future_ul_tti_req->n_ulsch = 0; + future_ul_tti_req->n_ulcch = 0; + future_ul_tti_req->n_group = 0; + TX_req[CC_idP].Number_of_PDUs = 0; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 0540eba78e..76145e545d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -539,8 +539,14 @@ void nr_schedule_ulsch(module_id_t module_id, /* PUSCH in a later slot, but corresponding DCI now! */ nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_slot]; - future_ul_tti_req->SFN = sched_frame; - future_ul_tti_req->Slot = sched_slot; + AssertFatal(future_ul_tti_req->SFN == sched_frame + && future_ul_tti_req->Slot == sched_slot, + "%d.%d future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n", + frame, slot, + future_ul_tti_req->SFN, + future_ul_tti_req->Slot, + sched_frame, + sched_slot); nfapi_nr_ul_dci_request_t *ul_dci_req = &RC.nrmac[module_id]->UL_dci_req[0]; ul_dci_req->SFN = frame; ul_dci_req->Slot = slot; From 3eceba506215a39edb9c76f28f8e61887d3ebb3a Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 18 Nov 2020 22:09:04 +0100 Subject: [PATCH 11/56] Use UE's active DL BWP in UL sched --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 76145e545d..cf1bf30c73 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -473,12 +473,7 @@ void nr_schedule_ulsch(module_id_t module_id, AssertFatal(UE_info->active[UE_id],"Cannot find UE_id %d is not active\n",UE_id); NR_CellGroupConfig_t *secondaryCellGroup = UE_info->secondaryCellGroup[UE_id]; - AssertFatal(secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count == 1, - "downlinkBWP_ToAddModList has %d BWP!\n", - secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count); - NR_BWP_Downlink_t *bwp = - secondaryCellGroup->spCellConfig->spCellConfigDedicated - ->downlinkBWP_ToAddModList->list.array[bwp_id - 1]; + NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; NR_BWP_Uplink_t *ubwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig @@ -505,15 +500,15 @@ void nr_schedule_ulsch(module_id_t module_id, && (!get_softmodem_params()->phy_test || sched_slot == 8)) { const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; - NR_SearchSpace_t *ss = get_searchspace(bwp, target_ss); + NR_SearchSpace_t *ss = get_searchspace(sched_ctrl->active_bwp, target_ss); uint8_t nr_of_candidates, aggregation_level; find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss); - NR_ControlResourceSet_t *coreset = get_coreset(bwp, ss, 1 /* dedicated */); + NR_ControlResourceSet_t *coreset = get_coreset(sched_ctrl->active_bwp, ss, 1 /* dedicated */); const int cid = coreset->controlResourceSetId; const uint16_t Y = UE_info->Y[UE_id][cid][nr_mac->current_slot]; const int m = UE_info->num_pdcch_cand[UE_id][cid]; int CCEIndex = allocate_nr_CCEs(nr_mac, - bwp, + sched_ctrl->active_bwp, coreset, aggregation_level, Y, @@ -761,7 +756,7 @@ void nr_schedule_ulsch(module_id_t module_id, ss, coreset, scc, - bwp, + sched_ctrl->active_bwp, aggregation_level, CCEIndex); From 415a843ac464948a775c41dc0978f29e2634f4ba Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 18 Nov 2020 22:27:38 +0100 Subject: [PATCH 12/56] Add active_ubwp to NR_UE_sched_ctrl_t --- openair2/LAYER2/NR_MAC_gNB/config.c | 6 ++++ .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 30 +++++++++---------- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 3 ++ 3 files changed, 24 insertions(+), 15 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index c471eb94f2..6843b0ad1f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -389,6 +389,12 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, bwpList->list.count); const int bwp_id = 1; UE_info->UE_sched_ctrl[UE_id].active_bwp = bwpList->list.array[bwp_id - 1]; + struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = + secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList; + AssertFatal(ubwpList->list.count == 1, + "uplinkBWP_ToAddModList has %d BWP!\n", + ubwpList->list.count); + UE_info->UE_sched_ctrl[UE_id].active_ubwp = ubwpList->list.array[bwp_id - 1]; LOG_I(PHY,"Added new UE_id %d/%x with initial secondaryCellGroup\n",UE_id,rnti); } else if (add_ue == 1 && !get_softmodem_params()->phy_test) { /* TODO: should check for free RA process */ diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index cf1bf30c73..54a91d6e7e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -399,6 +399,11 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, bwpList->list.count); const int bwp_id = 1; UE_info->UE_sched_ctrl[UE_id].active_bwp = bwpList->list.array[bwp_id - 1]; + struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = ra->secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList; + AssertFatal(ubwpList->list.count == 1, + "uplinkBWP_ToAddModList has %d BWP!\n", + ubwpList->list.count); + UE_info->UE_sched_ctrl[UE_id].active_ubwp = ubwpList->list.array[bwp_id - 1]; LOG_I(MAC, "[gNB %d][RAPROC] PUSCH with TC_RNTI %x received correctly, " "adding UE MAC Context UE_id %d/RNTI %04x\n", @@ -466,7 +471,6 @@ void nr_schedule_ulsch(module_id_t module_id, NR_COMMON_channels_t *cc = nr_mac->common_channels; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; - const int bwp_id=1; const int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; const int UE_id = 0; NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; @@ -475,21 +479,15 @@ void nr_schedule_ulsch(module_id_t module_id, NR_CellGroupConfig_t *secondaryCellGroup = UE_info->secondaryCellGroup[UE_id]; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; - NR_BWP_Uplink_t *ubwp = - secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig - ->uplinkBWP_ToAddModList->list.array[bwp_id - 1]; - const int n_ubwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count; - NR_PUSCH_Config_t *pusch_Config = ubwp->bwp_Dedicated->pusch_Config->choice.setup; - const int tda = 1; // hardcoded for the moment const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = - ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; + sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; AssertFatal(tda < tdaList->list.count, "time domain assignment %d >= %d\n", tda, tdaList->list.count); - int K2 = get_K2(ubwp, tda, mu); + int K2 = get_K2(sched_ctrl->active_ubwp, tda, mu); /* check if slot is UL, and for phy test verify that it is in first TDD * period, slot 8 (for K2=2, this is at slot 6 in the gNB; because of UE * limitations). Note that if K2 or the TDD configuration is changed, below @@ -523,7 +521,7 @@ void nr_schedule_ulsch(module_id_t module_id, const uint8_t mcs = 9; const uint16_t rbStart = 0; const uint16_t rbSize = get_softmodem_params()->phy_test ? - 50 : NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); + 50 : NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[module_id]->UL_dci_req[0]; UL_dci_req->SFN = frame; @@ -572,11 +570,12 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->rnti = rnti; pusch_pdu->handle = 0; //not yet used - pusch_pdu->bwp_size = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); - pusch_pdu->bwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); - pusch_pdu->subcarrier_spacing = ubwp->bwp_Common->genericParameters.subcarrierSpacing; + pusch_pdu->bwp_size = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); + pusch_pdu->bwp_start = NRRIV2PRBOFFSET(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); + pusch_pdu->subcarrier_spacing = sched_ctrl->active_ubwp->bwp_Common->genericParameters.subcarrierSpacing; pusch_pdu->cyclic_prefix = 0; + NR_PUSCH_Config_t *pusch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pusch_Config->choice.setup; if (!pusch_Config->transformPrecoder) pusch_pdu->transform_precoding = !scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder; else @@ -762,7 +761,8 @@ void nr_schedule_ulsch(module_id_t module_id, dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET]; memset(dci_pdu_rel15, 0, sizeof(dci_pdu_rel15)); - config_uldci(ubwp,pusch_pdu,pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types,tda,UE_info->UE_sched_ctrl[UE_id].tpc0,n_ubwp,bwp_id); - fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pusch_pdu->bwp_size,bwp_id); + const int n_ubwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count; + config_uldci(sched_ctrl->active_ubwp,pusch_pdu,pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types,tda,UE_info->UE_sched_ctrl[UE_id].tpc0,n_ubwp,sched_ctrl->active_bwp->bwp_Id); + fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pusch_pdu->bwp_size,sched_ctrl->active_bwp->bwp_Id); } } diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index ce9649c41d..daf24758f8 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -348,6 +348,9 @@ typedef struct { /// the currently active BWP in DL NR_BWP_Downlink_t *active_bwp; + /// the currently active BWP in UL + NR_BWP_Uplink_t *active_ubwp; + NR_sched_pucch **sched_pucch; /// selected PUCCH index, if scheduled int pucch_sched_idx; From ee6cdc13593f283a24670fb11b2fb822b38fc701 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 18 Nov 2020 22:59:53 +0100 Subject: [PATCH 13/56] Create UL preprocessor, allocate CCE, re-use DL structures --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 74 ++++++++++++------- 1 file changed, 48 insertions(+), 26 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 54a91d6e7e..52e90a57c3 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -461,6 +461,48 @@ int8_t select_ul_harq_pid(NR_UE_sched_ctrl_t *sched_ctrl) { return -1; } +void nr_simple_ulsch_preprocessor(module_id_t module_id, + frame_t frame, + sub_frame_t slot) { + NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; + + AssertFatal(UE_info->num_UEs <= 1, + "%s() cannot handle more than one UE, but found %d\n", + __func__, + UE_info->num_UEs); + if (UE_info->num_UEs == 0) + return; + + const int UE_id = 0; + const int CC_id = 0; + + NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; + + const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; + sched_ctrl->search_space = get_searchspace(sched_ctrl->active_bwp, target_ss); + uint8_t nr_of_candidates; + find_aggregation_candidates(&sched_ctrl->aggregation_level, + &nr_of_candidates, + sched_ctrl->search_space); + sched_ctrl->coreset = get_coreset( + sched_ctrl->active_bwp, sched_ctrl->search_space, 1 /* dedicated */); + const int cid = sched_ctrl->coreset->controlResourceSetId; + const uint16_t Y = UE_info->Y[UE_id][cid][slot]; + const int m = UE_info->num_pdcch_cand[UE_id][cid]; + sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], + sched_ctrl->active_bwp, + sched_ctrl->coreset, + sched_ctrl->aggregation_level, + Y, + m, + nr_of_candidates); + if (sched_ctrl->cce_index < 0) { + LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__); + return; + } + UE_info->num_pdcch_cand[UE_id][cid]++; +} + void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, @@ -497,27 +539,6 @@ void nr_schedule_ulsch(module_id_t module_id, if (is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot) && (!get_softmodem_params()->phy_test || sched_slot == 8)) { - const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; - NR_SearchSpace_t *ss = get_searchspace(sched_ctrl->active_bwp, target_ss); - uint8_t nr_of_candidates, aggregation_level; - find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss); - NR_ControlResourceSet_t *coreset = get_coreset(sched_ctrl->active_bwp, ss, 1 /* dedicated */); - const int cid = coreset->controlResourceSetId; - const uint16_t Y = UE_info->Y[UE_id][cid][nr_mac->current_slot]; - const int m = UE_info->num_pdcch_cand[UE_id][cid]; - int CCEIndex = allocate_nr_CCEs(nr_mac, - sched_ctrl->active_bwp, - coreset, - aggregation_level, - Y, - m, - nr_of_candidates); - if (CCEIndex < 0) { - LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__); - return; - } - UE_info->num_pdcch_cand[UE_id][cid]++; - const uint8_t mcs = 9; const uint16_t rbStart = 0; const uint16_t rbSize = get_softmodem_params()->phy_test ? @@ -552,7 +573,7 @@ void nr_schedule_ulsch(module_id_t module_id, LOG_D(MAC, "%4d.%2d Scheduling UE specific PUSCH\n", frame, slot); int dci_formats[2]; - if (ss->searchSpaceType->choice.ue_Specific->dci_Formats) + if (sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats) dci_formats[0] = NR_UL_DCI_FORMAT_0_1; else dci_formats[0] = NR_UL_DCI_FORMAT_0_0; @@ -587,6 +608,7 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->data_scrambling_id = *scc->physCellId; pusch_pdu->mcs_index = mcs; + const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; if (pusch_pdu->transform_precoding) pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, 0, @@ -752,12 +774,12 @@ void nr_schedule_ulsch(module_id_t module_id, nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, rnti, - ss, - coreset, + sched_ctrl->search_space, + sched_ctrl->coreset, scc, sched_ctrl->active_bwp, - aggregation_level, - CCEIndex); + sched_ctrl->aggregation_level, + sched_ctrl->cce_index); dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET]; memset(dci_pdu_rel15, 0, sizeof(dci_pdu_rel15)); From 2e53fdea9c7f9cf9d1671a22bc3303ac11746297 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 23 Nov 2020 17:20:04 +0100 Subject: [PATCH 14/56] Rename NR_sched_pusch_t and use for Freq Alloc + MCS --- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 6 +----- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 19 +++++++++++-------- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 11 +++++++++-- 3 files changed, 21 insertions(+), 15 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index ae389cd23b..d7eff792bc 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -1724,17 +1724,13 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){ UE_info->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch **)malloc(num_slots_ul*sizeof(NR_sched_pucch *)); for (int s=0; sUE_sched_ctrl[UE_id].sched_pucch[s] = (NR_sched_pucch *)malloc(2*sizeof(NR_sched_pucch)); - UE_info->UE_sched_ctrl[UE_id].sched_pusch = (NR_sched_pusch *)malloc(num_slots_ul*sizeof(NR_sched_pusch)); + UE_info->UE_sched_ctrl[UE_id].sched_pusch = calloc(num_slots_ul, sizeof(NR_sched_pusch_t)); for (int k=0; kUE_sched_ctrl[UE_id].sched_pucch[k][l], 0, sizeof(NR_sched_pucch)); - - memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pusch[k], - 0, - sizeof(NR_sched_pusch)); } LOG_I(MAC, "gNB %d] Add NR UE_id %d : rnti %x\n", mod_idP, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 52e90a57c3..7808181d4b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -501,6 +501,11 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, return; } UE_info->num_pdcch_cand[UE_id][cid]++; + + sched_ctrl->sched_pusch->mcs = 9; + sched_ctrl->sched_pusch->rbStart = 0; + sched_ctrl->sched_pusch->rbSize = get_softmodem_params()->phy_test ? + 50 : NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); } void nr_schedule_ulsch(module_id_t module_id, @@ -539,11 +544,6 @@ void nr_schedule_ulsch(module_id_t module_id, if (is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot) && (!get_softmodem_params()->phy_test || sched_slot == 8)) { - const uint8_t mcs = 9; - const uint16_t rbStart = 0; - const uint16_t rbSize = get_softmodem_params()->phy_test ? - 50 : NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); - nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[module_id]->UL_dci_req[0]; UL_dci_req->SFN = frame; UL_dci_req->Slot = slot; @@ -607,7 +607,7 @@ void nr_schedule_ulsch(module_id_t module_id, else pusch_pdu->data_scrambling_id = *scc->physCellId; - pusch_pdu->mcs_index = mcs; + pusch_pdu->mcs_index = sched_ctrl->sched_pusch->mcs; const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; if (pusch_pdu->transform_precoding) pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, @@ -640,8 +640,8 @@ void nr_schedule_ulsch(module_id_t module_id, AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, "Only frequency resource allocation type 1 is currently supported\n"); pusch_pdu->resource_alloc = 1; //type 1 - pusch_pdu->rb_start = rbStart; - pusch_pdu->rb_size = rbSize; + pusch_pdu->rb_start = sched_ctrl->sched_pusch->rbStart; + pusch_pdu->rb_size = sched_ctrl->sched_pusch->rbSize; pusch_pdu->vrb_to_prb_mapping = 0; if (pusch_Config->frequencyHopping==NULL) @@ -786,5 +786,8 @@ void nr_schedule_ulsch(module_id_t module_id, const int n_ubwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count; config_uldci(sched_ctrl->active_ubwp,pusch_pdu,pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types,tda,UE_info->UE_sched_ctrl[UE_id].tpc0,n_ubwp,sched_ctrl->active_bwp->bwp_Id); fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pusch_pdu->bwp_size,sched_ctrl->active_bwp->bwp_Id); + + + sched_ctrl->sched_pusch->rbSize = 0; } } diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index daf24758f8..804f636aba 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -290,7 +290,14 @@ typedef struct NR_sched_pusch { int slot; bool active; nfapi_nr_pusch_pdu_t pusch_pdu; -} NR_sched_pusch; + + /// RB allocation within active uBWP + uint16_t rbSize; + uint16_t rbStart; + + /// MCS + uint8_t mcs; +} NR_sched_pusch_t; typedef struct NR_UE_harq { uint8_t is_waiting; @@ -355,7 +362,7 @@ typedef struct { /// selected PUCCH index, if scheduled int pucch_sched_idx; int pucch_occ_idx; - NR_sched_pusch *sched_pusch; + NR_sched_pusch_t *sched_pusch; /// CCE index and aggregation, should be coherent with cce_list NR_SearchSpace_t *search_space; From 327e3e706d6bfabd482c445e4834831beeb64942 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 18 Nov 2020 23:26:13 +0100 Subject: [PATCH 15/56] Perform UL slot check in pre-processor --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 527 +++++++++--------- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 3 + 2 files changed, 269 insertions(+), 261 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 7808181d4b..6efb3f2a12 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -463,8 +463,14 @@ int8_t select_ul_harq_pid(NR_UE_sched_ctrl_t *sched_ctrl) { void nr_simple_ulsch_preprocessor(module_id_t module_id, frame_t frame, - sub_frame_t slot) { - NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; + sub_frame_t slot, + int num_slots_per_tdd, + uint64_t ulsch_in_slot_bitmap) { + gNB_MAC_INST *nr_mac = RC.nrmac[module_id]; + NR_COMMON_channels_t *cc = nr_mac->common_channels; + NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; + const int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; + NR_UE_info_t *UE_info = &nr_mac->UE_info; AssertFatal(UE_info->num_UEs <= 1, "%s() cannot handle more than one UE, but found %d\n", @@ -478,6 +484,30 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; + const int tda = 1; + const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = + sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; + AssertFatal(tda < tdaList->list.count, + "time domain assignment %d >= %d\n", + tda, + tdaList->list.count); + int K2 = get_K2(sched_ctrl->active_ubwp, tda, mu); + const int sched_frame = frame + (slot + K2 >= num_slots_per_tdd); + const int sched_slot = (slot + K2) % num_slots_per_tdd; + /* check if slot is UL, and for phy test verify that it is in first TDD + * period, slot 8 (for K2=6, this is at slot 2 in the gNB; because of UE + * limitations). Note that if K2 or the TDD configuration is changed, below + * conditions might exclude each other and never be true */ + const bool transmit = + is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot) + && (!get_softmodem_params()->phy_test || sched_slot == 8); + if (!transmit) + return; + + sched_ctrl->sched_pusch->time_domain_allocation = tda; + sched_ctrl->sched_pusch->slot = sched_slot; + sched_ctrl->sched_pusch->frame = sched_frame; + const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; sched_ctrl->search_space = get_searchspace(sched_ctrl->active_bwp, target_ss); uint8_t nr_of_candidates; @@ -514,280 +544,255 @@ void nr_schedule_ulsch(module_id_t module_id, int num_slots_per_tdd, int ul_slots, uint64_t ulsch_in_slot_bitmap) { - gNB_MAC_INST *nr_mac = RC.nrmac[module_id]; - NR_COMMON_channels_t *cc = nr_mac->common_channels; - NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; - - const int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; const int UE_id = 0; NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; AssertFatal(UE_info->active[UE_id],"Cannot find UE_id %d is not active\n",UE_id); + nr_simple_ulsch_preprocessor( + module_id, frame, slot, num_slots_per_tdd, ulsch_in_slot_bitmap); + NR_CellGroupConfig_t *secondaryCellGroup = UE_info->secondaryCellGroup[UE_id]; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; + if (sched_ctrl->sched_pusch->rbSize <= 0) + return; - const int tda = 1; // hardcoded for the moment + uint16_t rnti = UE_info->rnti[UE_id]; + + /* PUSCH in a later slot, but corresponding DCI now! */ + nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_ctrl->sched_pusch->slot]; + AssertFatal(future_ul_tti_req->SFN == sched_ctrl->sched_pusch->frame + && future_ul_tti_req->Slot == sched_ctrl->sched_pusch->slot, + "%d.%d future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n", + frame, slot, + future_ul_tti_req->SFN, + future_ul_tti_req->Slot, + sched_ctrl->sched_pusch->frame, + sched_ctrl->sched_pusch->slot); + future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; + future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); + nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu; + memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t)); + future_ul_tti_req->n_pdus += 1; + + LOG_D(MAC, "%4d.%2d Scheduling UE specific PUSCH\n", frame, slot); + + int dci_formats[2]; + if (sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats) + dci_formats[0] = NR_UL_DCI_FORMAT_0_1; + else + dci_formats[0] = NR_UL_DCI_FORMAT_0_0; + int rnti_types[2] = { NR_RNTI_C, 0 }; + + //Resource Allocation in time domain + const int tda = sched_ctrl->sched_pusch->time_domain_allocation; const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; - AssertFatal(tda < tdaList->list.count, - "time domain assignment %d >= %d\n", - tda, - tdaList->list.count); + const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; + int StartSymbolIndex, NrOfSymbols; + SLIV2SL(startSymbolAndLength,&StartSymbolIndex,&NrOfSymbols); + pusch_pdu->start_symbol_index = StartSymbolIndex; + pusch_pdu->nr_of_symbols = NrOfSymbols; - int K2 = get_K2(sched_ctrl->active_ubwp, tda, mu); - /* check if slot is UL, and for phy test verify that it is in first TDD - * period, slot 8 (for K2=2, this is at slot 6 in the gNB; because of UE - * limitations). Note that if K2 or the TDD configuration is changed, below - * conditions might exclude each other and never be true */ - const int sched_frame = frame + (slot + K2 >= num_slots_per_tdd); - const int sched_slot = (slot + K2) % num_slots_per_tdd; - if (is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot) - && (!get_softmodem_params()->phy_test || sched_slot == 8)) { + pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; + pusch_pdu->rnti = rnti; + pusch_pdu->handle = 0; //not yet used - nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[module_id]->UL_dci_req[0]; - UL_dci_req->SFN = frame; - UL_dci_req->Slot = slot; - nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu; + pusch_pdu->bwp_size = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); + pusch_pdu->bwp_start = NRRIV2PRBOFFSET(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); + pusch_pdu->subcarrier_spacing = sched_ctrl->active_ubwp->bwp_Common->genericParameters.subcarrierSpacing; + pusch_pdu->cyclic_prefix = 0; - uint16_t rnti = UE_info->rnti[UE_id]; + NR_PUSCH_Config_t *pusch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pusch_Config->choice.setup; + NR_ServingCellConfigCommon_t *scc = RC.nrmac[0]->common_channels->ServingCellConfigCommon; + if (!pusch_Config->transformPrecoder) + pusch_pdu->transform_precoding = !scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder; + else + pusch_pdu->transform_precoding = *pusch_Config->transformPrecoder; - /* PUSCH in a later slot, but corresponding DCI now! */ - nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_slot]; - AssertFatal(future_ul_tti_req->SFN == sched_frame - && future_ul_tti_req->Slot == sched_slot, - "%d.%d future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n", - frame, slot, - future_ul_tti_req->SFN, - future_ul_tti_req->Slot, - sched_frame, - sched_slot); - nfapi_nr_ul_dci_request_t *ul_dci_req = &RC.nrmac[module_id]->UL_dci_req[0]; - ul_dci_req->SFN = frame; - ul_dci_req->Slot = slot; - future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; - future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); - nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu; - memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t)); - future_ul_tti_req->n_pdus += 1; + if (pusch_Config->dataScramblingIdentityPUSCH) + pusch_pdu->data_scrambling_id = *pusch_Config->dataScramblingIdentityPUSCH; + else + pusch_pdu->data_scrambling_id = *scc->physCellId; - LOG_D(MAC, "%4d.%2d Scheduling UE specific PUSCH\n", frame, slot); + pusch_pdu->mcs_index = sched_ctrl->sched_pusch->mcs; + const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; + if (pusch_pdu->transform_precoding) + pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, + 0, + dci_formats[0], + rnti_types[0], + target_ss, + false); + else + pusch_pdu->mcs_table = + get_pusch_mcs_table(pusch_Config->mcs_TableTransformPrecoder, + 1, + dci_formats[0], + rnti_types[0], + target_ss, + false); - int dci_formats[2]; - if (sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats) - dci_formats[0] = NR_UL_DCI_FORMAT_0_1; - else - dci_formats[0] = NR_UL_DCI_FORMAT_0_0; - - int rnti_types[2] = { NR_RNTI_C, 0 }; - - //Resource Allocation in time domain - const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; - int StartSymbolIndex, NrOfSymbols; - SLIV2SL(startSymbolAndLength,&StartSymbolIndex,&NrOfSymbols); - pusch_pdu->start_symbol_index = StartSymbolIndex; - pusch_pdu->nr_of_symbols = NrOfSymbols; - - pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; - pusch_pdu->rnti = rnti; - pusch_pdu->handle = 0; //not yet used - - pusch_pdu->bwp_size = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); - pusch_pdu->bwp_start = NRRIV2PRBOFFSET(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); - pusch_pdu->subcarrier_spacing = sched_ctrl->active_ubwp->bwp_Common->genericParameters.subcarrierSpacing; - pusch_pdu->cyclic_prefix = 0; - - NR_PUSCH_Config_t *pusch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pusch_Config->choice.setup; - if (!pusch_Config->transformPrecoder) - pusch_pdu->transform_precoding = !scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder; - else - pusch_pdu->transform_precoding = *pusch_Config->transformPrecoder; - - if (pusch_Config->dataScramblingIdentityPUSCH) - pusch_pdu->data_scrambling_id = *pusch_Config->dataScramblingIdentityPUSCH; - else - pusch_pdu->data_scrambling_id = *scc->physCellId; - - pusch_pdu->mcs_index = sched_ctrl->sched_pusch->mcs; - const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; - if (pusch_pdu->transform_precoding) - pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, - 0, - dci_formats[0], - rnti_types[0], - target_ss, - false); - else - pusch_pdu->mcs_table = - get_pusch_mcs_table(pusch_Config->mcs_TableTransformPrecoder, - 1, - dci_formats[0], - rnti_types[0], - target_ss, - false); - - pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); - pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); - if (pusch_Config->tp_pi2BPSK) { - if (((pusch_pdu->mcs_table == 3) && (pusch_pdu->mcs_index < 2)) - || ((pusch_pdu->mcs_table == 4) && (pusch_pdu->mcs_index < 6))) { - pusch_pdu->target_code_rate = pusch_pdu->target_code_rate>>1; - pusch_pdu->qam_mod_order = pusch_pdu->qam_mod_order<<1; - } + pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); + pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); + if (pusch_Config->tp_pi2BPSK) { + if (((pusch_pdu->mcs_table == 3) && (pusch_pdu->mcs_index < 2)) + || ((pusch_pdu->mcs_table == 4) && (pusch_pdu->mcs_index < 6))) { + pusch_pdu->target_code_rate = pusch_pdu->target_code_rate>>1; + pusch_pdu->qam_mod_order = pusch_pdu->qam_mod_order<<1; } - pusch_pdu->nrOfLayers = 1; - - //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2] - AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, - "Only frequency resource allocation type 1 is currently supported\n"); - pusch_pdu->resource_alloc = 1; //type 1 - pusch_pdu->rb_start = sched_ctrl->sched_pusch->rbStart; - pusch_pdu->rb_size = sched_ctrl->sched_pusch->rbSize; - pusch_pdu->vrb_to_prb_mapping = 0; - - if (pusch_Config->frequencyHopping==NULL) - pusch_pdu->frequency_hopping = 0; - else - pusch_pdu->frequency_hopping = 1; - - - // -------------------- - // ------- DMRS ------- - // -------------------- - const int mapping_type = tdaList->list.array[tda]->mappingType; - NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig; - if (mapping_type == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA) - NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup; - else - NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; - if (NR_DMRS_UplinkConfig->dmrs_Type == NULL) - pusch_pdu->dmrs_config_type = 0; - else - pusch_pdu->dmrs_config_type = 1; - pusch_pdu->scid = 0; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1] - if (pusch_pdu->transform_precoding) { // transform precoding disabled - long *scramblingid; - if (pusch_pdu->scid == 0) - scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID0; - else - scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID1; - if (scramblingid == NULL) - pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; - else - pusch_pdu->ul_dmrs_scrambling_id = *scramblingid; - } - else { - pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; - if (NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity != NULL) - pusch_pdu->pusch_identity = *NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity; - else - pusch_pdu->pusch_identity = *scc->physCellId; - } - pusch_dmrs_AdditionalPosition_t additional_pos; - if (NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NULL) - additional_pos = 2; - else { - if (*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos3) - additional_pos = 3; - else - additional_pos = *NR_DMRS_UplinkConfig->dmrs_AdditionalPosition; - } - pusch_maxLength_t pusch_maxLength; - if (NR_DMRS_UplinkConfig->maxLength == NULL) - pusch_maxLength = 1; - else - pusch_maxLength = 2; - uint16_t l_prime_mask = get_l_prime(pusch_pdu->nr_of_symbols, mapping_type, additional_pos, pusch_maxLength); - pusch_pdu->ul_dmrs_symb_pos = l_prime_mask << pusch_pdu->start_symbol_index; - - pusch_pdu->num_dmrs_cdm_grps_no_data = 1; - pusch_pdu->dmrs_ports = 1; - - // -------------------- - // ------- PTRS ------- - // -------------------- - if (NR_DMRS_UplinkConfig->phaseTrackingRS != NULL) { - // TODO to be fixed from RRC config - uint8_t ptrs_mcs1 = 2; // higher layer parameter in PTRS-UplinkConfig - uint8_t ptrs_mcs2 = 4; // higher layer parameter in PTRS-UplinkConfig - uint8_t ptrs_mcs3 = 10; // higher layer parameter in PTRS-UplinkConfig - uint16_t n_rb0 = 25; // higher layer parameter in PTRS-UplinkConfig - uint16_t n_rb1 = 75; // higher layer parameter in PTRS-UplinkConfig - pusch_pdu->pusch_ptrs.ptrs_time_density = get_L_ptrs(ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, pusch_pdu->mcs_index, pusch_pdu->mcs_table); - pusch_pdu->pusch_ptrs.ptrs_freq_density = get_K_ptrs(n_rb0, n_rb1, pusch_pdu->rb_size); - pusch_pdu->pusch_ptrs.ptrs_ports_list = (nfapi_nr_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ptrs_ports_t)); - pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0; - - pusch_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS; // enable PUSCH PTRS - } - else{ - pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS - } - - // -------------------------------------------------------------------------------------------------------------------------------------------- - - //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2] - //Optional Data only included if indicated in pduBitmap - int8_t harq_id = select_ul_harq_pid(&UE_info->UE_sched_ctrl[UE_id]); - if (harq_id < 0) return; - NR_UE_ul_harq_t *cur_harq = &UE_info->UE_sched_ctrl[UE_id].ul_harq_processes[harq_id]; - pusch_pdu->pusch_data.harq_process_id = harq_id; - pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi; - pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; - - cur_harq->state = ACTIVE_SCHED; - cur_harq->last_tx_slot = sched_slot; - - uint8_t num_dmrs_symb = 0; - for(int i = pusch_pdu->start_symbol_index; i < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; i++) - num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1; - - uint8_t N_PRB_DMRS; - if (pusch_pdu->dmrs_config_type == 0) - N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*6; - else - N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*4; - - pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order, - pusch_pdu->target_code_rate, - pusch_pdu->rb_size, - pusch_pdu->nr_of_symbols, - N_PRB_DMRS * num_dmrs_symb, - 0, //nb_rb_oh - 0, - pusch_pdu->nrOfLayers)>>3; - - UE_info->mac_stats[UE_id].ulsch_rounds[cur_harq->round]++; - if (cur_harq->round == 0) - UE_info->mac_stats[UE_id].ulsch_total_bytes_scheduled += pusch_pdu->pusch_data.tb_size; - - pusch_pdu->pusch_data.num_cb = 0; //CBG not supported - - ul_dci_request_pdu = &UL_dci_req->ul_dci_pdu_list[UL_dci_req->numPdus]; - memset((void*)ul_dci_request_pdu,0,sizeof(nfapi_nr_ul_dci_request_pdus_t)); - ul_dci_request_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE; - ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; - UL_dci_req->numPdus+=1; - - LOG_D(MAC,"Configuring ULDCI/PDCCH in %d.%d\n", frame,slot); - - nr_configure_pdcch(nr_mac, - pdcch_pdu_rel15, - rnti, - sched_ctrl->search_space, - sched_ctrl->coreset, - scc, - sched_ctrl->active_bwp, - sched_ctrl->aggregation_level, - sched_ctrl->cce_index); - - dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET]; - memset(dci_pdu_rel15, 0, sizeof(dci_pdu_rel15)); - const int n_ubwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count; - config_uldci(sched_ctrl->active_ubwp,pusch_pdu,pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types,tda,UE_info->UE_sched_ctrl[UE_id].tpc0,n_ubwp,sched_ctrl->active_bwp->bwp_Id); - fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pusch_pdu->bwp_size,sched_ctrl->active_bwp->bwp_Id); - - - sched_ctrl->sched_pusch->rbSize = 0; } + pusch_pdu->nrOfLayers = 1; + + //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2] + AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, + "Only frequency resource allocation type 1 is currently supported\n"); + pusch_pdu->resource_alloc = 1; //type 1 + pusch_pdu->rb_start = sched_ctrl->sched_pusch->rbStart; + pusch_pdu->rb_size = sched_ctrl->sched_pusch->rbSize; + pusch_pdu->vrb_to_prb_mapping = 0; + + if (pusch_Config->frequencyHopping==NULL) + pusch_pdu->frequency_hopping = 0; + else + pusch_pdu->frequency_hopping = 1; + + + // -------------------- + // ------- DMRS ------- + // -------------------- + const int mapping_type = tdaList->list.array[tda]->mappingType; + NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig; + if (mapping_type == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA) + NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup; + else + NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; + if (NR_DMRS_UplinkConfig->dmrs_Type == NULL) + pusch_pdu->dmrs_config_type = 0; + else + pusch_pdu->dmrs_config_type = 1; + pusch_pdu->scid = 0; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1] + if (pusch_pdu->transform_precoding) { // transform precoding disabled + long *scramblingid; + if (pusch_pdu->scid == 0) + scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID0; + else + scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID1; + if (scramblingid == NULL) + pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; + else + pusch_pdu->ul_dmrs_scrambling_id = *scramblingid; + } + else { + pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; + if (NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity != NULL) + pusch_pdu->pusch_identity = *NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity; + else + pusch_pdu->pusch_identity = *scc->physCellId; + } + pusch_dmrs_AdditionalPosition_t additional_pos; + if (NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NULL) + additional_pos = 2; + else { + if (*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos3) + additional_pos = 3; + else + additional_pos = *NR_DMRS_UplinkConfig->dmrs_AdditionalPosition; + } + pusch_maxLength_t pusch_maxLength; + if (NR_DMRS_UplinkConfig->maxLength == NULL) + pusch_maxLength = 1; + else + pusch_maxLength = 2; + uint16_t l_prime_mask = get_l_prime(pusch_pdu->nr_of_symbols, mapping_type, additional_pos, pusch_maxLength); + pusch_pdu->ul_dmrs_symb_pos = l_prime_mask << pusch_pdu->start_symbol_index; + + pusch_pdu->num_dmrs_cdm_grps_no_data = 1; + pusch_pdu->dmrs_ports = 1; + + // -------------------- + // ------- PTRS ------- + // -------------------- + if (NR_DMRS_UplinkConfig->phaseTrackingRS != NULL) { + // TODO to be fixed from RRC config + uint8_t ptrs_mcs1 = 2; // higher layer parameter in PTRS-UplinkConfig + uint8_t ptrs_mcs2 = 4; // higher layer parameter in PTRS-UplinkConfig + uint8_t ptrs_mcs3 = 10; // higher layer parameter in PTRS-UplinkConfig + uint16_t n_rb0 = 25; // higher layer parameter in PTRS-UplinkConfig + uint16_t n_rb1 = 75; // higher layer parameter in PTRS-UplinkConfig + pusch_pdu->pusch_ptrs.ptrs_time_density = get_L_ptrs(ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, pusch_pdu->mcs_index, pusch_pdu->mcs_table); + pusch_pdu->pusch_ptrs.ptrs_freq_density = get_K_ptrs(n_rb0, n_rb1, pusch_pdu->rb_size); + pusch_pdu->pusch_ptrs.ptrs_ports_list = (nfapi_nr_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ptrs_ports_t)); + pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0; + + pusch_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS; // enable PUSCH PTRS + } + else{ + pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS + } + + int8_t harq_id = select_ul_harq_pid(&UE_info->UE_sched_ctrl[UE_id]); + if (harq_id < 0) return; + NR_UE_ul_harq_t *cur_harq = &UE_info->UE_sched_ctrl[UE_id].ul_harq_processes[harq_id]; + pusch_pdu->pusch_data.harq_process_id = harq_id; + pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi; + pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; + + cur_harq->state = ACTIVE_SCHED; + cur_harq->last_tx_slot = sched_ctrl->sched_pusch->slot; + + uint8_t num_dmrs_symb = 0; + for(int i = pusch_pdu->start_symbol_index; i < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; i++) + num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1; + + uint8_t N_PRB_DMRS; + if (pusch_pdu->dmrs_config_type == 0) + N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*6; + else + N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*4; + + pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order, + pusch_pdu->target_code_rate, + pusch_pdu->rb_size, + pusch_pdu->nr_of_symbols, + N_PRB_DMRS * num_dmrs_symb, + 0, //nb_rb_oh + 0, + pusch_pdu->nrOfLayers)>>3; + + UE_info->mac_stats[UE_id].ulsch_rounds[cur_harq->round]++; + if (cur_harq->round == 0) + UE_info->mac_stats[UE_id].ulsch_total_bytes_scheduled += pusch_pdu->pusch_data.tb_size; + + pusch_pdu->pusch_data.num_cb = 0; //CBG not supported + + nfapi_nr_ul_dci_request_t *ul_dci_req = &RC.nrmac[module_id]->UL_dci_req[0]; + ul_dci_req->SFN = frame; + ul_dci_req->Slot = slot; + nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &ul_dci_req->ul_dci_pdu_list[ul_dci_req->numPdus]; + memset(ul_dci_request_pdu, 0, sizeof(nfapi_nr_ul_dci_request_pdus_t)); + ul_dci_request_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE; + ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; + ul_dci_req->numPdus += 1; + + LOG_D(MAC,"Configuring ULDCI/PDCCH in %d.%d\n", frame,slot); + + nr_configure_pdcch(RC.nrmac[0], + pdcch_pdu_rel15, + rnti, + sched_ctrl->search_space, + sched_ctrl->coreset, + scc, + sched_ctrl->active_bwp, + sched_ctrl->aggregation_level, + sched_ctrl->cce_index); + + dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET]; + memset(dci_pdu_rel15, 0, sizeof(dci_pdu_rel15)); + const int n_ubwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count; + config_uldci(sched_ctrl->active_ubwp,pusch_pdu,pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types,tda,UE_info->UE_sched_ctrl[UE_id].tpc0,n_ubwp,sched_ctrl->active_bwp->bwp_Id); + fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pusch_pdu->bwp_size,sched_ctrl->active_bwp->bwp_Id); + + + sched_ctrl->sched_pusch->rbSize = 0; } diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 804f636aba..ee88b88152 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -295,6 +295,9 @@ typedef struct NR_sched_pusch { uint16_t rbSize; uint16_t rbStart; + // time-domain allocation for scheduled RBs + int time_domain_allocation; + /// MCS uint8_t mcs; } NR_sched_pusch_t; From 2b1a01c0128949d62b0ac4a2b207f4ac8d509471 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 4 Nov 2020 18:38:11 +0100 Subject: [PATCH 16/56] UL Post-processor: enable multi-UE handling --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 483 +++++++++--------- 1 file changed, 249 insertions(+), 234 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 6efb3f2a12..d6caa9956d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -544,255 +544,270 @@ void nr_schedule_ulsch(module_id_t module_id, int num_slots_per_tdd, int ul_slots, uint64_t ulsch_in_slot_bitmap) { - const int UE_id = 0; - NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; - AssertFatal(UE_info->active[UE_id],"Cannot find UE_id %d is not active\n",UE_id); - nr_simple_ulsch_preprocessor( module_id, frame, slot, num_slots_per_tdd, ulsch_in_slot_bitmap); - NR_CellGroupConfig_t *secondaryCellGroup = UE_info->secondaryCellGroup[UE_id]; - NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; - if (sched_ctrl->sched_pusch->rbSize <= 0) - return; + NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; + const NR_UE_list_t *UE_list = &UE_info->list; + for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) { + NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; + if (sched_ctrl->sched_pusch->rbSize <= 0) + continue; - uint16_t rnti = UE_info->rnti[UE_id]; + uint16_t rnti = UE_info->rnti[UE_id]; - /* PUSCH in a later slot, but corresponding DCI now! */ - nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_ctrl->sched_pusch->slot]; - AssertFatal(future_ul_tti_req->SFN == sched_ctrl->sched_pusch->frame - && future_ul_tti_req->Slot == sched_ctrl->sched_pusch->slot, - "%d.%d future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n", - frame, slot, - future_ul_tti_req->SFN, - future_ul_tti_req->Slot, - sched_ctrl->sched_pusch->frame, - sched_ctrl->sched_pusch->slot); - future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; - future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); - nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu; - memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t)); - future_ul_tti_req->n_pdus += 1; + /* PUSCH in a later slot, but corresponding DCI now! */ + nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_ctrl->sched_pusch->slot]; + AssertFatal(future_ul_tti_req->SFN == sched_ctrl->sched_pusch->frame + && future_ul_tti_req->Slot == sched_ctrl->sched_pusch->slot, + "%d.%d future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n", + frame, slot, + future_ul_tti_req->SFN, + future_ul_tti_req->Slot, + sched_ctrl->sched_pusch->frame, + sched_ctrl->sched_pusch->slot); + future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; + future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); + nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu; + memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t)); + future_ul_tti_req->n_pdus += 1; - LOG_D(MAC, "%4d.%2d Scheduling UE specific PUSCH\n", frame, slot); + LOG_D(MAC, "%4d.%2d Scheduling UE specific PUSCH\n", frame, slot); - int dci_formats[2]; - if (sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats) - dci_formats[0] = NR_UL_DCI_FORMAT_0_1; - else - dci_formats[0] = NR_UL_DCI_FORMAT_0_0; - int rnti_types[2] = { NR_RNTI_C, 0 }; - - //Resource Allocation in time domain - const int tda = sched_ctrl->sched_pusch->time_domain_allocation; - const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = - sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; - const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; - int StartSymbolIndex, NrOfSymbols; - SLIV2SL(startSymbolAndLength,&StartSymbolIndex,&NrOfSymbols); - pusch_pdu->start_symbol_index = StartSymbolIndex; - pusch_pdu->nr_of_symbols = NrOfSymbols; - - pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; - pusch_pdu->rnti = rnti; - pusch_pdu->handle = 0; //not yet used - - pusch_pdu->bwp_size = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); - pusch_pdu->bwp_start = NRRIV2PRBOFFSET(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); - pusch_pdu->subcarrier_spacing = sched_ctrl->active_ubwp->bwp_Common->genericParameters.subcarrierSpacing; - pusch_pdu->cyclic_prefix = 0; - - NR_PUSCH_Config_t *pusch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pusch_Config->choice.setup; - NR_ServingCellConfigCommon_t *scc = RC.nrmac[0]->common_channels->ServingCellConfigCommon; - if (!pusch_Config->transformPrecoder) - pusch_pdu->transform_precoding = !scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder; - else - pusch_pdu->transform_precoding = *pusch_Config->transformPrecoder; - - if (pusch_Config->dataScramblingIdentityPUSCH) - pusch_pdu->data_scrambling_id = *pusch_Config->dataScramblingIdentityPUSCH; - else - pusch_pdu->data_scrambling_id = *scc->physCellId; - - pusch_pdu->mcs_index = sched_ctrl->sched_pusch->mcs; - const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; - if (pusch_pdu->transform_precoding) - pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, - 0, - dci_formats[0], - rnti_types[0], - target_ss, - false); - else - pusch_pdu->mcs_table = - get_pusch_mcs_table(pusch_Config->mcs_TableTransformPrecoder, - 1, - dci_formats[0], - rnti_types[0], - target_ss, - false); - - pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); - pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); - if (pusch_Config->tp_pi2BPSK) { - if (((pusch_pdu->mcs_table == 3) && (pusch_pdu->mcs_index < 2)) - || ((pusch_pdu->mcs_table == 4) && (pusch_pdu->mcs_index < 6))) { - pusch_pdu->target_code_rate = pusch_pdu->target_code_rate>>1; - pusch_pdu->qam_mod_order = pusch_pdu->qam_mod_order<<1; - } - } - pusch_pdu->nrOfLayers = 1; - - //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2] - AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, - "Only frequency resource allocation type 1 is currently supported\n"); - pusch_pdu->resource_alloc = 1; //type 1 - pusch_pdu->rb_start = sched_ctrl->sched_pusch->rbStart; - pusch_pdu->rb_size = sched_ctrl->sched_pusch->rbSize; - pusch_pdu->vrb_to_prb_mapping = 0; - - if (pusch_Config->frequencyHopping==NULL) - pusch_pdu->frequency_hopping = 0; - else - pusch_pdu->frequency_hopping = 1; - - - // -------------------- - // ------- DMRS ------- - // -------------------- - const int mapping_type = tdaList->list.array[tda]->mappingType; - NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig; - if (mapping_type == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA) - NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup; - else - NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; - if (NR_DMRS_UplinkConfig->dmrs_Type == NULL) - pusch_pdu->dmrs_config_type = 0; - else - pusch_pdu->dmrs_config_type = 1; - pusch_pdu->scid = 0; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1] - if (pusch_pdu->transform_precoding) { // transform precoding disabled - long *scramblingid; - if (pusch_pdu->scid == 0) - scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID0; + int dci_formats[2]; + if (sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats) + dci_formats[0] = NR_UL_DCI_FORMAT_0_1; else - scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID1; - if (scramblingid == NULL) - pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; + dci_formats[0] = NR_UL_DCI_FORMAT_0_0; + int rnti_types[2] = { NR_RNTI_C, 0 }; + + //Resource Allocation in time domain + const int tda = sched_ctrl->sched_pusch->time_domain_allocation; + const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = + sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; + const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; + int StartSymbolIndex, NrOfSymbols; + SLIV2SL(startSymbolAndLength,&StartSymbolIndex,&NrOfSymbols); + pusch_pdu->start_symbol_index = StartSymbolIndex; + pusch_pdu->nr_of_symbols = NrOfSymbols; + + pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; + pusch_pdu->rnti = rnti; + pusch_pdu->handle = 0; //not yet used + + pusch_pdu->bwp_size = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); + pusch_pdu->bwp_start = NRRIV2PRBOFFSET(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); + pusch_pdu->subcarrier_spacing = sched_ctrl->active_ubwp->bwp_Common->genericParameters.subcarrierSpacing; + pusch_pdu->cyclic_prefix = 0; + + NR_PUSCH_Config_t *pusch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pusch_Config->choice.setup; + NR_ServingCellConfigCommon_t *scc = RC.nrmac[0]->common_channels->ServingCellConfigCommon; + if (!pusch_Config->transformPrecoder) + pusch_pdu->transform_precoding = !scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder; else - pusch_pdu->ul_dmrs_scrambling_id = *scramblingid; - } - else { - pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; - if (NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity != NULL) - pusch_pdu->pusch_identity = *NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity; + pusch_pdu->transform_precoding = *pusch_Config->transformPrecoder; + + if (pusch_Config->dataScramblingIdentityPUSCH) + pusch_pdu->data_scrambling_id = *pusch_Config->dataScramblingIdentityPUSCH; else - pusch_pdu->pusch_identity = *scc->physCellId; - } - pusch_dmrs_AdditionalPosition_t additional_pos; - if (NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NULL) - additional_pos = 2; - else { - if (*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos3) - additional_pos = 3; - else - additional_pos = *NR_DMRS_UplinkConfig->dmrs_AdditionalPosition; - } - pusch_maxLength_t pusch_maxLength; - if (NR_DMRS_UplinkConfig->maxLength == NULL) - pusch_maxLength = 1; - else - pusch_maxLength = 2; - uint16_t l_prime_mask = get_l_prime(pusch_pdu->nr_of_symbols, mapping_type, additional_pos, pusch_maxLength); - pusch_pdu->ul_dmrs_symb_pos = l_prime_mask << pusch_pdu->start_symbol_index; + pusch_pdu->data_scrambling_id = *scc->physCellId; - pusch_pdu->num_dmrs_cdm_grps_no_data = 1; - pusch_pdu->dmrs_ports = 1; - - // -------------------- - // ------- PTRS ------- - // -------------------- - if (NR_DMRS_UplinkConfig->phaseTrackingRS != NULL) { - // TODO to be fixed from RRC config - uint8_t ptrs_mcs1 = 2; // higher layer parameter in PTRS-UplinkConfig - uint8_t ptrs_mcs2 = 4; // higher layer parameter in PTRS-UplinkConfig - uint8_t ptrs_mcs3 = 10; // higher layer parameter in PTRS-UplinkConfig - uint16_t n_rb0 = 25; // higher layer parameter in PTRS-UplinkConfig - uint16_t n_rb1 = 75; // higher layer parameter in PTRS-UplinkConfig - pusch_pdu->pusch_ptrs.ptrs_time_density = get_L_ptrs(ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, pusch_pdu->mcs_index, pusch_pdu->mcs_table); - pusch_pdu->pusch_ptrs.ptrs_freq_density = get_K_ptrs(n_rb0, n_rb1, pusch_pdu->rb_size); - pusch_pdu->pusch_ptrs.ptrs_ports_list = (nfapi_nr_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ptrs_ports_t)); - pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0; - - pusch_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS; // enable PUSCH PTRS - } - else{ - pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS - } - - int8_t harq_id = select_ul_harq_pid(&UE_info->UE_sched_ctrl[UE_id]); - if (harq_id < 0) return; - NR_UE_ul_harq_t *cur_harq = &UE_info->UE_sched_ctrl[UE_id].ul_harq_processes[harq_id]; - pusch_pdu->pusch_data.harq_process_id = harq_id; - pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi; - pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; - - cur_harq->state = ACTIVE_SCHED; - cur_harq->last_tx_slot = sched_ctrl->sched_pusch->slot; - - uint8_t num_dmrs_symb = 0; - for(int i = pusch_pdu->start_symbol_index; i < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; i++) - num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1; - - uint8_t N_PRB_DMRS; - if (pusch_pdu->dmrs_config_type == 0) - N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*6; - else - N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*4; - - pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order, - pusch_pdu->target_code_rate, - pusch_pdu->rb_size, - pusch_pdu->nr_of_symbols, - N_PRB_DMRS * num_dmrs_symb, - 0, //nb_rb_oh + pusch_pdu->mcs_index = sched_ctrl->sched_pusch->mcs; + const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; + if (pusch_pdu->transform_precoding) + pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, 0, - pusch_pdu->nrOfLayers)>>3; + dci_formats[0], + rnti_types[0], + target_ss, + false); + else + pusch_pdu->mcs_table = + get_pusch_mcs_table(pusch_Config->mcs_TableTransformPrecoder, + 1, + dci_formats[0], + rnti_types[0], + target_ss, + false); - UE_info->mac_stats[UE_id].ulsch_rounds[cur_harq->round]++; - if (cur_harq->round == 0) - UE_info->mac_stats[UE_id].ulsch_total_bytes_scheduled += pusch_pdu->pusch_data.tb_size; + pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); + pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); + if (pusch_Config->tp_pi2BPSK) { + if (((pusch_pdu->mcs_table == 3) && (pusch_pdu->mcs_index < 2)) + || ((pusch_pdu->mcs_table == 4) && (pusch_pdu->mcs_index < 6))) { + pusch_pdu->target_code_rate = pusch_pdu->target_code_rate>>1; + pusch_pdu->qam_mod_order = pusch_pdu->qam_mod_order<<1; + } + } + pusch_pdu->nrOfLayers = 1; - pusch_pdu->pusch_data.num_cb = 0; //CBG not supported + //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2] + AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, + "Only frequency resource allocation type 1 is currently supported\n"); + pusch_pdu->resource_alloc = 1; //type 1 + pusch_pdu->rb_start = sched_ctrl->sched_pusch->rbStart; + pusch_pdu->rb_size = sched_ctrl->sched_pusch->rbSize; + pusch_pdu->vrb_to_prb_mapping = 0; - nfapi_nr_ul_dci_request_t *ul_dci_req = &RC.nrmac[module_id]->UL_dci_req[0]; - ul_dci_req->SFN = frame; - ul_dci_req->Slot = slot; - nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &ul_dci_req->ul_dci_pdu_list[ul_dci_req->numPdus]; - memset(ul_dci_request_pdu, 0, sizeof(nfapi_nr_ul_dci_request_pdus_t)); - ul_dci_request_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE; - ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; - ul_dci_req->numPdus += 1; - - LOG_D(MAC,"Configuring ULDCI/PDCCH in %d.%d\n", frame,slot); - - nr_configure_pdcch(RC.nrmac[0], - pdcch_pdu_rel15, - rnti, - sched_ctrl->search_space, - sched_ctrl->coreset, - scc, - sched_ctrl->active_bwp, - sched_ctrl->aggregation_level, - sched_ctrl->cce_index); - - dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET]; - memset(dci_pdu_rel15, 0, sizeof(dci_pdu_rel15)); - const int n_ubwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count; - config_uldci(sched_ctrl->active_ubwp,pusch_pdu,pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types,tda,UE_info->UE_sched_ctrl[UE_id].tpc0,n_ubwp,sched_ctrl->active_bwp->bwp_Id); - fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pusch_pdu->bwp_size,sched_ctrl->active_bwp->bwp_Id); + if (pusch_Config->frequencyHopping==NULL) + pusch_pdu->frequency_hopping = 0; + else + pusch_pdu->frequency_hopping = 1; - sched_ctrl->sched_pusch->rbSize = 0; + // -------------------- + // ------- DMRS ------- + // -------------------- + const int mapping_type = tdaList->list.array[tda]->mappingType; + NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig; + if (mapping_type == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA) + NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup; + else + NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; + if (NR_DMRS_UplinkConfig->dmrs_Type == NULL) + pusch_pdu->dmrs_config_type = 0; + else + pusch_pdu->dmrs_config_type = 1; + pusch_pdu->scid = 0; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1] + if (pusch_pdu->transform_precoding) { // transform precoding disabled + long *scramblingid; + if (pusch_pdu->scid == 0) + scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID0; + else + scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID1; + if (scramblingid == NULL) + pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; + else + pusch_pdu->ul_dmrs_scrambling_id = *scramblingid; + } + else { + pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; + if (NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity != NULL) + pusch_pdu->pusch_identity = *NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity; + else + pusch_pdu->pusch_identity = *scc->physCellId; + } + pusch_dmrs_AdditionalPosition_t additional_pos; + if (NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NULL) + additional_pos = 2; + else { + if (*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos3) + additional_pos = 3; + else + additional_pos = *NR_DMRS_UplinkConfig->dmrs_AdditionalPosition; + } + pusch_maxLength_t pusch_maxLength; + if (NR_DMRS_UplinkConfig->maxLength == NULL) + pusch_maxLength = 1; + else + pusch_maxLength = 2; + uint16_t l_prime_mask = get_l_prime(pusch_pdu->nr_of_symbols, mapping_type, additional_pos, pusch_maxLength); + pusch_pdu->ul_dmrs_symb_pos = l_prime_mask << pusch_pdu->start_symbol_index; + + pusch_pdu->num_dmrs_cdm_grps_no_data = 1; + pusch_pdu->dmrs_ports = 1; + + // -------------------- + // ------- PTRS ------- + // -------------------- + if (NR_DMRS_UplinkConfig->phaseTrackingRS != NULL) { + // TODO to be fixed from RRC config + uint8_t ptrs_mcs1 = 2; // higher layer parameter in PTRS-UplinkConfig + uint8_t ptrs_mcs2 = 4; // higher layer parameter in PTRS-UplinkConfig + uint8_t ptrs_mcs3 = 10; // higher layer parameter in PTRS-UplinkConfig + uint16_t n_rb0 = 25; // higher layer parameter in PTRS-UplinkConfig + uint16_t n_rb1 = 75; // higher layer parameter in PTRS-UplinkConfig + pusch_pdu->pusch_ptrs.ptrs_time_density = get_L_ptrs(ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, pusch_pdu->mcs_index, pusch_pdu->mcs_table); + pusch_pdu->pusch_ptrs.ptrs_freq_density = get_K_ptrs(n_rb0, n_rb1, pusch_pdu->rb_size); + pusch_pdu->pusch_ptrs.ptrs_ports_list = (nfapi_nr_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ptrs_ports_t)); + pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0; + + pusch_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS; // enable PUSCH PTRS + } + else{ + pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS + } + + int8_t harq_id = select_ul_harq_pid(&UE_info->UE_sched_ctrl[UE_id]); + if (harq_id < 0) return; + NR_UE_ul_harq_t *cur_harq = &UE_info->UE_sched_ctrl[UE_id].ul_harq_processes[harq_id]; + pusch_pdu->pusch_data.harq_process_id = harq_id; + pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi; + pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; + + cur_harq->state = ACTIVE_SCHED; + cur_harq->last_tx_slot = sched_ctrl->sched_pusch->slot; + + uint8_t num_dmrs_symb = 0; + for(int i = pusch_pdu->start_symbol_index; i < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; i++) + num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1; + + uint8_t N_PRB_DMRS; + if (pusch_pdu->dmrs_config_type == 0) + N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*6; + else + N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*4; + + pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order, + pusch_pdu->target_code_rate, + pusch_pdu->rb_size, + pusch_pdu->nr_of_symbols, + N_PRB_DMRS * num_dmrs_symb, + 0, //nb_rb_oh + 0, + pusch_pdu->nrOfLayers)>>3; + + UE_info->mac_stats[UE_id].ulsch_rounds[cur_harq->round]++; + if (cur_harq->round == 0) + UE_info->mac_stats[UE_id].ulsch_total_bytes_scheduled += pusch_pdu->pusch_data.tb_size; + + pusch_pdu->pusch_data.num_cb = 0; //CBG not supported + + nfapi_nr_ul_dci_request_t *ul_dci_req = &RC.nrmac[module_id]->UL_dci_req[0]; + ul_dci_req->SFN = frame; + ul_dci_req->Slot = slot; + nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &ul_dci_req->ul_dci_pdu_list[ul_dci_req->numPdus]; + memset(ul_dci_request_pdu, 0, sizeof(nfapi_nr_ul_dci_request_pdus_t)); + ul_dci_request_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE; + ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; + ul_dci_req->numPdus += 1; + + LOG_D(MAC,"Configuring ULDCI/PDCCH in %d.%d\n", frame,slot); + + nr_configure_pdcch(RC.nrmac[0], + pdcch_pdu_rel15, + rnti, + sched_ctrl->search_space, + sched_ctrl->coreset, + scc, + sched_ctrl->active_bwp, + sched_ctrl->aggregation_level, + sched_ctrl->cce_index); + + dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET]; + memset(dci_pdu_rel15, 0, sizeof(dci_pdu_rel15)); + NR_CellGroupConfig_t *secondaryCellGroup = UE_info->secondaryCellGroup[UE_id]; + const int n_ubwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count; + config_uldci(sched_ctrl->active_ubwp, + pusch_pdu, + pdcch_pdu_rel15, + &dci_pdu_rel15[0], + dci_formats, + rnti_types, + tda, + UE_info->UE_sched_ctrl[UE_id].tpc0, + n_ubwp, + sched_ctrl->active_bwp->bwp_Id); + fill_dci_pdu_rel15(scc, + secondaryCellGroup, + pdcch_pdu_rel15, + dci_pdu_rel15, + dci_formats, + rnti_types, + pusch_pdu->bwp_size, + sched_ctrl->active_bwp->bwp_Id); + + sched_ctrl->sched_pusch->rbSize = 0; + } } From a232482b47e8550f4428a5c401d6ecc38ccf6fb2 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 18 Nov 2020 23:36:17 +0100 Subject: [PATCH 17/56] vrb_map_UL for every slot --- openair2/LAYER2/NR_MAC_gNB/config.c | 5 +++++ openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 6 +++++- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 5 +++-- 3 files changed, 13 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index 6843b0ad1f..34dbd498aa 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -342,6 +342,11 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, req->Slot = i; } + RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL = + calloc(n * 275, sizeof(uint16_t)); + AssertFatal(RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL, + "could not allocate memory for RC.nrmac[]->common_channels[0].vrb_map_UL\n"); + LOG_I(MAC,"Configuring common parameters from NR ServingCellConfig\n"); config_common(Mod_idP, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 7b92545c83..16a3400a78 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -415,7 +415,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, // clear vrb_maps memset(cc[CC_id].vrb_map, 0, sizeof(uint16_t) * 275); - memset(cc[CC_id].vrb_map_UL, 0, sizeof(uint16_t) * 275); + // clear last scheduled slot's content (only)! + const int num_slots = slots_per_frame[*scc->ssbSubcarrierSpacing]; + const int last_slot = (slot + num_slots - 1) % num_slots; + uint16_t *vrb_map_UL = cc[CC_id].vrb_map_UL; + memset(&vrb_map_UL[last_slot * 275], 0, sizeof(uint16_t) * 275); clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frame, slot); } diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index ee88b88152..a2106d9d31 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -192,8 +192,9 @@ typedef struct { NR_RA_t ra[NR_NB_RA_PROC_MAX]; /// VRB map for common channels uint16_t vrb_map[275]; - /// VRB map for common channels and retransmissions by PHICH - uint16_t vrb_map_UL[275]; + /// VRB map for common channels and PUSCH, dynamically allocated because + /// length depends on number of slots and RBs + uint16_t *vrb_map_UL; /// number of subframe allocation pattern available for MBSFN sync area uint8_t num_sf_allocation_pattern; ///Number of active SSBs From e300b072c02bb6d482b1080a8ee482a0f1f6bcfa Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 6 Nov 2020 10:58:55 +0100 Subject: [PATCH 18/56] Use vrb_map_UL for PUSCH --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index d6caa9956d..65d61f5d0f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -536,6 +536,12 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, sched_ctrl->sched_pusch->rbStart = 0; sched_ctrl->sched_pusch->rbSize = get_softmodem_params()->phy_test ? 50 : NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); + + uint16_t *vrb_map_UL = + &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * 275]; + /* mark the corresponding RBs as used */ + for (int rb = 0; rb < sched_ctrl->sched_pusch->rbSize; rb++) + vrb_map_UL[rb + sched_ctrl->sched_pusch->rbStart] = 1; } void nr_schedule_ulsch(module_id_t module_id, From b202ab7d3d5447a36a9b4e1254d4e8f34486ecae Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 6 Nov 2020 11:48:48 +0100 Subject: [PATCH 19/56] RA Msg3 allocation: check in vrb_map_UL, allocate in UL_tti_req_ahead --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 2 - openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 68 ++++++++++++------- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 6 +- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 2 - 4 files changed, 48 insertions(+), 30 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 16a3400a78..e5db188c6b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -447,8 +447,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, RC.nrmac[module_idP]->current_slot=slot; if (get_softmodem_params()->phy_test == 0) { nr_schedule_RA(module_idP, frame, slot); - nr_schedule_reception_msg3(module_idP, 0, frame, slot); - } // This schedules the DCI for Uplink and subsequently PUSCH diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 66dcfcff86..f48a3ec939 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -562,7 +562,9 @@ void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){ stop_meas(&mac->schedule_ra); } -void nr_get_Msg3alloc(NR_ServingCellConfigCommon_t *scc, +void nr_get_Msg3alloc(module_id_t module_id, + int CC_id, + NR_ServingCellConfigCommon_t *scc, NR_BWP_Uplink_t *ubwp, sub_frame_t current_slot, frame_t current_frame, @@ -596,27 +598,25 @@ void nr_get_Msg3alloc(NR_ServingCellConfigCommon_t *scc, ra->Msg3_frame = current_frame + (temp_slot/nr_slots_per_frame[mu]); LOG_I(MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u start symbol index %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id, StartSymbolIndex); - ra->msg3_nb_rb = 18; - ra->msg3_first_rb = 0; -} - - -void nr_schedule_reception_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP){ - gNB_MAC_INST *mac = RC.nrmac[module_idP]; - nfapi_nr_ul_tti_request_t *ul_req = &mac->UL_tti_req[0]; - NR_COMMON_channels_t *cc = &mac->common_channels[CC_id]; - NR_RA_t *ra = &cc->ra[0]; - - if (ra->state == WAIT_Msg3) { - if ((frameP == ra->Msg3_frame) && (slotP == ra->Msg3_slot) ){ - ul_req->SFN = ra->Msg3_frame; - ul_req->Slot = ra->Msg3_slot; - ul_req->pdus_list[ul_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; - ul_req->pdus_list[ul_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); - ul_req->pdus_list[ul_req->n_pdus].pusch_pdu = ra->pusch_pdu; - ul_req->n_pdus+=1; - } + uint16_t *vrb_map_UL = + &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[ra->Msg3_slot * 275]; + const uint16_t bwpSize = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, 275); + /* search 18 free RBs */ + int rbSize = 0; + int rbStart = 0; + while (rbSize < 18) { + rbStart += rbSize; /* last iteration rbSize was not enough, skip it */ + rbSize = 0; + while (rbStart < bwpSize && vrb_map_UL[rbStart]) + rbStart++; + AssertFatal(rbStart < bwpSize - 18, "no space to allocate Msg 3 for RA!\n"); + while (rbStart + rbSize < bwpSize + && !vrb_map_UL[rbStart + rbSize] + && rbSize < 18) + rbSize++; } + ra->msg3_nb_rb = 18; + ra->msg3_first_rb = rbStart; } void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP){ @@ -631,10 +631,32 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t return; } + uint16_t *vrb_map_UL = + &RC.nrmac[module_idP]->common_channels[CC_id].vrb_map_UL[ra->Msg3_slot * 275]; + for (int i = 0; i < ra->msg3_nb_rb; ++i) { + AssertFatal(!vrb_map_UL[i + ra->msg3_first_rb], + "RB %d in %4d.%2d is already taken, cannot allocate Msg3!\n", + i + ra->msg3_first_rb, + ra->Msg3_frame, + ra->Msg3_slot); + vrb_map_UL[i + ra->msg3_first_rb] = 1; + } + LOG_I(MAC, "[gNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA is active, Msg3 in (%d,%d)\n", module_idP, frameP, slotP, CC_id, ra->Msg3_frame, ra->Msg3_slot); - nfapi_nr_pusch_pdu_t *pusch_pdu = &ra->pusch_pdu; + nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_idP]->UL_tti_req_ahead[CC_id][ra->Msg3_slot]; + AssertFatal(future_ul_tti_req->SFN == ra->Msg3_frame + && future_ul_tti_req->Slot == ra->Msg3_slot, + "future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n", + future_ul_tti_req->SFN, + future_ul_tti_req->Slot, + ra->Msg3_frame, + ra->Msg3_slot); + future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; + future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); + nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu; memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t)); + future_ul_tti_req->n_pdus += 1; AssertFatal(ra->secondaryCellGroup, "no secondaryCellGroup for RNTI %04x\n", @@ -913,7 +935,7 @@ void nr_generate_Msg2(module_id_t module_idP, dl_req->nPDUs+=2; // Program UL processing for Msg3 - nr_get_Msg3alloc(scc, ubwp, slotP, frameP, ra); + nr_get_Msg3alloc(module_idP, CC_id, scc, ubwp, slotP, frameP, ra); LOG_I(MAC, "Frame %d, Subframe %d: Setting Msg3 reception for Frame %d Subframe %d\n", frameP, slotP, ra->Msg3_frame, ra->Msg3_slot); nr_add_msg3(module_idP, CC_id, frameP, slotP); ra->state = WAIT_Msg3; diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index a598c381ca..8406424f1d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -115,7 +115,9 @@ void nr_clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP); int nr_allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, sub_frame_t slotP, int test_only); -void nr_get_Msg3alloc(NR_ServingCellConfigCommon_t *scc, +void nr_get_Msg3alloc(module_id_t module_id, + int CC_id, + NR_ServingCellConfigCommon_t *scc, NR_BWP_Uplink_t *ubwp, sub_frame_t current_subframe, frame_t current_frame, @@ -356,8 +358,6 @@ void nr_generate_Msg2(module_id_t module_idP, frame_t frameP, sub_frame_t slotP); -void nr_schedule_reception_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP); - void nr_process_mac_pdu( module_id_t module_idP, rnti_t rnti, diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index a2106d9d31..bd9b661e36 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -142,8 +142,6 @@ typedef struct { uint8_t msg3_cqireq; /// Round of Msg3 HARQ uint8_t msg3_round; - /// Msg3 pusch pdu - nfapi_nr_pusch_pdu_t pusch_pdu; /// TBS used for Msg4 int msg4_TBsize; /// MCS used for Msg4 From 9ccc76474aa40ec953f858793b583644dd788834 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Sat, 7 Nov 2020 10:52:19 +0100 Subject: [PATCH 20/56] PUCCH scheduling: allocate in UL_tti_req_ahead --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 4 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 82 ++++++++++--------- 2 files changed, 47 insertions(+), 39 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index e5db188c6b..a8be48c451 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -457,8 +457,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, nr_schedule_ulsch(module_idP, frame, slot, num_slots_per_tdd, nr_ulmix_slots, ulsch_in_slot_bitmap); } - nr_schedule_pusch(module_idP, frame, slot); - if (UE_info->active[UE_id] && (is_xlsch_in_slot(dlsch_in_slot_bitmap, slot % num_slots_per_tdd)) && slot < 10) { @@ -471,6 +469,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, if (UE_info->active[UE_id]) nr_schedule_pucch(module_idP, UE_id, nr_ulmix_slots, frame, slot); + nr_schedule_pusch(module_idP, frame, slot); + stop_meas(&RC.nrmac[module_idP]->eNB_scheduler); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index 909a3ea540..d33298e8b5 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -39,51 +39,59 @@ void nr_schedule_pucch(int Mod_idP, int nr_ulmix_slots, frame_t frameP, sub_frame_t slotP) { - - uint16_t O_csi, O_ack, O_uci; - uint8_t O_sr = 0; // no SR in PUCCH implemented for now - NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon; NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info; AssertFatal(UE_info->active[UE_id],"Cannot find UE_id %d is not active\n",UE_id); - NR_CellGroupConfig_t *secondaryCellGroup = UE_info->secondaryCellGroup[UE_id]; - int bwp_id=1; - NR_BWP_Uplink_t *ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1]; - nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0]; - - NR_sched_pucch *curr_pucch; - for (int k=0; kUE_sched_ctrl[UE_id].sched_pucch[k][l]; - O_ack = curr_pucch->dai_c; - O_csi = curr_pucch->csi_bits; - O_uci = O_ack + O_csi + O_sr; - if ((O_uci>0) && (frameP == curr_pucch->frame) && (slotP == curr_pucch->ul_slot)) { - UL_tti_req->SFN = curr_pucch->frame; - UL_tti_req->Slot = curr_pucch->ul_slot; - UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE; - UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t); - nfapi_nr_pucch_pdu_t *pucch_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].pucch_pdu; - memset(pucch_pdu,0,sizeof(nfapi_nr_pucch_pdu_t)); - UL_tti_req->n_pdus+=1; + NR_sched_pucch *curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l]; + const uint16_t O_ack = curr_pucch->dai_c; + const uint16_t O_csi = curr_pucch->csi_bits; + const uint8_t O_sr = 0; // no SR in PUCCH implemented for now + if (O_ack + O_csi + O_sr == 0 + || frameP != curr_pucch->frame + || slotP != curr_pucch->ul_slot) + continue; - LOG_D(MAC,"Scheduling pucch reception for frame %d slot %d with (%d, %d, %d) (SR ACK, CSI) bits\n", - frameP,slotP,O_sr,O_ack,curr_pucch->csi_bits); + nfapi_nr_ul_tti_request_t *future_ul_tti_req = + &RC.nrmac[Mod_idP]->UL_tti_req_ahead[0][curr_pucch->ul_slot]; + AssertFatal(future_ul_tti_req->SFN == curr_pucch->frame + && future_ul_tti_req->Slot == curr_pucch->ul_slot, + "future UL_tti_req's frame.slot %d.%d does not match PUCCH %d.%d\n", + future_ul_tti_req->SFN, + future_ul_tti_req->Slot, + curr_pucch->frame, + curr_pucch->ul_slot); + future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE; + future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t); + nfapi_nr_pucch_pdu_t *pucch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pucch_pdu; + memset(pucch_pdu, 0, sizeof(nfapi_nr_pucch_pdu_t)); + future_ul_tti_req->n_pdus += 1; - nr_configure_pucch(pucch_pdu, - scc, - ubwp, - UE_info->rnti[UE_id], - curr_pucch->resource_indicator, - O_csi, - O_ack, - O_sr); + LOG_D(MAC, + "%4d.%2d Scheduling pucch reception in %4d.%2d: bits SR %d, ACK %d, CSI %d, k %d l %d\n", + frameP, + slotP, + curr_pucch->frame, + curr_pucch->ul_slot, + O_sr, + O_ack, + O_csi, + k, l); - memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l], - 0, - sizeof(NR_sched_pucch)); - } + NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon; + nr_configure_pucch(pucch_pdu, + scc, + UE_info->UE_sched_ctrl[UE_id].active_ubwp, + UE_info->rnti[UE_id], + curr_pucch->resource_indicator, + O_csi, + O_ack, + O_sr); + + memset(&UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l], + 0, + sizeof(NR_sched_pucch)); } } } From cfc6044a6e3726e9900bdb0ceb3b8aa761579209 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 9 Nov 2020 14:11:13 +0100 Subject: [PATCH 21/56] Use function pointer to call UL pre-processor --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 2 +- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 6 ++++++ openair2/LAYER2/NR_MAC_gNB/main.c | 2 ++ openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 7 +++++++ 4 files changed, 16 insertions(+), 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 65d61f5d0f..4f5cea387f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -550,7 +550,7 @@ void nr_schedule_ulsch(module_id_t module_id, int num_slots_per_tdd, int ul_slots, uint64_t ulsch_in_slot_bitmap) { - nr_simple_ulsch_preprocessor( + RC.nrmac[module_id]->pre_processor_ul( module_id, frame, slot, num_slots_per_tdd, ulsch_in_slot_bitmap); NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 8406424f1d..ad1d8ef19d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -96,6 +96,12 @@ void nr_schedule_ulsch(module_id_t module_id, int ul_slots, uint64_t ulsch_in_slot_bitmap); +void nr_simple_ulsch_preprocessor(module_id_t module_id, + frame_t frame, + sub_frame_t slot, + int num_slots_per_tdd, + uint64_t ulsch_in_slot_bitmap); + /////// Random Access MAC-PHY interface functions and primitives /////// void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP); diff --git a/openair2/LAYER2/NR_MAC_gNB/main.c b/openair2/LAYER2/NR_MAC_gNB/main.c index b7db1f67aa..f6dc986993 100644 --- a/openair2/LAYER2/NR_MAC_gNB/main.c +++ b/openair2/LAYER2/NR_MAC_gNB/main.c @@ -87,6 +87,8 @@ void mac_top_init_gNB(void) else RC.nrmac[i]->pre_processor_dl = nr_simple_dlsch_preprocessor; + RC.nrmac[i]->pre_processor_ul = nr_simple_ulsch_preprocessor; + }//END for (i = 0; i < RC.nb_nr_macrlc_inst; i++) AssertFatal(rlc_module_init(1) == 0,"Could not initialize RLC layer\n"); diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index bd9b661e36..7490a1e893 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -453,6 +453,11 @@ typedef void (*nr_pp_impl_dl)(module_id_t mod_id, frame_t frame, sub_frame_t slot, int num_slots_per_tdd); +typedef void (*nr_pp_impl_ul)(module_id_t mod_id, + frame_t frame, + sub_frame_t slot, + int num_slots_per_tdd, + uint64_t ulsch_in_slot_bitmap); /*! \brief top level eNB MAC structure */ typedef struct gNB_MAC_INST_s { @@ -522,6 +527,8 @@ typedef struct gNB_MAC_INST_s { /// DL preprocessor for differentiated scheduling nr_pp_impl_dl pre_processor_dl; + /// UL preprocessor for differentiated scheduling + nr_pp_impl_ul pre_processor_ul; } gNB_MAC_INST; #endif /*__LAYER2_NR_MAC_GNB_H__ */ From e6435cf7a2638bc2de30d0ea32e2260a4672a869 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 9 Nov 2020 14:43:13 +0100 Subject: [PATCH 22/56] Create separate phytest UL preprocessor --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 92 +++++++++++++++++++ .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 27 +++--- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 9 ++ openair2/LAYER2/NR_MAC_gNB/main.c | 9 +- 4 files changed, 119 insertions(+), 18 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 13505fd5f6..790a549f38 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -427,3 +427,95 @@ void config_uldci(NR_BWP_Uplink_t *ubwp, dci_pdu_rel15->rv); } + +void nr_ul_preprocessor_phytest(module_id_t module_id, + frame_t frame, + sub_frame_t slot, + int num_slots_per_tdd, + uint64_t ulsch_in_slot_bitmap) { + gNB_MAC_INST *nr_mac = RC.nrmac[module_id]; + NR_COMMON_channels_t *cc = nr_mac->common_channels; + NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; + const int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; + NR_UE_info_t *UE_info = &nr_mac->UE_info; + + AssertFatal(UE_info->num_UEs <= 1, + "%s() cannot handle more than one UE, but found %d\n", + __func__, + UE_info->num_UEs); + if (UE_info->num_UEs == 0) + return; + + const int UE_id = 0; + const int CC_id = 0; + + NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; + + const int tda = 1; + const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = + sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; + AssertFatal(tda < tdaList->list.count, + "time domain assignment %d >= %d\n", + tda, + tdaList->list.count); + int K2 = get_K2(sched_ctrl->active_ubwp, tda, mu); + const int sched_frame = frame + (slot + K2 >= num_slots_per_tdd); + const int sched_slot = (slot + K2) % num_slots_per_tdd; + /* check if slot is UL, and that slot is 8 (assuming K2=6 because of UE + * limitations). Note that if K2 or the TDD configuration is changed, below + * conditions might exclude each other and never be true */ + if (!(is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot) && sched_slot == 8)) + return; + + const uint16_t rbStart = 0; + const uint16_t rbSize = 50; /* due to OAI UE limitations */ + uint16_t *vrb_map_UL = + &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * 275]; + for (int i = rbStart; i < rbStart + rbSize; ++i) { + if (vrb_map_UL[i]) { + LOG_E(MAC, + "%s(): %4d.%2d RB %d is already reserved, cannot schedule UE\n", + __func__, + frame, + slot, + i); + return; + } + } + + sched_ctrl->sched_pusch->time_domain_allocation = tda; + sched_ctrl->sched_pusch->slot = sched_slot; + sched_ctrl->sched_pusch->frame = sched_frame; + + const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; + sched_ctrl->search_space = get_searchspace(sched_ctrl->active_bwp, target_ss); + uint8_t nr_of_candidates; + find_aggregation_candidates(&sched_ctrl->aggregation_level, + &nr_of_candidates, + sched_ctrl->search_space); + sched_ctrl->coreset = get_coreset( + sched_ctrl->active_bwp, sched_ctrl->search_space, 1 /* dedicated */); + const int cid = sched_ctrl->coreset->controlResourceSetId; + const uint16_t Y = UE_info->Y[UE_id][cid][slot]; + const int m = UE_info->num_pdcch_cand[UE_id][cid]; + sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], + sched_ctrl->active_bwp, + sched_ctrl->coreset, + sched_ctrl->aggregation_level, + Y, + m, + nr_of_candidates); + if (sched_ctrl->cce_index < 0) { + LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__); + return; + } + UE_info->num_pdcch_cand[UE_id][cid]++; + + sched_ctrl->sched_pusch->mcs = 9; + sched_ctrl->sched_pusch->rbStart = rbStart; + sched_ctrl->sched_pusch->rbSize = rbSize; + + /* mark the corresponding RBs as used */ + for (int rb = rbStart; rb < rbStart + rbSize; rb++) + vrb_map_UL[rb] = 1; +} diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 4f5cea387f..89dd4bed2e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -481,7 +481,6 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, const int UE_id = 0; const int CC_id = 0; - NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; const int tda = 1; @@ -494,16 +493,19 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, int K2 = get_K2(sched_ctrl->active_ubwp, tda, mu); const int sched_frame = frame + (slot + K2 >= num_slots_per_tdd); const int sched_slot = (slot + K2) % num_slots_per_tdd; - /* check if slot is UL, and for phy test verify that it is in first TDD - * period, slot 8 (for K2=6, this is at slot 2 in the gNB; because of UE - * limitations). Note that if K2 or the TDD configuration is changed, below - * conditions might exclude each other and never be true */ - const bool transmit = - is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot) - && (!get_softmodem_params()->phy_test || sched_slot == 8); - if (!transmit) + if (!is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot)) return; + /* get first, largest unallocated region */ + uint16_t *vrb_map_UL = + &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * 275]; + uint16_t rbStart = 0; + while (vrb_map_UL[rbStart]) rbStart++; + const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); + uint16_t rbSize = 1; + while (rbStart + rbSize < bwpSize && !vrb_map_UL[rbStart+rbSize]) + rbSize++; + sched_ctrl->sched_pusch->time_domain_allocation = tda; sched_ctrl->sched_pusch->slot = sched_slot; sched_ctrl->sched_pusch->frame = sched_frame; @@ -533,12 +535,9 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, UE_info->num_pdcch_cand[UE_id][cid]++; sched_ctrl->sched_pusch->mcs = 9; - sched_ctrl->sched_pusch->rbStart = 0; - sched_ctrl->sched_pusch->rbSize = get_softmodem_params()->phy_test ? - 50 : NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); + sched_ctrl->sched_pusch->rbStart = rbStart; + sched_ctrl->sched_pusch->rbSize = rbSize; - uint16_t *vrb_map_UL = - &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * 275]; /* mark the corresponding RBs as used */ for (int rb = 0; rb < sched_ctrl->sched_pusch->rbSize; rb++) vrb_map_UL[rb + sched_ctrl->sched_pusch->rbStart] = 1; diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index ad1d8ef19d..d07492360c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -152,6 +152,13 @@ void nr_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_t slot, int num_slots_per_tdd); +/* \brief UL preprocessor for phytest: schedules UE_id 0 with fixed MCS on a + * fixed set of resources */ +void nr_ul_preprocessor_phytest(module_id_t module_id, + frame_t frame, + sub_frame_t slot, + int num_slots_per_tdd, + uint64_t ulsch_in_slot_bitmap); void nr_schedule_css_dlsch_phytest(module_id_t module_idP, frame_t frameP, @@ -290,6 +297,8 @@ void find_aggregation_candidates(uint8_t *aggregation_level, uint8_t *nr_of_candidates, NR_SearchSpace_t *ss); +long get_K2(NR_BWP_Uplink_t *ubwp, int time_domain_assignment, int mu); + uint8_t nr_get_tpc(int target, uint8_t cqi, int incr); int get_spf(nfapi_nr_config_request_scf_t *cfg); diff --git a/openair2/LAYER2/NR_MAC_gNB/main.c b/openair2/LAYER2/NR_MAC_gNB/main.c index f6dc986993..e9c5af0187 100644 --- a/openair2/LAYER2/NR_MAC_gNB/main.c +++ b/openair2/LAYER2/NR_MAC_gNB/main.c @@ -82,12 +82,13 @@ void mac_top_init_gNB(void) RC.nrmac[i]->ul_handle = 0; - if (get_softmodem_params()->phy_test) + if (get_softmodem_params()->phy_test) { RC.nrmac[i]->pre_processor_dl = nr_preprocessor_phytest; - else + RC.nrmac[i]->pre_processor_ul = nr_ul_preprocessor_phytest; + } else { RC.nrmac[i]->pre_processor_dl = nr_simple_dlsch_preprocessor; - - RC.nrmac[i]->pre_processor_ul = nr_simple_ulsch_preprocessor; + RC.nrmac[i]->pre_processor_ul = nr_simple_ulsch_preprocessor; + } }//END for (i = 0; i < RC.nb_nr_macrlc_inst; i++) From c219edfed3089a5d8fed04548bfeef1df74c6e08 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 9 Nov 2020 15:05:28 +0100 Subject: [PATCH 23/56] Fix dlsim: Use UL_tti_req_ahead --- openair1/SIMULATION/NR_PHY/dlsim.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index 2bd70021f7..96a95cd53d 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -878,7 +878,7 @@ int main(int argc, char **argv) Sched_INFO.frame = frame; Sched_INFO.slot = slot; Sched_INFO.DL_req = &gNB_mac->DL_req[0]; - Sched_INFO.UL_tti_req = &gNB_mac->UL_tti_req[0]; + Sched_INFO.UL_tti_req = gNB_mac->UL_tti_req_ahead[slot]; Sched_INFO.UL_dci_req = NULL; Sched_INFO.TX_req = &gNB_mac->TX_req[0]; nr_schedule_response(&Sched_INFO); From 9ca626b37af84867cac3d2a81e4c5c0c28a24d5a Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 9 Nov 2020 15:10:43 +0100 Subject: [PATCH 24/56] Avoid copy from UL_tti_req_ahead into Ul_tti_req --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 45 ++----------------- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 10 +++-- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 2 - openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 5 ++- 4 files changed, 14 insertions(+), 48 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index a8be48c451..54db8c1c5a 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -96,7 +96,6 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, const int num_slots = slots_per_frame[*scc->ssbSubcarrierSpacing]; nfapi_nr_dl_tti_request_t *DL_req = &gNB->DL_req[0]; - nfapi_nr_ul_tti_request_t *UL_tti_req = &gNB->UL_tti_req[0]; nfapi_nr_ul_tti_request_t *future_ul_tti_req = &gNB->UL_tti_req_ahead[CC_idP][(slotP + num_slots - 1) % num_slots]; nfapi_nr_ul_dci_request_t *UL_dci_req = &gNB->UL_dci_req[0]; @@ -116,13 +115,6 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, UL_dci_req[CC_idP].Slot = slotP; UL_dci_req[CC_idP].numPdus = 0; - UL_tti_req[CC_idP].SFN = frameP; - UL_tti_req[CC_idP].Slot = slotP; - UL_tti_req[CC_idP].n_pdus = 0; - UL_tti_req[CC_idP].n_ulsch = 0; - UL_tti_req[CC_idP].n_ulcch = 0; - UL_tti_req[CC_idP].n_group = 0; - /* advance last round's future UL_tti_req to be ahead of current frame/slot */ future_ul_tti_req->SFN = (slotP == 0 ? frameP : frameP + 1) % 1024; /* future_ul_tti_req->Slot is fixed! */ @@ -131,6 +123,10 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, future_ul_tti_req->n_ulcch = 0; future_ul_tti_req->n_group = 0; + /* UL_tti_req is a simple pointer into the current UL_tti_req_ahead, i.e., + * it walks over UL_tti_req_ahead in a circular fashion */ + gNB->UL_tti_req = &gNB->UL_tti_req_ahead[CC_idP][slotP]; + TX_req[CC_idP].Number_of_PDUs = 0; } @@ -297,37 +293,6 @@ void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subfram */ -void nr_schedule_pusch(int mod_id, frame_t frame, sub_frame_t slot) { - nfapi_nr_ul_tti_request_t *ul_tti_req = &RC.nrmac[mod_id]->UL_tti_req[0]; - nfapi_nr_ul_tti_request_t *future_ul_tti_req = - &RC.nrmac[mod_id]->UL_tti_req_ahead[0][slot]; - - if (future_ul_tti_req->Slot == slot - && future_ul_tti_req->SFN == frame - && future_ul_tti_req->n_pdus > 0) { - LOG_D(MAC, "%4d.%2d copy %d PDUs from future_ul_tti_req\n", frame, slot, future_ul_tti_req->n_pdus); - /* the future_UL_tti_req_has data for the current frame/slot pair, copy - * everything into the "real" UL_tti_req */ - ul_tti_req->SFN = future_ul_tti_req->SFN; - ul_tti_req->Slot = future_ul_tti_req->Slot; - ul_tti_req->n_pdus = future_ul_tti_req->n_pdus; - ul_tti_req->rach_present = future_ul_tti_req->rach_present; - ul_tti_req->n_ulsch = future_ul_tti_req->n_ulsch; - ul_tti_req->n_ulcch = future_ul_tti_req->n_ulcch; - ul_tti_req->n_group = future_ul_tti_req->n_group; - memcpy(ul_tti_req->pdus_list, - future_ul_tti_req->pdus_list, - ul_tti_req->n_pdus * sizeof(nfapi_nr_ul_tti_request_number_of_pdus_t)); - memcpy(ul_tti_req->groups_list, - future_ul_tti_req->groups_list, - ul_tti_req->n_group * sizeof(nfapi_nr_ul_tti_request_number_of_groups_t)); - future_ul_tti_req->n_pdus = 0; - future_ul_tti_req->n_ulsch = 0; - future_ul_tti_req->n_ulcch = 0; - future_ul_tti_req->n_group = 0; - } -} - bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot) { return (bitmap >> slot) & 0x01; } @@ -469,8 +434,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, if (UE_info->active[UE_id]) nr_schedule_pucch(module_idP, UE_id, nr_ulmix_slots, frame, slot); - nr_schedule_pusch(module_idP, frame, slot); - stop_meas(&RC.nrmac[module_idP]->eNB_scheduler); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index f48a3ec939..76d8d0edd0 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -200,7 +200,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP gNB_MAC_INST *gNB = RC.nrmac[module_idP]; NR_COMMON_channels_t *cc = gNB->common_channels; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; - nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[module_idP]->UL_tti_req[0]; + nfapi_nr_ul_tti_request_t *UL_tti_req = RC.nrmac[module_idP]->UL_tti_req; nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[module_idP]->config[0]; if (is_nr_UL_slot(scc,slotP)) { @@ -247,8 +247,12 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP } - UL_tti_req->SFN = frameP; - UL_tti_req->Slot = slotP; + AssertFatal(UL_tti_req->SFN == frameP && UL_tti_req->Slot == slotP, + "%d.%d UL_tti_req frame.slot %d.%d does not match PRACH %d.%d\n", + frameP, slotP, + UL_tti_req->SFN, + UL_tti_req->Slot, + frameP, slotP); for (int fdm_index=0; fdm_index < fdm; fdm_index++) { // one structure per frequency domain occasion for (int td_index=0; td_index Date: Mon, 9 Nov 2020 19:06:34 +0100 Subject: [PATCH 25/56] Fix filling of DCI 0_0 in config_uldci() --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 790a549f38..7cdead1162 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -368,13 +368,13 @@ void config_uldci(NR_BWP_Uplink_t *ubwp, dci_pdu_rel15->time_domain_assignment.val = time_domain_assignment; dci_pdu_rel15->frequency_hopping_flag.val = pusch_pdu->frequency_hopping; - dci_pdu_rel15->mcs = 9; + dci_pdu_rel15->mcs = pusch_pdu->mcs_index; dci_pdu_rel15->format_indicator = 0; - dci_pdu_rel15->ndi = 1; - dci_pdu_rel15->rv = 0; - dci_pdu_rel15->harq_pid = 0; - dci_pdu_rel15->tpc = 1; + dci_pdu_rel15->ndi = pusch_pdu->pusch_data.new_data_indicator; + dci_pdu_rel15->rv = pusch_pdu->pusch_data.rv_index; + dci_pdu_rel15->harq_pid = pusch_pdu->pusch_data.harq_process_id; + dci_pdu_rel15->tpc = tpc; break; case NR_UL_DCI_FORMAT_0_1: dci_pdu_rel15->ndi = pusch_pdu->pusch_data.new_data_indicator; From a6a7c7a328e0f35e8b2ab2fe848d0664b3aa4906 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 9 Nov 2020 19:12:15 +0100 Subject: [PATCH 26/56] Move config_uldci() to primitives --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 76 ------------------- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 75 ++++++++++++++++++ 2 files changed, 75 insertions(+), 76 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 7cdead1162..60716c6738 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -352,82 +352,6 @@ void nr_preprocessor_phytest(module_id_t module_id, vrb_map[rb + sched_ctrl->rbStart] = 1; } -void config_uldci(NR_BWP_Uplink_t *ubwp, - nfapi_nr_pusch_pdu_t *pusch_pdu, - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, - dci_pdu_rel15_t *dci_pdu_rel15, - int *dci_formats, int *rnti_types, - int time_domain_assignment, uint8_t tpc, - int n_ubwp, int bwp_id) { - - switch(dci_formats[(pdcch_pdu_rel15->numDlDci)-1]) { - case NR_UL_DCI_FORMAT_0_0: - dci_pdu_rel15->frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pusch_pdu->rb_size, - pusch_pdu->rb_start, - NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275)); - - dci_pdu_rel15->time_domain_assignment.val = time_domain_assignment; - dci_pdu_rel15->frequency_hopping_flag.val = pusch_pdu->frequency_hopping; - dci_pdu_rel15->mcs = pusch_pdu->mcs_index; - - dci_pdu_rel15->format_indicator = 0; - dci_pdu_rel15->ndi = pusch_pdu->pusch_data.new_data_indicator; - dci_pdu_rel15->rv = pusch_pdu->pusch_data.rv_index; - dci_pdu_rel15->harq_pid = pusch_pdu->pusch_data.harq_process_id; - dci_pdu_rel15->tpc = tpc; - break; - case NR_UL_DCI_FORMAT_0_1: - dci_pdu_rel15->ndi = pusch_pdu->pusch_data.new_data_indicator; - dci_pdu_rel15->rv = pusch_pdu->pusch_data.rv_index; - dci_pdu_rel15->harq_pid = pusch_pdu->pusch_data.harq_process_id; - dci_pdu_rel15->frequency_hopping_flag.val = pusch_pdu->frequency_hopping; - dci_pdu_rel15->dai[0].val = 0; //TODO - // bwp indicator - if (n_ubwp < 4) - dci_pdu_rel15->bwp_indicator.val = bwp_id; - else - dci_pdu_rel15->bwp_indicator.val = bwp_id - 1; // as per table 7.3.1.1.2-1 in 38.212 - // frequency domain assignment - if (ubwp->bwp_Dedicated->pusch_Config->choice.setup->resourceAllocation==NR_PUSCH_Config__resourceAllocation_resourceAllocationType1) - dci_pdu_rel15->frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pusch_pdu->rb_size, - pusch_pdu->rb_start, - NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275)); - else - AssertFatal(1==0,"Only frequency resource allocation type 1 is currently supported\n"); - // time domain assignment - dci_pdu_rel15->time_domain_assignment.val = time_domain_assignment; - // mcs - dci_pdu_rel15->mcs = pusch_pdu->mcs_index; - // tpc command for pusch - dci_pdu_rel15->tpc = tpc; - // SRS resource indicator - if (ubwp->bwp_Dedicated->pusch_Config->choice.setup->txConfig != NULL) { - if (*ubwp->bwp_Dedicated->pusch_Config->choice.setup->txConfig == NR_PUSCH_Config__txConfig_codebook) - dci_pdu_rel15->srs_resource_indicator.val = 0; // taking resource 0 for SRS - else - AssertFatal(1==0,"Non Codebook configuration non supported\n"); - } - // Antenna Ports - dci_pdu_rel15->antenna_ports.val = 0; // TODO for now it is hardcoded, it should depends on cdm group no data and rank - // DMRS sequence initialization - dci_pdu_rel15->dmrs_sequence_initialization.val = pusch_pdu->scid; - break; - default : - AssertFatal(1==0,"Valid UL formats are 0_0 and 0_1 \n"); - } - - LOG_D(MAC, "[gNB scheduler phytest] ULDCI type 0 payload: PDCCH CCEIndex %d, freq_alloc %d, time_alloc %d, freq_hop_flag %d, mcs %d tpc %d ndi %d rv %d\n", - pdcch_pdu_rel15->dci_pdu.CceIndex[pdcch_pdu_rel15->numDlDci], - dci_pdu_rel15->frequency_domain_assignment.val, - dci_pdu_rel15->time_domain_assignment.val, - dci_pdu_rel15->frequency_hopping_flag.val, - dci_pdu_rel15->mcs, - dci_pdu_rel15->tpc, - dci_pdu_rel15->ndi, - dci_pdu_rel15->rv); - -} - void nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_t slot, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index d7eff792bc..695e185836 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -637,6 +637,81 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP, dl_req->nPDUs += 2; } +void config_uldci(NR_BWP_Uplink_t *ubwp, + nfapi_nr_pusch_pdu_t *pusch_pdu, + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, + dci_pdu_rel15_t *dci_pdu_rel15, + int *dci_formats, int *rnti_types, + int time_domain_assignment, uint8_t tpc, + int n_ubwp, int bwp_id) { + const int bw = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, 275); + switch (dci_formats[(pdcch_pdu_rel15->numDlDci) - 1]) { + case NR_UL_DCI_FORMAT_0_0: + dci_pdu_rel15->frequency_domain_assignment.val = + PRBalloc_to_locationandbandwidth0(pusch_pdu->rb_size, pusch_pdu->rb_start, bw); + + dci_pdu_rel15->time_domain_assignment.val = time_domain_assignment; + dci_pdu_rel15->frequency_hopping_flag.val = pusch_pdu->frequency_hopping; + dci_pdu_rel15->mcs = pusch_pdu->mcs_index; + + dci_pdu_rel15->format_indicator = 0; + dci_pdu_rel15->ndi = pusch_pdu->pusch_data.new_data_indicator; + dci_pdu_rel15->rv = pusch_pdu->pusch_data.rv_index; + dci_pdu_rel15->harq_pid = pusch_pdu->pusch_data.harq_process_id; + dci_pdu_rel15->tpc = tpc; + break; + case NR_UL_DCI_FORMAT_0_1: + dci_pdu_rel15->ndi = pusch_pdu->pusch_data.new_data_indicator; + dci_pdu_rel15->rv = pusch_pdu->pusch_data.rv_index; + dci_pdu_rel15->harq_pid = pusch_pdu->pusch_data.harq_process_id; + dci_pdu_rel15->frequency_hopping_flag.val = pusch_pdu->frequency_hopping; + dci_pdu_rel15->dai[0].val = 0; //TODO + // bwp indicator + if (n_ubwp < 4) + dci_pdu_rel15->bwp_indicator.val = bwp_id; + else + dci_pdu_rel15->bwp_indicator.val = bwp_id - 1; // as per table 7.3.1.1.2-1 in 38.212 + // frequency domain assignment + AssertFatal(ubwp->bwp_Dedicated->pusch_Config->choice.setup->resourceAllocation + == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, + "Only frequency resource allocation type 1 is currently supported\n"); + dci_pdu_rel15->frequency_domain_assignment.val = + PRBalloc_to_locationandbandwidth0(pusch_pdu->rb_size, pusch_pdu->rb_start, bw); + // time domain assignment + dci_pdu_rel15->time_domain_assignment.val = time_domain_assignment; + // mcs + dci_pdu_rel15->mcs = pusch_pdu->mcs_index; + // tpc command for pusch + dci_pdu_rel15->tpc = tpc; + // SRS resource indicator + if (ubwp->bwp_Dedicated->pusch_Config->choice.setup->txConfig != NULL) { + AssertFatal(*ubwp->bwp_Dedicated->pusch_Config->choice.setup->txConfig == NR_PUSCH_Config__txConfig_codebook, + "Non Codebook configuration non supported\n"); + dci_pdu_rel15->srs_resource_indicator.val = 0; // taking resource 0 for SRS + } + // Antenna Ports + dci_pdu_rel15->antenna_ports.val = 0; // TODO for now it is hardcoded, it should depends on cdm group no data and rank + // DMRS sequence initialization + dci_pdu_rel15->dmrs_sequence_initialization.val = pusch_pdu->scid; + break; + default : + AssertFatal(0, "Valid UL formats are 0_0 and 0_1\n"); + } + + LOG_D(MAC, + "%s() ULDCI type 0 payload: PDCCH CCEIndex %d, freq_alloc %d, " + "time_alloc %d, freq_hop_flag %d, mcs %d tpc %d ndi %d rv %d\n", + __func__, + pdcch_pdu_rel15->dci_pdu.CceIndex[pdcch_pdu_rel15->numDlDci], + dci_pdu_rel15->frequency_domain_assignment.val, + dci_pdu_rel15->time_domain_assignment.val, + dci_pdu_rel15->frequency_hopping_flag.val, + dci_pdu_rel15->mcs, + dci_pdu_rel15->tpc, + dci_pdu_rel15->ndi, + dci_pdu_rel15->rv); +} + void nr_configure_pdcch(gNB_MAC_INST *nr_mac, nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, uint16_t rnti, From 0affd907b51caa582329f1397d33f87cf9b38eb6 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 18 Nov 2020 23:57:28 +0100 Subject: [PATCH 27/56] No dynamically alloced PUSCH, remove internal PDU --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 12 +++--- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 2 - .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 40 +++++++++---------- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 4 +- 4 files changed, 27 insertions(+), 31 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 60716c6738..2e00d3a58c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -407,9 +407,9 @@ void nr_ul_preprocessor_phytest(module_id_t module_id, } } - sched_ctrl->sched_pusch->time_domain_allocation = tda; - sched_ctrl->sched_pusch->slot = sched_slot; - sched_ctrl->sched_pusch->frame = sched_frame; + sched_ctrl->sched_pusch.time_domain_allocation = tda; + sched_ctrl->sched_pusch.slot = sched_slot; + sched_ctrl->sched_pusch.frame = sched_frame; const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; sched_ctrl->search_space = get_searchspace(sched_ctrl->active_bwp, target_ss); @@ -435,9 +435,9 @@ void nr_ul_preprocessor_phytest(module_id_t module_id, } UE_info->num_pdcch_cand[UE_id][cid]++; - sched_ctrl->sched_pusch->mcs = 9; - sched_ctrl->sched_pusch->rbStart = rbStart; - sched_ctrl->sched_pusch->rbSize = rbSize; + sched_ctrl->sched_pusch.mcs = 9; + sched_ctrl->sched_pusch.rbStart = rbStart; + sched_ctrl->sched_pusch.rbSize = rbSize; /* mark the corresponding RBs as used */ for (int rb = rbStart; rb < rbStart + rbSize; rb++) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 695e185836..02285704a8 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -1799,7 +1799,6 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){ UE_info->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch **)malloc(num_slots_ul*sizeof(NR_sched_pucch *)); for (int s=0; sUE_sched_ctrl[UE_id].sched_pucch[s] = (NR_sched_pucch *)malloc(2*sizeof(NR_sched_pucch)); - UE_info->UE_sched_ctrl[UE_id].sched_pusch = calloc(num_slots_ul, sizeof(NR_sched_pusch_t)); for (int k=0; krnti[UE_id] = 0; remove_nr_ue_list(&UE_info->list, UE_id); free(UE_info->UE_sched_ctrl[UE_id].sched_pucch); - free(UE_info->UE_sched_ctrl[UE_id].sched_pusch); memset((void *) &UE_info->UE_sched_ctrl[UE_id], 0, sizeof(NR_UE_sched_ctrl_t)); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 89dd4bed2e..588835bff5 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -506,9 +506,9 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, while (rbStart + rbSize < bwpSize && !vrb_map_UL[rbStart+rbSize]) rbSize++; - sched_ctrl->sched_pusch->time_domain_allocation = tda; - sched_ctrl->sched_pusch->slot = sched_slot; - sched_ctrl->sched_pusch->frame = sched_frame; + sched_ctrl->sched_pusch.time_domain_allocation = tda; + sched_ctrl->sched_pusch.slot = sched_slot; + sched_ctrl->sched_pusch.frame = sched_frame; const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; sched_ctrl->search_space = get_searchspace(sched_ctrl->active_bwp, target_ss); @@ -534,13 +534,13 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, } UE_info->num_pdcch_cand[UE_id][cid]++; - sched_ctrl->sched_pusch->mcs = 9; - sched_ctrl->sched_pusch->rbStart = rbStart; - sched_ctrl->sched_pusch->rbSize = rbSize; + sched_ctrl->sched_pusch.mcs = 9; + sched_ctrl->sched_pusch.rbStart = rbStart; + sched_ctrl->sched_pusch.rbSize = rbSize; /* mark the corresponding RBs as used */ - for (int rb = 0; rb < sched_ctrl->sched_pusch->rbSize; rb++) - vrb_map_UL[rb + sched_ctrl->sched_pusch->rbStart] = 1; + for (int rb = 0; rb < sched_ctrl->sched_pusch.rbSize; rb++) + vrb_map_UL[rb + sched_ctrl->sched_pusch.rbStart] = 1; } void nr_schedule_ulsch(module_id_t module_id, @@ -556,21 +556,21 @@ void nr_schedule_ulsch(module_id_t module_id, const NR_UE_list_t *UE_list = &UE_info->list; for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) { NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; - if (sched_ctrl->sched_pusch->rbSize <= 0) + if (sched_ctrl->sched_pusch.rbSize <= 0) continue; uint16_t rnti = UE_info->rnti[UE_id]; /* PUSCH in a later slot, but corresponding DCI now! */ - nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_ctrl->sched_pusch->slot]; - AssertFatal(future_ul_tti_req->SFN == sched_ctrl->sched_pusch->frame - && future_ul_tti_req->Slot == sched_ctrl->sched_pusch->slot, + nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_ctrl->sched_pusch.slot]; + AssertFatal(future_ul_tti_req->SFN == sched_ctrl->sched_pusch.frame + && future_ul_tti_req->Slot == sched_ctrl->sched_pusch.slot, "%d.%d future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n", frame, slot, future_ul_tti_req->SFN, future_ul_tti_req->Slot, - sched_ctrl->sched_pusch->frame, - sched_ctrl->sched_pusch->slot); + sched_ctrl->sched_pusch.frame, + sched_ctrl->sched_pusch.slot); future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu; @@ -587,7 +587,7 @@ void nr_schedule_ulsch(module_id_t module_id, int rnti_types[2] = { NR_RNTI_C, 0 }; //Resource Allocation in time domain - const int tda = sched_ctrl->sched_pusch->time_domain_allocation; + const int tda = sched_ctrl->sched_pusch.time_domain_allocation; const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; @@ -617,7 +617,7 @@ void nr_schedule_ulsch(module_id_t module_id, else pusch_pdu->data_scrambling_id = *scc->physCellId; - pusch_pdu->mcs_index = sched_ctrl->sched_pusch->mcs; + pusch_pdu->mcs_index = sched_ctrl->sched_pusch.mcs; const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; if (pusch_pdu->transform_precoding) pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, @@ -650,8 +650,8 @@ void nr_schedule_ulsch(module_id_t module_id, AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, "Only frequency resource allocation type 1 is currently supported\n"); pusch_pdu->resource_alloc = 1; //type 1 - pusch_pdu->rb_start = sched_ctrl->sched_pusch->rbStart; - pusch_pdu->rb_size = sched_ctrl->sched_pusch->rbSize; + pusch_pdu->rb_start = sched_ctrl->sched_pusch.rbStart; + pusch_pdu->rb_size = sched_ctrl->sched_pusch.rbSize; pusch_pdu->vrb_to_prb_mapping = 0; if (pusch_Config->frequencyHopping==NULL) @@ -741,7 +741,7 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; cur_harq->state = ACTIVE_SCHED; - cur_harq->last_tx_slot = sched_ctrl->sched_pusch->slot; + cur_harq->last_tx_slot = sched_ctrl->sched_pusch.slot; uint8_t num_dmrs_symb = 0; for(int i = pusch_pdu->start_symbol_index; i < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; i++) @@ -813,6 +813,6 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->bwp_size, sched_ctrl->active_bwp->bwp_Id); - sched_ctrl->sched_pusch->rbSize = 0; + memset(&sched_ctrl->sched_pusch, 0, sizeof(sched_ctrl->sched_pusch)); } } diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 02c814743b..b278309ab8 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -287,8 +287,6 @@ typedef struct NR_sched_pucch { typedef struct NR_sched_pusch { int frame; int slot; - bool active; - nfapi_nr_pusch_pdu_t pusch_pdu; /// RB allocation within active uBWP uint16_t rbSize; @@ -364,7 +362,7 @@ typedef struct { /// selected PUCCH index, if scheduled int pucch_sched_idx; int pucch_occ_idx; - NR_sched_pusch_t *sched_pusch; + NR_sched_pusch_t sched_pusch; /// CCE index and aggregation, should be coherent with cce_list NR_SearchSpace_t *search_space; From 6df6cb9c9cbb2545cdfc70dbbcfe7f4928e15833 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 12 Nov 2020 14:53:39 +0100 Subject: [PATCH 28/56] UL_tti_req as pointer over multiple CCs --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 2 +- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 2 +- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 2 +- openair2/NR_PHY_INTERFACE/NR_IF_Module.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 54db8c1c5a..a7b8f4c017 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -125,7 +125,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, /* UL_tti_req is a simple pointer into the current UL_tti_req_ahead, i.e., * it walks over UL_tti_req_ahead in a circular fashion */ - gNB->UL_tti_req = &gNB->UL_tti_req_ahead[CC_idP][slotP]; + gNB->UL_tti_req[CC_idP] = &gNB->UL_tti_req_ahead[CC_idP][slotP]; TX_req[CC_idP].Number_of_PDUs = 0; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 76d8d0edd0..8ec4b6d8d7 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -200,7 +200,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP gNB_MAC_INST *gNB = RC.nrmac[module_idP]; NR_COMMON_channels_t *cc = gNB->common_channels; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; - nfapi_nr_ul_tti_request_t *UL_tti_req = RC.nrmac[module_idP]->UL_tti_req; + nfapi_nr_ul_tti_request_t *UL_tti_req = RC.nrmac[module_idP]->UL_tti_req[0]; nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[module_idP]->config[0]; if (is_nr_UL_slot(scc,slotP)) { diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index b278309ab8..fa43cd649b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -484,7 +484,7 @@ typedef struct gNB_MAC_INST_s { nfapi_nr_dl_tti_request_t DL_req[NFAPI_CC_MAX]; /// NFAPI UL TTI Request Structure, simple pointer into structure /// UL_tti_req_ahead for current frame/slot - nfapi_nr_ul_tti_request_t *UL_tti_req; + nfapi_nr_ul_tti_request_t *UL_tti_req[NFAPI_CC_MAX]; /// NFAPI UL TTI Request Structure for future TTIs, dynamically allocated /// because length depends on number of slots nfapi_nr_ul_tti_request_t *UL_tti_req_ahead[NFAPI_CC_MAX]; diff --git a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c index 788db592bc..f679c5418b 100644 --- a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c @@ -244,7 +244,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) { sched_info->DL_req = &mac->DL_req[CC_id]; sched_info->UL_dci_req = &mac->UL_dci_req[CC_id]; - sched_info->UL_tti_req = &mac->UL_tti_req[CC_id]; + sched_info->UL_tti_req = mac->UL_tti_req[CC_id]; sched_info->TX_req = &mac->TX_req[CC_id]; #ifdef DUMP_FAPI From 2958689fa45a8ea300f13c79a2b121612efe5b7b Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 13 Nov 2020 17:44:16 +0100 Subject: [PATCH 29/56] config_uldci(): no rnti_types --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c | 2 +- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 1 - openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 2 +- 3 files changed, 2 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 02285704a8..7186ff2333 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -641,7 +641,7 @@ void config_uldci(NR_BWP_Uplink_t *ubwp, nfapi_nr_pusch_pdu_t *pusch_pdu, nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15, - int *dci_formats, int *rnti_types, + int *dci_formats, int time_domain_assignment, uint8_t tpc, int n_ubwp, int bwp_id) { const int bw = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, 275); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 588835bff5..f806303f1c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -799,7 +799,6 @@ void nr_schedule_ulsch(module_id_t module_id, pdcch_pdu_rel15, &dci_pdu_rel15[0], dci_formats, - rnti_types, tda, UE_info->UE_sched_ctrl[UE_id].tpc0, n_ubwp, diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index a560ed27bc..43c6d7c8f2 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -189,7 +189,7 @@ void config_uldci(NR_BWP_Uplink_t *ubwp, nfapi_nr_pusch_pdu_t *pusch_pdu, nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15, - int *dci_formats, int *rnti_types, + int *dci_formats, int time_domain_assignment, uint8_t tpc, int n_ubwp, int bwp_id); From 2599c68fa8214d5915ef8bed39d312df293a33bf Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 23 Nov 2020 17:32:32 +0100 Subject: [PATCH 30/56] Isolate transform_precoding in ULSCH --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index f806303f1c..c20cbac9a8 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -552,6 +552,7 @@ void nr_schedule_ulsch(module_id_t module_id, RC.nrmac[module_id]->pre_processor_ul( module_id, frame, slot, num_slots_per_tdd, ulsch_in_slot_bitmap); + NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon; NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; const NR_UE_list_t *UE_list = &UE_info->list; for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) { @@ -561,6 +562,13 @@ void nr_schedule_ulsch(module_id_t module_id, uint16_t rnti = UE_info->rnti[UE_id]; + NR_PUSCH_Config_t *pusch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pusch_Config->choice.setup; + uint8_t transform_precoding = 0; + if (!pusch_Config->transformPrecoder) + transform_precoding = !scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder; + else + transform_precoding = *pusch_Config->transformPrecoder; + /* PUSCH in a later slot, but corresponding DCI now! */ nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_ctrl->sched_pusch.slot]; AssertFatal(future_ul_tti_req->SFN == sched_ctrl->sched_pusch.frame @@ -593,6 +601,7 @@ void nr_schedule_ulsch(module_id_t module_id, const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; int StartSymbolIndex, NrOfSymbols; SLIV2SL(startSymbolAndLength,&StartSymbolIndex,&NrOfSymbols); + pusch_pdu->start_symbol_index = StartSymbolIndex; pusch_pdu->nr_of_symbols = NrOfSymbols; @@ -605,18 +614,12 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->subcarrier_spacing = sched_ctrl->active_ubwp->bwp_Common->genericParameters.subcarrierSpacing; pusch_pdu->cyclic_prefix = 0; - NR_PUSCH_Config_t *pusch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pusch_Config->choice.setup; - NR_ServingCellConfigCommon_t *scc = RC.nrmac[0]->common_channels->ServingCellConfigCommon; - if (!pusch_Config->transformPrecoder) - pusch_pdu->transform_precoding = !scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder; - else - pusch_pdu->transform_precoding = *pusch_Config->transformPrecoder; - if (pusch_Config->dataScramblingIdentityPUSCH) pusch_pdu->data_scrambling_id = *pusch_Config->dataScramblingIdentityPUSCH; else pusch_pdu->data_scrambling_id = *scc->physCellId; + pusch_pdu->transform_precoding = transform_precoding; pusch_pdu->mcs_index = sched_ctrl->sched_pusch.mcs; const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; if (pusch_pdu->transform_precoding) From b20954f6c00fc2cbbda692577f48f8d18576b653 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 19 Nov 2020 16:45:01 +0100 Subject: [PATCH 31/56] Isolate TDA in ULSCH --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 27 +++++++++---------- 1 file changed, 12 insertions(+), 15 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index c20cbac9a8..3c0f45c7a1 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -562,6 +562,18 @@ void nr_schedule_ulsch(module_id_t module_id, uint16_t rnti = UE_info->rnti[UE_id]; + const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats; + int dci_formats[2] = { f ? NR_UL_DCI_FORMAT_0_1 : NR_UL_DCI_FORMAT_0_0 , 0 }; + int rnti_types[2] = { NR_RNTI_C, 0 }; + + //Resource Allocation in time domain + const int tda = sched_ctrl->sched_pusch.time_domain_allocation; + const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = + sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; + const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; + int StartSymbolIndex, NrOfSymbols; + SLIV2SL(startSymbolAndLength,&StartSymbolIndex,&NrOfSymbols); + NR_PUSCH_Config_t *pusch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pusch_Config->choice.setup; uint8_t transform_precoding = 0; if (!pusch_Config->transformPrecoder) @@ -587,21 +599,6 @@ void nr_schedule_ulsch(module_id_t module_id, LOG_D(MAC, "%4d.%2d Scheduling UE specific PUSCH\n", frame, slot); - int dci_formats[2]; - if (sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats) - dci_formats[0] = NR_UL_DCI_FORMAT_0_1; - else - dci_formats[0] = NR_UL_DCI_FORMAT_0_0; - int rnti_types[2] = { NR_RNTI_C, 0 }; - - //Resource Allocation in time domain - const int tda = sched_ctrl->sched_pusch.time_domain_allocation; - const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = - sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; - const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; - int StartSymbolIndex, NrOfSymbols; - SLIV2SL(startSymbolAndLength,&StartSymbolIndex,&NrOfSymbols); - pusch_pdu->start_symbol_index = StartSymbolIndex; pusch_pdu->nr_of_symbols = NrOfSymbols; From a200beb5853f54f97871e8b099762f37d93abf21 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 19 Nov 2020 16:45:07 +0100 Subject: [PATCH 32/56] Isolate HARQ in ULSCH --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 3c0f45c7a1..280e398cb9 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -562,6 +562,12 @@ void nr_schedule_ulsch(module_id_t module_id, uint16_t rnti = UE_info->rnti[UE_id]; + int8_t harq_id = select_ul_harq_pid(sched_ctrl); + if (harq_id < 0) return; + NR_UE_ul_harq_t *cur_harq = &sched_ctrl->ul_harq_processes[harq_id]; + cur_harq->state = ACTIVE_SCHED; + cur_harq->last_tx_slot = sched_ctrl->sched_pusch.slot; + const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats; int dci_formats[2] = { f ? NR_UL_DCI_FORMAT_0_1 : NR_UL_DCI_FORMAT_0_0 , 0 }; int rnti_types[2] = { NR_RNTI_C, 0 }; @@ -733,16 +739,10 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS } - int8_t harq_id = select_ul_harq_pid(&UE_info->UE_sched_ctrl[UE_id]); - if (harq_id < 0) return; - NR_UE_ul_harq_t *cur_harq = &UE_info->UE_sched_ctrl[UE_id].ul_harq_processes[harq_id]; pusch_pdu->pusch_data.harq_process_id = harq_id; pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi; pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; - cur_harq->state = ACTIVE_SCHED; - cur_harq->last_tx_slot = sched_ctrl->sched_pusch.slot; - uint8_t num_dmrs_symb = 0; for(int i = pusch_pdu->start_symbol_index; i < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; i++) num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1; From f1a6a7e7a5e3910370025ec337a08c99e874c9ab Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 23 Nov 2020 17:34:14 +0100 Subject: [PATCH 33/56] Isolate mcs_table in ULSCH --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 33 ++++++++++--------- 1 file changed, 17 insertions(+), 16 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 280e398cb9..dea463df19 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -586,6 +586,22 @@ void nr_schedule_ulsch(module_id_t module_id, transform_precoding = !scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder; else transform_precoding = *pusch_Config->transformPrecoder; + const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; + uint8_t mcs_table = 0; + if (transform_precoding) + mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, + 0, + dci_formats[0], + NR_RNTI_C, + target_ss, + false); + else + mcs_table = get_pusch_mcs_table(pusch_Config->mcs_TableTransformPrecoder, + 1, + dci_formats[0], + NR_RNTI_C, + target_ss, + false); /* PUSCH in a later slot, but corresponding DCI now! */ nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_ctrl->sched_pusch.slot]; @@ -624,22 +640,7 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->transform_precoding = transform_precoding; pusch_pdu->mcs_index = sched_ctrl->sched_pusch.mcs; - const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; - if (pusch_pdu->transform_precoding) - pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, - 0, - dci_formats[0], - rnti_types[0], - target_ss, - false); - else - pusch_pdu->mcs_table = - get_pusch_mcs_table(pusch_Config->mcs_TableTransformPrecoder, - 1, - dci_formats[0], - rnti_types[0], - target_ss, - false); + pusch_pdu->mcs_table = mcs_table; pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); From a5cb42e7734ae875943367e6aeb9ec6fbddb62f7 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 16 Nov 2020 11:24:23 +0100 Subject: [PATCH 34/56] Use variable sched_pusch --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 25 ++++++++++--------- 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index dea463df19..769cca522a 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -557,7 +557,8 @@ void nr_schedule_ulsch(module_id_t module_id, const NR_UE_list_t *UE_list = &UE_info->list; for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) { NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; - if (sched_ctrl->sched_pusch.rbSize <= 0) + NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; + if (sched_pusch->rbSize <= 0) continue; uint16_t rnti = UE_info->rnti[UE_id]; @@ -566,14 +567,14 @@ void nr_schedule_ulsch(module_id_t module_id, if (harq_id < 0) return; NR_UE_ul_harq_t *cur_harq = &sched_ctrl->ul_harq_processes[harq_id]; cur_harq->state = ACTIVE_SCHED; - cur_harq->last_tx_slot = sched_ctrl->sched_pusch.slot; + cur_harq->last_tx_slot = sched_pusch->slot; const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats; int dci_formats[2] = { f ? NR_UL_DCI_FORMAT_0_1 : NR_UL_DCI_FORMAT_0_0 , 0 }; int rnti_types[2] = { NR_RNTI_C, 0 }; //Resource Allocation in time domain - const int tda = sched_ctrl->sched_pusch.time_domain_allocation; + const int tda = sched_pusch->time_domain_allocation; const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; @@ -604,15 +605,15 @@ void nr_schedule_ulsch(module_id_t module_id, false); /* PUSCH in a later slot, but corresponding DCI now! */ - nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_ctrl->sched_pusch.slot]; - AssertFatal(future_ul_tti_req->SFN == sched_ctrl->sched_pusch.frame - && future_ul_tti_req->Slot == sched_ctrl->sched_pusch.slot, + nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_pusch->slot]; + AssertFatal(future_ul_tti_req->SFN == sched_pusch->frame + && future_ul_tti_req->Slot == sched_pusch->slot, "%d.%d future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n", frame, slot, future_ul_tti_req->SFN, future_ul_tti_req->Slot, - sched_ctrl->sched_pusch.frame, - sched_ctrl->sched_pusch.slot); + sched_pusch->frame, + sched_pusch->slot); future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu; @@ -639,7 +640,7 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->data_scrambling_id = *scc->physCellId; pusch_pdu->transform_precoding = transform_precoding; - pusch_pdu->mcs_index = sched_ctrl->sched_pusch.mcs; + pusch_pdu->mcs_index = sched_pusch->mcs; pusch_pdu->mcs_table = mcs_table; pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); @@ -657,8 +658,8 @@ void nr_schedule_ulsch(module_id_t module_id, AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, "Only frequency resource allocation type 1 is currently supported\n"); pusch_pdu->resource_alloc = 1; //type 1 - pusch_pdu->rb_start = sched_ctrl->sched_pusch.rbStart; - pusch_pdu->rb_size = sched_ctrl->sched_pusch.rbSize; + pusch_pdu->rb_start = sched_pusch->rbStart; + pusch_pdu->rb_size = sched_pusch->rbSize; pusch_pdu->vrb_to_prb_mapping = 0; if (pusch_Config->frequencyHopping==NULL) @@ -813,6 +814,6 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->bwp_size, sched_ctrl->active_bwp->bwp_Id); - memset(&sched_ctrl->sched_pusch, 0, sizeof(sched_ctrl->sched_pusch)); + memset(sched_pusch, 0, sizeof(*sched_pusch)); } } From e4bbde77ef2737b084976cb63ece9cc44d001ee0 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 23 Nov 2020 17:34:38 +0100 Subject: [PATCH 35/56] Isolate R&Qm in ULSCH --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 22 +++++++++---------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 769cca522a..c7dda4721f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -603,6 +603,14 @@ void nr_schedule_ulsch(module_id_t module_id, NR_RNTI_C, target_ss, false); + const uint8_t mcs = sched_pusch->mcs; + uint16_t R = nr_get_code_rate_ul(mcs, mcs_table); + uint8_t Qm = nr_get_Qm_ul(mcs, mcs_table); + if (pusch_Config->tp_pi2BPSK + && ((mcs_table == 3 && mcs < 2) || (mcs_table == 4 && mcs < 6))) { + R >>= 1; + Qm <<= 1; + } /* PUSCH in a later slot, but corresponding DCI now! */ nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_pusch->slot]; @@ -640,18 +648,10 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->data_scrambling_id = *scc->physCellId; pusch_pdu->transform_precoding = transform_precoding; - pusch_pdu->mcs_index = sched_pusch->mcs; + pusch_pdu->mcs_index = mcs; pusch_pdu->mcs_table = mcs_table; - - pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); - pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); - if (pusch_Config->tp_pi2BPSK) { - if (((pusch_pdu->mcs_table == 3) && (pusch_pdu->mcs_index < 2)) - || ((pusch_pdu->mcs_table == 4) && (pusch_pdu->mcs_index < 6))) { - pusch_pdu->target_code_rate = pusch_pdu->target_code_rate>>1; - pusch_pdu->qam_mod_order = pusch_pdu->qam_mod_order<<1; - } - } + pusch_pdu->target_code_rate = R; + pusch_pdu->qam_mod_order = Qm; pusch_pdu->nrOfLayers = 1; //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2] From c821dd0c94bb033131c2f2e70e160d2d3de322ca Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 19 Nov 2020 16:45:24 +0100 Subject: [PATCH 36/56] Do not check for UE active state before ULSCH and DLSCH scheduler --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index a7b8f4c017..f443854e41 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -415,17 +415,13 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, } // This schedules the DCI for Uplink and subsequently PUSCH - - // The decision about whether to schedule is done for each UE independently - // inside - if (UE_info->active[UE_id] && slot < 10) { + if (slot < 10) { nr_schedule_ulsch(module_idP, frame, slot, num_slots_per_tdd, nr_ulmix_slots, ulsch_in_slot_bitmap); } - if (UE_info->active[UE_id] - && (is_xlsch_in_slot(dlsch_in_slot_bitmap, slot % num_slots_per_tdd)) + // This schedules the DCI for Downlink and PDSCH + if (is_xlsch_in_slot(dlsch_in_slot_bitmap, slot % num_slots_per_tdd) && slot < 10) { - ue_sched_ctl->current_harq_pid = slot % num_slots_per_tdd; nr_schedule_ue_spec(module_idP, frame, slot, num_slots_per_tdd); } From 0d2435460c7870225e91c2aafa8db3086b5716c5 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 20 Nov 2020 16:40:16 +0100 Subject: [PATCH 37/56] Isolate DMRS config type in ULSCH --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 20 +++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index c7dda4721f..de2b65ab58 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -588,6 +588,15 @@ void nr_schedule_ulsch(module_id_t module_id, else transform_precoding = *pusch_Config->transformPrecoder; const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; + + /* DMRS calculations */ + const int mapping_type = tdaList->list.array[tda]->mappingType; + const NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig = + mapping_type == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA + ? pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup + : pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; + const uint8_t dmrs_config_type = NR_DMRS_UplinkConfig->dmrs_Type == NULL ? 0 : 1; + uint8_t mcs_table = 0; if (transform_precoding) mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, @@ -671,16 +680,7 @@ void nr_schedule_ulsch(module_id_t module_id, // -------------------- // ------- DMRS ------- // -------------------- - const int mapping_type = tdaList->list.array[tda]->mappingType; - NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig; - if (mapping_type == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA) - NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup; - else - NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; - if (NR_DMRS_UplinkConfig->dmrs_Type == NULL) - pusch_pdu->dmrs_config_type = 0; - else - pusch_pdu->dmrs_config_type = 1; + pusch_pdu->dmrs_config_type = dmrs_config_type; pusch_pdu->scid = 0; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1] if (pusch_pdu->transform_precoding) { // transform precoding disabled long *scramblingid; From 85843b3e0e168148278c95b936c6ea2d33967c8c Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 20 Nov 2020 16:49:24 +0100 Subject: [PATCH 38/56] Isolate DMRS additional_pos, l_prime_mask in ULSCH --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 25 ++++++++----------- 1 file changed, 10 insertions(+), 15 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index de2b65ab58..0542322e2d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -596,6 +596,16 @@ void nr_schedule_ulsch(module_id_t module_id, ? pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup : pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; const uint8_t dmrs_config_type = NR_DMRS_UplinkConfig->dmrs_Type == NULL ? 0 : 1; + const pusch_dmrs_AdditionalPosition_t additional_pos = + NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NULL + ? 2 + : (*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == + NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos3 + ? 3 + : *NR_DMRS_UplinkConfig->dmrs_AdditionalPosition); + const pusch_maxLength_t pusch_maxLength = + NR_DMRS_UplinkConfig->maxLength == NULL ? 1 : 2; + uint16_t l_prime_mask = get_l_prime(NrOfSymbols, mapping_type, additional_pos, pusch_maxLength); uint8_t mcs_table = 0; if (transform_precoding) @@ -700,21 +710,6 @@ void nr_schedule_ulsch(module_id_t module_id, else pusch_pdu->pusch_identity = *scc->physCellId; } - pusch_dmrs_AdditionalPosition_t additional_pos; - if (NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NULL) - additional_pos = 2; - else { - if (*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos3) - additional_pos = 3; - else - additional_pos = *NR_DMRS_UplinkConfig->dmrs_AdditionalPosition; - } - pusch_maxLength_t pusch_maxLength; - if (NR_DMRS_UplinkConfig->maxLength == NULL) - pusch_maxLength = 1; - else - pusch_maxLength = 2; - uint16_t l_prime_mask = get_l_prime(pusch_pdu->nr_of_symbols, mapping_type, additional_pos, pusch_maxLength); pusch_pdu->ul_dmrs_symb_pos = l_prime_mask << pusch_pdu->start_symbol_index; pusch_pdu->num_dmrs_cdm_grps_no_data = 1; From fc0f0cd7e7aeec161dd8f98b8cb447acbc8ce633 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 20 Nov 2020 16:53:09 +0100 Subject: [PATCH 39/56] Isolate DMRS ul_dmrs_symb_pos and dmrs_cdm_grps_no_data in ULSCH --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 0542322e2d..a0781800fb 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -606,6 +606,11 @@ void nr_schedule_ulsch(module_id_t module_id, const pusch_maxLength_t pusch_maxLength = NR_DMRS_UplinkConfig->maxLength == NULL ? 1 : 2; uint16_t l_prime_mask = get_l_prime(NrOfSymbols, mapping_type, additional_pos, pusch_maxLength); + const uint16_t ul_dmrs_symb_pos = l_prime_mask << StartSymbolIndex; + uint8_t num_dmrs_symb = 0; + for(int i = StartSymbolIndex; i < StartSymbolIndex + NrOfSymbols; i++) + num_dmrs_symb += (ul_dmrs_symb_pos >> i) & 1; + const uint8_t num_dmrs_cdm_grps_no_data = 1; uint8_t mcs_table = 0; if (transform_precoding) @@ -710,9 +715,8 @@ void nr_schedule_ulsch(module_id_t module_id, else pusch_pdu->pusch_identity = *scc->physCellId; } - pusch_pdu->ul_dmrs_symb_pos = l_prime_mask << pusch_pdu->start_symbol_index; - - pusch_pdu->num_dmrs_cdm_grps_no_data = 1; + pusch_pdu->ul_dmrs_symb_pos = ul_dmrs_symb_pos; + pusch_pdu->num_dmrs_cdm_grps_no_data = num_dmrs_cdm_grps_no_data; pusch_pdu->dmrs_ports = 1; // -------------------- @@ -740,10 +744,6 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi; pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; - uint8_t num_dmrs_symb = 0; - for(int i = pusch_pdu->start_symbol_index; i < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; i++) - num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1; - uint8_t N_PRB_DMRS; if (pusch_pdu->dmrs_config_type == 0) N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*6; From 644c364a4a0e7767410d3a0d525cdc7ef9e54b65 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 20 Nov 2020 17:28:52 +0100 Subject: [PATCH 40/56] Isolate DMRS N_PRB_DMRS in ULSCH --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index a0781800fb..51064a4a67 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -611,6 +611,9 @@ void nr_schedule_ulsch(module_id_t module_id, for(int i = StartSymbolIndex; i < StartSymbolIndex + NrOfSymbols; i++) num_dmrs_symb += (ul_dmrs_symb_pos >> i) & 1; const uint8_t num_dmrs_cdm_grps_no_data = 1; + const uint8_t N_PRB_DMRS = dmrs_config_type == 0 + ? num_dmrs_cdm_grps_no_data * 6 + : num_dmrs_cdm_grps_no_data * 4; uint8_t mcs_table = 0; if (transform_precoding) @@ -744,12 +747,6 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi; pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; - uint8_t N_PRB_DMRS; - if (pusch_pdu->dmrs_config_type == 0) - N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*6; - else - N_PRB_DMRS = pusch_pdu->num_dmrs_cdm_grps_no_data*4; - pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order, pusch_pdu->target_code_rate, pusch_pdu->rb_size, From 5762c943dbb00786cd662a5e52cd379cce6adefc Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 20 Nov 2020 17:01:36 +0100 Subject: [PATCH 41/56] Isolate TBS calculation in ULSCH, calculate some statistics --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 29 ++++++++++--------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 51064a4a67..44d3d1a5cf 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -638,6 +638,20 @@ void nr_schedule_ulsch(module_id_t module_id, R >>= 1; Qm <<= 1; } + const uint32_t tb_size = nr_compute_tbs(Qm, + R, + sched_pusch->rbSize, + NrOfSymbols, + N_PRB_DMRS * num_dmrs_symb, + 0, // nb_rb_oh + 0, + 1 /* NrOfLayers */) >> 3; + + /* Statistics */ + UE_info->mac_stats[UE_id].ulsch_rounds[cur_harq->round]++; + if (cur_harq->round == 0) + UE_info->mac_stats[UE_id].ulsch_total_bytes_scheduled += tb_size; + /* PUSCH in a later slot, but corresponding DCI now! */ nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_pusch->slot]; @@ -746,20 +760,7 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->pusch_data.harq_process_id = harq_id; pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi; pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; - - pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order, - pusch_pdu->target_code_rate, - pusch_pdu->rb_size, - pusch_pdu->nr_of_symbols, - N_PRB_DMRS * num_dmrs_symb, - 0, //nb_rb_oh - 0, - pusch_pdu->nrOfLayers)>>3; - - UE_info->mac_stats[UE_id].ulsch_rounds[cur_harq->round]++; - if (cur_harq->round == 0) - UE_info->mac_stats[UE_id].ulsch_total_bytes_scheduled += pusch_pdu->pusch_data.tb_size; - + pusch_pdu->pusch_data.tb_size = tb_size; pusch_pdu->pusch_data.num_cb = 0; //CBG not supported nfapi_nr_ul_dci_request_t *ul_dci_req = &RC.nrmac[module_id]->UL_dci_req[0]; From 0d860454b00d7e26a4c469c279b9ae67cf4f13a8 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 20 Nov 2020 17:16:34 +0100 Subject: [PATCH 42/56] ULSCH: Reorganize PUSCH PDU filling --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 72 +++++++++---------- 1 file changed, 35 insertions(+), 37 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 44d3d1a5cf..a0a012df23 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -615,6 +615,7 @@ void nr_schedule_ulsch(module_id_t module_id, ? num_dmrs_cdm_grps_no_data * 6 : num_dmrs_cdm_grps_no_data * 4; + /* Calculate TBS from MCS */ uint8_t mcs_table = 0; if (transform_precoding) mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, @@ -671,49 +672,31 @@ void nr_schedule_ulsch(module_id_t module_id, LOG_D(MAC, "%4d.%2d Scheduling UE specific PUSCH\n", frame, slot); - pusch_pdu->start_symbol_index = StartSymbolIndex; - pusch_pdu->nr_of_symbols = NrOfSymbols; - pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; pusch_pdu->rnti = rnti; pusch_pdu->handle = 0; //not yet used + /* FAPI: BWP */ pusch_pdu->bwp_size = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); pusch_pdu->bwp_start = NRRIV2PRBOFFSET(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275); pusch_pdu->subcarrier_spacing = sched_ctrl->active_ubwp->bwp_Common->genericParameters.subcarrierSpacing; pusch_pdu->cyclic_prefix = 0; + /* FAPI: PUSCH information always included */ + pusch_pdu->target_code_rate = R; + pusch_pdu->qam_mod_order = Qm; + pusch_pdu->mcs_index = mcs; + pusch_pdu->mcs_table = mcs_table; + pusch_pdu->transform_precoding = transform_precoding; if (pusch_Config->dataScramblingIdentityPUSCH) pusch_pdu->data_scrambling_id = *pusch_Config->dataScramblingIdentityPUSCH; else pusch_pdu->data_scrambling_id = *scc->physCellId; - - pusch_pdu->transform_precoding = transform_precoding; - pusch_pdu->mcs_index = mcs; - pusch_pdu->mcs_table = mcs_table; - pusch_pdu->target_code_rate = R; - pusch_pdu->qam_mod_order = Qm; pusch_pdu->nrOfLayers = 1; - //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2] - AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, - "Only frequency resource allocation type 1 is currently supported\n"); - pusch_pdu->resource_alloc = 1; //type 1 - pusch_pdu->rb_start = sched_pusch->rbStart; - pusch_pdu->rb_size = sched_pusch->rbSize; - pusch_pdu->vrb_to_prb_mapping = 0; - - if (pusch_Config->frequencyHopping==NULL) - pusch_pdu->frequency_hopping = 0; - else - pusch_pdu->frequency_hopping = 1; - - - // -------------------- - // ------- DMRS ------- - // -------------------- + /* FAPI: DMRS */ + pusch_pdu->ul_dmrs_symb_pos = ul_dmrs_symb_pos; pusch_pdu->dmrs_config_type = dmrs_config_type; - pusch_pdu->scid = 0; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1] if (pusch_pdu->transform_precoding) { // transform precoding disabled long *scramblingid; if (pusch_pdu->scid == 0) @@ -732,13 +715,34 @@ void nr_schedule_ulsch(module_id_t module_id, else pusch_pdu->pusch_identity = *scc->physCellId; } - pusch_pdu->ul_dmrs_symb_pos = ul_dmrs_symb_pos; + pusch_pdu->scid = 0; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1] pusch_pdu->num_dmrs_cdm_grps_no_data = num_dmrs_cdm_grps_no_data; pusch_pdu->dmrs_ports = 1; - // -------------------- - // ------- PTRS ------- - // -------------------- + /* FAPI: Pusch Allocation in frequency domain */ + AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, + "Only frequency resource allocation type 1 is currently supported\n"); + pusch_pdu->resource_alloc = 1; //type 1 + pusch_pdu->rb_start = sched_pusch->rbStart; + pusch_pdu->rb_size = sched_pusch->rbSize; + pusch_pdu->vrb_to_prb_mapping = 0; + if (pusch_Config->frequencyHopping==NULL) + pusch_pdu->frequency_hopping = 0; + else + pusch_pdu->frequency_hopping = 1; + + /* FAPI: Resource Allocation in time domain */ + pusch_pdu->start_symbol_index = StartSymbolIndex; + pusch_pdu->nr_of_symbols = NrOfSymbols; + + /* PUSCH PDU */ + pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; + pusch_pdu->pusch_data.harq_process_id = harq_id; + pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi; + pusch_pdu->pusch_data.tb_size = tb_size; + pusch_pdu->pusch_data.num_cb = 0; //CBG not supported + + /* PUSCH PTRS */ if (NR_DMRS_UplinkConfig->phaseTrackingRS != NULL) { // TODO to be fixed from RRC config uint8_t ptrs_mcs1 = 2; // higher layer parameter in PTRS-UplinkConfig @@ -757,12 +761,6 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS } - pusch_pdu->pusch_data.harq_process_id = harq_id; - pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi; - pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; - pusch_pdu->pusch_data.tb_size = tb_size; - pusch_pdu->pusch_data.num_cb = 0; //CBG not supported - nfapi_nr_ul_dci_request_t *ul_dci_req = &RC.nrmac[module_id]->UL_dci_req[0]; ul_dci_req->SFN = frame; ul_dci_req->Slot = slot; From 8cb2317915d7f777bbcd2864871413d8858ad117 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 23 Nov 2020 19:35:06 +0100 Subject: [PATCH 43/56] Create PUSCH saved params struct to avoid recomputation --- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 69 ++++++++++++ .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 105 +++++------------- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 7 ++ openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 24 ++++ 4 files changed, 129 insertions(+), 76 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 7186ff2333..f0dc1fe4c2 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -213,6 +213,75 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac, } +void nr_save_pusch_fields(const NR_ServingCellConfigCommon_t *scc, + const NR_BWP_Uplink_t *ubwp, + long dci_format, + int tda, + uint8_t num_dmrs_cdm_grps_no_data, + NR_sched_pusch_save_t *ps) +{ + ps->dci_format = dci_format; + ps->time_domain_allocation = tda; + ps->num_dmrs_cdm_grps_no_data = num_dmrs_cdm_grps_no_data; + + const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = + ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; + const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; + SLIV2SL(startSymbolAndLength, + &ps->startSymbolIndex, + &ps->nrOfSymbols); + + ps->pusch_Config = ubwp->bwp_Dedicated->pusch_Config->choice.setup; + if (!ps->pusch_Config->transformPrecoder) + ps->transform_precoding = !scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder; + else + ps->transform_precoding = *ps->pusch_Config->transformPrecoder; + const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; + if (ps->transform_precoding) + ps->mcs_table = get_pusch_mcs_table(ps->pusch_Config->mcs_Table, + 0, + ps->dci_format, + NR_RNTI_C, + target_ss, + false); + else + ps->mcs_table = get_pusch_mcs_table(ps->pusch_Config->mcs_TableTransformPrecoder, + 1, + ps->dci_format, + NR_RNTI_C, + target_ss, + false); + + /* DMRS calculations */ + ps->mapping_type = tdaList->list.array[tda]->mappingType; + ps->NR_DMRS_UplinkConfig = + ps->mapping_type == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA + ? ps->pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup + : ps->pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; + ps->dmrs_config_type = ps->NR_DMRS_UplinkConfig->dmrs_Type == NULL ? 0 : 1; + const pusch_dmrs_AdditionalPosition_t additional_pos = + ps->NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NULL + ? 2 + : (*ps->NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == + NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos3 + ? 3 + : *ps->NR_DMRS_UplinkConfig->dmrs_AdditionalPosition); + const pusch_maxLength_t pusch_maxLength = + ps->NR_DMRS_UplinkConfig->maxLength == NULL ? 1 : 2; + const uint16_t l_prime_mask = get_l_prime(ps->nrOfSymbols, + ps->mapping_type, + additional_pos, + pusch_maxLength); + ps->ul_dmrs_symb_pos = l_prime_mask << ps->startSymbolIndex; + uint8_t num_dmrs_symb = 0; + for(int i = ps->startSymbolIndex; i < ps->startSymbolIndex + ps->nrOfSymbols; i++) + num_dmrs_symb += (ps->ul_dmrs_symb_pos >> i) & 1; + ps->num_dmrs_symb = num_dmrs_symb; + ps->N_PRB_DMRS = ps->dmrs_config_type == 0 + ? num_dmrs_cdm_grps_no_data * 6 + : num_dmrs_cdm_grps_no_data * 4; +} + void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu, nr_scs_e scs_common, nr_scs_e pdcch_scs, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index a0a012df23..beeadf8733 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -573,77 +573,30 @@ void nr_schedule_ulsch(module_id_t module_id, int dci_formats[2] = { f ? NR_UL_DCI_FORMAT_0_1 : NR_UL_DCI_FORMAT_0_0 , 0 }; int rnti_types[2] = { NR_RNTI_C, 0 }; - //Resource Allocation in time domain const int tda = sched_pusch->time_domain_allocation; - const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = - sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; - const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; - int StartSymbolIndex, NrOfSymbols; - SLIV2SL(startSymbolAndLength,&StartSymbolIndex,&NrOfSymbols); - - NR_PUSCH_Config_t *pusch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pusch_Config->choice.setup; - uint8_t transform_precoding = 0; - if (!pusch_Config->transformPrecoder) - transform_precoding = !scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder; - else - transform_precoding = *pusch_Config->transformPrecoder; - const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; - - /* DMRS calculations */ - const int mapping_type = tdaList->list.array[tda]->mappingType; - const NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig = - mapping_type == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA - ? pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup - : pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; - const uint8_t dmrs_config_type = NR_DMRS_UplinkConfig->dmrs_Type == NULL ? 0 : 1; - const pusch_dmrs_AdditionalPosition_t additional_pos = - NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NULL - ? 2 - : (*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == - NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos3 - ? 3 - : *NR_DMRS_UplinkConfig->dmrs_AdditionalPosition); - const pusch_maxLength_t pusch_maxLength = - NR_DMRS_UplinkConfig->maxLength == NULL ? 1 : 2; - uint16_t l_prime_mask = get_l_prime(NrOfSymbols, mapping_type, additional_pos, pusch_maxLength); - const uint16_t ul_dmrs_symb_pos = l_prime_mask << StartSymbolIndex; - uint8_t num_dmrs_symb = 0; - for(int i = StartSymbolIndex; i < StartSymbolIndex + NrOfSymbols; i++) - num_dmrs_symb += (ul_dmrs_symb_pos >> i) & 1; const uint8_t num_dmrs_cdm_grps_no_data = 1; - const uint8_t N_PRB_DMRS = dmrs_config_type == 0 - ? num_dmrs_cdm_grps_no_data * 6 - : num_dmrs_cdm_grps_no_data * 4; + NR_sched_pusch_save_t ps; + nr_save_pusch_fields(scc, + sched_ctrl->active_ubwp, + dci_formats[0], + tda, + num_dmrs_cdm_grps_no_data, + &ps); /* Calculate TBS from MCS */ - uint8_t mcs_table = 0; - if (transform_precoding) - mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table, - 0, - dci_formats[0], - NR_RNTI_C, - target_ss, - false); - else - mcs_table = get_pusch_mcs_table(pusch_Config->mcs_TableTransformPrecoder, - 1, - dci_formats[0], - NR_RNTI_C, - target_ss, - false); const uint8_t mcs = sched_pusch->mcs; - uint16_t R = nr_get_code_rate_ul(mcs, mcs_table); - uint8_t Qm = nr_get_Qm_ul(mcs, mcs_table); - if (pusch_Config->tp_pi2BPSK - && ((mcs_table == 3 && mcs < 2) || (mcs_table == 4 && mcs < 6))) { + uint16_t R = nr_get_code_rate_ul(mcs, ps.mcs_table); + uint8_t Qm = nr_get_Qm_ul(mcs, ps.mcs_table); + if (ps.pusch_Config->tp_pi2BPSK + && ((ps.mcs_table == 3 && mcs < 2) || (ps.mcs_table == 4 && mcs < 6))) { R >>= 1; Qm <<= 1; } const uint32_t tb_size = nr_compute_tbs(Qm, R, sched_pusch->rbSize, - NrOfSymbols, - N_PRB_DMRS * num_dmrs_symb, + ps.nrOfSymbols, + ps.N_PRB_DMRS * ps.num_dmrs_symb, 0, // nb_rb_oh 0, 1 /* NrOfLayers */) >> 3; @@ -686,23 +639,23 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->target_code_rate = R; pusch_pdu->qam_mod_order = Qm; pusch_pdu->mcs_index = mcs; - pusch_pdu->mcs_table = mcs_table; - pusch_pdu->transform_precoding = transform_precoding; - if (pusch_Config->dataScramblingIdentityPUSCH) - pusch_pdu->data_scrambling_id = *pusch_Config->dataScramblingIdentityPUSCH; + pusch_pdu->mcs_table = ps.mcs_table; + pusch_pdu->transform_precoding = ps.transform_precoding; + if (ps.pusch_Config->dataScramblingIdentityPUSCH) + pusch_pdu->data_scrambling_id = *ps.pusch_Config->dataScramblingIdentityPUSCH; else pusch_pdu->data_scrambling_id = *scc->physCellId; pusch_pdu->nrOfLayers = 1; /* FAPI: DMRS */ - pusch_pdu->ul_dmrs_symb_pos = ul_dmrs_symb_pos; - pusch_pdu->dmrs_config_type = dmrs_config_type; + pusch_pdu->ul_dmrs_symb_pos = ps.ul_dmrs_symb_pos; + pusch_pdu->dmrs_config_type = ps.dmrs_config_type; if (pusch_pdu->transform_precoding) { // transform precoding disabled long *scramblingid; if (pusch_pdu->scid == 0) - scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID0; + scramblingid = ps.NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID0; else - scramblingid = NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID1; + scramblingid = ps.NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID1; if (scramblingid == NULL) pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; else @@ -710,30 +663,30 @@ void nr_schedule_ulsch(module_id_t module_id, } else { pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; - if (NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity != NULL) - pusch_pdu->pusch_identity = *NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity; + if (ps.NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity != NULL) + pusch_pdu->pusch_identity = *ps.NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity; else pusch_pdu->pusch_identity = *scc->physCellId; } pusch_pdu->scid = 0; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1] - pusch_pdu->num_dmrs_cdm_grps_no_data = num_dmrs_cdm_grps_no_data; + pusch_pdu->num_dmrs_cdm_grps_no_data = ps.num_dmrs_cdm_grps_no_data; pusch_pdu->dmrs_ports = 1; /* FAPI: Pusch Allocation in frequency domain */ - AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, + AssertFatal(ps.pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, "Only frequency resource allocation type 1 is currently supported\n"); pusch_pdu->resource_alloc = 1; //type 1 pusch_pdu->rb_start = sched_pusch->rbStart; pusch_pdu->rb_size = sched_pusch->rbSize; pusch_pdu->vrb_to_prb_mapping = 0; - if (pusch_Config->frequencyHopping==NULL) + if (ps.pusch_Config->frequencyHopping==NULL) pusch_pdu->frequency_hopping = 0; else pusch_pdu->frequency_hopping = 1; /* FAPI: Resource Allocation in time domain */ - pusch_pdu->start_symbol_index = StartSymbolIndex; - pusch_pdu->nr_of_symbols = NrOfSymbols; + pusch_pdu->start_symbol_index = ps.startSymbolIndex; + pusch_pdu->nr_of_symbols = ps.nrOfSymbols; /* PUSCH PDU */ pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; @@ -743,7 +696,7 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->pusch_data.num_cb = 0; //CBG not supported /* PUSCH PTRS */ - if (NR_DMRS_UplinkConfig->phaseTrackingRS != NULL) { + if (ps.NR_DMRS_UplinkConfig->phaseTrackingRS != NULL) { // TODO to be fixed from RRC config uint8_t ptrs_mcs1 = 2; // higher layer parameter in PTRS-UplinkConfig uint8_t ptrs_mcs2 = 4; // higher layer parameter in PTRS-UplinkConfig diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 43c6d7c8f2..51ea008b01 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -297,6 +297,13 @@ void find_aggregation_candidates(uint8_t *aggregation_level, long get_K2(NR_BWP_Uplink_t *ubwp, int time_domain_assignment, int mu); +void nr_save_pusch_fields(const NR_ServingCellConfigCommon_t *scc, + const NR_BWP_Uplink_t *ubwp, + long dci_format, + int tda, + uint8_t num_dmrs_cdm_grps_no_data, + NR_sched_pusch_save_t *ps); + uint8_t nr_get_tpc(int target, uint8_t cqi, int incr); int get_spf(nfapi_nr_config_request_scf_t *cfg); diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index fa43cd649b..bdf7b85b6e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -284,6 +284,30 @@ typedef struct NR_sched_pucch { uint8_t resource_indicator; } NR_sched_pucch; +/* this struct is a helper: as long as the TDA and DCI format remain the same + * over the same uBWP and search space, there is no need to recalculate all + * S/L, MCS table, or DMRS-related parameters over and over again. Hence, we + * store them in this struct for easy reference. */ +typedef struct NR_sched_pusch_save { + int dci_format; + int time_domain_allocation; + uint8_t num_dmrs_cdm_grps_no_data; + + int startSymbolIndex; + int nrOfSymbols; + + NR_PUSCH_Config_t *pusch_Config; + uint8_t transform_precoding; + uint8_t mcs_table; + + long mapping_type; + NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig; + uint16_t dmrs_config_type; + uint16_t ul_dmrs_symb_pos; + uint8_t num_dmrs_symb; + uint8_t N_PRB_DMRS; +} NR_sched_pusch_save_t; + typedef struct NR_sched_pusch { int frame; int slot; From d8cecde925c7a36674589f61ac4d0393d67c439f Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Tue, 24 Nov 2020 10:37:22 +0100 Subject: [PATCH 44/56] Recalculate PUSCH saved params struct in Pre-processor --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 19 +++- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 2 + .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 88 +++++++++++-------- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 1 + 4 files changed, 72 insertions(+), 38 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 2e00d3a58c..3a1acb6803 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -407,7 +407,6 @@ void nr_ul_preprocessor_phytest(module_id_t module_id, } } - sched_ctrl->sched_pusch.time_domain_allocation = tda; sched_ctrl->sched_pusch.slot = sched_slot; sched_ctrl->sched_pusch.frame = sched_frame; @@ -435,6 +434,24 @@ void nr_ul_preprocessor_phytest(module_id_t module_id, } UE_info->num_pdcch_cand[UE_id][cid]++; + sched_ctrl->sched_pusch.time_domain_allocation = tda; + const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats; + const int dci_format = f ? NR_UL_DCI_FORMAT_0_1 : NR_UL_DCI_FORMAT_0_0; + const uint8_t num_dmrs_cdm_grps_no_data = 1; + /* we want to avoid a lengthy deduction of DMRS and other parameters in + * every TTI if we can save it, so check whether dci_format, TDA, or + * num_dmrs_cdm_grps_no_data has changed and only then recompute */ + NR_sched_pusch_save_t *ps = &sched_ctrl->pusch_save; + if (ps->time_domain_allocation != tda + || ps->dci_format != dci_format + || ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data) + nr_save_pusch_fields(scc, + sched_ctrl->active_ubwp, + dci_format, + tda, + num_dmrs_cdm_grps_no_data, + ps); + sched_ctrl->sched_pusch.mcs = 9; sched_ctrl->sched_pusch.rbStart = rbStart; sched_ctrl->sched_pusch.rbSize = rbSize; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index f0dc1fe4c2..35c4240067 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -1865,6 +1865,8 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){ UE_info->UE_sched_ctrl[UE_id].ta_update = 31; UE_info->UE_sched_ctrl[UE_id].ta_apply = false; UE_info->UE_sched_ctrl[UE_id].ul_rssi = 0; + /* set illegal time domain allocation to force recomputation of all fields */ + UE_info->UE_sched_ctrl[UE_id].pusch_save.time_domain_allocation = -1; UE_info->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch **)malloc(num_slots_ul*sizeof(NR_sched_pucch *)); for (int s=0; sUE_sched_ctrl[UE_id].sched_pucch[s] = (NR_sched_pucch *)malloc(2*sizeof(NR_sched_pucch)); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index beeadf8733..c69329a3cd 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -506,7 +506,6 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, while (rbStart + rbSize < bwpSize && !vrb_map_UL[rbStart+rbSize]) rbSize++; - sched_ctrl->sched_pusch.time_domain_allocation = tda; sched_ctrl->sched_pusch.slot = sched_slot; sched_ctrl->sched_pusch.frame = sched_frame; @@ -534,6 +533,24 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, } UE_info->num_pdcch_cand[UE_id][cid]++; + sched_ctrl->sched_pusch.time_domain_allocation = tda; + const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats; + const int dci_format = f ? NR_UL_DCI_FORMAT_0_1 : NR_UL_DCI_FORMAT_0_0; + const uint8_t num_dmrs_cdm_grps_no_data = 1; + /* we want to avoid a lengthy deduction of DMRS and other parameters in + * every TTI if we can save it, so check whether dci_format, TDA, or + * num_dmrs_cdm_grps_no_data has changed and only then recompute */ + NR_sched_pusch_save_t *ps = &sched_ctrl->pusch_save; + if (ps->time_domain_allocation != tda + || ps->dci_format != dci_format + || ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data) + nr_save_pusch_fields(scc, + sched_ctrl->active_ubwp, + dci_format, + tda, + num_dmrs_cdm_grps_no_data, + ps); + sched_ctrl->sched_pusch.mcs = 9; sched_ctrl->sched_pusch.rbStart = rbStart; sched_ctrl->sched_pusch.rbSize = rbSize; @@ -569,34 +586,27 @@ void nr_schedule_ulsch(module_id_t module_id, cur_harq->state = ACTIVE_SCHED; cur_harq->last_tx_slot = sched_pusch->slot; - const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats; - int dci_formats[2] = { f ? NR_UL_DCI_FORMAT_0_1 : NR_UL_DCI_FORMAT_0_0 , 0 }; int rnti_types[2] = { NR_RNTI_C, 0 }; - const int tda = sched_pusch->time_domain_allocation; - const uint8_t num_dmrs_cdm_grps_no_data = 1; - NR_sched_pusch_save_t ps; - nr_save_pusch_fields(scc, - sched_ctrl->active_ubwp, - dci_formats[0], - tda, - num_dmrs_cdm_grps_no_data, - &ps); + /* pre-computed PUSCH values that only change if time domain allocation, + * DCI format, or DMRS parameters change. Updated in the preprocessor + * through nr_save_pusch_fields() */ + NR_sched_pusch_save_t *ps = &sched_ctrl->pusch_save; /* Calculate TBS from MCS */ const uint8_t mcs = sched_pusch->mcs; - uint16_t R = nr_get_code_rate_ul(mcs, ps.mcs_table); - uint8_t Qm = nr_get_Qm_ul(mcs, ps.mcs_table); - if (ps.pusch_Config->tp_pi2BPSK - && ((ps.mcs_table == 3 && mcs < 2) || (ps.mcs_table == 4 && mcs < 6))) { + uint16_t R = nr_get_code_rate_ul(mcs, ps->mcs_table); + uint8_t Qm = nr_get_Qm_ul(mcs, ps->mcs_table); + if (ps->pusch_Config->tp_pi2BPSK + && ((ps->mcs_table == 3 && mcs < 2) || (ps->mcs_table == 4 && mcs < 6))) { R >>= 1; Qm <<= 1; } const uint32_t tb_size = nr_compute_tbs(Qm, R, sched_pusch->rbSize, - ps.nrOfSymbols, - ps.N_PRB_DMRS * ps.num_dmrs_symb, + ps->nrOfSymbols, + ps->N_PRB_DMRS * ps->num_dmrs_symb, 0, // nb_rb_oh 0, 1 /* NrOfLayers */) >> 3; @@ -639,23 +649,23 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->target_code_rate = R; pusch_pdu->qam_mod_order = Qm; pusch_pdu->mcs_index = mcs; - pusch_pdu->mcs_table = ps.mcs_table; - pusch_pdu->transform_precoding = ps.transform_precoding; - if (ps.pusch_Config->dataScramblingIdentityPUSCH) - pusch_pdu->data_scrambling_id = *ps.pusch_Config->dataScramblingIdentityPUSCH; + pusch_pdu->mcs_table = ps->mcs_table; + pusch_pdu->transform_precoding = ps->transform_precoding; + if (ps->pusch_Config->dataScramblingIdentityPUSCH) + pusch_pdu->data_scrambling_id = *ps->pusch_Config->dataScramblingIdentityPUSCH; else pusch_pdu->data_scrambling_id = *scc->physCellId; pusch_pdu->nrOfLayers = 1; /* FAPI: DMRS */ - pusch_pdu->ul_dmrs_symb_pos = ps.ul_dmrs_symb_pos; - pusch_pdu->dmrs_config_type = ps.dmrs_config_type; + pusch_pdu->ul_dmrs_symb_pos = ps->ul_dmrs_symb_pos; + pusch_pdu->dmrs_config_type = ps->dmrs_config_type; if (pusch_pdu->transform_precoding) { // transform precoding disabled long *scramblingid; if (pusch_pdu->scid == 0) - scramblingid = ps.NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID0; + scramblingid = ps->NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID0; else - scramblingid = ps.NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID1; + scramblingid = ps->NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID1; if (scramblingid == NULL) pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; else @@ -663,30 +673,30 @@ void nr_schedule_ulsch(module_id_t module_id, } else { pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; - if (ps.NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity != NULL) - pusch_pdu->pusch_identity = *ps.NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity; + if (ps->NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity != NULL) + pusch_pdu->pusch_identity = *ps->NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity; else pusch_pdu->pusch_identity = *scc->physCellId; } pusch_pdu->scid = 0; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1] - pusch_pdu->num_dmrs_cdm_grps_no_data = ps.num_dmrs_cdm_grps_no_data; + pusch_pdu->num_dmrs_cdm_grps_no_data = ps->num_dmrs_cdm_grps_no_data; pusch_pdu->dmrs_ports = 1; /* FAPI: Pusch Allocation in frequency domain */ - AssertFatal(ps.pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, + AssertFatal(ps->pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, "Only frequency resource allocation type 1 is currently supported\n"); pusch_pdu->resource_alloc = 1; //type 1 pusch_pdu->rb_start = sched_pusch->rbStart; pusch_pdu->rb_size = sched_pusch->rbSize; pusch_pdu->vrb_to_prb_mapping = 0; - if (ps.pusch_Config->frequencyHopping==NULL) + if (ps->pusch_Config->frequencyHopping==NULL) pusch_pdu->frequency_hopping = 0; else pusch_pdu->frequency_hopping = 1; /* FAPI: Resource Allocation in time domain */ - pusch_pdu->start_symbol_index = ps.startSymbolIndex; - pusch_pdu->nr_of_symbols = ps.nrOfSymbols; + pusch_pdu->start_symbol_index = ps->startSymbolIndex; + pusch_pdu->nr_of_symbols = ps->nrOfSymbols; /* PUSCH PDU */ pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; @@ -696,7 +706,7 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->pusch_data.num_cb = 0; //CBG not supported /* PUSCH PTRS */ - if (ps.NR_DMRS_UplinkConfig->phaseTrackingRS != NULL) { + if (ps->NR_DMRS_UplinkConfig->phaseTrackingRS != NULL) { // TODO to be fixed from RRC config uint8_t ptrs_mcs1 = 2; // higher layer parameter in PTRS-UplinkConfig uint8_t ptrs_mcs2 = 4; // higher layer parameter in PTRS-UplinkConfig @@ -740,12 +750,16 @@ void nr_schedule_ulsch(module_id_t module_id, memset(dci_pdu_rel15, 0, sizeof(dci_pdu_rel15)); NR_CellGroupConfig_t *secondaryCellGroup = UE_info->secondaryCellGroup[UE_id]; const int n_ubwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count; + // NOTE: below functions assume that dci_formats is an array corresponding + // to all UL DCIs in the PDCCH, but for us it is a simple int. So before + // having multiple UEs, the below need to be changed (IMO the functions + // should fill for one DCI only and not handle all of them). config_uldci(sched_ctrl->active_ubwp, pusch_pdu, pdcch_pdu_rel15, &dci_pdu_rel15[0], - dci_formats, - tda, + &ps->dci_format, + ps->time_domain_allocation, UE_info->UE_sched_ctrl[UE_id].tpc0, n_ubwp, sched_ctrl->active_bwp->bwp_Id); @@ -753,7 +767,7 @@ void nr_schedule_ulsch(module_id_t module_id, secondaryCellGroup, pdcch_pdu_rel15, dci_pdu_rel15, - dci_formats, + &ps->dci_format, rnti_types, pusch_pdu->bwp_size, sched_ctrl->active_bwp->bwp_Id); diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index bdf7b85b6e..842ed0f42c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -386,6 +386,7 @@ typedef struct { /// selected PUCCH index, if scheduled int pucch_sched_idx; int pucch_occ_idx; + NR_sched_pusch_save_t pusch_save; NR_sched_pusch_t sched_pusch; /// CCE index and aggregation, should be coherent with cce_list From 7a7c1bcc9871fe2a80ce52de17c67f04bc38629f Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Tue, 24 Nov 2020 10:58:11 +0100 Subject: [PATCH 45/56] Calculate TBS in pre-processor and use the results in post-proc --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 26 ++++++++- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 56 ++++++++++--------- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 5 ++ 3 files changed, 58 insertions(+), 29 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 3a1acb6803..cd5a1f87a6 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -452,9 +452,29 @@ void nr_ul_preprocessor_phytest(module_id_t module_id, num_dmrs_cdm_grps_no_data, ps); - sched_ctrl->sched_pusch.mcs = 9; - sched_ctrl->sched_pusch.rbStart = rbStart; - sched_ctrl->sched_pusch.rbSize = rbSize; + const int mcs = 9; + NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; + sched_pusch->mcs = mcs; + sched_pusch->rbStart = rbStart; + sched_pusch->rbSize = rbSize; + + /* Calculate TBS from MCS */ + sched_pusch->R = nr_get_code_rate_ul(mcs, ps->mcs_table); + sched_pusch->Qm = nr_get_Qm_ul(mcs, ps->mcs_table); + if (ps->pusch_Config->tp_pi2BPSK + && ((ps->mcs_table == 3 && mcs < 2) || (ps->mcs_table == 4 && mcs < 6))) { + sched_pusch->R >>= 1; + sched_pusch->Qm <<= 1; + } + sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm, + sched_pusch->R, + sched_pusch->rbSize, + ps->nrOfSymbols, + ps->N_PRB_DMRS * ps->num_dmrs_symb, + 0, // nb_rb_oh + 0, + 1 /* NrOfLayers */) + >> 3; /* mark the corresponding RBs as used */ for (int rb = rbStart; rb < rbStart + rbSize; rb++) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index c69329a3cd..1ea9a57629 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -551,9 +551,29 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, num_dmrs_cdm_grps_no_data, ps); - sched_ctrl->sched_pusch.mcs = 9; - sched_ctrl->sched_pusch.rbStart = rbStart; - sched_ctrl->sched_pusch.rbSize = rbSize; + const int mcs = 9; + NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; + sched_pusch->mcs = mcs; + sched_pusch->rbStart = rbStart; + sched_pusch->rbSize = rbSize; + + /* Calculate TBS from MCS */ + sched_pusch->R = nr_get_code_rate_ul(mcs, ps->mcs_table); + sched_pusch->Qm = nr_get_Qm_ul(mcs, ps->mcs_table); + if (ps->pusch_Config->tp_pi2BPSK + && ((ps->mcs_table == 3 && mcs < 2) || (ps->mcs_table == 4 && mcs < 6))) { + sched_pusch->R >>= 1; + sched_pusch->Qm <<= 1; + } + sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm, + sched_pusch->R, + sched_pusch->rbSize, + ps->nrOfSymbols, + ps->N_PRB_DMRS * ps->num_dmrs_symb, + 0, // nb_rb_oh + 0, + 1 /* NrOfLayers */) + >> 3; /* mark the corresponding RBs as used */ for (int rb = 0; rb < sched_ctrl->sched_pusch.rbSize; rb++) @@ -574,6 +594,8 @@ void nr_schedule_ulsch(module_id_t module_id, const NR_UE_list_t *UE_list = &UE_info->list; for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) { NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; + /* dynamic PUSCH values (RB alloc, MCS, hence R, Qm, TBS) that change in + * every TTI are pre-populated by the preprocessor and used below */ NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; if (sched_pusch->rbSize <= 0) continue; @@ -593,28 +615,10 @@ void nr_schedule_ulsch(module_id_t module_id, * through nr_save_pusch_fields() */ NR_sched_pusch_save_t *ps = &sched_ctrl->pusch_save; - /* Calculate TBS from MCS */ - const uint8_t mcs = sched_pusch->mcs; - uint16_t R = nr_get_code_rate_ul(mcs, ps->mcs_table); - uint8_t Qm = nr_get_Qm_ul(mcs, ps->mcs_table); - if (ps->pusch_Config->tp_pi2BPSK - && ((ps->mcs_table == 3 && mcs < 2) || (ps->mcs_table == 4 && mcs < 6))) { - R >>= 1; - Qm <<= 1; - } - const uint32_t tb_size = nr_compute_tbs(Qm, - R, - sched_pusch->rbSize, - ps->nrOfSymbols, - ps->N_PRB_DMRS * ps->num_dmrs_symb, - 0, // nb_rb_oh - 0, - 1 /* NrOfLayers */) >> 3; - /* Statistics */ UE_info->mac_stats[UE_id].ulsch_rounds[cur_harq->round]++; if (cur_harq->round == 0) - UE_info->mac_stats[UE_id].ulsch_total_bytes_scheduled += tb_size; + UE_info->mac_stats[UE_id].ulsch_total_bytes_scheduled += sched_pusch->tb_size; /* PUSCH in a later slot, but corresponding DCI now! */ @@ -646,9 +650,9 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->cyclic_prefix = 0; /* FAPI: PUSCH information always included */ - pusch_pdu->target_code_rate = R; - pusch_pdu->qam_mod_order = Qm; - pusch_pdu->mcs_index = mcs; + pusch_pdu->target_code_rate = sched_pusch->R; + pusch_pdu->qam_mod_order = sched_pusch->Qm; + pusch_pdu->mcs_index = sched_pusch->mcs; pusch_pdu->mcs_table = ps->mcs_table; pusch_pdu->transform_precoding = ps->transform_precoding; if (ps->pusch_Config->dataScramblingIdentityPUSCH) @@ -702,7 +706,7 @@ void nr_schedule_ulsch(module_id_t module_id, pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round]; pusch_pdu->pusch_data.harq_process_id = harq_id; pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi; - pusch_pdu->pusch_data.tb_size = tb_size; + pusch_pdu->pusch_data.tb_size = sched_pusch->tb_size; pusch_pdu->pusch_data.num_cb = 0; //CBG not supported /* PUSCH PTRS */ diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 842ed0f42c..90740a15d0 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -321,6 +321,11 @@ typedef struct NR_sched_pusch { /// MCS uint8_t mcs; + + /// TBS-related info + uint16_t R; + uint8_t Qm; + uint32_t tb_size; } NR_sched_pusch_t; typedef struct NR_UE_harq { From 70c3915d814d4d0891960926b22fe2966a40a3df Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 25 Nov 2020 10:09:17 +0100 Subject: [PATCH 46/56] Schedule PRACH (internally) one frame in advance --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 14 ++++++++++++-- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 2 +- 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index f443854e41..fb1c602dbb 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -397,8 +397,18 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, schedule_nr_mib(module_idP, frame, slot, slots_per_frame[*scc->ssbSubcarrierSpacing]); // This schedule PRACH if we are not in phy_test mode - if (get_softmodem_params()->phy_test == 0) - schedule_nr_prach(module_idP, frame, slot); + if (get_softmodem_params()->phy_test == 0) { + /* we need to make sure that resources for PRACH are free. To avoid that + e.g. PUSCH has already been scheduled, make sure we schedule before + anything else: below, we simply assume an advance one frame (minus one + slot, because otherwise we would allocate the current slot in + UL_tti_req_ahead), but be aware that, e.g., K2 is allowed to be larger + (schedule_nr_prach will assert if resources are not free). */ + const sub_frame_t n_slots_ahead = slots_per_frame[*scc->ssbSubcarrierSpacing] - 1; + const frame_t f = (frame + (slot + n_slots_ahead) / slots_per_frame[*scc->ssbSubcarrierSpacing]) % 1024; + const sub_frame_t s = (slot + n_slots_ahead) % slots_per_frame[*scc->ssbSubcarrierSpacing]; + schedule_nr_prach(module_idP, f, s); + } // This schedule SR // TODO diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 8ec4b6d8d7..1ef342cac8 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -200,7 +200,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP gNB_MAC_INST *gNB = RC.nrmac[module_idP]; NR_COMMON_channels_t *cc = gNB->common_channels; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; - nfapi_nr_ul_tti_request_t *UL_tti_req = RC.nrmac[module_idP]->UL_tti_req[0]; + nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[module_idP]->UL_tti_req_ahead[0][slotP]; nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[module_idP]->config[0]; if (is_nr_UL_slot(scc,slotP)) { From 0c730d7aa18c6deccef152b4441968833a0af434 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 26 Nov 2020 11:46:11 +0100 Subject: [PATCH 47/56] Mark PRACH in vrb_map_UL --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 1ef342cac8..6a432dc31f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -335,6 +335,20 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP AssertFatal(1==0,"Invalid PRACH format"); } } + const int start_rb = cfg->prach_config.num_prach_fd_occasions_list[fdm_index].k1.value; + const int pusch_mu = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing; + const int num_rb = get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, pusch_mu); + uint16_t *vrb_map_UL = + &RC.nrmac[module_idP]->common_channels[0].vrb_map_UL[slotP * 275]; + const uint16_t symb_mask = ((1 << N_dur) - 1) << start_symbol; + for (int i = start_rb; i < start_rb + num_rb; ++i) { + AssertFatal((vrb_map_UL[i] & symb_mask) == 0, + "cannot reserve resources for PRACH: at RB %d, vrb_map_UL %x for symbols %x!\n", + i, + vrb_map_UL[i], + symb_mask); + vrb_map_UL[i] |= symb_mask; + } } } } From e99d3635db8e3db661cfd30bf53f599cedd25932 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 25 Nov 2020 14:42:34 +0100 Subject: [PATCH 48/56] ULSCH: warn when retransmission, basic debug logging --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 26 ++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 1ea9a57629..39169f7247 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -617,9 +617,33 @@ void nr_schedule_ulsch(module_id_t module_id, /* Statistics */ UE_info->mac_stats[UE_id].ulsch_rounds[cur_harq->round]++; - if (cur_harq->round == 0) + if (cur_harq->round == 0) { UE_info->mac_stats[UE_id].ulsch_total_bytes_scheduled += sched_pusch->tb_size; + } else { + LOG_W(MAC, + "%d.%2d UL retransmission RNTI %04x sched %d.%2d round %d\n", + frame, + slot, + rnti, + sched_pusch->frame, + sched_pusch->slot, + cur_harq->round); + } + LOG_D(MAC, + "%4d.%2d RNTI %04x UL sched %4d.%2d start %d RBS %d MCS %d TBS %d HARQ PID %d round %d NDI %d\n", + frame, + slot, + rnti, + sched_pusch->frame, + sched_pusch->slot, + sched_pusch->rbStart, + sched_pusch->rbSize, + sched_pusch->mcs, + sched_pusch->tb_size, + harq_id, + cur_harq->round, + cur_harq->ndi); /* PUSCH in a later slot, but corresponding DCI now! */ nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_pusch->slot]; From 3a37202beb17b0aca4e55633c0095f411ce4dd08 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 26 Nov 2020 09:39:43 +0100 Subject: [PATCH 49/56] Remove current_slot: it is not needed --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 1 - openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 2 +- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 2 -- 3 files changed, 1 insertion(+), 4 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index fb1c602dbb..e7db90af03 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -419,7 +419,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, // This schedule RA procedure if not in phy_test mode // Otherwise already consider 5G already connected - RC.nrmac[module_idP]->current_slot=slot; if (get_softmodem_params()->phy_test == 0) { nr_schedule_RA(module_idP, frame, slot); } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index cd5a1f87a6..1003573015 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -317,7 +317,7 @@ void nr_preprocessor_phytest(module_id_t module_id, sched_ctrl->coreset = get_coreset( sched_ctrl->active_bwp, sched_ctrl->search_space, 1 /* dedicated */); const int cid = sched_ctrl->coreset->controlResourceSetId; - const uint16_t Y = UE_info->Y[UE_id][cid][RC.nrmac[module_id]->current_slot]; + const uint16_t Y = UE_info->Y[UE_id][cid][slot]; const int m = UE_info->num_pdcch_cand[UE_id][cid]; sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], sched_ctrl->active_bwp, diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 90740a15d0..e5ef16b83f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -551,8 +551,6 @@ typedef struct gNB_MAC_INST_s { time_stats_t schedule_pch; /// CCE lists int cce_list[MAX_NUM_BWP][MAX_NUM_CORESET][MAX_NUM_CCE]; - /// current slot - int current_slot; /// DL preprocessor for differentiated scheduling nr_pp_impl_dl pre_processor_dl; From 0e936a09baf1984a79c11704a5768fa4f3803b0f Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 26 Nov 2020 10:03:41 +0100 Subject: [PATCH 50/56] Remove current_harq_pid: it is not needed --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 1 - openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 5 +++-- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 1 - 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index e7db90af03..0cbd8d035e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -431,7 +431,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, // This schedules the DCI for Downlink and PDSCH if (is_xlsch_in_slot(dlsch_in_slot_bitmap, slot % num_slots_per_tdd) && slot < 10) { - ue_sched_ctl->current_harq_pid = slot % num_slots_per_tdd; nr_schedule_ue_spec(module_idP, frame, slot, num_slots_per_tdd); } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index a9839ed985..b5336c29d4 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -454,7 +454,8 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id, AssertFatal(sched_ctrl->pucch_sched_idx >= 0, "no uplink slot for PUCCH found!\n"); uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map; - const int current_harq_pid = sched_ctrl->current_harq_pid; + // for now HARQ PID is fixed and should be the same as in post-processor + const int current_harq_pid = slot % num_slots_per_tdd; NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid]; NR_UE_ret_info_t *retInfo = &sched_ctrl->retInfo[current_harq_pid]; const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275); @@ -586,7 +587,7 @@ void nr_schedule_ue_spec(module_id_t module_id, 1 /* nrOfLayers */) >> 3; - const int current_harq_pid = sched_ctrl->current_harq_pid; + const int current_harq_pid = slot % num_slots_per_tdd; NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid]; NR_sched_pucch *pucch = &sched_ctrl->sched_pucch[sched_ctrl->pucch_sched_idx][sched_ctrl->pucch_occ_idx]; harq->feedback_slot = pucch->ul_slot; diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index e5ef16b83f..8009e5a2d9 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -421,7 +421,6 @@ typedef struct { uint8_t tpc0; uint8_t tpc1; uint16_t ul_rssi; - uint8_t current_harq_pid; NR_UE_harq_t harq_processes[NR_MAX_NB_HARQ_PROCESSES]; NR_UE_ul_harq_t ul_harq_processes[NR_MAX_NB_HARQ_PROCESSES]; int dummy; From ec10d48b243c881638caf1be2b3c99f359da4e5e Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 26 Nov 2020 11:51:14 +0100 Subject: [PATCH 51/56] Reformat schedule_nr_prach() --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 121 ++++++++++-------- 1 file changed, 66 insertions(+), 55 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 6a432dc31f..df12b56281 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -195,15 +195,17 @@ void find_SSB_and_RO_available(module_id_t module_idP) { } -void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) { - +void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) +{ gNB_MAC_INST *gNB = RC.nrmac[module_idP]; NR_COMMON_channels_t *cc = gNB->common_channels; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[module_idP]->UL_tti_req_ahead[0][slotP]; nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[module_idP]->config[0]; - if (is_nr_UL_slot(scc,slotP)) { + if (!is_nr_UL_slot(scc,slotP)) + return; + uint8_t config_index = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex; uint8_t mu,N_dur,N_t_slot,start_symbol = 0,N_RA_slot; uint16_t RA_sfn_index = -1; @@ -219,7 +221,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP uint8_t fdm = cfg->prach_config.num_prach_fd_occasions.value; // prach is scheduled according to configuration index and tables 6.3.3.2.2 to 6.3.3.2.4 - if ( get_nr_prach_info_from_index(config_index, + if (!get_nr_prach_info_from_index(config_index, (int)frameP, (int)slotP, scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA, @@ -231,58 +233,68 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP &N_dur, &RA_sfn_index, &N_RA_slot, - &config_period) ) { - uint16_t format0 = format&0xff; // first column of format from table - uint16_t format1 = (format>>8)&0xff; // second column of format from table + &config_period) ) + return; - if (N_RA_slot > 1) { //more than 1 PRACH slot in a subframe - if (slotP%2 == 1){ - slot_index = 1; - } - else { - slot_index = 0; - } - }else if (N_RA_slot <= 1) { //1 PRACH slot in a subframe - slot_index = 0; - } + uint16_t format0 = format&0xff; // first column of format from table + uint16_t format1 = (format>>8)&0xff; // second column of format from table + if (N_RA_slot > 1) { // more than 1 PRACH slot in a subframe + slot_index = slotP % 2 == 1; + } else if (N_RA_slot <= 1) { // 1 PRACH slot in a subframe + slot_index = 0; + } - AssertFatal(UL_tti_req->SFN == frameP && UL_tti_req->Slot == slotP, - "%d.%d UL_tti_req frame.slot %d.%d does not match PRACH %d.%d\n", - frameP, slotP, - UL_tti_req->SFN, - UL_tti_req->Slot, - frameP, slotP); - for (int fdm_index=0; fdm_index < fdm; fdm_index++) { // one structure per frequency domain occasion - for (int td_index=0; td_indexSFN == frameP && UL_tti_req->Slot == slotP, + "%d.%d UL_tti_req frame.slot %d.%d does not match PRACH %d.%d\n", + frameP, slotP, + UL_tti_req->SFN, + UL_tti_req->Slot, + frameP, slotP); - prach_occasion_id = (((frameP % (cc->max_association_period * config_period))/config_period) * cc->total_prach_occasions_per_config_period) + (RA_sfn_index + slot_index) * N_t_slot * fdm + td_index * fdm + fdm_index; - if((prach_occasion_id < cc->total_prach_occasions) && (td_index == 0)){ + for (int fdm_index=0; fdm_index < fdm; fdm_index++) { // one structure per frequency domain occasion + for (int td_index = 0; td_index < N_t_slot; td_index++) { + prach_occasion_id = (((frameP % (cc->max_association_period * config_period)) / config_period) + * cc->total_prach_occasions_per_config_period) + + (RA_sfn_index + slot_index) * N_t_slot * fdm + td_index * fdm + fdm_index; + if (!((prach_occasion_id < cc->total_prach_occasions) && (td_index == 0))) + continue; - UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE; - UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_prach_pdu_t); - nfapi_nr_prach_pdu_t *prach_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].prach_pdu; - memset(prach_pdu,0,sizeof(nfapi_nr_prach_pdu_t)); - UL_tti_req->n_pdus+=1; + UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = + NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE; + UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = + sizeof(nfapi_nr_prach_pdu_t); + nfapi_nr_prach_pdu_t *prach_pdu = + &UL_tti_req->pdus_list[UL_tti_req->n_pdus].prach_pdu; + memset(prach_pdu, 0, sizeof(nfapi_nr_prach_pdu_t)); + UL_tti_req->n_pdus += 1; // filling the prach fapi structure prach_pdu->phys_cell_id = *scc->physCellId; prach_pdu->num_prach_ocas = N_t_slot; prach_pdu->prach_start_symbol = start_symbol; prach_pdu->num_ra = fdm_index; - prach_pdu->num_cs = get_NCS(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig, - format0, - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig); - - LOG_D(MAC, "Frame %d, Slot %d: Prach Occasion id = %u fdm index = %u start symbol = %u slot index = %u subframe index = %u \n", - frameP, slotP, - prach_occasion_id, prach_pdu->num_ra, - prach_pdu->prach_start_symbol, - slot_index, RA_sfn_index); + prach_pdu->num_cs = get_NCS( + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice + .setup->rach_ConfigGeneric.zeroCorrelationZoneConfig, + format0, + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice + .setup->restrictedSetConfig); + + LOG_D(MAC, + "Frame %d, Slot %d: Prach Occasion id = %u fdm index = %u start " + "symbol = %u slot index = %u subframe index = %u \n", + frameP, + slotP, + prach_occasion_id, + prach_pdu->num_ra, + prach_pdu->prach_start_symbol, + slot_index, + RA_sfn_index); // SCF PRACH PDU format field does not consider A1/B1 etc. possibilities // We added 9 = A1/B1 10 = A2/B2 11 A3/B3 - if (format1!=0xff) { - switch(format0) { + if (format1 != 0xff) { + switch (format0) { case 0xa1: prach_pdu->prach_format = 11; break; @@ -292,12 +304,13 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP case 0xa3: prach_pdu->prach_format = 13; break; - default: - AssertFatal(1==0,"Only formats A1/B1 A2/B2 A3/B3 are valid for dual format"); + default: + AssertFatal( + 1 == 0, + "Only formats A1/B1 A2/B2 A3/B3 are valid for dual format"); } - } - else{ - switch(format0) { + } else { + switch (format0) { case 0: prach_pdu->prach_format = 0; break; @@ -331,10 +344,10 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP case 0xc2: prach_pdu->prach_format = 10; break; - default: - AssertFatal(1==0,"Invalid PRACH format"); + default: + AssertFatal(1 == 0, "Invalid PRACH format"); } - } + } const int start_rb = cfg->prach_config.num_prach_fd_occasions_list[fdm_index].k1.value; const int pusch_mu = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing; const int num_rb = get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, pusch_mu); @@ -343,16 +356,14 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP const uint16_t symb_mask = ((1 << N_dur) - 1) << start_symbol; for (int i = start_rb; i < start_rb + num_rb; ++i) { AssertFatal((vrb_map_UL[i] & symb_mask) == 0, - "cannot reserve resources for PRACH: at RB %d, vrb_map_UL %x for symbols %x!\n", + "cannot reserve resources for PRACH: at RB %d, " + "vrb_map_UL %x for symbols %x!\n", i, vrb_map_UL[i], symb_mask); vrb_map_UL[i] |= symb_mask; } - } } - } - } } } From c110ad7dc628b3be30f7f45c8a037d632d49c920 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Tue, 1 Dec 2020 19:41:04 +0100 Subject: [PATCH 52/56] Take out DL phytest slot limitation --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 1003573015..851540b2f2 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -258,8 +258,6 @@ void nr_preprocessor_phytest(module_id_t module_id, sub_frame_t slot, int num_slots_per_tdd) { - if (slot != 1) - return; /* only schedule in slot 1 for now */ NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; const int UE_id = 0; const int CC_id = 0; From 12c6cd44816eed4881144669890cb7b7e43a1c07 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Tue, 1 Dec 2020 19:45:30 +0100 Subject: [PATCH 53/56] Remove unused variable --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 1 - 1 file changed, 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 0cbd8d035e..20d0eea7b4 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -311,7 +311,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, gNB_MAC_INST *gNB = RC.nrmac[module_idP]; NR_UE_info_t *UE_info = &gNB->UE_info; - NR_UE_sched_ctrl_t *ue_sched_ctl = &UE_info->UE_sched_ctrl[UE_id]; NR_COMMON_channels_t *cc = gNB->common_channels; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; NR_TDD_UL_DL_Pattern_t *tdd_pattern = &scc->tdd_UL_DL_ConfigurationCommon->pattern1; From 5bb9a57ae91c62135a403cdfc05ac7cf8ff4d103 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 2 Dec 2020 18:42:47 +0100 Subject: [PATCH 54/56] Update SW_archi.md description --- doc/SW_archi.md | 76 ++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 66 insertions(+), 10 deletions(-) diff --git a/doc/SW_archi.md b/doc/SW_archi.md index dba884dcec..412dad402d 100644 --- a/doc/SW_archi.md +++ b/doc/SW_archi.md @@ -70,7 +70,7 @@ if the input is a UE RACH detection * nr_schedule_msg2() {: .func4} * handle_nr_uci() -???? +handles uplink control information, i.e., for the moment HARQ feedback. {: .func4} * handle_nr_ulsch() handles ulsch data prepared by nr_fill_indication() @@ -143,7 +143,8 @@ the samples numbers are the future time for these samples emission on-air {: .func3} # Scheduler -The scheduler is called by the chain: nr_ul_indication()=>gNB_dlsch_ulsch_scheduler() + +The main scheduler function is called by the chain: nr_ul_indication()=>gNB_dlsch_ulsch_scheduler() It calls sub functions to process each physical channel (rach, ...) The scheduler uses and internal map of used RB: vrb_map and vrb_map_UL, so each specific channel scheduler can see the already filled RB in each subframe (the function gNB_dlsch_ulsch_scheduler() clears these two arrays when it starts) @@ -153,16 +154,71 @@ it sends a iiti message to activate the thread for RRC, the answer will be async Calls schedule_nr_mib() that calls mac_rrc_nr_data_req() to fill MIB, -Calls each channel allocation: schedule SI, schedule_ul, schedule_dl, ... -this is a major entry for "phy-test" mode: in this mode, the allocation is fixed -all these channels goes to mac_rrc_nr_data_req() to get the data to transmit +Calls schedule_nr_prach() which schedules the (fixed) PRACH region one frame in +advance. -nr_schedule_ue_spec() is called -* calls nr_simple_dlsch_preprocessor()=> mac_rlc_status_ind() mac_rlc_status_ind() locks and checks directly inside rlc data the quantity of waiting data. So, the scheduler can allocate RBs -* calls nr_update_pucch_scheduling() - * get_pdsch_to_harq_feedback() to schedule retransmission in DL +Calls nr_csi_meas_reporting() to check when to schedule CSI in PUCCH. -Calls nr_fill_nfapi_dl_pdu() to actually populate what should be done by the lower layers to make the Tx subframe +Calls nr_schedule_RA(): checks RA process 0's state. Schedules Msg.2 via +nr_generate_Msg2() if an RA process is ongoing, and pre-allocates the Msg. 3 +for PUSCH as well. + +Calls nr_schedule_ulsch(): It is divided into the "preprocessor" and the +"postprocessor": the first makes the scheduling decisions, the second fills +nFAPI structures to indicate to the PHY what it is supposed to do. To signal +which users have how many resources, the preprocessor populates the +NR_sched_pusch_t (for values changing every TTI, e.g., frequency domain +allocation) and NR_sched_pusch_save_t (for values changing less frequently, at +least in FR1 [to my understanding], e.g., DMRS fields when the time domain +allocation stays between TTIs) structures. Furthermore, the preprocessor is an +exchangeable module that might schedule differently, e.g., one user for +phytest, multiple users in FR1, or maybe FR2: phytest is in +nr_ul_preprocessor_phytest(), for FR1 is nr_simple_ulsch_preprocessor() [under +development], for FR2 does not exist yet. +* calls preprocessor via pre_processor_ul(): the preprocessor is responsible + for allocating CCEs (using allocate_nr_CCEs()). Note that we do not yet have + scheduling requests or buffer status reports, and only one UE. E.g., + nr_simple_ulsch_preprocessor(): + 1) check whether the current frame/slot plus K2 is an UL slot, and return if + not. + 2) Find first free start RB in vrb_map_UL, and as many free consecutive RBs + as possible. + 3) allocate a CCE for the UE (and return if it is not possible) + 4) Calculate DMRS stuff (nr_save_pusch_fields()) and the TBS. + 5) Mark used resources in vrb_map_UL. +* loop through all users: get a free HARQ PID using select_ul_harq_pid() and + update statistics. Fill nFAPI structures directly for PUSCH, and call + config_uldci() and fill_dci_pdu_rel15() for DCI filling and PDCCH messages. + +Calls nr_schedule_ue_spec(). It is divided into the "preprocessor" and the +"postprocessor": the first makes the scheduling decisions, the second fills +nFAPI structures to indicate to the PHY what it is supposed to do. To signal +which users have how many resources, the preprocessor populates the +NR_UE_sched_ctrl_t structure of affected users. In particular, the field rbSize +decides whether a user is to be allocated. Furthermore, the preprocessor is an +exchangeable module that might schedule differently, e.g., one user for +phytest, multiple users in FR1, or maybe FR2: phytest is in +nr_preprocessor_phytest(), for FR1 is nr_simple_dlsch_preprocessor() [under +development], for FR2 does not exist yet. +* calls preprocessor via pre_processor_dl(): the preprocessor is responsible + for allocating CCEs and PUCCH (using allocate_nr_CCEs() and + nr_acknack_scheduling()) and deciding on the frequency/time domain + allocation. E.g., nr_simple_dlsch_preprocessor(): + 1) mac_rlc_status_ind() locks and checks directly inside rlc data the + quantity of waiting data. + 2) return from the preprocessor if there is no data and no timing advance to + send, + 3) otherwise, allocate a CCE for the UE (and return if it is not possible) + 4) find a PUCCH occasion for HARQ + 5a) check if there is a retransmission: if yes, find free resources to + transmit using the same resources, else + 5b) calculate the necessary RBs needed to get a TBS large enough to hold all + data, or until no more resources are available + 6) Mark taken resources in the vrb_map +* loop through all users: check if a new TA is necessary. Then, if a user has + allocated resources, compute its TBS, and fill nFAPI structures + (nr_fill_nfapi_dl_pdu() to populate what should be done by the lower layers + to make the Tx subframe). Update statistics (round, sent bytes). # RRC RRC is a regular thread with itti loop on queue: TASK_RRC_GNB From f821a333d70020890ce6c2c2faa7566f5e9ce21d Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 3 Dec 2020 09:13:38 +0100 Subject: [PATCH 55/56] Fix nr_dlsim: remove current_harq_pid, selected in DL scheduler --- openair1/SIMULATION/NR_PHY/dlsim.c | 1 - 1 file changed, 1 deletion(-) diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index 96a95cd53d..b8ff79eba3 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -860,7 +860,6 @@ int main(int argc, char **argv) UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].round = round; - UE_info->UE_sched_ctrl[0].current_harq_pid = harq_pid; gNB->dlsch[0][0]->harq_processes[harq_pid]->round = round; for (int i=0; iUE_info.num_pdcch_cand[0][i] = 0; From 589ff862dc10bdafc3dd4aecfdfb23b07ccb6309 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 3 Dec 2020 09:52:41 +0100 Subject: [PATCH 56/56] Improve retransmission messages in UL&DL --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 10 +++++++++- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 6 ++++-- 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index b5336c29d4..65f72bf98c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -640,7 +640,15 @@ void nr_schedule_ue_spec(module_id_t module_id, retInfo->numDmrsCdmGrpsNoData); /* we do not have to do anything, since we do not require to get data * from RLC, encode MAC CEs, or copy data to FAPI structures */ - LOG_W(MAC, "%d.%2d retransmission UE %d/RNTI %04x\n", frame, slot, UE_id, rnti); + LOG_W(MAC, + "%d.%2d DL retransmission UE %d/RNTI %04x HARQ PID %d round %d NDI %d\n", + frame, + slot, + UE_id, + rnti, + current_harq_pid, + harq->round, + harq->ndi); } else { /* initial transmission */ /* reserve space for timing advance of UE if necessary, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 39169f7247..440c2e1534 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -621,13 +621,15 @@ void nr_schedule_ulsch(module_id_t module_id, UE_info->mac_stats[UE_id].ulsch_total_bytes_scheduled += sched_pusch->tb_size; } else { LOG_W(MAC, - "%d.%2d UL retransmission RNTI %04x sched %d.%2d round %d\n", + "%d.%2d UL retransmission RNTI %04x sched %d.%2d HARQ PID %d round %d NDI %d\n", frame, slot, rnti, sched_pusch->frame, sched_pusch->slot, - cur_harq->round); + harq_id, + cur_harq->round, + cur_harq->ndi); } LOG_D(MAC,