Separate CCE allocation, MCS, RB Alloc in UL sched
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@@ -502,6 +502,33 @@ void nr_schedule_ulsch(module_id_t module_id,
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const int slot_idx = (slot + K2) % num_slots_per_tdd;
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const int slot_idx = (slot + K2) % num_slots_per_tdd;
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if (is_xlsch_in_slot(ulsch_in_slot_bitmap, slot_idx)
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if (is_xlsch_in_slot(ulsch_in_slot_bitmap, slot_idx)
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&& (!get_softmodem_params()->phy_test || slot_idx == 8)) {
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&& (!get_softmodem_params()->phy_test || slot_idx == 8)) {
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const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
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NR_SearchSpace_t *ss = get_searchspace(bwp, target_ss);
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uint8_t nr_of_candidates, aggregation_level;
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find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss);
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NR_ControlResourceSet_t *coreset = get_coreset(bwp, ss, 1 /* dedicated */);
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const int cid = coreset->controlResourceSetId;
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const uint16_t Y = UE_info->Y[UE_id][cid][nr_mac->current_slot];
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const int m = UE_info->num_pdcch_cand[UE_id][cid];
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int CCEIndex = allocate_nr_CCEs(nr_mac,
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bwp,
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coreset,
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aggregation_level,
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Y,
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m,
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nr_of_candidates);
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if (CCEIndex < 0) {
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LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__);
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return;
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}
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UE_info->num_pdcch_cand[UE_id][cid]++;
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const uint8_t mcs = 9;
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const uint16_t rbStart = 0;
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const uint16_t rbSize = get_softmodem_params()->phy_test ?
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50 : NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275);
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nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[module_id]->UL_dci_req[0];
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nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[module_id]->UL_dci_req[0];
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UL_dci_req->SFN = frame;
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UL_dci_req->SFN = frame;
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UL_dci_req->Slot = slot;
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UL_dci_req->Slot = slot;
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@@ -519,9 +546,6 @@ void nr_schedule_ulsch(module_id_t module_id,
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//UL_tti_req = &nr_mac->UL_tti_req[CC_id];
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//UL_tti_req = &nr_mac->UL_tti_req[CC_id];
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const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
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NR_SearchSpace_t *ss = get_searchspace(bwp, target_ss);
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int dci_formats[2];
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int dci_formats[2];
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if (ss->searchSpaceType->choice.ue_Specific->dci_Formats)
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if (ss->searchSpaceType->choice.ue_Specific->dci_Formats)
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dci_formats[0] = NR_UL_DCI_FORMAT_0_1;
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dci_formats[0] = NR_UL_DCI_FORMAT_0_1;
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@@ -560,7 +584,7 @@ void nr_schedule_ulsch(module_id_t module_id,
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else
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else
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pusch_pdu->data_scrambling_id = *scc->physCellId;
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pusch_pdu->data_scrambling_id = *scc->physCellId;
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pusch_pdu->mcs_index = 9;
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pusch_pdu->mcs_index = mcs;
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if (pusch_pdu->transform_precoding)
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if (pusch_pdu->transform_precoding)
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pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table,
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pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table,
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0,
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0,
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@@ -592,12 +616,8 @@ void nr_schedule_ulsch(module_id_t module_id,
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AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1,
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AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1,
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"Only frequency resource allocation type 1 is currently supported\n");
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"Only frequency resource allocation type 1 is currently supported\n");
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pusch_pdu->resource_alloc = 1; //type 1
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pusch_pdu->resource_alloc = 1; //type 1
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pusch_pdu->rb_start = 0;
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pusch_pdu->rb_start = rbStart;
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if (get_softmodem_params()->phy_test)
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pusch_pdu->rb_size = rbSize;
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pusch_pdu->rb_size = 50;
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else
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pusch_pdu->rb_size = pusch_pdu->bwp_size;
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pusch_pdu->vrb_to_prb_mapping = 0;
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pusch_pdu->vrb_to_prb_mapping = 0;
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if (pusch_Config->frequencyHopping==NULL)
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if (pusch_Config->frequencyHopping==NULL)
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@@ -738,29 +758,8 @@ void nr_schedule_ulsch(module_id_t module_id,
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nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
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nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
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UL_dci_req->numPdus+=1;
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UL_dci_req->numPdus+=1;
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LOG_D(MAC,"Configuring ULDCI/PDCCH in %d.%d\n", frame,slot);
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LOG_D(MAC,"Configuring ULDCI/PDCCH in %d.%d\n", frame,slot);
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uint8_t nr_of_candidates, aggregation_level;
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find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss);
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NR_ControlResourceSet_t *coreset = get_coreset(bwp, ss, 1 /* dedicated */);
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int cid = coreset->controlResourceSetId;
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const uint16_t Y = UE_info->Y[UE_id][cid][slot];
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const int m = UE_info->num_pdcch_cand[UE_id][cid];
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int CCEIndex = allocate_nr_CCEs(nr_mac,
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bwp,
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coreset,
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aggregation_level,
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Y,
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m,
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nr_of_candidates);
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if (CCEIndex < 0) {
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LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__);
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pusch_sched->active = false;
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return;
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}
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UE_info->num_pdcch_cand[UE_id][cid]++;
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nr_configure_pdcch(nr_mac,
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nr_configure_pdcch(nr_mac,
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pdcch_pdu_rel15,
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pdcch_pdu_rel15,
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UE_info->rnti[UE_id],
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UE_info->rnti[UE_id],
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