Handle TDD pattern 2 in UL TDA allocation

Add the possibility to use UL slots in TDD pattern 2. For simplicity, we
require the mixed slot to be of the same symbols in pattern 1 & 2. For
UL slots, simply use the right amount of UL TDAs, depending on which
number of UL slots among pattern 1 & 2 is bigger.

One complication is the TDA for the mixed slot. The current code assumes
that k2 has to be equal or larger than (number of DL slots +1) (because
the spec says min k2=2, but we might want to schedule DSUUU). Then,
there could be for instance the following cases:

- only pattern 1: DSUUU DSUUU ...: the mixed slot has to be reached an
  entire period in advance
- pattern 1 & 2: DSUUU DDDDD: normal mixed slot k2, e.g., like for 7DS2U
- pattern 1 & 2: DSUUU DDDSU: the mixed slot has to be reached
  N_ul2+N_dl1+1 slots in advance

I can't think of more cases right now. To avoid unscheduled slots, I put
an assertion (which could also trivially be taken out).
This commit is contained in:
Robert Schmidt
2025-08-14 12:50:03 +02:00
parent 135525c17a
commit c24673798a
2 changed files with 25 additions and 24 deletions
-4
View File
@@ -1206,10 +1206,6 @@ static NR_ServingCellConfigCommon_t *get_scc_config(configmodule_interface_t *cf
struct NR_TDD_UL_DL_ConfigCommon *tdd = scc->tdd_UL_DL_ConfigurationCommon;
tdd->pattern2 = calloc_or_fail(1, sizeof(*tdd->pattern2));
*scc->tdd_UL_DL_ConfigurationCommon->pattern2 = p2;
AssertFatal(p2.nrofUplinkSlots ^ scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots,
"UL slots in pattern1 (%ld) and pattern2 (%ld) are mutually exclusive (e.g. DDDFUU DDDD, DDDD DDDFUU)\n",
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots,
p2.nrofUplinkSlots);
}
struct NR_FrequencyInfoDL *frequencyInfoDL = scc->downlinkConfigCommon->frequencyInfoDL;
LOG_I(RRC,