mac: fix fapi beam id
Set MSB of fapi beam ID based on flag for beamforming done in hiPHY or loPHY.
This commit is contained in:
@@ -33,8 +33,8 @@ extern "C" {
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__typeof__ (b) _b = (b); \
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__typeof__ (b) _b = (b); \
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_a < _b ? _a : _b; })
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_a < _b ? _a : _b; })
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#define IS_BIT_SET(a, b) ((a >> b) & 1)
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#define SET_BIT(a, b) (a | (1 << b))
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#ifdef __cplusplus
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#ifdef __cplusplus
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#ifdef min
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#ifdef min
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@@ -77,7 +77,7 @@ int beam_index_allocation(bool das,
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if (das)
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if (das)
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return fapi_beam_index;
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return fapi_beam_index;
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int ru_beam_idx = analog_bf->analog_beam_list[fapi_beam_index].value;
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int ru_beam_idx = analog_bf->analog_beam_list[fapi_beam_index].value & 0x7fff;
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int idx = -1;
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int idx = -1;
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for (int j = 0; j < common_vars->num_beams_period; j++) {
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for (int j = 0; j < common_vars->num_beams_period; j++) {
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// L2 analog beam implementation is slot based, so we need to verify occupancy for the whole slot
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// L2 analog beam implementation is slot based, so we need to verify occupancy for the whole slot
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@@ -1634,6 +1634,7 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg)
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beam_info->beam_duration = *MacRLC_ParamList.paramarray[j][MACRLC_ANALOG_BEAM_DURATION_IDX].u8ptr;
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beam_info->beam_duration = *MacRLC_ParamList.paramarray[j][MACRLC_ANALOG_BEAM_DURATION_IDX].u8ptr;
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beam_info->beams_per_period = beams_per_period;
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beam_info->beams_per_period = beams_per_period;
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beam_info->beam_allocation_size = -1; // to be initialized once we have information on frame configuration
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beam_info->beam_allocation_size = -1; // to be initialized once we have information on frame configuration
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// TODO: Indicate this to MAC via FAPI TLV 0x0164.
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beam_info->beam_mode = ab == 1 ? PRECONFIGURED_BEAM_IDX : LOPHY_BEAM_IDX;
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beam_info->beam_mode = ab == 1 ? PRECONFIGURED_BEAM_IDX : LOPHY_BEAM_IDX;
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} else {
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} else {
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RC.nrmac[j]->beam_info.beam_mode = NO_BEAM_MODE;
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RC.nrmac[j]->beam_info.beam_mode = NO_BEAM_MODE;
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@@ -516,7 +516,8 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, slot_t slotP)
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prach_pdu->beamforming.num_prgs = 1;
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prach_pdu->beamforming.num_prgs = 1;
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prach_pdu->beamforming.prg_size = n_ra_rb;
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prach_pdu->beamforming.prg_size = n_ra_rb;
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prach_pdu->beamforming.dig_bf_interface = num_td_occ;
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prach_pdu->beamforming.dig_bf_interface = num_td_occ;
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prach_pdu->beamforming.prgs_list[0].dig_bf_interface_list[num_td_occ - 1].beam_idx = beam_index;
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const uint16_t fapi_beam = convert_to_fapi_beam(beam_index, gNB->beam_info.beam_mode);
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prach_pdu->beamforming.prgs_list[0].dig_bf_interface_list[num_td_occ - 1].beam_idx = fapi_beam;
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LOG_D(NR_MAC,
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LOG_D(NR_MAC,
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"Frame %d, Slot %d: Prach Occasion id = %u fdm index = %u start symbol = %u slot index = %u subframe index = %u \n",
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"Frame %d, Slot %d: Prach Occasion id = %u fdm index = %u start symbol = %u slot index = %u subframe index = %u \n",
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@@ -900,7 +901,8 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
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0,
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0,
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ra->msg3_round,
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ra->msg3_round,
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ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping,
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ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping,
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UE->rnti);
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UE->rnti,
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nr_mac->beam_info.beam_mode);
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future_ul_tti_req->n_pdus += 1;
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future_ul_tti_req->n_pdus += 1;
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// generation of DCI 0_0 to schedule msg3 retransmission
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// generation of DCI 0_0 to schedule msg3 retransmission
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@@ -933,14 +935,9 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
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}
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}
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// Fill PDCCH DL DCI PDU
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// Fill PDCCH DL DCI PDU
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nfapi_nr_dl_dci_pdu_t *dci_pdu = prepare_dci_pdu(pdcch_pdu_rel15,
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const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, nr_mac->beam_info.beam_mode);
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scc,
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nfapi_nr_dl_dci_pdu_t *dci_pdu =
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ss,
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prepare_dci_pdu(pdcch_pdu_rel15, scc, ss, coreset, aggregation_level, CCEIndex, fapi_beam, UE->rnti);
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coreset,
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aggregation_level,
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CCEIndex,
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UE->UE_beam_index,
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UE->rnti);
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pdcch_pdu_rel15->numDlDci++;
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pdcch_pdu_rel15->numDlDci++;
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dci_pdu_rel15_t uldci_payload = {0};
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dci_pdu_rel15_t uldci_payload = {0};
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@@ -1204,7 +1201,8 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, slot_
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0,
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0,
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0,
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0,
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ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping,
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ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping,
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UE->rnti);
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UE->rnti,
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mac->beam_info.beam_mode);
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future_ul_tti_req->n_pdus += 1;
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future_ul_tti_req->n_pdus += 1;
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// calling function to fill rar message
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// calling function to fill rar message
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@@ -1326,6 +1324,7 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
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NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
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NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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NR_UE_DL_BWP_t *dl_bwp = &UE->current_DL_BWP;
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NR_UE_DL_BWP_t *dl_bwp = &UE->current_DL_BWP;
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const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, nr_mac->beam_info.beam_mode);
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nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = prepare_pdsch_pdu(dl_tti_pdsch_pdu,
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nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = prepare_pdsch_pdu(dl_tti_pdsch_pdu,
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nr_mac,
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nr_mac,
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UE,
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UE,
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@@ -1334,19 +1333,13 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
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false,
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false,
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round,
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round,
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rnti,
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rnti,
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UE->UE_beam_index,
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fapi_beam,
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1,
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1,
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pduindex);
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pduindex);
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/* Fill PDCCH DL DCI PDU */
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/* Fill PDCCH DL DCI PDU */
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nfapi_nr_dl_dci_pdu_t *dci_pdu = prepare_dci_pdu(pdcch_pdu_rel15,
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nfapi_nr_dl_dci_pdu_t *dci_pdu =
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scc,
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prepare_dci_pdu(pdcch_pdu_rel15, scc, sched_ctrl->search_space, coreset, aggregation_level, CCEIndex, fapi_beam, rnti);
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sched_ctrl->search_space,
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coreset,
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aggregation_level,
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CCEIndex,
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UE->UE_beam_index,
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rnti);
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pdcch_pdu_rel15->numDlDci++;
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pdcch_pdu_rel15->numDlDci++;
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dci_pdu_rel15_t dci_payload = prepare_dci_dl_payload(nr_mac,
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dci_pdu_rel15_t dci_payload = prepare_dci_dl_payload(nr_mac,
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@@ -139,6 +139,7 @@ static void schedule_one_ssb(gNB_MAC_INST *gNB,
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int beam_index = get_fapi_beamforming_index(gNB, i_ssb);
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int beam_index = get_fapi_beamforming_index(gNB, i_ssb);
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NR_beam_alloc_t beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, beam_index, slots_per_frame);
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NR_beam_alloc_t beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, beam_index, slots_per_frame);
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AssertFatal(beam.idx >= 0, "Cannot allocate SSB %d in any available beam\n", i_ssb);
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AssertFatal(beam.idx >= 0, "Cannot allocate SSB %d in any available beam\n", i_ssb);
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beam_index = convert_to_fapi_beam(beam_index, gNB->beam_info.beam_mode);
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const int prb_offset = (FR == FR2) ? offset_pointa >> (scs - 2) : offset_pointa >> scs;
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const int prb_offset = (FR == FR2) ? offset_pointa >> (scs - 2) : offset_pointa >> scs;
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schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, beam_index, ssbSubcarrierOffset, offset_pointa, mib_pdu);
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schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, beam_index, ssbSubcarrierOffset, offset_pointa, mib_pdu);
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fill_ssb_vrb_map(cc,
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fill_ssb_vrb_map(cc,
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@@ -401,17 +402,9 @@ static void nr_fill_nfapi_dl_SIB_pdu(gNB_MAC_INST *gNB_mac,
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dl_tti_pdsch_pdu->PDUSize = (uint16_t)(4+sizeof(nfapi_nr_dl_tti_pdsch_pdu));
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dl_tti_pdsch_pdu->PDUSize = (uint16_t)(4+sizeof(nfapi_nr_dl_tti_pdsch_pdu));
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dl_req->nPDUs += 1;
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dl_req->nPDUs += 1;
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nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = prepare_pdsch_pdu(dl_tti_pdsch_pdu,
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const uint16_t fapi_beam = convert_to_fapi_beam(beam_index, gNB_mac->beam_info.beam_mode);
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gNB_mac,
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nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 =
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NULL,
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prepare_pdsch_pdu(dl_tti_pdsch_pdu, gNB_mac, NULL, pdsch, NULL, is_sib1, 0, SI_RNTI, fapi_beam, 1, pdu_index);
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pdsch,
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NULL,
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is_sib1,
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0,
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SI_RNTI,
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beam_index,
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1,
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pdu_index);
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LOG_D(NR_MAC,
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LOG_D(NR_MAC,
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"OtherSI:bwpStart %d, bwpSize %d, rbStart %d, rbSize %d, dlDmrsSymbPos = 0x%x\n",
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"OtherSI:bwpStart %d, bwpSize %d, rbStart %d, rbSize %d, dlDmrsSymbPos = 0x%x\n",
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pdsch_pdu_rel15->BWPStart,
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pdsch_pdu_rel15->BWPStart,
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@@ -421,14 +414,8 @@ static void nr_fill_nfapi_dl_SIB_pdu(gNB_MAC_INST *gNB_mac,
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pdsch_pdu_rel15->dlDmrsSymbPos);
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pdsch_pdu_rel15->dlDmrsSymbPos);
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/* Fill PDCCH DL DCI PDU */
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/* Fill PDCCH DL DCI PDU */
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nfapi_nr_dl_dci_pdu_t *dci_pdu = prepare_dci_pdu(pdcch_pdu_rel15,
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nfapi_nr_dl_dci_pdu_t *dci_pdu =
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scc,
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prepare_dci_pdu(pdcch_pdu_rel15, scc, search_space, coreset, aggregation_level, cce_index, fapi_beam, SI_RNTI);
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search_space,
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coreset,
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aggregation_level,
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cce_index,
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beam_index,
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SI_RNTI);
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pdcch_pdu_rel15->numDlDci++;
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pdcch_pdu_rel15->numDlDci++;
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/* DCI payload */
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/* DCI payload */
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@@ -629,6 +616,7 @@ static void other_sib_sched_control(module_id_t module_idP,
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slot);
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slot);
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NR_ServingCellConfigCommon_t *scc = gNB_mac->common_channels[0].ServingCellConfigCommon;
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NR_ServingCellConfigCommon_t *scc = gNB_mac->common_channels[0].ServingCellConfigCommon;
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int n_slots_frame = gNB_mac->frame_structure.numb_slots_frame;
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int n_slots_frame = gNB_mac->frame_structure.numb_slots_frame;
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beam_index = get_fapi_beamforming_index(gNB_mac, beam_index);
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NR_beam_alloc_t beam = beam_allocation_procedure(&gNB_mac->beam_info, frame, slot, beam_index, n_slots_frame);
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NR_beam_alloc_t beam = beam_allocation_procedure(&gNB_mac->beam_info, frame, slot, beam_index, n_slots_frame);
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AssertFatal(beam.idx >= 0, "Cannot allocate otherSIB corresponding for SSB number %d in any available beam\n", beam_index);
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AssertFatal(beam.idx >= 0, "Cannot allocate otherSIB corresponding for SSB number %d in any available beam\n", beam_index);
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LOG_D(NR_MAC, "(%d.%d) otherSIB payload %d transmission for ssb number %d\n", frame, slot, payload_idx, beam_index);
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LOG_D(NR_MAC, "(%d.%d) otherSIB payload %d transmission for ssb number %d\n", frame, slot, payload_idx, beam_index);
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@@ -1142,6 +1142,7 @@ void post_process_dlsch(gNB_MAC_INST *nr_mac, post_process_pdsch_t *pdsch, NR_UE
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maxMIMO_Layers = 1;
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maxMIMO_Layers = 1;
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}
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}
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const int nl_tbslbrm = min(maxMIMO_Layers, 4);
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const int nl_tbslbrm = min(maxMIMO_Layers, 4);
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const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, nr_mac->beam_info.beam_mode);
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nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu = prepare_pdsch_pdu(dl_tti_pdsch_pdu,
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nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu = prepare_pdsch_pdu(dl_tti_pdsch_pdu,
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nr_mac,
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nr_mac,
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UE,
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UE,
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@@ -1150,7 +1151,7 @@ void post_process_dlsch(gNB_MAC_INST *nr_mac, post_process_pdsch_t *pdsch, NR_UE
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false,
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false,
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harq->round,
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harq->round,
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rnti,
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rnti,
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UE->UE_beam_index,
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fapi_beam,
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nl_tbslbrm,
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nl_tbslbrm,
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pduindex);
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pduindex);
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@@ -1163,7 +1164,7 @@ void post_process_dlsch(gNB_MAC_INST *nr_mac, post_process_pdsch_t *pdsch, NR_UE
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sched_ctrl->coreset,
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sched_ctrl->coreset,
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sched_ctrl->aggregation_level,
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sched_ctrl->aggregation_level,
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sched_ctrl->cce_index,
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sched_ctrl->cce_index,
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UE->UE_beam_index,
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fapi_beam,
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rnti);
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rnti);
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pdcch_pdu->numDlDci++;
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pdcch_pdu->numDlDci++;
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@@ -1326,7 +1326,8 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t *pucch_pdu,
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uint16_t O_csi,
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uint16_t O_csi,
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uint16_t O_ack,
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uint16_t O_ack,
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uint8_t O_sr,
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uint8_t O_sr,
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int r_pucch)
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int r_pucch,
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nr_beam_mode_t beam_mode)
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{
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{
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NR_PUCCH_Resource_t *pucchres;
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NR_PUCCH_Resource_t *pucchres;
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NR_PUCCH_FormatConfig_t *pucchfmt;
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NR_PUCCH_FormatConfig_t *pucchfmt;
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@@ -1534,7 +1535,8 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t *pucch_pdu,
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pucch_pdu->beamforming.num_prgs = 1;
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pucch_pdu->beamforming.num_prgs = 1;
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pucch_pdu->beamforming.prg_size = pucch_pdu->prb_size;
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pucch_pdu->beamforming.prg_size = pucch_pdu->prb_size;
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pucch_pdu->beamforming.dig_bf_interface = 1;
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pucch_pdu->beamforming.dig_bf_interface = 1;
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pucch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index;
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const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, beam_mode);
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pucch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = fapi_beam;
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}
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}
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void set_r_pucch_parms(int rsetindex,
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void set_r_pucch_parms(int rsetindex,
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@@ -3246,7 +3248,8 @@ void nr_csirs_scheduling(int Mod_idP, frame_t frame, slot_t slot, nfapi_nr_dl_tt
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csirs_pdu_rel15->precodingAndBeamforming.prg_size = resourceMapping.freqBand.nrofRBs; //1 PRG of max size
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csirs_pdu_rel15->precodingAndBeamforming.prg_size = resourceMapping.freqBand.nrofRBs; //1 PRG of max size
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csirs_pdu_rel15->precodingAndBeamforming.dig_bf_interfaces = 1;
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csirs_pdu_rel15->precodingAndBeamforming.dig_bf_interfaces = 1;
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csirs_pdu_rel15->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
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csirs_pdu_rel15->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
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csirs_pdu_rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index;
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const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, gNB_mac->beam_info.beam_mode);
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csirs_pdu_rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = fapi_beam;
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csirs_pdu_rel15->bwp_size = dl_bwp->BWPSize;
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csirs_pdu_rel15->bwp_size = dl_bwp->BWPSize;
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csirs_pdu_rel15->bwp_start = dl_bwp->BWPStart;
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csirs_pdu_rel15->bwp_start = dl_bwp->BWPStart;
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csirs_pdu_rel15->subcarrier_spacing = dl_bwp->scs;
|
csirs_pdu_rel15->subcarrier_spacing = dl_bwp->scs;
|
||||||
@@ -3689,6 +3692,12 @@ NR_beam_alloc_t beam_allocation_procedure(NR_beam_info_t *beam_info, int frame,
|
|||||||
return (NR_beam_alloc_t) {.new_beam = false, .idx = -1};
|
return (NR_beam_alloc_t) {.new_beam = false, .idx = -1};
|
||||||
}
|
}
|
||||||
|
|
||||||
|
uint16_t convert_to_fapi_beam(const uint16_t beam_idx, const nr_beam_mode_t mode)
|
||||||
|
{
|
||||||
|
AssertFatal(beam_idx >= 0 && beam_idx < 32768, "Beam index out of range. Valid range is [0, 32767]\n");
|
||||||
|
return (mode == LOPHY_BEAM_IDX) ? SET_BIT(beam_idx, 15) : beam_idx;
|
||||||
|
}
|
||||||
|
|
||||||
void reset_beam_status(NR_beam_info_t *beam_info, int frame, int slot, int16_t beam_index, int slots_per_frame, bool new_beam)
|
void reset_beam_status(NR_beam_info_t *beam_info, int frame, int slot, int16_t beam_index, int slots_per_frame, bool new_beam)
|
||||||
{
|
{
|
||||||
if(!new_beam) // need to reset only if the beam was allocated specifically for this instance
|
if(!new_beam) // need to reset only if the beam was allocated specifically for this instance
|
||||||
|
|||||||
@@ -473,7 +473,8 @@ static void nr_configure_srs(gNB_MAC_INST *nrmac,
|
|||||||
srs_pdu->beamforming.num_prgs = m_SRS[srs_pdu->config_index];
|
srs_pdu->beamforming.num_prgs = m_SRS[srs_pdu->config_index];
|
||||||
srs_pdu->beamforming.prg_size = srs_pdu->srs_parameters_v4.srs_bandwidth_size;
|
srs_pdu->beamforming.prg_size = srs_pdu->srs_parameters_v4.srs_bandwidth_size;
|
||||||
}
|
}
|
||||||
srs_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index;
|
const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, nrmac->beam_info.beam_mode);
|
||||||
|
srs_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = fapi_beam;
|
||||||
NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame);
|
NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame);
|
||||||
AssertFatal(beam.idx >= 0, "Cannot allocate SRS in any available beam\n");
|
AssertFatal(beam.idx >= 0, "Cannot allocate SRS in any available beam\n");
|
||||||
uint16_t *vrb_map_UL = &nrmac->common_channels[CC_id].vrb_map_UL[beam.idx][buffer_index * MAX_BWP_SIZE];
|
uint16_t *vrb_map_UL = &nrmac->common_channels[CC_id].vrb_map_UL[beam.idx][buffer_index * MAX_BWP_SIZE];
|
||||||
|
|||||||
@@ -94,7 +94,8 @@ static void nr_fill_nfapi_pucch(gNB_MAC_INST *nrmac, frame_t frame, slot_t slot,
|
|||||||
pucch->csi_bits,
|
pucch->csi_bits,
|
||||||
pucch->dai_c,
|
pucch->dai_c,
|
||||||
pucch->sr_flag,
|
pucch->sr_flag,
|
||||||
pucch->r_pucch);
|
pucch->r_pucch,
|
||||||
|
nrmac->beam_info.beam_mode);
|
||||||
}
|
}
|
||||||
|
|
||||||
#define MIN_RSRP_VALUE -141
|
#define MIN_RSRP_VALUE -141
|
||||||
|
|||||||
@@ -2314,7 +2314,8 @@ nfapi_nr_pusch_pdu_t *prepare_pusch_pdu(nfapi_nr_ul_tti_request_t *future_ul_tti
|
|||||||
int harq_id,
|
int harq_id,
|
||||||
int harq_round,
|
int harq_round,
|
||||||
int fh,
|
int fh,
|
||||||
int rnti)
|
int rnti,
|
||||||
|
nr_beam_mode_t beam_mode)
|
||||||
{
|
{
|
||||||
nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu;
|
nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu;
|
||||||
memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t));
|
memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t));
|
||||||
@@ -2364,7 +2365,8 @@ nfapi_nr_pusch_pdu_t *prepare_pusch_pdu(nfapi_nr_ul_tti_request_t *future_ul_tti
|
|||||||
pusch_pdu->beamforming.num_prgs = 1;
|
pusch_pdu->beamforming.num_prgs = 1;
|
||||||
pusch_pdu->beamforming.prg_size = pusch_pdu->bwp_size;
|
pusch_pdu->beamforming.prg_size = pusch_pdu->bwp_size;
|
||||||
pusch_pdu->beamforming.dig_bf_interface = 1;
|
pusch_pdu->beamforming.dig_bf_interface = 1;
|
||||||
pusch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index;
|
pusch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx =
|
||||||
|
convert_to_fapi_beam(UE->UE_beam_index, beam_mode);
|
||||||
/* TRANSFORM PRECODING --------------------------------------------------------*/
|
/* TRANSFORM PRECODING --------------------------------------------------------*/
|
||||||
if (pusch_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled) {
|
if (pusch_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled) {
|
||||||
// U as specified in section 6.4.1.1.1.2 in 38.211, if sequence hopping and group hopping are disabled
|
// U as specified in section 6.4.1.1.1.2 in 38.211, if sequence hopping and group hopping are disabled
|
||||||
@@ -2522,7 +2524,8 @@ void post_process_ulsch(gNB_MAC_INST *nr_mac, post_process_pusch_t *pusch, NR_UE
|
|||||||
harq_id,
|
harq_id,
|
||||||
cur_harq->round,
|
cur_harq->round,
|
||||||
current_BWP->pusch_Config && current_BWP->pusch_Config->frequencyHopping,
|
current_BWP->pusch_Config && current_BWP->pusch_Config->frequencyHopping,
|
||||||
UE->rnti);
|
UE->rnti,
|
||||||
|
nr_mac->beam_info.beam_mode);
|
||||||
req->n_pdus += 1;
|
req->n_pdus += 1;
|
||||||
|
|
||||||
// Calculate the normalized tx_power for PHR
|
// Calculate the normalized tx_power for PHR
|
||||||
@@ -2564,7 +2567,7 @@ void post_process_ulsch(gNB_MAC_INST *nr_mac, post_process_pusch_t *pusch, NR_UE
|
|||||||
coreset,
|
coreset,
|
||||||
sched_ctrl->aggregation_level,
|
sched_ctrl->aggregation_level,
|
||||||
sched_ctrl->cce_index,
|
sched_ctrl->cce_index,
|
||||||
UE->UE_beam_index,
|
convert_to_fapi_beam(UE->UE_beam_index, nr_mac->beam_info.beam_mode),
|
||||||
UE->rnti);
|
UE->rnti);
|
||||||
pdcch_pdu->numDlDci++;
|
pdcch_pdu->numDlDci++;
|
||||||
|
|
||||||
|
|||||||
@@ -213,14 +213,15 @@ int nr_get_pucch_resource(NR_ControlResourceSet_t *coreset,
|
|||||||
NR_PUCCH_Config_t *pucch_Config,
|
NR_PUCCH_Config_t *pucch_Config,
|
||||||
int CCEIndex);
|
int CCEIndex);
|
||||||
|
|
||||||
void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
|
void nr_configure_pucch(nfapi_nr_pucch_pdu_t *pucch_pdu,
|
||||||
NR_ServingCellConfigCommon_t *scc,
|
NR_ServingCellConfigCommon_t *scc,
|
||||||
NR_UE_info_t* UE,
|
NR_UE_info_t *UE,
|
||||||
uint8_t pucch_resource,
|
uint8_t pucch_resource,
|
||||||
uint16_t O_csi,
|
uint16_t O_csi,
|
||||||
uint16_t O_ack,
|
uint16_t O_ack,
|
||||||
uint8_t O_sr,
|
uint8_t O_sr,
|
||||||
int r_pucch);
|
int r_pucch,
|
||||||
|
nr_beam_mode_t mode);
|
||||||
|
|
||||||
void find_search_space(int ss_type,
|
void find_search_space(int ss_type,
|
||||||
NR_BWP_Downlink_t *bwp,
|
NR_BWP_Downlink_t *bwp,
|
||||||
@@ -330,7 +331,8 @@ nfapi_nr_pusch_pdu_t *prepare_pusch_pdu(nfapi_nr_ul_tti_request_t *future_ul_tti
|
|||||||
int harq_id,
|
int harq_id,
|
||||||
int harq_round,
|
int harq_round,
|
||||||
int fh,
|
int fh,
|
||||||
int rnti);
|
int rnti,
|
||||||
|
nr_beam_mode_t beam_mode);
|
||||||
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *prepare_pdsch_pdu(nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu,
|
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *prepare_pdsch_pdu(nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu,
|
||||||
const gNB_MAC_INST *mac,
|
const gNB_MAC_INST *mac,
|
||||||
const NR_UE_info_t *UE,
|
const NR_UE_info_t *UE,
|
||||||
@@ -447,6 +449,7 @@ int ul_buffer_index(int frame, int slot, int slots_per_frame, int size);
|
|||||||
void UL_tti_req_ahead_initialization(gNB_MAC_INST *gNB, int n, int CCid, frame_t frameP, int slotP);
|
void UL_tti_req_ahead_initialization(gNB_MAC_INST *gNB, int n, int CCid, frame_t frameP, int slotP);
|
||||||
void fapi_beam_index_allocation(NR_ServingCellConfigCommon_t *scc, const nr_mac_config_t *config, gNB_MAC_INST *mac);
|
void fapi_beam_index_allocation(NR_ServingCellConfigCommon_t *scc, const nr_mac_config_t *config, gNB_MAC_INST *mac);
|
||||||
int get_fapi_beamforming_index(gNB_MAC_INST *mac, int ssb_idx);
|
int get_fapi_beamforming_index(gNB_MAC_INST *mac, int ssb_idx);
|
||||||
|
uint16_t convert_to_fapi_beam(const uint16_t beam_idx, const nr_beam_mode_t mode);
|
||||||
NR_beam_alloc_t beam_allocation_procedure(NR_beam_info_t *beam_info, int frame, int slot, int16_t beam_index, int slots_per_frame);
|
NR_beam_alloc_t beam_allocation_procedure(NR_beam_info_t *beam_info, int frame, int slot, int16_t beam_index, int slots_per_frame);
|
||||||
void reset_beam_status(NR_beam_info_t *beam_info, int frame, int slot, int16_t beam_index, int slots_per_frame, bool new_beam);
|
void reset_beam_status(NR_beam_info_t *beam_info, int frame, int slot, int16_t beam_index, int slots_per_frame, bool new_beam);
|
||||||
void beam_selection_procedures(gNB_MAC_INST *mac, NR_UE_info_t *UE);
|
void beam_selection_procedures(gNB_MAC_INST *mac, NR_UE_info_t *UE);
|
||||||
|
|||||||
@@ -794,7 +794,7 @@ typedef struct NR_UE_info {
|
|||||||
NR_UE_NR_Capability_t *capability;
|
NR_UE_NR_Capability_t *capability;
|
||||||
measgap_config_t measgap_config;
|
measgap_config_t measgap_config;
|
||||||
// UE selected beam index
|
// UE selected beam index
|
||||||
uint8_t UE_beam_index;
|
uint16_t UE_beam_index;
|
||||||
float ul_thr_ue;
|
float ul_thr_ue;
|
||||||
float dl_thr_ue;
|
float dl_thr_ue;
|
||||||
long pdsch_HARQ_ACK_Codebook;
|
long pdsch_HARQ_ACK_Codebook;
|
||||||
|
|||||||
Reference in New Issue
Block a user