Msg2 temporary fix for PDSCH time domain resource allocation (use the same as SIB1 from TS 38.214 Table 5.1.2.1.1-2)
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@@ -833,9 +833,9 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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if ((ra->Msg2_frame == frameP) && (ra->Msg2_slot == slotP)) {
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if ((ra->Msg2_frame == frameP) && (ra->Msg2_slot == slotP)) {
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int mcsIndex = 0;
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int mcsIndex = 0;
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int startSymbolAndLength = 0;
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int startSymbolAndLength = 53;
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int StartSymbolIndex = -1;
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int StartSymbolIndex = 2;
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int NrOfSymbols = 14;
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int NrOfSymbols = 12;
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int StartSymbolIndex_tmp = 0;
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int StartSymbolIndex_tmp = 0;
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int NrOfSymbols_tmp = 0;
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int NrOfSymbols_tmp = 0;
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int x_Overhead = 0;
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int x_Overhead = 0;
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@@ -958,16 +958,17 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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pdsch_pdu_rel15->rbSize = rbSize;
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pdsch_pdu_rel15->rbSize = rbSize;
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pdsch_pdu_rel15->VRBtoPRBMapping = 0;
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pdsch_pdu_rel15->VRBtoPRBMapping = 0;
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// FIXME: should use Initial BWP and maybe Default values from TS 38.214 Table 5.1.2.1.1-1
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for (int i=0; i<bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count; i++) {
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for (int i=0; i<bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count; i++) {
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startSymbolAndLength = bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
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startSymbolAndLength = bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
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SLIV2SL(startSymbolAndLength, &StartSymbolIndex_tmp, &NrOfSymbols_tmp);
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SLIV2SL(startSymbolAndLength, &StartSymbolIndex_tmp, &NrOfSymbols_tmp);
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if (NrOfSymbols_tmp < NrOfSymbols) {
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//if (NrOfSymbols_tmp < NrOfSymbols) {
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NrOfSymbols = NrOfSymbols_tmp;
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NrOfSymbols = NrOfSymbols_tmp;
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StartSymbolIndex = StartSymbolIndex_tmp;
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StartSymbolIndex = StartSymbolIndex_tmp;
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time_domain_assignment = i; // this is short PDSCH added to the config to fit mixed slot
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time_domain_assignment = i; // this is short PDSCH added to the config to fit mixed slot
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}
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//}
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break;
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}
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}
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AssertFatal(StartSymbolIndex >= 0, "StartSymbolIndex is negative\n");
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AssertFatal(StartSymbolIndex >= 0, "StartSymbolIndex is negative\n");
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pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
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pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
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@@ -1089,9 +1090,9 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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int mcsIndex = 0;
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int mcsIndex = 0;
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int startSymbolAndLength = 0;
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int startSymbolAndLength = 53;
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int StartSymbolIndex = -1;
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int StartSymbolIndex = 2;
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int NrOfSymbols = 5;
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int NrOfSymbols = 12;
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int StartSymbolIndex_tmp = 0;
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int StartSymbolIndex_tmp = 0;
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int NrOfSymbols_tmp = 0;
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int NrOfSymbols_tmp = 0;
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int x_Overhead = 0;
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int x_Overhead = 0;
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@@ -1240,7 +1241,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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pdsch_pdu_rel15->rbSize = rbSize;
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pdsch_pdu_rel15->rbSize = rbSize;
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pdsch_pdu_rel15->VRBtoPRBMapping = 0;
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pdsch_pdu_rel15->VRBtoPRBMapping = 0;
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// FIXME: should use Initial BWP
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// FIXME: should use Initial BWP and maybe Default values from TS 38.214 Table 5.1.2.1.1-1
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for (int i=0; i<bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count; i++) {
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for (int i=0; i<bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count; i++) {
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startSymbolAndLength = bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
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startSymbolAndLength = bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
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SLIV2SL(startSymbolAndLength, &StartSymbolIndex_tmp, &NrOfSymbols_tmp);
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SLIV2SL(startSymbolAndLength, &StartSymbolIndex_tmp, &NrOfSymbols_tmp);
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