Fixed dl ack tx in pucch 0
This commit is contained in:
@@ -278,8 +278,6 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
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vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_SEGMENTATION, VCD_FUNCTION_IN);
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vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_SEGMENTATION, VCD_FUNCTION_IN);
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harq_process->round = nr_rv_round_map_ue[harq_process->rvidx];
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//NR_DL_UE_HARQ_t *harq_process = dlsch->harq_processes[0];
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//NR_DL_UE_HARQ_t *harq_process = dlsch->harq_processes[0];
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if (!dlsch_llr) {
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if (!dlsch_llr) {
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@@ -659,7 +657,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
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harq_process->harq_ack.harq_id = harq_pid;
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harq_process->harq_ack.harq_id = harq_pid;
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harq_process->harq_ack.send_harq_status = 1;
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harq_process->harq_ack.send_harq_status = 1;
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harq_process->errors[harq_process->round]++;
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harq_process->errors[harq_process->round]++;
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// harq_process->round++; // [hna] uncomment this line when HARQ is implemented
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harq_process->round++; // [hna] uncomment this line when HARQ is implemented
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// printf("Rate: [UE %d] DLSCH: Setting NACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
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// printf("Rate: [UE %d] DLSCH: Setting NACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
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if (harq_process->round >= dlsch->Mlimit) {
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if (harq_process->round >= dlsch->Mlimit) {
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@@ -1074,11 +1074,9 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
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*/
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*/
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uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
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uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
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uint8_t harq_pid,
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uint8_t slot,
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uint8_t slot,
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uint8_t thread_id,
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NR_DL_FRAME_PARMS *frame_parms,
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uint8_t gNB_id,
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uint8_t Nl);
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NR_DL_FRAME_PARMS *frame_parms);
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@@ -476,17 +476,14 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
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uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
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uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
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uint8_t harq_pid,
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uint8_t slot,
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uint8_t slot,
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uint8_t thread_id,
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NR_DL_FRAME_PARMS *frame_parms,
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uint8_t gNB_id,
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uint8_t Nl) {
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NR_DL_FRAME_PARMS *frame_parms) {
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int tx_offset, ap;
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int tx_offset, ap;
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int32_t **txdata;
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int32_t **txdata;
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int32_t **txdataF;
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int32_t **txdataF;
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int timing_advance;
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int timing_advance;
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uint8_t Nl = UE->ulsch[thread_id][gNB_id][0]->harq_processes[harq_pid]->pusch_pdu.nrOfLayers; // cw 0
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/////////////////////////IFFT///////////////////////
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/////////////////////////IFFT///////////////////////
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///////////
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///////////
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@@ -2252,20 +2252,18 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
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*/
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*/
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if (get_softmodem_params()->usim_test==0) {
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if (get_softmodem_params()->usim_test==0) {
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LOG_D(PHY, "Sending PUCCH\n");
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LOG_I(PHY, "Generating PUCCH\n");
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pucch_procedures_ue_nr(ue,
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pucch_procedures_ue_nr(ue,
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gNB_id,
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gNB_id,
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proc,
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proc,
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TRUE);
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FALSE);
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}
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}
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LOG_D(PHY, "Sending data \n");
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LOG_I(PHY, "Sending Uplink data \n");
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nr_ue_pusch_common_procedures(ue,
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nr_ue_pusch_common_procedures(ue,
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harq_pid,
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slot_tx,
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slot_tx,
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thread_id,
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&ue->frame_parms,1);
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gNB_id,
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//ue->ulsch[thread_id][gNB_id][0]->harq_processes[harq_pid]->pusch_pdu.nrOfLayers);
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&ue->frame_parms);
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}
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}
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//LOG_M("txdata.m","txs",ue->common_vars.txdata[0],1228800,1,1);
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//LOG_M("txdata.m","txs",ue->common_vars.txdata[0],1228800,1,1);
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@@ -3373,6 +3371,9 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
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}
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}
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}
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}
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// exit dlsch procedures as there are no active dlsch
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if (is_cw0_active != ACTIVE && is_cw1_active != ACTIVE)
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return;
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// start ldpc decode for CW 0
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// start ldpc decode for CW 0
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dlsch0->harq_processes[harq_pid]->G = nr_get_G(dlsch0->harq_processes[harq_pid]->nb_rb,
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dlsch0->harq_processes[harq_pid]->G = nr_get_G(dlsch0->harq_processes[harq_pid]->nb_rb,
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@@ -55,6 +55,8 @@ int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
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double cpuf;
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double cpuf;
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uint8_t nfapi_mode = 0;
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uint8_t nfapi_mode = 0;
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uint16_t NB_UE_INST = 1;
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uint16_t NB_UE_INST = 1;
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uint8_t const nr_rv_round_map[4] = {0, 2, 1, 3};
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uint8_t const nr_rv_round_map_ue[4] = {0, 2, 1, 3};
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// needed for some functions
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// needed for some functions
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PHY_VARS_NR_UE * PHY_vars_UE_g[1][1]={{NULL}};
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PHY_VARS_NR_UE * PHY_vars_UE_g[1][1]={{NULL}};
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@@ -88,7 +88,7 @@ void handle_nr_uci(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl) {
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case NFAPI_NR_UCI_PDCCH_PDU_TYPE: break;
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case NFAPI_NR_UCI_PDCCH_PDU_TYPE: break;
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case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: {
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case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: {
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if (get_softmodem_params()->phy_test == 0) {
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//if (get_softmodem_params()->phy_test == 0) {
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nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1;
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nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1;
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// handle harq
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// handle harq
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int harq_idx_s = 0;
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int harq_idx_s = 0;
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@@ -120,7 +120,7 @@ void handle_nr_uci(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl) {
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}
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}
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}
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}
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}
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}
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}
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//}
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break;
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break;
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}
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}
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