From c8fbd905325517b5679f97ac441ba562fd9c4a4f Mon Sep 17 00:00:00 2001 From: Calvin HSU Date: Thu, 9 Aug 2018 15:56:53 +0200 Subject: [PATCH] UE: Add frequency domain resource in type0-pdcch and new field rb_offset --- .../nfapi/public_inc/fapi_nr_ue_interface.h | 6 ++++-- openair1/PHY/defs_nr_UE.h | 2 +- openair1/SCHED_NR_UE/fapi_nr_ue_l1.c | 12 +++++++----- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 13 +++++++++++-- 4 files changed, 23 insertions(+), 10 deletions(-) diff --git a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h index 87769925d1..966ff9b798 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h @@ -115,8 +115,10 @@ typedef struct { typedef struct { /// frequency_domain_resource; - uint32_t rb_start; - uint32_t rb_end; + //uint32_t rb_start; + //uint32_t rb_end; + uint64_t frequency_domain_resource; + uint16_t rb_offset; uint8_t duration; uint8_t cce_reg_mapping_type; // interleaved or noninterleaved diff --git a/openair1/PHY/defs_nr_UE.h b/openair1/PHY/defs_nr_UE.h index 0d65df80ae..3740fdd31a 100644 --- a/openair1/PHY/defs_nr_UE.h +++ b/openair1/PHY/defs_nr_UE.h @@ -774,7 +774,7 @@ typedef struct { int tciStatesPDCCH; int tciPresentInDCI; uint16_t pdcchDMRSScramblingID; - + uint16_t rb_offset; } NR_UE_PDCCH_CORESET; // Slots for PDCCH Monitoring configured as periodicity and offset diff --git a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c index 2e7b557634..4aeea534d7 100644 --- a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c +++ b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c @@ -68,16 +68,18 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel16 = dci_config->number_of_candidates[4]; pdcch_vars2->coreset[i].duration = dci_config->coreset.duration; - //pdcch_vars2->coreset[i].frequencyDomainResources; - //dci_config.coreset.rb_start; - //dci_config.coreset.rb_end; + + pdcch_vars2->coreset[i].frequencyDomainResources = dci_config.coreset.frequency_domain_resource; + pdcch_vars2->coreset[i].rb_offset = dci_config.coreset.rb_offset; if(dci_config->coreset.cce_reg_mapping_type == CCE_REG_MAPPING_TYPE_INTERLEAVED){ pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = dci_config->coreset.cce_reg_interleaved_shift_index; pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = dci_config->coreset.cce_reg_interleaved_reg_bundle_size; pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = dci_config->coreset.cce_reg_interleaved_interleaver_size; - }else{ - ; + }else{ //CCE_REG_MAPPING_TYPE_NON_INTERLEAVED + pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = 0; + pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = 0; + pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = 0; } pdcch_vars2->coreset[i].precoderGranularity = dci_config->coreset.precoder_granularity; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index 01406804d0..ade79bc577 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -236,8 +236,17 @@ int8_t nr_ue_decode_mib( //uint32_t cell_id = 0; // obtain from L1 later - mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset; - mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1; + //mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset; + //mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1; + uint64_t mask = 0x0; + uint8_t i; + for(i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs + mask = mask >> 1; + mask = mask | 0x100000000000; + } + mac->type0_pdcch_dci_config.coreset.frequency_domain_resource = mask; + mac->type0_pdcch_dci_config.coreset.rb_offset = rb_offset; // additional parameter other than coreset + //mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols; mac->type0_pdcch_dci_config.coreset.cce_reg_mapping_type = CCE_REG_MAPPING_TYPE_INTERLEAVED; mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L 38.211 7.3.2.2