ULSCH debugging RK.
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@@ -2720,9 +2720,9 @@ void dci_decoding_procedure0(LTE_UE_PDCCH **pdcch_vars,
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printf("dci_decoded_output[%d] => %x\n",i,dci_decoded_output[i]);
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printf("dci_decoded_output[%d] => %x\n",i,dci_decoded_output[i]);
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*/
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*/
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crc = (crc16(&dci_decoded_output[subframe&0x1][0],sizeof_bits)>>16) ^ extract_crc(&dci_decoded_output[subframe&0x1][0],sizeof_bits);
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crc = (crc16(&dci_decoded_output[subframe&0x1][0],sizeof_bits)>>16) ^ extract_crc(&dci_decoded_output[subframe&0x1][0],sizeof_bits);
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#ifdef DEBUG_DCI_DECODING
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//#ifdef DEBUG_DCI_DECODING
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printf("crc =>%x\n",crc);
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LOG_D(PHY,"crc =>%x\n",crc);
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#endif
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//#endif
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if (((L>1) && ((crc == si_rnti)||
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if (((L>1) && ((crc == si_rnti)||
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(crc == p_rnti)||
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(crc == p_rnti)||
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@@ -504,9 +504,7 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP, sub_frame
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schedule_SI(module_idP,frameP,subframeP);
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schedule_SI(module_idP,frameP,subframeP);
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// This schedules Random-Access for legacy LTE and eMTC starting in subframeP
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// This schedules Random-Access for legacy LTE and eMTC starting in subframeP
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schedule_RA(module_idP,frameP,subframeP);
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schedule_RA(module_idP,frameP,subframeP);
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// copy previously scheduled UL resources (ULSCH + HARQ)
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// copy previously scheduled UL resources (ULSCH + HARQ)
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copy_ulreq(module_idP,frameP,subframeP);
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copy_ulreq(module_idP,frameP,subframeP);
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// This schedules SRS in subframeP
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// This schedules SRS in subframeP
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schedule_SRS(module_idP,frameP,subframeP);
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schedule_SRS(module_idP,frameP,subframeP);
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@@ -2713,7 +2713,7 @@ int allocate_CCEs(int module_idP,
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int i,j,idci;
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int i,j,idci;
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int nCCE=0;
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int nCCE=0;
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LOG_D(MAC,"Allocate CCEs subframe %d, test %d : (DL %d,UL %d)\n",subframeP,test_onlyP,DL_req->number_dci,HI_DCI0_req->number_of_dci);
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LOG_D(MAC,"Allocate CCEs subframe %d, test %d : (DL PDU %d, DL DCI %d, UL %d)\n",subframeP,test_onlyP,DL_req->number_pdu,DL_req->number_dci,HI_DCI0_req->number_of_dci);
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DL_req->number_pdcch_ofdm_symbols=1;
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DL_req->number_pdcch_ofdm_symbols=1;
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try_again:
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try_again:
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@@ -941,13 +941,11 @@ abort();
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format0);
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format0);
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*/
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*/
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if (CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,aggregation,rnti)) {
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if (CCE_allocation_infeasible(module_idP,CC_id,2,subframeP,aggregation,rnti)) {
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LOG_W(MAC,"[eNB %d] frame %d subframe %d, UE %d/%x CC %d: not enough nCCE\n", module_idP,frameP,subframeP,UE_id,rnti,CC_id);
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LOG_W(MAC,"[eNB %d] frame %d subframe %d, UE %d/%x CC %d: not enough nCCE\n", module_idP,frameP,subframeP,UE_id,rnti,CC_id);
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continue; // break;
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continue; // break;
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} else{
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}
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LOG_D(MAC,"[eNB %d] frame %d subframe %d,Scheduling PUSCH for UE %d/%x CC %d : aggregation level %d, N_RB_UL %d\n",
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module_idP,frameP,subframeP,UE_id,rnti,CC_id, aggregation,N_RB_UL);
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}
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// if (eNB_UE_stats->mode == PUSCH) { // ue has a ulsch channel
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// if (eNB_UE_stats->mode == PUSCH) { // ue has a ulsch channel
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@@ -957,15 +955,8 @@ abort();
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harq_pid = subframe2harqpid(&cc[CC_id],sched_frame,sched_subframeP);
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harq_pid = subframe2harqpid(&cc[CC_id],sched_frame,sched_subframeP);
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round = UE_sched_ctrl->round_UL[CC_id][harq_pid];
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round = UE_sched_ctrl->round_UL[CC_id][harq_pid];
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AssertFatal(round<8,"round %d > 7 for UE %d/%x\n",round,UE_id,rnti);
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AssertFatal(round<8,"round %d > 7 for UE %d/%x\n",round,UE_id,rnti);
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/*
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LOG_D(MAC,"[eNB %d] frame %d subframe %d,Checking PUSCH %d for UE %d/%x CC %d : aggregation level %d, N_RB_UL %d\n",
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if (get_UL_harq_info(module_idP,CC_id,frameP,subframeP,&harq_pid,&round)<0) {
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module_idP,frameP,subframeP,harq_pid,UE_id,rnti,CC_id, aggregation,N_RB_UL);
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LOG_W(MAC,"[eNB %d] Scheduler Frame %d, subframeP %d: candidate harq_pid from PHY for UE %d CC %d RNTI %x\n",
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module_idP,frameP,subframeP, UE_id, CC_id, rnti);
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continue;
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} else
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LOG_T(MAC,"[eNB %d] Frame %d, subframeP %d, UE %d CC %d : got harq pid %d round %d (rnti %x)\n",
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module_idP,frameP,subframeP,UE_id,CC_id, harq_pid, round,rnti);
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*/
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RC.eNB[module_idP][CC_id]->pusch_stats_BO[UE_id][(frameP*10)+subframeP] = UE_template->ul_total_buffer;
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RC.eNB[module_idP][CC_id]->pusch_stats_BO[UE_id][(frameP*10)+subframeP] = UE_template->ul_total_buffer;
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VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_BO,RC.eNB[module_idP][CC_id]->pusch_stats_BO[UE_id][(frameP*10)+subframeP]);
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VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_BO,RC.eNB[module_idP][CC_id]->pusch_stats_BO[UE_id][(frameP*10)+subframeP]);
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@@ -1108,52 +1099,49 @@ abort();
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hi_dci0_pdu->dci_pdu.dci_pdu_rel8.cqi_csi_request = cqi_req;
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hi_dci0_pdu->dci_pdu.dci_pdu_rel8.cqi_csi_request = cqi_req;
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hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dl_assignment_index = UE_template->DAI_ul[sched_subframeP];
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hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dl_assignment_index = UE_template->DAI_ul[sched_subframeP];
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if (!CCE_allocation_infeasible(module_idP,CC_id,2,subframeP,
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aggregation,
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rnti)) {
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eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci++;
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LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n",
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harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP);
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// Add UL_config PDUs
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fill_nfapi_ulsch_config_request_rel8(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
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cqi_req,
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cc,
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UE_template->physicalConfigDedicated,
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get_tmode(module_idP,CC_id,UE_id),
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eNB->ul_handle,
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rnti,
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first_rb[CC_id], // resource_block_start
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rb_table[rb_table_index], // number_of_resource_blocks
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UE_template->mcs_UL[harq_pid],
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cshift, // cyclic_shift_2_for_drms
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0, // frequency_hopping_enabled_flag
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0, // frequency_hopping_bits
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ndi, // new_data_indication
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0, // redundancy_version
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harq_pid, // harq_process_number
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0, // ul_tx_mode
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0, // current_tx_nb
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0, // n_srs
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get_TBS_UL(UE_template->mcs_UL[harq_pid],
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rb_table[rb_table_index])
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);
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#ifdef Rel14
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if (UE_template->rach_resource_type>0) { // This is a BL/CE UE allocation
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fill_nfapi_ulsch_config_request_emtc(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
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UE_template->rach_resource_type>2 ? 2 : 1,
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1, //total_number_of_repetitions
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1, //repetition_number
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(frameP*10)+subframeP);
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}
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#endif
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ul_req_tmp->number_of_pdus++;
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eNB->ul_handle++;
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}
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eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci++;
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LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n",
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harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP);
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// Add UL_config PDUs
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fill_nfapi_ulsch_config_request_rel8(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
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cqi_req,
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cc,
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UE_template->physicalConfigDedicated,
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get_tmode(module_idP,CC_id,UE_id),
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eNB->ul_handle,
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rnti,
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first_rb[CC_id], // resource_block_start
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rb_table[rb_table_index], // number_of_resource_blocks
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UE_template->mcs_UL[harq_pid],
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cshift, // cyclic_shift_2_for_drms
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0, // frequency_hopping_enabled_flag
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0, // frequency_hopping_bits
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ndi, // new_data_indication
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0, // redundancy_version
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harq_pid, // harq_process_number
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0, // ul_tx_mode
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0, // current_tx_nb
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0, // n_srs
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get_TBS_UL(UE_template->mcs_UL[harq_pid],
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rb_table[rb_table_index])
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);
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#ifdef Rel14
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if (UE_template->rach_resource_type>0) { // This is a BL/CE UE allocation
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fill_nfapi_ulsch_config_request_emtc(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
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UE_template->rach_resource_type>2 ? 2 : 1,
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1, //total_number_of_repetitions
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1, //repetition_number
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(frameP*10)+subframeP);
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}
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#endif
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ul_req_tmp->number_of_pdus++;
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eNB->ul_handle++;
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add_ue_ulsch_info(module_idP,
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add_ue_ulsch_info(module_idP,
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CC_id,
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CC_id,
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UE_id,
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UE_id,
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@@ -1162,7 +1150,7 @@ abort();
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LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generated ULSCH DCI for next UE_id %d, format 0\n", module_idP,CC_id,frameP,subframeP,UE_id);
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LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generated ULSCH DCI for next UE_id %d, format 0\n", module_idP,CC_id,frameP,subframeP,UE_id);
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}
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}
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else { // round > 0 => retransmission
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else { // round > 0 => retransmission
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T(T_ENB_MAC_UE_UL_SCHEDULE_RETRANSMISSION, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP),
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T(T_ENB_MAC_UE_UL_SCHEDULE_RETRANSMISSION, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP),
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T_INT(subframeP), T_INT(harq_pid), T_INT(UE_template->mcs_UL[harq_pid]), T_INT(first_rb[CC_id]), T_INT(rb_table[rb_table_index]),
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T_INT(subframeP), T_INT(harq_pid), T_INT(UE_template->mcs_UL[harq_pid]), T_INT(first_rb[CC_id]), T_INT(rb_table[rb_table_index]),
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