TEST: TPC + TA cleaned up in DLSCH
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@@ -543,18 +543,15 @@ schedule_ue_spec(module_id_t module_idP,
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sub_frame_t subframeP)
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sub_frame_t subframeP)
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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{
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{
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int ta_len = 0;
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unsigned char dlsch_buffer[MAX_DLSCH_PAYLOAD_BYTES];
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unsigned char dlsch_buffer[MAX_DLSCH_PAYLOAD_BYTES];
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eNB_MAC_INST *eNB = RC.mac[module_idP];
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eNB_MAC_INST *eNB = RC.mac[module_idP];
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COMMON_channels_t *cc = eNB->common_channels;
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COMMON_channels_t *cc = eNB->common_channels;
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UE_info_t *UE_info = &eNB->UE_info;
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UE_info_t *UE_info = &eNB->UE_info;
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int tpc = 1;
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const int dl_Bandwidth = cc[CC_id].mib->message.dl_Bandwidth;
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const int dl_Bandwidth = cc[CC_id].mib->message.dl_Bandwidth;
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const int N_RB_DL = to_prb(dl_Bandwidth);
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const int N_RB_DL = to_prb(dl_Bandwidth);
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const int N_RBG = to_rbg(eNB->common_channels[CC_id].mib->message.dl_Bandwidth);
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const int N_RBG = to_rbg(eNB->common_channels[CC_id].mib->message.dl_Bandwidth);
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int total_nb_available_rb = N_RB_DL;
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int total_nb_available_rb = N_RB_DL;
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nfapi_dl_config_request_body_t *dl_req = &eNB->DL_req[CC_id].dl_config_request_body;
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nfapi_dl_config_request_body_t *dl_req = &eNB->DL_req[CC_id].dl_config_request_body;
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int ta_update;
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start_meas(&eNB->schedule_dlsch);
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start_meas(&eNB->schedule_dlsch);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH,
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH,
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@@ -850,6 +847,7 @@ schedule_ue_spec(module_id_t module_idP,
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if (ue_sched_ctrl->ta_timer)
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if (ue_sched_ctrl->ta_timer)
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ue_sched_ctrl->ta_timer--;
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ue_sched_ctrl->ta_timer--;
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int ta_update = 31;
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if (ue_sched_ctrl->ta_timer == 0) {
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if (ue_sched_ctrl->ta_timer == 0) {
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ta_update = ue_sched_ctrl->ta_update;
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ta_update = ue_sched_ctrl->ta_update;
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@@ -860,11 +858,9 @@ schedule_ue_spec(module_id_t module_idP,
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/* reset ta_update */
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/* reset ta_update */
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ue_sched_ctrl->ta_update = 31;
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ue_sched_ctrl->ta_update = 31;
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} else {
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ta_update = 31;
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}
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}
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ta_len = (ta_update != 31) ? 2 : 0;
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int ta_len = (ta_update != 31) ? 2 : 0;
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int num_sdus = 0;
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int num_sdus = 0;
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@@ -1092,8 +1088,9 @@ schedule_ue_spec(module_id_t module_idP,
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// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
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// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
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int32_t framex10psubframe = ue_template->pucch_tpc_tx_frame * 10 + ue_template->pucch_tpc_tx_subframe;
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int32_t framex10psubframe = ue_template->pucch_tpc_tx_frame * 10 + ue_template->pucch_tpc_tx_subframe;
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int tpc = 1;
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if (framex10psubframe + 10 <= (frameP * 10) + subframeP || //normal case
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if (framex10psubframe + 10 <= (frameP * 10) + subframeP || //normal case
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(framex10psubframe > (frameP * 10) + subframeP && 10240 - framex10psubframe + (frameP * 10) + subframeP >= 10)) //frame wrap-around
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(framex10psubframe > (frameP * 10) + subframeP && 10240 - framex10psubframe + (frameP * 10) + subframeP >= 10)) { //frame wrap-around
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if (ue_sched_ctrl->pucch1_cqi_update[CC_id] == 1) {
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if (ue_sched_ctrl->pucch1_cqi_update[CC_id] == 1) {
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ue_sched_ctrl->pucch1_cqi_update[CC_id] = 0;
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ue_sched_ctrl->pucch1_cqi_update[CC_id] = 0;
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ue_template->pucch_tpc_tx_frame = frameP;
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ue_template->pucch_tpc_tx_frame = frameP;
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@@ -1116,11 +1113,6 @@ schedule_ue_spec(module_id_t module_idP,
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snr,
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snr,
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target_snr);
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target_snr);
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} // Po_PUCCH has been updated
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} // Po_PUCCH has been updated
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else {
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tpc = 1; //0
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} // time to do TPC update
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else {
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tpc = 1; //0
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}
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}
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nfapi_dl_config_request_pdu_t *dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
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nfapi_dl_config_request_pdu_t *dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
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