pdcch_dmrs malloc fix
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@@ -121,8 +121,11 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
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nr_polar_init(&fp->pbch_polar_params, 1);
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nr_polar_init(&fp->pbch_polar_params, 1);
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//PDCCH DMRS init
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//PDCCH DMRS init
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pdcch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t**));
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pdcch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t**));
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for (int slot=0; slot<fp->slots_per_frame; slot++)
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for (int slot=0; slot<fp->slots_per_frame; slot++) {
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pdcch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot);
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pdcch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot);
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for (int symb=0; symb<fp->symbols_per_slot; symb++)
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pdcch_dmrs[slot][symb] = (uint32_t *)malloc16(NR_MAX_PDCCH_DMRS_LENGTH_DWORD);
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}
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nr_init_pdcch_dmrs(gNB, cfg->sch_config.physical_cell_id.value);
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nr_init_pdcch_dmrs(gNB, cfg->sch_config.physical_cell_id.value);
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@@ -278,7 +281,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
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{
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{
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// NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
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// NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
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nfapi_config_request_t *cfg = &gNB->gNB_config;
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nfapi_config_request_t *cfg = &gNB->gNB_config;
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NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
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NR_gNB_COMMON* const common_vars = &gNB->common_vars;
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NR_gNB_COMMON* const common_vars = &gNB->common_vars;
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LTE_eNB_PUSCH** const pusch_vars = gNB->pusch_vars;
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LTE_eNB_PUSCH** const pusch_vars = gNB->pusch_vars;
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LTE_eNB_SRS* const srs_vars = gNB->srs_vars;
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LTE_eNB_SRS* const srs_vars = gNB->srs_vars;
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@@ -297,9 +299,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
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free_and_zero(common_vars->rxdataF);
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free_and_zero(common_vars->rxdataF);
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// PDCCH DMRS sequences
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// PDCCH DMRS sequences
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pdcch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t**));
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for (int slot=0; slot<fp->slots_per_frame; slot++)
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free_and_zero(pdcch_dmrs[slot]);
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free_and_zero(pdcch_dmrs);
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free_and_zero(pdcch_dmrs);
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// Channel estimates for SRS
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// Channel estimates for SRS
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@@ -56,7 +56,7 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB)
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void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
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void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
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{
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{
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uint32_t n, x1, x2;
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uint32_t x1, x2;
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uint8_t reset = 1;
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uint8_t reset = 1;
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NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
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NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
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uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
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uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
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@@ -291,7 +291,7 @@ typedef struct PHY_VARS_gNB_s {
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uint32_t nr_gold_pbch_dmrs[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
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uint32_t nr_gold_pbch_dmrs[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
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/// PDCCH DMRS sequence
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/// PDCCH DMRS sequence
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uint32_t **nr_gold_pdcch_dmrs[NR_MAX_PDCCH_DMRS_LENGTH_DWORD];
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uint32_t ***nr_gold_pdcch_dmrs;
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/// Indicator set to 0 after first SR
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/// Indicator set to 0 after first SR
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uint8_t first_sr[NUMBER_OF_UE_MAX];
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uint8_t first_sr[NUMBER_OF_UE_MAX];
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