diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index 616bed8a6f..a942045235 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -165,7 +165,6 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, nfapi_nr_uci_pucch_pdu_format_0_1_t* uci_pdu, nfapi_nr_pucch_pdu_t* pucch_pdu) { - int32_t **rxdataF = gNB->common_vars.rxdataF; NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms; @@ -413,8 +412,8 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, uci_pdu->harq->harq_confidence_level = (no_conf) ? 1 : 0; uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(1); uci_pdu->harq->harq_list[0].harq_value = index&0x01; - LOG_D(PHY, "HARQ value %d with confidence level (0 is good, 1 is bad) %d\n", - uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level); + LOG_I(PHY, "Slot %d HARQ value %d with confidence level (0 is good, 1 is bad) %d\n", + slot,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level); if (pucch_pdu->sr_flag == 1) { uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr)); uci_pdu->sr->sr_indication = (index>1) ? 1 : 0; @@ -428,8 +427,8 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(2); uci_pdu->harq->harq_list[1].harq_value = index&0x01; uci_pdu->harq->harq_list[0].harq_value = (index>>1)&0x01; - LOG_D(PHY, "HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d\n", - uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level); + LOG_I(PHY, "Slot %d HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d\n", + slot,uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level); if (pucch_pdu->sr_flag == 1) { uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr)); uci_pdu->sr->sr_indication = (index>3) ? 1 : 0; diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c index 00ccb419b4..8ddec64455 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c +++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c @@ -292,11 +292,11 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH stop_meas(&gNB->ulsch_decoding_stats); if (ret > gNB->ulsch[ULSCH_id][0]->max_ldpc_iterations){ - LOG_I(PHY, "ULSCH %d in error\n",ULSCH_id); + LOG_D(PHY, "ULSCH %d in error\n",ULSCH_id); nr_fill_indication(gNB,frame_rx, slot_rx, ULSCH_id, harq_pid, 1); } else if(gNB->ulsch[ULSCH_id][0]->harq_processes[harq_pid]->b!=NULL){ - LOG_I(PHY, "ULSCH received ok \n"); + LOG_D(PHY, "ULSCH received ok \n"); nr_fill_indication(gNB,frame_rx, slot_rx, ULSCH_id, harq_pid, 0); } } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 0ab14c1f1c..70a9b11176 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -333,33 +333,36 @@ void nr_schedule_pucch(int Mod_idP, NR_sched_pucch *curr_pucch; for (int k=0; kUE_sched_ctrl[UE_id].sched_pucch[k]; - O_ack = curr_pucch->dai_c; - O_uci = O_ack + curr_pucch->csi_bits; // for now we are just sending acknacks in pucch - if ((O_uci>0 || SR_flag==1) && (frameP == curr_pucch->frame) && (slotP == curr_pucch->ul_slot)) { + for (int l=0; l<2; l++) { + curr_pucch = &UE_list->UE_sched_ctrl[UE_id].sched_pucch[k][l]; + O_ack = curr_pucch->dai_c; + O_uci = O_ack + curr_pucch->csi_bits; // for now we are just sending acknacks in pucch + if ((O_uci>0 || SR_flag==1) && (frameP == curr_pucch->frame) && (slotP == curr_pucch->ul_slot)) { - UL_tti_req->SFN = curr_pucch->frame; - UL_tti_req->Slot = curr_pucch->ul_slot; - UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE; - UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t); - nfapi_nr_pucch_pdu_t *pucch_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].pucch_pdu; - memset(pucch_pdu,0,sizeof(nfapi_nr_pucch_pdu_t)); - UL_tti_req->n_pdus+=1; + UL_tti_req->SFN = curr_pucch->frame; + UL_tti_req->Slot = curr_pucch->ul_slot; + UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE; + UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t); + nfapi_nr_pucch_pdu_t *pucch_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].pucch_pdu; + memset(pucch_pdu,0,sizeof(nfapi_nr_pucch_pdu_t)); + UL_tti_req->n_pdus+=1; - LOG_I(MAC,"Scheduling pucch reception for frame %d slot %d\n", frameP, slotP); + LOG_I(MAC,"Scheduling pucch reception for frame %d slot %d with SR flag %d and (%d, %d) (ACK, CSI) bits\n", + frameP,slotP,SR_flag,O_ack,curr_pucch->csi_bits); - nr_configure_pucch(pucch_pdu, - scc, - ubwp, - UE_list->rnti[UE_id], - curr_pucch->resource_indicator, - O_uci, - O_ack, - SR_flag); + nr_configure_pucch(pucch_pdu, + scc, + ubwp, + UE_list->rnti[UE_id], + curr_pucch->resource_indicator, + O_uci, + O_ack, + SR_flag); - memset((void *) &UE_list->UE_sched_ctrl[UE_id].sched_pucch[k], - 0, - sizeof(NR_sched_pucch)); + memset((void *) &UE_list->UE_sched_ctrl[UE_id].sched_pucch[k][l], + 0, + sizeof(NR_sched_pucch)); + } } } } @@ -386,7 +389,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, int UE_id; uint64_t *dlsch_in_slot_bitmap=NULL; uint64_t *ulsch_in_slot_bitmap=NULL; - int pucch_sched; + int pucch_sched, pucch_occ; UE_id=0; int bwp_id = 1; @@ -402,17 +405,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0) nr_ulmix_slots++; - if (slot== 0 && (UE_list->fiveG_connected[UE_id] || get_softmodem_params()->phy_test)) { - for (int k=0; kUE_sched_ctrl[UE_id].sched_pucch[k], - 0, - sizeof(NR_sched_pucch)); - memset((void *) &UE_list->UE_sched_ctrl[UE_id].sched_pusch[k], - 0, - sizeof(NR_sched_pusch)); - } - } - start_meas(&RC.nrmac[module_idP]->eNB_scheduler); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN); @@ -511,8 +503,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, if (UE_list->fiveG_connected[UE_id] && (is_xlsch_in_slot(*dlsch_in_slot_bitmap,slot%num_slots_per_tdd))) { ue_sched_ctl->current_harq_pid = slot % num_slots_per_tdd; - nr_acknack_scheduling(module_idP, UE_id, frame, slot, num_slots_per_tdd,&pucch_sched); - nr_schedule_uss_dlsch_phytest(module_idP, frame, slot, &UE_list->UE_sched_ctrl[UE_id].sched_pucch[pucch_sched], NULL); + nr_acknack_scheduling(module_idP, UE_id, frame, slot, num_slots_per_tdd,&pucch_sched,&pucch_occ); + nr_schedule_uss_dlsch_phytest(module_idP, frame, slot, &UE_list->UE_sched_ctrl[UE_id].sched_pucch[pucch_sched][pucch_occ], NULL); // resetting ta flag gNB->ta_len = 0; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index a87aa93866..071b5c39c6 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -371,7 +371,6 @@ int configure_fapi_dl_pdu(int Mod_idP, dci_pdu_rel15[0].ndi = UE_list->UE_sched_ctrl[UE_id].harq_processes[current_harq_pid].ndi; // DAI dci_pdu_rel15[0].dai[0].val = (pucch_sched->dai_c-1)&3; - // TPC for PUCCH dci_pdu_rel15[0].tpc = UE_list->UE_sched_ctrl[UE_id].tpc1; // table 7.2.1-1 in 38.213 // PUCCH resource indicator diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 1d95800ebc..ce74f3a674 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -1471,12 +1471,16 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){ 0, sizeof(NR_UE_sched_ctrl_t)); UE_list->UE_sched_ctrl[UE_id].ul_rssi = 0; - UE_list->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch *)malloc(num_slots_ul*sizeof(NR_sched_pucch)); + UE_list->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch **)malloc(num_slots_ul*sizeof(NR_sched_pucch *)); + for (int s=0; sUE_sched_ctrl[UE_id].sched_pucch[s] = (NR_sched_pucch *)malloc(2*sizeof(NR_sched_pucch)); UE_list->UE_sched_ctrl[UE_id].sched_pusch = (NR_sched_pusch *)malloc(num_slots_ul*sizeof(NR_sched_pusch)); for (int k=0; kUE_sched_ctrl[UE_id].sched_pucch[k], - 0, - sizeof(NR_sched_pucch)); + for (int l=0; l<2; l++) + memset((void *) &UE_list->UE_sched_ctrl[UE_id].sched_pucch[k][l], + 0, + sizeof(NR_sched_pucch)); + memset((void *) &UE_list->UE_sched_ctrl[UE_id].sched_pusch[k], 0, sizeof(NR_sched_pusch)); @@ -1652,13 +1656,15 @@ void nr_csi_meas_reporting(int Mod_idP, csirep = csi_measconfig->csi_ReportConfigToAddModList->list.array[csi_report_id]; AssertFatal(csirep->reportConfigType.choice.periodic!=NULL,"Only periodic CSI reporting is implemented currently"); - int period, offset; + int period, offset, sched_slot; csi_period_offset(csirep,&period,&offset); + sched_slot = (period+offset)%n_slots_frame; + // prepare to schedule csi measurement reception according to 5.2.1.4 in 38.214 + // preparation is done in first slot of tdd period + if ( (frame%(period/n_slots_frame)==(offset/n_slots_frame)) && (slot==((sched_slot/slots_per_tdd)*slots_per_tdd))) { - // schedule csi measurement reception according to 5.2.1.4 in 38.214 - if ( ((n_slots_frame*frame + slot - offset)%period) == 0) { - - curr_pucch = &UE_list->UE_sched_ctrl[UE_id].sched_pucch[slot-slots_per_tdd+ul_slots]; + // we are scheduling pucch for csi in the first pucch occasion (this comes before ack/nack) + curr_pucch = &UE_list->UE_sched_ctrl[UE_id].sched_pucch[sched_slot-slots_per_tdd+ul_slots][0]; NR_PUCCH_CSI_Resource_t *pucchcsires = csirep->reportConfigType.choice.periodic->pucch_CSI_ResourceList.list.array[0]; @@ -1705,7 +1711,7 @@ void nr_csi_meas_reporting(int Mod_idP, } curr_pucch->csi_bits += get_csi_bitlen(Mod_idP,UE_id,csi_report_id); // TODO function to compute CSI meas report bit size curr_pucch->frame = frame; - curr_pucch->ul_slot = slot; + curr_pucch->ul_slot = sched_slot; } } } @@ -1717,12 +1723,13 @@ void nr_acknack_scheduling(int Mod_idP, frame_t frameP, sub_frame_t slotP, int slots_per_tdd, - int *pucch_id) { + int *pucch_id, + int *pucch_occ) { NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon; NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list; NR_sched_pucch *curr_pucch; - int first_ul_slot_tdd,k,i; + int pucch_res,first_ul_slot_tdd,k,i,l; uint8_t pdsch_to_harq_feedback[8]; int found = 0; int nr_ulmix_slots = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots; @@ -1735,28 +1742,34 @@ void nr_acknack_scheduling(int Mod_idP, // for each possible ul or mixed slot for (k=0; kUE_sched_ctrl[UE_id].sched_pucch[k]; - //if it is possible to schedule acknack in current pucch (no exclusive csi pucch) - if ((curr_pucch->csi_bits == 0) || (curr_pucch->simultaneous_harqcsi==true)) { - // if there is free room in current pucch structure - if (curr_pucch->dai_cframe = frameP; - curr_pucch->dai_c++; - curr_pucch->resource_indicator = 0; // in phytest with only 1 UE we are using just the 1st resource - // first pucch occasion in first UL or MIXED slot - first_ul_slot_tdd = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots; - i = 0; - while (i<8 && found == 0) { // look if timing indicator is among allowed values - if (pdsch_to_harq_feedback[i]==(first_ul_slot_tdd+k)-(slotP % slots_per_tdd)) - found = 1; - if (found == 0) i++; - } - if (found == 1) { - // computing slot in which pucch is scheduled - curr_pucch->ul_slot = first_ul_slot_tdd + k + (slotP - (slotP % slots_per_tdd)); - curr_pucch->timing_indicator = i; // index in the list of timing indicators - *pucch_id = k; - return; + for (l=0; l<2; l++) { + curr_pucch = &UE_list->UE_sched_ctrl[UE_id].sched_pucch[k][l]; + //if it is possible to schedule acknack in current pucch (no exclusive csi pucch) + if ((curr_pucch->csi_bits == 0) || (curr_pucch->simultaneous_harqcsi==true)) { + // if there is free room in current pucch structure + if (curr_pucch->dai_c-1){ + curr_pucch->resource_indicator = pucch_res; + curr_pucch->frame = frameP; + curr_pucch->dai_c++; + // first pucch occasion in first UL or MIXED slot + first_ul_slot_tdd = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots; + i = 0; + while (i<8 && found == 0) { // look if timing indicator is among allowed values + if (pdsch_to_harq_feedback[i]==(first_ul_slot_tdd+k)-(slotP % slots_per_tdd)) + found = 1; + if (found == 0) i++; + } + if (found == 1) { + // computing slot in which pucch is scheduled + curr_pucch->ul_slot = first_ul_slot_tdd + k + (slotP - (slotP % slots_per_tdd)); + curr_pucch->timing_indicator = i; // index in the list of timing indicators + *pucch_id = k; + *pucch_occ = l; + return; + } + } } } } @@ -1765,6 +1778,18 @@ void nr_acknack_scheduling(int Mod_idP, } +int get_pucch_resource(NR_UE_list_t *UE_list,int UE_id,int k,int l) { + + // to be updated later + // for now we are just using resource 0 for acknack pucch + // use the second allocation just in case there is csi in the first + if (l==1 && UE_list->UE_sched_ctrl[UE_id].sched_pucch[k][0].csi_bits==0) + return -1; + else + return 0; + +} + void find_aggregation_candidates(uint8_t *aggregation_level, uint8_t *nr_of_candidates, NR_SearchSpace_t *ss) { diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 13a38ae4b7..2ff5145943 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -181,7 +181,10 @@ void nr_acknack_scheduling(int Mod_idP, frame_t frameP, sub_frame_t slotP, int slots_per_tdd, - int *pucch_id); + int *pucch_id, + int *pucch_occ); + +int get_pucch_resource(NR_UE_list_t *UE_list,int UE_id,int k,int l); void get_pdsch_to_harq_feedback(int Mod_idP, int UE_id, diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 1bb8b9ab40..1bb8f79210 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -306,7 +306,7 @@ typedef struct nr_csi_report { typedef struct { uint64_t dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch uint64_t ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch - NR_sched_pucch *sched_pucch; + NR_sched_pucch **sched_pucch; NR_sched_pusch *sched_pusch; uint16_t ta_timer; int16_t ta_update; diff --git a/openair2/RRC/NR/rrc_gNB_reconfig.c b/openair2/RRC/NR/rrc_gNB_reconfig.c index decb99b173..903efc737c 100644 --- a/openair2/RRC/NR/rrc_gNB_reconfig.c +++ b/openair2/RRC/NR/rrc_gNB_reconfig.c @@ -906,7 +906,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ASN_SEQUENCE_ADD(&pucch_Config->resourceToAddModList->list,pucchres1); pucchres2->pucch_ResourceId=3; - pucchres2->startingPRB=40; + pucchres2->startingPRB=32; pucchres2->intraSlotFrequencyHopping=NULL; pucchres2->secondHopPRB=NULL; pucchres2->format.present= NR_PUCCH_Resource__format_PR_format2; @@ -917,7 +917,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ASN_SEQUENCE_ADD(&pucch_Config->resourceToAddModList->list,pucchres2); pucchres3->pucch_ResourceId=4; - pucchres3->startingPRB=40; + pucchres3->startingPRB=32; pucchres3->intraSlotFrequencyHopping=NULL; pucchres3->secondHopPRB=NULL; pucchres3->format.present= NR_PUCCH_Resource__format_PR_format2;