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updating config file for benetel in CI folder

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This commit is contained in:
Florian Kaltenberger
2021-03-29 10:35:35 +02:00
committed by hardy
parent 5e9248938a
commit d08bb68b15
1 changed files with 18 additions and 32 deletions
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ci-scripts/conf_files/benetel-5g.conf
+18 -32
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@@ -23,6 +23,7 @@ gNBs =
ssb_SubcarrierOffset = 31; //0; ssb_SubcarrierOffset = 31; //0;
pdsch_AntennaPorts = 1; pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 1;
#pusch_TargetSNRx10 = 200; #pusch_TargetSNRx10 = 200;
#pucch_TargetSNRx10 = 200; #pucch_TargetSNRx10 = 200;
pusch_TargetSNRx10 = 200; pusch_TargetSNRx10 = 200;
@@ -50,7 +51,7 @@ gNBs =
#initialDownlinkBWP #initialDownlinkBWP
#genericParameters #genericParameters
# this is RBstart=84,L=13 (275*(L-1))+RBstart # this is RBstart=84,L=13 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6366; //28875; //6366; #6407; #3384; initialDLBWPlocationAndBandwidth = 6368;
# subcarrierSpacing # subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1; initialDLBWPsubcarrierSpacing = 1;
@@ -59,27 +60,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0; initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon #pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries) #pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; initialDLBWPk0_0 = 0; #for DL slot
#initialULBWPmappingType initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
#0=typeA,1=typeB initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0; initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0; initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12 initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4 //5 (4 is for 43, 5 is for 57)
initialDLBWPstartSymbolAndLength_3 = 57; //43; //57;
#uplinkConfigCommon #uplinkConfigCommon
#frequencyInfoUL #frequencyInfoUL
ul_frequencyBand = 78; ul_frequencyBand = 78;
@@ -92,7 +80,7 @@ gNBs =
pMax = 20; pMax = 20;
#initialUplinkBWP #initialUplinkBWP
#genericParameters #genericParameters
initialULBWPlocationAndBandwidth = 6366; //28875; //6366; #6407; #3384; initialULBWPlocationAndBandwidth = 6368;
# subcarrierSpacing # subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1; initialULBWPsubcarrierSpacing = 1;
@@ -136,20 +124,18 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B # 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0, restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements) # pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1 initialULBWPmappingType_0 = 1
# this is SS=0 L=11 initialULBWPstartSymbolAndLength_0 = 55; # this is SS=0 L=12
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7; initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1; initialULBWPmappingType_2 = 1;
# this is SS=10 L=4 initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1; msg3_DeltaPreamble = 1;
#p0_NominalWithGrant =-90; #p0_NominalWithGrant =-90;