diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
index bc435ec047..0167a5579b 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
@@ -378,6 +378,7 @@ int configure_fapi_dl_pdu(int Mod_idP,
   // PDSCH to HARQ TI
   dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator.val = pucch_sched->timing_indicator;
   UE_list->UE_sched_ctrl[UE_id].harq_processes[current_harq_pid].feedback_slot = pucch_sched->ul_slot;
+  UE_list->UE_sched_ctrl[UE_id].harq_processes[current_harq_pid].is_waiting = 1;
   // antenna ports
   dci_pdu_rel15[0].antenna_ports.val = 0;  // nb of cdm groups w/o data 1 and dmrs port 0
 
diff --git a/openair2/LAYER2/NR_MAC_gNB/main.c b/openair2/LAYER2/NR_MAC_gNB/main.c
index 669bc1cd5a..56e020838d 100644
--- a/openair2/LAYER2/NR_MAC_gNB/main.c
+++ b/openair2/LAYER2/NR_MAC_gNB/main.c
@@ -116,6 +116,7 @@ void mac_top_init_gNB(void)
       for (int list_harq = 0; list_harq < NR_MAX_NB_HARQ_PROCESSES; list_harq++) {
         UE_list->UE_sched_ctrl[list_el].harq_processes[list_harq].round = 0;
         UE_list->UE_sched_ctrl[list_el].harq_processes[list_harq].ndi = 0;
+        UE_list->UE_sched_ctrl[list_el].harq_processes[list_harq].is_waiting = 0;
       }
     }
 
diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
index c5ef191506..0125535071 100644
--- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
@@ -188,6 +188,7 @@ typedef struct NR_sched_pucch {
 } NR_sched_pucch;
 
 typedef struct NR_UE_harq {
+  uint8_t is_waiting;
   uint8_t ndi;
   uint8_t round;
   uint16_t feedback_slot;
diff --git a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c
index 58a8171e8e..2b8dc0ec02 100644
--- a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c
+++ b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c
@@ -102,9 +102,20 @@ void handle_nr_uci(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl) {
                 sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
                 sched_ctrl->harq_processes[harq_idx].round = 0;
               }
+              sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
               harq_idx_s = harq_idx + 1;
               break;
             }
+            // if gNB fails to receive a ACK/NACK
+            else if (((UL_info->slot-1) > sched_ctrl->harq_processes[harq_idx].feedback_slot) &&
+                    (sched_ctrl->harq_processes[harq_idx].is_waiting)) {
+              sched_ctrl->harq_processes[harq_idx].round++;
+              if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
+                sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
+                sched_ctrl->harq_processes[harq_idx].round = 0;
+              }
+              sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
+            }
           }
         }
         break;