Merge remote-tracking branch 'origin/develop' into develop-CSI
# Conflicts: # openair1/PHY/INIT/nr_init.c # openair1/PHY/NR_REFSIG/nr_refsig.h # openair1/PHY/NR_TRANSPORT/nr_csi_rs.c # openair1/PHY/NR_TRANSPORT/nr_transport_proto.h # openair1/SCHED_NR/phy_procedures_nr_gNB.c # openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c # openair2/RRC/NR/MESSAGES/asn1_msg.c # openair2/RRC/NR/MESSAGES/asn1_msg.h
This commit is contained in:
+25
-20
@@ -536,6 +536,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
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}
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nr_generate_modulation_table();
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gNB->pdcch_gold_init = cfg->cell_config.phy_cell_id.value;
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nr_init_pdcch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
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nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
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@@ -549,28 +550,30 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
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pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
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AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
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int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
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for (int symb=0; symb<fp->symbols_per_slot; symb++) {
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pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(nb_codewords*sizeof(uint32_t *));
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pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *));
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AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
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for (int q=0; q<nb_codewords; q++) {
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for (int q=0; q<NR_NB_NSCID; q++) {
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pdsch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pdsch_dmrs_init_length*sizeof(uint32_t));
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AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d codeword %d - malloc failed\n", slot, symb, q);
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AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
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}
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}
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}
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nr_init_pdsch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
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for (int nscid = 0; nscid < NR_NB_NSCID; nscid++) {
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gNB->pdsch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
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nr_init_pdsch_dmrs(gNB, nscid, cfg->cell_config.phy_cell_id.value);
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}
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//PUSCH DMRS init
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gNB->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(2*sizeof(uint32_t ***));
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gNB->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(NR_NB_NSCID*sizeof(uint32_t ***));
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uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
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// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
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int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
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for(int nscid=0; nscid<2; nscid++) {
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for(int nscid=0; nscid<NR_NB_NSCID; nscid++) {
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pusch_dmrs[nscid] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
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AssertFatal(pusch_dmrs[nscid]!=NULL, "NR init: pusch_dmrs for nscid %d - malloc failed\n", nscid);
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@@ -585,9 +588,10 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
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}
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}
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uint32_t Nid_pusch[2] = {cfg->cell_config.phy_cell_id.value,cfg->cell_config.phy_cell_id.value};
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LOG_D(PHY,"Initializing PUSCH DMRS Gold sequence with (%x,%x)\n",Nid_pusch[0],Nid_pusch[1]);
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nr_gold_pusch(gNB, &Nid_pusch[0]);
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for (int nscid=0; nscid<NR_NB_NSCID; nscid++) {
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gNB->pusch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
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nr_gold_pusch(gNB, nscid, gNB->pusch_gold_init[nscid]);
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}
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// CSI RS init
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// ceil((NB_RB*8(max allocation per RB)*2(QPSK))/32)
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@@ -603,6 +607,8 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
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AssertFatal(gNB->nr_csi_rs_info->nr_gold_csi_rs[slot][symb]!=NULL, "NR init: csi reference signal for slot %d symbol %d - malloc failed\n", slot, symb);
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}
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}
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gNB->csi_gold_init = cfg->cell_config.phy_cell_id.value;
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nr_init_csi_rs(&gNB->frame_parms, gNB->nr_csi_rs_info->nr_gold_csi_rs, cfg->cell_config.phy_cell_id.value);
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for (int id=0; id<NUMBER_OF_NR_SRS_MAX; id++) {
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@@ -640,12 +646,12 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
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common_vars->beam_id = (uint8_t **)malloc16(Ptx*sizeof(uint8_t*));
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for (i=0;i<Ptx;i++){
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common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
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LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n",
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i,common_vars->txdataF[i],
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fp->samples_per_frame_wCP*sizeof(int32_t));
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common_vars->beam_id[i] = (uint8_t*)malloc16_clear(fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t));
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memset(common_vars->beam_id[i],255,fp->symbols_per_slot*fp->slots_per_frame);
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common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
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LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n",
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i,common_vars->txdataF[i],
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fp->samples_per_frame_wCP*sizeof(int32_t));
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common_vars->beam_id[i] = (uint8_t*)malloc16_clear(fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t));
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memset(common_vars->beam_id[i],255,fp->symbols_per_slot*fp->slots_per_frame);
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}
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for (i=0;i<Prx;i++){
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common_vars->rxdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t));
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@@ -736,10 +742,9 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
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free_and_zero(pdcch_dmrs);
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uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
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int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
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for (int slot = 0; slot < fp->slots_per_frame; slot++) {
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for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
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for (int q = 0; q < nb_codewords; q++)
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for (int q = 0; q < NR_NB_NSCID; q++)
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free_and_zero(pdsch_dmrs[slot][symb][q]);
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free_and_zero(pdsch_dmrs[slot][symb]);
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}
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@@ -768,7 +773,7 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
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free_and_zero(gNB->nr_csi_rs_info);
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for (int id = 0; id < NUMBER_OF_NR_SRS_MAX; id++) {
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for (int i = 0; i < Prx; i++){
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for (int i = 0; i < Prx; i++) {
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free_and_zero(gNB->nr_srs_info[id]->srs_received_signal[i]);
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free_and_zero(gNB->nr_srs_info[id]->srs_ls_estimated_channel[i]);
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free_and_zero(gNB->nr_srs_info[id]->srs_estimated_channel_freq[i]);
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@@ -212,18 +212,21 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
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int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
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ue->nr_gold_pusch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
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uint32_t ***pusch_dmrs = ue->nr_gold_pusch_dmrs;
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ue->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
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uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
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for (slot=0; slot<fp->slots_per_frame; slot++) {
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pusch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
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pusch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
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AssertFatal(pusch_dmrs[slot]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d - malloc failed\n", slot);
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for (symb=0; symb<fp->symbols_per_slot; symb++) {
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pusch_dmrs[slot][symb] = (uint32_t *)malloc16(pusch_dmrs_init_length*sizeof(uint32_t));
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pusch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *));
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AssertFatal(pusch_dmrs[slot][symb]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
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for (int q=0; q<NR_NB_NSCID; q++) {
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pusch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pusch_dmrs_init_length*sizeof(uint32_t));
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AssertFatal(pusch_dmrs[slot][symb][q]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
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}
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}
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}
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@@ -300,24 +303,38 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
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AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
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int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
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for (int symb=0; symb<fp->symbols_per_slot; symb++) {
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pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(nb_codewords*sizeof(uint32_t *));
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pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *));
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AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
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for (int q=0; q<nb_codewords; q++) {
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for (int q=0; q<NR_NB_NSCID; q++) {
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pdsch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pdsch_dmrs_init_length*sizeof(uint32_t));
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AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d codeword %d - malloc failed\n", slot, symb, q);
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AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
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}
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}
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}
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// DLSCH
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for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
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for (gNB_id = 0; gNB_id < ue->n_connected_gNB+1; gNB_id++) {
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for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
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ue->pdsch_vars[th_id][gNB_id] = (NR_UE_PDSCH *)malloc16_clear(sizeof(NR_UE_PDSCH));
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}
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for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
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phy_init_nr_ue_PDSCH( ue->pdsch_vars[th_id][gNB_id], fp );
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}
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int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
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for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
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for (i=0; i<nb_codewords; i++) {
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ue->pdsch_vars[th_id][gNB_id]->llr[i] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );//Q_m = 8 bits/Sym, Code_Rate=3, Number of Segments =8, Circular Buffer K_cb = 8448
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}
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for (i=0; i<NR_MAX_NB_LAYERS; i++) {
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ue->pdsch_vars[th_id][gNB_id]->layer_llr[i] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );//Q_m = 8 bits/Sym, Code_Rate=3, Number of Segments =8, Circular Buffer K_cb = 8448
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}
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}
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}
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for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
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for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
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ue->pdcch_vars[th_id][gNB_id] = (NR_UE_PDCCH *)malloc16_clear(sizeof(NR_UE_PDCCH));
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}
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@@ -380,21 +397,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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ue->nr_srs_info->srs_estimated_channel_time_shifted[i] = (int32_t *) malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
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}
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for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
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phy_init_nr_ue_PDSCH( ue->pdsch_vars[th_id][gNB_id], fp );
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}
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int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
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for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
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for (i=0; i<nb_codewords; i++) {
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ue->pdsch_vars[th_id][gNB_id]->llr[i] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );//Q_m = 8 bits/Sym, Code_Rate=3, Number of Segments =8, Circular Buffer K_cb = 8448
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}
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for (i=0; i<NR_MAX_NB_LAYERS; i++) {
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ue->pdsch_vars[th_id][gNB_id]->layer_llr[i] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );//Q_m = 8 bits/Sym, Code_Rate=3, Number of Segments =8, Circular Buffer K_cb = 8448
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}
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}
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// 100 PRBs * 12 REs/PRB * 4 PDCCH SYMBOLS * 2 LLRs/RE
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for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
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ue->pdcch_vars[th_id][gNB_id]->llr = (int16_t *)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
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@@ -462,6 +464,8 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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for (int slot = 0; slot < fp->slots_per_frame; slot++) {
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for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
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for (int q=0; q<NR_NB_NSCID; q++)
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free_and_zero(ue->nr_gold_pusch_dmrs[slot][symb][q]);
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free_and_zero(ue->nr_gold_pusch_dmrs[slot][symb]);
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}
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free_and_zero(ue->nr_gold_pusch_dmrs[slot]);
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@@ -495,10 +499,9 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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}
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free_and_zero(ue->nr_gold_pdcch[0]);
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int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
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for (int slot=0; slot<fp->slots_per_frame; slot++) {
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for (int symb=0; symb<fp->symbols_per_slot; symb++) {
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for (int q=0; q<nb_codewords; q++)
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for (int q=0; q<NR_NB_NSCID; q++)
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free_and_zero(ue->nr_gold_pdsch[0][slot][symb][q]);
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free_and_zero(ue->nr_gold_pdsch[0][slot][symb]);
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}
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@@ -506,16 +509,18 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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}
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free_and_zero(ue->nr_gold_pdsch[0]);
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for (int gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
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for (int gNB_id = 0; gNB_id < ue->n_connected_gNB+1; gNB_id++) {
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// PDSCH
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for (int th_id = 0; th_id < RX_NB_TH_MAX; th_id++) {
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free_and_zero(ue->pdsch_vars[th_id][gNB_id]->llr_shifts);
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free_and_zero(ue->pdsch_vars[th_id][gNB_id]->llr128_2ndstream);
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phy_term_nr_ue__PDSCH(ue->pdsch_vars[th_id][gNB_id], fp);
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free_and_zero(ue->pdsch_vars[th_id][gNB_id]);
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}
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}
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for (int gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
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for (int th_id = 0; th_id < RX_NB_TH_MAX; th_id++) {
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for (int i = 0; i < fp->nb_antennas_rx; i++) {
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@@ -155,8 +155,6 @@ typedef struct {
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uint8_t h[MAX_NUM_CHANNEL_BITS];
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/// Scrambled "b"-sequences (for definition see 36-211 V8.6 2009-03, p.14)
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uint8_t b_tilde[MAX_NUM_CHANNEL_BITS];
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/// Modulated "d"-sequences (for definition see 36-211 V8.6 2009-03, p.14)
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int32_t d[MAX_NUM_RE];
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/// Transform-coded "z"-sequences (for definition see 36-211 V8.6 2009-03, p.14-15)
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int32_t z[MAX_NUM_RE];
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/// "q" sequences for CQI/PMI (for definition see 36-212 V8.6 2009-03, p.27)
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@@ -42,7 +42,7 @@
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//#define DEBUG_ULSCH_MODULATION
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void dft_lte(int32_t *z,int32_t *d, int32_t Msc_PUSCH, uint8_t Nsymb)
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void dft_lte(int32_t *z,struct complex16 *input, int32_t Msc_PUSCH, uint8_t Nsymb)
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{
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#if defined(__x86_64__) || defined(__i386__)
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@@ -66,7 +66,7 @@ void dft_lte(int32_t *z,int32_t *d, int32_t Msc_PUSCH, uint8_t Nsymb)
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#endif
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// printf("Doing lte_dft for Msc_PUSCH %d\n",Msc_PUSCH);
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d0 = (uint32_t *)d;
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d0 = (uint32_t *)input;
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d1 = d0+Msc_PUSCH;
|
||||
d2 = d1+Msc_PUSCH;
|
||||
d3 = d2+Msc_PUSCH;
|
||||
@@ -476,7 +476,8 @@ void ulsch_modulation(int32_t **txdataF,
|
||||
// Modulation
|
||||
|
||||
ulsch_Msymb = G/Q_m;
|
||||
|
||||
/// Modulated "d"-sequences (for definition see 36-211 V8.6 2009-03, p.14)
|
||||
struct complex16 d[MAX_NUM_RE] __attribute__((aligned(32)));
|
||||
if(ulsch->cooperation_flag == 2)
|
||||
// For Distributed Alamouti Scheme in Collabrative Communication
|
||||
{
|
||||
@@ -488,14 +489,14 @@ void ulsch_modulation(int32_t **txdataF,
|
||||
|
||||
|
||||
//UE1, -x1*
|
||||
((int16_t*)&ulsch->d[i])[0] = (ulsch->b_tilde[j] == 1) ? (gain_lin_QPSK) : -gain_lin_QPSK;
|
||||
((int16_t*)&ulsch->d[i])[1] = (ulsch->b_tilde[j+1] == 1)? (-gain_lin_QPSK) : gain_lin_QPSK;
|
||||
d[i].r = (ulsch->b_tilde[j] == 1) ? (gain_lin_QPSK) : -gain_lin_QPSK;
|
||||
d[i].i = (ulsch->b_tilde[j+1] == 1)? (-gain_lin_QPSK) : gain_lin_QPSK;
|
||||
// if (i<Msc_PUSCH)
|
||||
// printf("input %d (%p): %d,%d\n", i,&ulsch->d[i],((int16_t*)&ulsch->d[i])[0],((int16_t*)&ulsch->d[i])[1]);
|
||||
|
||||
// UE1, x0*
|
||||
((int16_t*)&ulsch->d[i+1])[0] = (ulsch->b_tilde[j-2] == 1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
|
||||
((int16_t*)&ulsch->d[i+1])[1] = (ulsch->b_tilde[j-1] == 1)? (gain_lin_QPSK) : -gain_lin_QPSK;
|
||||
d[i+1].r = (ulsch->b_tilde[j-2] == 1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
|
||||
d[i+1].i = (ulsch->b_tilde[j-1] == 1)? (gain_lin_QPSK) : -gain_lin_QPSK;
|
||||
|
||||
break;
|
||||
|
||||
@@ -521,8 +522,8 @@ void ulsch_modulation(int32_t **txdataF,
|
||||
qam16_table_offset_im+=1;
|
||||
|
||||
|
||||
((int16_t*)&ulsch->d[i])[0]=-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
|
||||
((int16_t*)&ulsch->d[i])[1]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
|
||||
d[i].r =-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
|
||||
d[i].i =(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
|
||||
|
||||
//UE1,x0*
|
||||
qam16_table_offset_re = 0;
|
||||
@@ -544,8 +545,8 @@ void ulsch_modulation(int32_t **txdataF,
|
||||
|
||||
// ((int16_t*)&ulsch->d[i+1])[0]=-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
|
||||
// ((int16_t*)&ulsch->d[i+1])[1]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
|
||||
((int16_t*)&ulsch->d[i+1])[0]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
|
||||
((int16_t*)&ulsch->d[i+1])[1]=-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
|
||||
d[i+1].r=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
|
||||
d[i+1].i=-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
|
||||
|
||||
|
||||
break;
|
||||
@@ -578,8 +579,8 @@ void ulsch_modulation(int32_t **txdataF,
|
||||
qam64_table_offset_im+=1;
|
||||
|
||||
|
||||
((int16_t*)&ulsch->d[i])[0]=-(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
|
||||
((int16_t*)&ulsch->d[i])[1]=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
|
||||
d[i].r=-(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
|
||||
d[i].i=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
|
||||
|
||||
//UE1,x0*
|
||||
qam64_table_offset_re = 0;
|
||||
@@ -605,8 +606,8 @@ void ulsch_modulation(int32_t **txdataF,
|
||||
qam64_table_offset_im+=1;
|
||||
|
||||
|
||||
((int16_t*)&ulsch->d[i+1])[0]=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
|
||||
((int16_t*)&ulsch->d[i+1])[1]=-(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
|
||||
d[i+1].r=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
|
||||
d[i+1].i=-(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
|
||||
|
||||
break;
|
||||
|
||||
@@ -621,8 +622,8 @@ void ulsch_modulation(int32_t **txdataF,
|
||||
case 2:
|
||||
// TODO: this has to be updated!!!
|
||||
|
||||
((int16_t*)&ulsch->d[i])[0] = (ulsch->b_tilde[j] == 1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
|
||||
((int16_t*)&ulsch->d[i])[1] = (ulsch->b_tilde[j+1] == 1)? (-gain_lin_QPSK) : gain_lin_QPSK;
|
||||
d[i].r = (ulsch->b_tilde[j] == 1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
|
||||
d[i].i = (ulsch->b_tilde[j+1] == 1)? (-gain_lin_QPSK) : gain_lin_QPSK;
|
||||
// if (i<Msc_PUSCH)
|
||||
// printf("input %d/%d Msc_PUSCH %d (%p): %d,%d\n", i,Msymb,Msc_PUSCH,&ulsch->d[i],((int16_t*)&ulsch->d[i])[0],((int16_t*)&ulsch->d[i])[1]);
|
||||
|
||||
@@ -646,8 +647,8 @@ void ulsch_modulation(int32_t **txdataF,
|
||||
qam16_table_offset_im+=1;
|
||||
|
||||
|
||||
((int16_t*)&ulsch->d[i])[0]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
|
||||
((int16_t*)&ulsch->d[i])[1]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
|
||||
d[i].r=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
|
||||
d[i].i=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
|
||||
// printf("input(16qam) %d (%p): %d,%d\n", i,&ulsch->d[i],((int16_t*)&ulsch->d[i])[0],((int16_t*)&ulsch->d[i])[1]);
|
||||
break;
|
||||
|
||||
@@ -676,8 +677,8 @@ void ulsch_modulation(int32_t **txdataF,
|
||||
qam64_table_offset_im+=1;
|
||||
|
||||
|
||||
((int16_t*)&ulsch->d[i])[0]=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
|
||||
((int16_t*)&ulsch->d[i])[1]=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
|
||||
d[i].r=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
|
||||
d[i].i=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
|
||||
|
||||
break;
|
||||
|
||||
@@ -688,7 +689,7 @@ void ulsch_modulation(int32_t **txdataF,
|
||||
|
||||
// Transform Precoding
|
||||
|
||||
dft_lte(ulsch->z,ulsch->d,Msc_PUSCH,ulsch->Nsymb_pusch);
|
||||
dft_lte(ulsch->z,d,Msc_PUSCH,ulsch->Nsymb_pusch);
|
||||
|
||||
DevAssert(txdataF);
|
||||
|
||||
|
||||
@@ -91,7 +91,7 @@ int slot_fep(PHY_VARS_UE *ue,
|
||||
}
|
||||
|
||||
// subframe_offset_F = frame_parms->ofdm_symbol_size * frame_parms->symbols_per_tti * (Ns>>1);
|
||||
|
||||
|
||||
if (l<0 || l>=7-frame_parms->Ncp) {
|
||||
printf("slot_fep: l must be between 0 and %d\n",7-frame_parms->Ncp);
|
||||
return(-1);
|
||||
|
||||
@@ -165,6 +165,11 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
|
||||
|
||||
//------------------generate DMRS------------------//
|
||||
|
||||
if(pusch_pdu->ul_dmrs_scrambling_id != gNB->pusch_gold_init[pusch_pdu->scid]) {
|
||||
gNB->pusch_gold_init[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
|
||||
nr_gold_pusch(gNB, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
|
||||
}
|
||||
|
||||
// transform precoding = 1 means disabled
|
||||
if (pusch_pdu->transform_precoding == 1) {
|
||||
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch,
|
||||
@@ -1247,4 +1252,4 @@ int nr_srs_channel_estimation(PHY_VARS_gNB *gNB,
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -78,57 +78,47 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
|
||||
}
|
||||
|
||||
|
||||
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
|
||||
{
|
||||
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid) {
|
||||
|
||||
uint32_t x1, x2;
|
||||
uint8_t reset;
|
||||
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
|
||||
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
|
||||
int pdsch_dmrs_init_length = ((fp->N_RB_DL*12)>>5)+1;
|
||||
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
|
||||
uint16_t N_n_scid[2]={Nid, Nid};
|
||||
uint8_t n_scid=0; // again works only for 1_0
|
||||
|
||||
for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) {
|
||||
|
||||
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
|
||||
reset = 1;
|
||||
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid));
|
||||
LOG_D(PHY,"PDSCH DMRS slot %d, symb %d x2 %x, N_n_scid %d,n_scid %d\n",slot,symb,x2,N_n_scid[n_scid],n_scid);
|
||||
for (uint32_t n=0; n<pdsch_dmrs_init_length; n++) {
|
||||
pdsch_dmrs[slot][symb][0][n] = lte_gold_generic(&x1, &x2, reset);
|
||||
reset = 0;
|
||||
}
|
||||
|
||||
if(nb_codewords>1)
|
||||
memcpy(pdsch_dmrs[slot][symb][1],pdsch_dmrs[slot][symb][0],sizeof(uint32_t)*pdsch_dmrs_init_length);
|
||||
reset = 1;
|
||||
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) +((Nid<<1)+nscid));
|
||||
LOG_D(PHY,"PDSCH DMRS slot %d, symb %d x2 %x, Nid %d,nscid %d\n",slot,symb,x2,Nid,nscid);
|
||||
for (uint32_t n=0; n<pdsch_dmrs_init_length; n++) {
|
||||
pdsch_dmrs[slot][symb][nscid][n] = lte_gold_generic(&x1, &x2, reset);
|
||||
reset = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid) {
|
||||
void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid) {
|
||||
|
||||
unsigned char ns;
|
||||
unsigned int n,x1,x2;
|
||||
int nscid, reset;
|
||||
unsigned int nid;
|
||||
int reset;
|
||||
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
|
||||
unsigned short l;
|
||||
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
|
||||
|
||||
for (nscid=0; nscid<2; nscid++) {
|
||||
nid = Nid[nscid];
|
||||
for (ns=0; ns<fp->slots_per_frame; ns++) {
|
||||
for (l=0; l<fp->symbols_per_slot; l++) {
|
||||
reset = 1;
|
||||
x2 = ((1<<17) * (fp->symbols_per_slot*ns+l+1) * ((nid<<1)+1) +((nid<<1)+nscid));
|
||||
LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",ns,l,x2);
|
||||
for (ns=0; ns<fp->slots_per_frame; ns++) {
|
||||
for (l=0; l<fp->symbols_per_slot; l++) {
|
||||
reset = 1;
|
||||
x2 = ((1<<17) * (fp->symbols_per_slot*ns+l+1) * ((nid<<1)+1) +((nid<<1)+nscid));
|
||||
LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",ns,l,x2);
|
||||
|
||||
for (n=0; n<pusch_dmrs_init_length; n++) {
|
||||
gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
|
||||
reset = 0;
|
||||
}
|
||||
for (n=0; n<pusch_dmrs_init_length; n++) {
|
||||
gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
|
||||
reset = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -76,46 +76,38 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
|
||||
}
|
||||
|
||||
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
|
||||
unsigned short *n_idDMRS)
|
||||
{
|
||||
int nscid,
|
||||
uint32_t nid) {
|
||||
|
||||
unsigned int x1,x2,x2tmp0;
|
||||
unsigned int nid;
|
||||
uint8_t reset;
|
||||
int pdsch_dmrs_init_length = ((ue->frame_parms.N_RB_DL*12)>>5)+1;
|
||||
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
|
||||
/// to be updated from higher layer
|
||||
//unsigned short lbar = 0;
|
||||
|
||||
for (int nscid=0; nscid<nb_codewords; nscid++) {
|
||||
for (int ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
|
||||
for (int ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
|
||||
|
||||
nid = n_idDMRS[nscid];
|
||||
for (int l=0; l<ue->frame_parms.symbols_per_slot; l++) {
|
||||
|
||||
for (int l=0; l<ue->frame_parms.symbols_per_slot; l++) {
|
||||
reset = 1;
|
||||
x2tmp0 = ((ue->frame_parms.symbols_per_slot*ns+l+1)*((nid<<1)+1))<<17;
|
||||
x2 = (x2tmp0+(nid<<1)+nscid)%(1U<<31); //cinit
|
||||
LOG_D(PHY,"UE DMRS slot %d, symb %d, x2 %x, nscid %d\n",ns,l,x2,nscid);
|
||||
|
||||
reset = 1;
|
||||
x2tmp0 = ((ue->frame_parms.symbols_per_slot*ns+l+1)*((nid<<1)+1))<<17;
|
||||
x2 = (x2tmp0+(nid<<1)+nscid)%(1U<<31); //cinit
|
||||
LOG_D(PHY,"UE DMRS slot %d, symb %d, x2 %x, nscid %d\n",ns,l,x2,nscid);
|
||||
|
||||
for (int n=0; n<pdsch_dmrs_init_length; n++) {
|
||||
ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset);
|
||||
reset = 0;
|
||||
}
|
||||
for (int n=0; n<pdsch_dmrs_init_length; n++) {
|
||||
ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset);
|
||||
reset = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
|
||||
uint16_t *N_n_scid,
|
||||
uint16_t N_n_scid,
|
||||
uint8_t n_scid)
|
||||
{
|
||||
uint32_t x1, x2, n;
|
||||
uint8_t reset, slot, symb;
|
||||
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
|
||||
uint32_t ***pusch_dmrs = ue->nr_gold_pusch_dmrs;
|
||||
uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
|
||||
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
|
||||
|
||||
for (slot=0; slot<fp->slots_per_frame; slot++) {
|
||||
@@ -123,10 +115,10 @@ void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
|
||||
for (symb=0; symb<fp->symbols_per_slot; symb++) {
|
||||
|
||||
reset = 1;
|
||||
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid));
|
||||
|
||||
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid<<1)+1) +((N_n_scid<<1)+n_scid));
|
||||
LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",slot,symb,x2);
|
||||
for (n=0; n<pusch_dmrs_init_length; n++) {
|
||||
pusch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
|
||||
pusch_dmrs[slot][symb][n_scid][n] = lte_gold_generic(&x1, &x2, reset);
|
||||
reset = 0;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -37,10 +37,10 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB);
|
||||
@param Nid is used for the initialization of x2, Physical cell Id by default or upper layer configured pdcch_scrambling_ID
|
||||
*/
|
||||
void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
|
||||
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
|
||||
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid);
|
||||
void nr_init_csi_rs(NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid);
|
||||
|
||||
void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid);
|
||||
void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid);
|
||||
|
||||
int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
|
||||
unsigned int Ns,
|
||||
|
||||
@@ -61,10 +61,11 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
|
||||
unsigned short n_idDMRS);
|
||||
|
||||
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
|
||||
unsigned short *n_idDMRS);
|
||||
int nscid,
|
||||
uint32_t nid);
|
||||
|
||||
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
|
||||
uint16_t *N_n_scid,
|
||||
uint16_t N_n_scid,
|
||||
uint8_t n_scid);
|
||||
|
||||
void nr_init_csi_rs(NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid);
|
||||
|
||||
@@ -48,7 +48,6 @@ void nr_generate_csi_rs(NR_DL_FRAME_PARMS frame_parms,
|
||||
int16_t amp,
|
||||
nr_csi_rs_info_t *nr_csi_rs_info,
|
||||
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t *csi_params,
|
||||
uint16_t cell_id,
|
||||
int slot){
|
||||
|
||||
#ifdef NR_CSIRS_DEBUG
|
||||
@@ -86,20 +85,10 @@ void nr_generate_csi_rs(NR_DL_FRAME_PARMS frame_parms,
|
||||
|
||||
AssertFatal(b!=0, "Invalid CSI frequency domain mapping: no bit selected in bitmap\n");
|
||||
|
||||
// pre-computed for scrambling id equel to cell id
|
||||
// if the scrambling id is not the cell id we need to re-initialize the rs
|
||||
if (csi_params->scramb_id != cell_id) {
|
||||
uint8_t reset;
|
||||
uint32_t x1, x2;
|
||||
uint32_t Nid = csi_params->scramb_id;
|
||||
for (uint8_t symb=0; symb<frame_parms.symbols_per_slot; symb++) {
|
||||
reset = 1;
|
||||
x2 = ((1<<10) * (frame_parms.symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid));
|
||||
for (uint32_t n=0; n<(csi_rs_length>>5)+1; n++) {
|
||||
nr_gold_csi_rs[symb][n] = lte_gold_generic(&x1, &x2, reset);
|
||||
reset = 0;
|
||||
}
|
||||
}
|
||||
// if the scrambling id is not the one previously used to initialize we need to re-initialize the rs
|
||||
if (csi_params->scramb_id != gNB->csi_gold_init) {
|
||||
gNB->csi_gold_init = csi_params->scramb_id;
|
||||
nr_init_csi_rs(&frame_parms, nr_csi_rs_info->nr_gold_csi_rs, csi_params->scramb_id);
|
||||
}
|
||||
|
||||
switch (csi_params->row) {
|
||||
|
||||
@@ -66,11 +66,12 @@ void nr_pdcch_scrambling(uint32_t *in,
|
||||
}
|
||||
}
|
||||
|
||||
void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
||||
uint32_t **gold_pdcch_dmrs,
|
||||
void nr_generate_dci(PHY_VARS_gNB *gNB,
|
||||
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
||||
int32_t *txdataF,
|
||||
int16_t amp,
|
||||
NR_DL_FRAME_PARMS *frame_parms) {
|
||||
NR_DL_FRAME_PARMS *frame_parms,
|
||||
int slot) {
|
||||
|
||||
int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1] __attribute__((aligned(16))); // 3 for the max coreset duration
|
||||
uint16_t cset_start_sc;
|
||||
@@ -81,7 +82,7 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
||||
|
||||
int rb_offset;
|
||||
int n_rb;
|
||||
|
||||
|
||||
// compute rb_offset and n_prb based on frequency allocation
|
||||
nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL];
|
||||
nr_fill_cce_list(cce_list,0,pdcch_pdu_rel15);
|
||||
@@ -95,6 +96,13 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
||||
* in time: by its first slot and its first symbol*/
|
||||
const nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[d];
|
||||
|
||||
if(dci_pdu->ScramblingId != gNB->pdcch_gold_init) {
|
||||
gNB->pdcch_gold_init = dci_pdu->ScramblingId;
|
||||
nr_init_pdcch_dmrs(gNB, dci_pdu->ScramblingId);
|
||||
}
|
||||
|
||||
uint32_t **gold_pdcch_dmrs = gNB->nr_gold_pdcch_dmrs[slot];
|
||||
|
||||
cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
|
||||
cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
|
||||
dci_idx = 0;
|
||||
@@ -104,8 +112,8 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
||||
uint32_t dmrs_length = n_rb*6; //2(QPSK)*3(per RB)*6(REG per CCE)
|
||||
uint32_t encoded_length = dci_pdu->AggregationLevel*108; //2(QPSK)*9(per RB)*6(REG per CCE)
|
||||
LOG_D(PHY, "DL_DCI : rb_offset %d, nb_rb %d, DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d),Scrambling_Id %d,ScramblingRNTI %x,PayloadSizeBits %d\n",
|
||||
rb_offset, n_rb,dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType,
|
||||
dci_pdu->ScramblingId,dci_pdu->ScramblingRNTI,dci_pdu->PayloadSizeBits);
|
||||
rb_offset, n_rb,dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType,
|
||||
dci_pdu->ScramblingId,dci_pdu->ScramblingRNTI,dci_pdu->PayloadSizeBits);
|
||||
dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
|
||||
|
||||
/// DMRS QPSK modulation
|
||||
@@ -115,10 +123,10 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
||||
|
||||
#ifdef DEBUG_PDCCH_DMRS
|
||||
if(dci_pdu->RNTI!=0xFFFF) {
|
||||
for (int i=0; i<dmrs_length>>1; i++)
|
||||
printf("symb %d i %d %p gold seq 0x%08x mod_dmrs %d %d\n", symb, i,
|
||||
&gold_pdcch_dmrs[symb][i>>5],gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] );
|
||||
}
|
||||
for (int i=0; i<dmrs_length>>1; i++)
|
||||
printf("symb %d i %d %p gold seq 0x%08x mod_dmrs %d %d\n", symb, i,
|
||||
&gold_pdcch_dmrs[symb][i>>5],gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] );
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -248,15 +256,16 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
||||
}
|
||||
|
||||
void nr_generate_dci_top(processingData_L1tx_t *msgTx,
|
||||
uint32_t **gold_pdcch_dmrs,
|
||||
int slot,
|
||||
int32_t *txdataF,
|
||||
int16_t amp,
|
||||
NR_DL_FRAME_PARMS *frame_parms) {
|
||||
|
||||
|
||||
for (int i=0; i<msgTx->num_ul_pdcch; i++)
|
||||
nr_generate_dci(&msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
|
||||
nr_generate_dci(msgTx->gNB,&msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
|
||||
for (int i=0; i<msgTx->num_dl_pdcch; i++)
|
||||
nr_generate_dci(&msgTx->pdcch_pdu[i].pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
|
||||
nr_generate_dci(msgTx->gNB,&msgTx->pdcch_pdu[i].pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
|
||||
|
||||
}
|
||||
|
||||
|
||||
@@ -30,7 +30,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
|
||||
uint16_t N_RB);
|
||||
|
||||
void nr_generate_dci_top(processingData_L1tx_t *msgTx,
|
||||
uint32_t **gold_pdcch_dmrs,
|
||||
int slot,
|
||||
int32_t *txdataF,
|
||||
int16_t amp,
|
||||
NR_DL_FRAME_PARMS *frame_parms);
|
||||
|
||||
@@ -58,7 +58,6 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
|
||||
|
||||
PHY_VARS_gNB *gNB = msgTx->gNB;
|
||||
NR_gNB_DLSCH_t *dlsch;
|
||||
uint32_t ***pdsch_dmrs = gNB->nr_gold_pdsch_dmrs[slot];
|
||||
int32_t** txdataF = gNB->common_vars.txdataF;
|
||||
int16_t amp = AMP;
|
||||
int xOverhead = 0;
|
||||
@@ -93,12 +92,17 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
|
||||
}
|
||||
n_dmrs = (rel15->BWPStart+rel15->rbStart+rel15->rbSize)*nb_re_dmrs;
|
||||
|
||||
if(rel15->dlDmrsScramblingId != gNB->pdsch_gold_init[rel15->SCID]) {
|
||||
gNB->pdsch_gold_init[rel15->SCID] = rel15->dlDmrsScramblingId;
|
||||
nr_init_pdsch_dmrs(gNB, rel15->SCID, rel15->dlDmrsScramblingId);
|
||||
}
|
||||
|
||||
uint32_t ***pdsch_dmrs = gNB->nr_gold_pdsch_dmrs[slot];
|
||||
uint16_t dmrs_symbol_map = rel15->dlDmrsSymbPos;//single DMRS: 010000100 Double DMRS 110001100
|
||||
uint8_t dmrs_len = get_num_dmrs(rel15->dlDmrsSymbPos);
|
||||
uint16_t nb_re = ((12*rel15->NrOfSymbols)-nb_re_dmrs*dmrs_len-xOverhead)*rel15->rbSize*rel15->nrOfLayers;
|
||||
uint8_t Qm = rel15->qamModOrder[0];
|
||||
uint32_t encoded_length = nb_re*Qm;
|
||||
uint32_t scrambled_output[rel15->NrOfCodewords][(encoded_length>>5)+1];
|
||||
int16_t mod_dmrs[n_dmrs<<1] __attribute__ ((aligned(16)));
|
||||
|
||||
/* PTRS */
|
||||
@@ -147,63 +151,61 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
|
||||
printf("\n");
|
||||
#endif
|
||||
|
||||
/// scrambling
|
||||
start_meas(dlsch_scrambling_stats);
|
||||
for (int q=0; q<rel15->NrOfCodewords; q++) {
|
||||
memset((void*)scrambled_output[q], 0, ((encoded_length>>5)+1)*sizeof(uint32_t));
|
||||
/// scrambling
|
||||
start_meas(dlsch_scrambling_stats);
|
||||
uint32_t scrambled_output[(encoded_length>>5)+4]; // modulator acces by 4 bytes in some cases
|
||||
memset(scrambled_output, 0, sizeof(scrambled_output));
|
||||
if ( encoded_length > rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * Qm * rel15->nrOfLayers) abort();
|
||||
nr_pdsch_codeword_scrambling(output,
|
||||
encoded_length,
|
||||
q,
|
||||
rel15->dataScramblingId,
|
||||
rel15->rnti,
|
||||
scrambled_output[q]);
|
||||
}
|
||||
|
||||
stop_meas(dlsch_scrambling_stats);
|
||||
scrambled_output);
|
||||
#ifdef DEBUG_DLSCH
|
||||
printf("PDSCH scrambling:\n");
|
||||
for (int i=0; i<encoded_length>>8; i++) {
|
||||
for (int j=0; j<8; j++)
|
||||
printf("0x%08x\t", scrambled_output[0][(i<<3)+j]);
|
||||
printf("\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
/// Modulation
|
||||
start_meas(dlsch_modulation_stats);
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PDSCH_MODULATION, 1);
|
||||
for (int q=0; q<rel15->NrOfCodewords; q++)
|
||||
nr_modulation(scrambled_output[q],
|
||||
encoded_length,
|
||||
Qm,
|
||||
mod_symbs[q]);
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PDSCH_MODULATION, 0);
|
||||
stop_meas(dlsch_modulation_stats);
|
||||
#ifdef DEBUG_DLSCH
|
||||
printf("PDSCH Modulation: Qm %d(%d)\n", Qm, nb_re);
|
||||
for (int i=0; i<nb_re>>3; i++) {
|
||||
for (int j=0; j<8; j++) {
|
||||
printf("%d %d\t", mod_symbs[0][((i<<3)+j)<<1], mod_symbs[0][(((i<<3)+j)<<1)+1]);
|
||||
printf("PDSCH scrambling:\n");
|
||||
for (int i=0; i<encoded_length>>8; i++) {
|
||||
for (int j=0; j<8; j++)
|
||||
printf("0x%08x\t", scrambled_output[(i<<3)+j]);
|
||||
printf("\n");
|
||||
}
|
||||
printf("\n");
|
||||
}
|
||||
#endif
|
||||
stop_meas(dlsch_scrambling_stats);
|
||||
/// Modulation
|
||||
start_meas(dlsch_modulation_stats);
|
||||
nr_modulation(scrambled_output,
|
||||
encoded_length,
|
||||
Qm,
|
||||
mod_symbs[q]);
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PDSCH_MODULATION, 0);
|
||||
stop_meas(dlsch_modulation_stats);
|
||||
#ifdef DEBUG_DLSCH
|
||||
printf("PDSCH Modulation: Qm %d(%d)\n", Qm, nb_re);
|
||||
for (int i=0; i<nb_re>>3; i++) {
|
||||
for (int j=0; j<8; j++) {
|
||||
printf("%d %d\t", mod_symbs[0][((i<<3)+j)<<1], mod_symbs[0][(((i<<3)+j)<<1)+1]);
|
||||
}
|
||||
printf("\n");
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
start_meas(&gNB->dlsch_layer_mapping_stats);
|
||||
/// Layer mapping
|
||||
nr_layer_mapping(mod_symbs,
|
||||
rel15->nrOfLayers,
|
||||
nb_re,
|
||||
tx_layers);
|
||||
rel15->nrOfLayers,
|
||||
nb_re,
|
||||
tx_layers);
|
||||
#ifdef DEBUG_DLSCH
|
||||
printf("Layer mapping (%d layers):\n", rel15->nrOfLayers);
|
||||
for (int l=0; l<rel15->nrOfLayers; l++)
|
||||
for (int i=0; i<(nb_re/rel15->nrOfLayers)>>3; i++) {
|
||||
printf("layer %d, Re %d..%d : ",l,i<<3,(i<<3)+7);
|
||||
for (int j=0; j<8; j++) {
|
||||
printf("l%d %d\t", tx_layers[l][((i<<3)+j)<<1], tx_layers[l][(((i<<3)+j)<<1)+1]);
|
||||
}
|
||||
printf("\n");
|
||||
printf("layer %d, Re %d..%d : ",l,i<<3,(i<<3)+7);
|
||||
for (int j=0; j<8; j++) {
|
||||
printf("l%d %d\t", tx_layers[l][((i<<3)+j)<<1], tx_layers[l][(((i<<3)+j)<<1)+1]);
|
||||
}
|
||||
printf("\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -223,7 +225,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
|
||||
|
||||
#ifdef DEBUG_DLSCH_MAPPING
|
||||
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_re %d,nb_layers %d)\n",
|
||||
start_sc, rel15->StartSymbolIndex, rel15->rbSize, nb_re,rel15->nrOfLayers);
|
||||
start_sc, rel15->StartSymbolIndex, rel15->rbSize, nb_re,rel15->nrOfLayers);
|
||||
#endif
|
||||
|
||||
start_meas(&gNB->dlsch_resource_mapping_stats);
|
||||
@@ -277,7 +279,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
|
||||
l_prime = 0;
|
||||
}
|
||||
/// DMRS QPSK modulation
|
||||
nr_modulation(pdsch_dmrs[l][0], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
|
||||
nr_modulation(pdsch_dmrs[l][rel15->SCID], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // Qm = 2 as DMRS is QPSK modulated
|
||||
|
||||
#ifdef DEBUG_DLSCH
|
||||
printf("DMRS modulation (symbol %d, %d symbols, type %d):\n", l, n_dmrs, dmrs_Type);
|
||||
@@ -298,7 +300,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
|
||||
if(ptrs_symbol) {
|
||||
/* PTRS QPSK Modulation for each OFDM symbol in a slot */
|
||||
LOG_D(PHY,"Doing ptrs modulation for symbol %d, n_ptrs %d\n",l,n_ptrs);
|
||||
nr_modulation(pdsch_dmrs[l][0], (n_ptrs<<1), DMRS_MOD_ORDER, mod_ptrs);
|
||||
nr_modulation(pdsch_dmrs[l][rel15->SCID], (n_ptrs<<1), DMRS_MOD_ORDER, mod_ptrs);
|
||||
}
|
||||
}
|
||||
uint16_t k = start_sc;
|
||||
|
||||
@@ -466,6 +466,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
uint8_t gNB_id,
|
||||
unsigned char Ns,
|
||||
unsigned char symbol,
|
||||
unsigned short scrambling_id,
|
||||
unsigned short coreset_start_subcarrier,
|
||||
unsigned short nb_rb_coreset)
|
||||
{
|
||||
@@ -493,13 +494,11 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
fm = filt16a_m1;
|
||||
fr = filt16a_r1;
|
||||
|
||||
|
||||
// checking if re-initialization of scrambling IDs is needed (should be done here but scrambling ID for PDCCH is not taken from RRC)
|
||||
/* if (( != ue->scramblingID_pdcch){
|
||||
ue->scramblingID_pdcch=;
|
||||
nr_gold_pdsch(ue,ue->scramblingID_pdcch);
|
||||
}*/
|
||||
|
||||
if (scrambling_id != ue->scramblingID_pdcch){
|
||||
ue->scramblingID_pdcch = scrambling_id;
|
||||
nr_gold_pdcch(ue,ue->scramblingID_pdcch);
|
||||
}
|
||||
|
||||
// generate pilot
|
||||
int pilot[nb_rb_coreset * 3] __attribute__((aligned(16)));
|
||||
@@ -666,6 +665,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
unsigned char Ns,
|
||||
unsigned short p,
|
||||
unsigned char symbol,
|
||||
unsigned char nscid,
|
||||
unsigned short scrambling_id,
|
||||
unsigned short BWPStart,
|
||||
uint8_t config_type,
|
||||
unsigned short bwp_start_subcarrier,
|
||||
@@ -703,11 +704,10 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
int8_t delta = get_delta(p, config_type);
|
||||
|
||||
// checking if re-initialization of scrambling IDs is needed
|
||||
/*if ((XXX.scramblingID0 != ue->scramblingID[0]) || (XXX.scramblingID1 != ue->scramblingID[1])){
|
||||
ue->scramblingID[0] = XXX.scramblingID0;
|
||||
ue->scramblingID[1] = XXX.scramblingID1;
|
||||
nr_gold_pdsch(ue,ue->scramblingID);
|
||||
}*/
|
||||
if (scrambling_id != ue->scramblingID_dlsch[nscid]){
|
||||
ue->scramblingID_dlsch[nscid] = scrambling_id;
|
||||
nr_gold_pdsch(ue, nscid, scrambling_id);
|
||||
}
|
||||
|
||||
nr_pdsch_dmrs_rx(ue, Ns, ue->nr_gold_pdsch[gNB_id][Ns][symbol][0], &pilot[0], 1000+p, 0, nb_rb_pdsch+rb_offset, config_type);
|
||||
|
||||
|
||||
@@ -44,6 +44,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
uint8_t gNB_id,
|
||||
unsigned char Ns,
|
||||
unsigned char symbol,
|
||||
unsigned short scrambling_id,
|
||||
unsigned short coreset_start_subcarrier,
|
||||
unsigned short nb_rb_coreset);
|
||||
|
||||
@@ -74,6 +75,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
unsigned char Ns,
|
||||
unsigned short p,
|
||||
unsigned char symbol,
|
||||
unsigned char nscid,
|
||||
unsigned short scrambling_id,
|
||||
unsigned short BWPStart,
|
||||
uint8_t config_type,
|
||||
unsigned short bwp_start_subcarrier,
|
||||
|
||||
@@ -352,17 +352,19 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
|
||||
nr_gold_pdcch(ue,fp->Nid_cell);
|
||||
|
||||
// compute the scrambling IDs for PDSCH DMRS
|
||||
for (int i=0; i<2; i++)
|
||||
ue->scramblingID[i]=fp->Nid_cell;
|
||||
|
||||
nr_gold_pdsch(ue,ue->scramblingID);
|
||||
for (int i=0; i<NR_NB_NSCID; i++) {
|
||||
ue->scramblingID_dlsch[i]=fp->Nid_cell;
|
||||
nr_gold_pdsch(ue, i, ue->scramblingID_dlsch[i]);
|
||||
}
|
||||
|
||||
nr_init_csi_rs(fp, ue->nr_csi_rs_info->nr_gold_csi_rs, fp->Nid_cell);
|
||||
|
||||
// initialize the pusch dmrs
|
||||
uint16_t N_n_scid[2] = {fp->Nid_cell,fp->Nid_cell};
|
||||
int n_scid = 0; // This quantity is indicated by higher layer parameter dmrs-SeqInitialization
|
||||
nr_init_pusch_dmrs(ue, N_n_scid, n_scid);
|
||||
for (int i=0; i<NR_NB_NSCID; i++) {
|
||||
ue->scramblingID_ulsch[i]=fp->Nid_cell;
|
||||
nr_init_pusch_dmrs(ue, ue->scramblingID_ulsch[i], i);
|
||||
}
|
||||
|
||||
|
||||
// we also need to take into account the shift by samples_per_frame in case the if is true
|
||||
if (ue->ssb_offset < sync_pos_frame){
|
||||
@@ -553,6 +555,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
|
||||
0,
|
||||
pdcch_vars->slot,
|
||||
l,
|
||||
fp->Nid_cell,
|
||||
fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
|
||||
coreset_nb_rb);
|
||||
|
||||
|
||||
@@ -259,6 +259,8 @@ typedef struct {
|
||||
uint16_t ptrs_symbols;
|
||||
// PTRS symbol index, to be updated every PTRS symbol within a slot.
|
||||
uint8_t ptrs_symbol_index;
|
||||
uint8_t nscid;
|
||||
uint16_t dlDmrsScramblingId;
|
||||
/// PDU BITMAP
|
||||
uint16_t pduBitmap;
|
||||
} NR_DL_UE_HARQ_t;
|
||||
|
||||
@@ -32,6 +32,7 @@
|
||||
#include <stdint.h>
|
||||
#include "PHY/NR_REFSIG/dmrs_nr.h"
|
||||
#include "PHY/NR_REFSIG/ptrs_nr.h"
|
||||
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
|
||||
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
|
||||
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
|
||||
#include "PHY/MODULATION/nr_modulation.h"
|
||||
@@ -215,9 +216,16 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
|
||||
|
||||
/////////////////////////DMRS Modulation/////////////////////////
|
||||
///////////
|
||||
uint32_t **pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
|
||||
|
||||
if(pusch_pdu->ul_dmrs_scrambling_id != UE->scramblingID_ulsch[pusch_pdu->scid]) {
|
||||
UE->scramblingID_ulsch[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
|
||||
nr_init_pusch_dmrs(UE, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
|
||||
}
|
||||
|
||||
uint32_t ***pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
|
||||
uint16_t n_dmrs = (pusch_pdu->bwp_start + start_rb + nb_rb)*((dmrs_type == pusch_dmrs_type1) ? 6:4);
|
||||
int16_t mod_dmrs[n_dmrs<<1] __attribute((aligned(16)));
|
||||
|
||||
///////////
|
||||
////////////////////////////////////////////////////////////////////////
|
||||
|
||||
@@ -382,7 +390,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
|
||||
// TODO: performance improvement, we can skip the modulation of DMRS symbols outside the bandwidth part
|
||||
// Perform this on gold sequence, not required when SC FDMA operation is done,
|
||||
LOG_D(PHY,"DMRS in symbol %d\n",l);
|
||||
nr_modulation(pusch_dmrs[l], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // Qm = 2 as DMRS is QPSK modulated
|
||||
nr_modulation(pusch_dmrs[l][pusch_pdu->scid], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
|
||||
} else {
|
||||
dmrs_idx = 0;
|
||||
}
|
||||
@@ -392,7 +400,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
|
||||
|
||||
if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) {
|
||||
is_ptrs_sym = 1;
|
||||
nr_modulation(pusch_dmrs[l], nb_rb, DMRS_MOD_ORDER, mod_ptrs);
|
||||
nr_modulation(pusch_dmrs[l][pusch_pdu->scid], nb_rb, DMRS_MOD_ORDER, mod_ptrs);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -558,6 +558,9 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric,
|
||||
}
|
||||
//#endif
|
||||
|
||||
if (Nid1==N_ID_1_NUMBER)
|
||||
return -1;
|
||||
|
||||
int re = 0;
|
||||
int im = 0;
|
||||
d = (int16_t *)&d_sss[Nid2][Nid1];
|
||||
|
||||
@@ -7082,43 +7082,40 @@ static inline void dft12f(simd_q15_t *x0,
|
||||
|
||||
simd_q15_t tmp_dft12[12];
|
||||
|
||||
simd_q15_t *tmp_dft12_ptr = &tmp_dft12[0];
|
||||
|
||||
// msg("dft12\n");
|
||||
|
||||
bfly4_tw1(x0,
|
||||
x3,
|
||||
x6,
|
||||
x9,
|
||||
tmp_dft12_ptr,
|
||||
tmp_dft12_ptr+3,
|
||||
tmp_dft12_ptr+6,
|
||||
tmp_dft12_ptr+9);
|
||||
|
||||
tmp_dft12,
|
||||
tmp_dft12+3,
|
||||
tmp_dft12+6,
|
||||
tmp_dft12+9);
|
||||
|
||||
bfly4_tw1(x1,
|
||||
x4,
|
||||
x7,
|
||||
x10,
|
||||
tmp_dft12_ptr+1,
|
||||
tmp_dft12_ptr+4,
|
||||
tmp_dft12_ptr+7,
|
||||
tmp_dft12_ptr+10);
|
||||
tmp_dft12+1,
|
||||
tmp_dft12+4,
|
||||
tmp_dft12+7,
|
||||
tmp_dft12+10);
|
||||
|
||||
|
||||
bfly4_tw1(x2,
|
||||
x5,
|
||||
x8,
|
||||
x11,
|
||||
tmp_dft12_ptr+2,
|
||||
tmp_dft12_ptr+5,
|
||||
tmp_dft12_ptr+8,
|
||||
tmp_dft12_ptr+11);
|
||||
tmp_dft12+2,
|
||||
tmp_dft12+5,
|
||||
tmp_dft12+8,
|
||||
tmp_dft12+11);
|
||||
|
||||
// k2=0;
|
||||
bfly3_tw1(tmp_dft12_ptr,
|
||||
tmp_dft12_ptr+1,
|
||||
tmp_dft12_ptr+2,
|
||||
bfly3_tw1(tmp_dft12,
|
||||
tmp_dft12+1,
|
||||
tmp_dft12+2,
|
||||
y0,
|
||||
y4,
|
||||
y8);
|
||||
@@ -7126,9 +7123,9 @@ static inline void dft12f(simd_q15_t *x0,
|
||||
|
||||
|
||||
// k2=1;
|
||||
bfly3(tmp_dft12_ptr+3,
|
||||
tmp_dft12_ptr+4,
|
||||
tmp_dft12_ptr+5,
|
||||
bfly3(tmp_dft12+3,
|
||||
tmp_dft12+4,
|
||||
tmp_dft12+5,
|
||||
y1,
|
||||
y5,
|
||||
y9,
|
||||
@@ -7138,9 +7135,9 @@ static inline void dft12f(simd_q15_t *x0,
|
||||
|
||||
|
||||
// k2=2;
|
||||
bfly3(tmp_dft12_ptr+6,
|
||||
tmp_dft12_ptr+7,
|
||||
tmp_dft12_ptr+8,
|
||||
bfly3(tmp_dft12+6,
|
||||
tmp_dft12+7,
|
||||
tmp_dft12+8,
|
||||
y2,
|
||||
y6,
|
||||
y10,
|
||||
@@ -7148,9 +7145,9 @@ static inline void dft12f(simd_q15_t *x0,
|
||||
W4_12);
|
||||
|
||||
// k2=3;
|
||||
bfly3(tmp_dft12_ptr+9,
|
||||
tmp_dft12_ptr+10,
|
||||
tmp_dft12_ptr+11,
|
||||
bfly3(tmp_dft12+9,
|
||||
tmp_dft12+10,
|
||||
tmp_dft12+11,
|
||||
y3,
|
||||
y7,
|
||||
y11,
|
||||
@@ -10606,15 +10603,43 @@ int dfts_autoinit(void)
|
||||
|
||||
#ifndef MR_MAIN
|
||||
|
||||
void dft(uint8_t sizeidx, int16_t *sigF,int16_t *sig,unsigned char scale_flag){
|
||||
AssertFatal((sizeidx>=0 && sizeidx<(int)DFT_SIZE_IDXTABLESIZE),"Invalid dft size index %i\n",sizeidx);
|
||||
dft_ftab[sizeidx](sigF,sig,scale_flag);
|
||||
void dft(uint8_t sizeidx, int16_t *input,int16_t *output,unsigned char scale_flag){
|
||||
AssertFatal((sizeidx >= 0 && sizeidx<DFT_SIZE_IDXTABLESIZE),"Invalid dft size index %i\n",sizeidx);
|
||||
int algn=0xF;
|
||||
#ifdef __AVX2__
|
||||
if ( (dft_ftab[sizeidx].size%3) != 0 ) // there is no AVX2 implementation for multiples of 3 DFTs
|
||||
algn=0x1F;
|
||||
#endif
|
||||
AssertFatal(((intptr_t)output&algn)==0,"Buffers should be aligned %p",output);
|
||||
if (((intptr_t)input)&algn) {
|
||||
LOG_D(PHY, "DFT called with input not aligned, add a memcpy, size %d\n", sizeidx);
|
||||
int sz=dft_ftab[sizeidx].size;
|
||||
if (sizeidx==DFT_12) // This case does 8 DFTs in //
|
||||
sz*=8;
|
||||
int16_t tmp[sz*2] __attribute__ ((aligned(32))); // input and output are not in right type (int16_t instead of c16_t)
|
||||
memcpy(tmp, input, sizeof tmp);
|
||||
dft_ftab[sizeidx].func(tmp,output,scale_flag);
|
||||
} else
|
||||
dft_ftab[sizeidx].func(input,output,scale_flag);
|
||||
};
|
||||
|
||||
void idft(uint8_t sizeidx, int16_t *sigF,int16_t *sig,unsigned char scale_flag){
|
||||
AssertFatal((sizeidx>=0 && sizeidx<(int)IDFT_SIZE_IDXTABLESIZE),"Invalid idft size index %i\n",sizeidx);
|
||||
idft_ftab[sizeidx](sigF,sig,scale_flag);
|
||||
void idft(uint8_t sizeidx, int16_t *input,int16_t *output,unsigned char scale_flag){
|
||||
AssertFatal((sizeidx>=0 && sizeidx<DFT_SIZE_IDXTABLESIZE),"Invalid idft size index %i\n",sizeidx);
|
||||
int algn=0xF;
|
||||
#ifdef __AVX2__
|
||||
algn=0x1F;
|
||||
#endif
|
||||
AssertFatal( ((intptr_t)output&algn)==0,"Buffers should be 16 bytes aligned %p",output);
|
||||
if (((intptr_t)input)&algn ) {
|
||||
LOG_D(PHY, "DFT called with input not aligned, add a memcpy\n");
|
||||
int sz=idft_ftab[sizeidx].size;
|
||||
int16_t tmp[sz*2] __attribute__ ((aligned(32))); // input and output are not in right type (int16_t instead of c16_t)
|
||||
memcpy(tmp, input, sizeof tmp);
|
||||
dft_ftab[sizeidx].func(tmp,output,scale_flag);
|
||||
} else
|
||||
idft_ftab[sizeidx].func(input,output,scale_flag);
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
/*---------------------------------------------------------------------------------------*/
|
||||
|
||||
+133
-136
@@ -181,159 +181,156 @@ This function performs optimized fixed-point radix-2 FFT/IFFT.
|
||||
);
|
||||
*/
|
||||
|
||||
#define FOREACH_DFTSZ(SZ_DEF) \
|
||||
SZ_DEF(12) \
|
||||
SZ_DEF(24) \
|
||||
SZ_DEF(36) \
|
||||
SZ_DEF(48) \
|
||||
SZ_DEF(60) \
|
||||
SZ_DEF(64) \
|
||||
SZ_DEF(72) \
|
||||
SZ_DEF(96) \
|
||||
SZ_DEF(108) \
|
||||
SZ_DEF(120) \
|
||||
SZ_DEF(128) \
|
||||
SZ_DEF(144) \
|
||||
SZ_DEF(180) \
|
||||
SZ_DEF(192) \
|
||||
SZ_DEF(216) \
|
||||
SZ_DEF(240) \
|
||||
SZ_DEF(256) \
|
||||
SZ_DEF(288) \
|
||||
SZ_DEF(300) \
|
||||
SZ_DEF(324) \
|
||||
SZ_DEF(360) \
|
||||
SZ_DEF(384) \
|
||||
SZ_DEF(432) \
|
||||
SZ_DEF(480) \
|
||||
SZ_DEF(512) \
|
||||
SZ_DEF(540) \
|
||||
SZ_DEF(576) \
|
||||
SZ_DEF(600) \
|
||||
SZ_DEF(648) \
|
||||
SZ_DEF(720) \
|
||||
SZ_DEF(768) \
|
||||
SZ_DEF(864) \
|
||||
SZ_DEF(900) \
|
||||
SZ_DEF(960) \
|
||||
SZ_DEF(972) \
|
||||
SZ_DEF(1024) \
|
||||
SZ_DEF(1080) \
|
||||
SZ_DEF(1152) \
|
||||
SZ_DEF(1200) \
|
||||
SZ_DEF(1296) \
|
||||
SZ_DEF(1440) \
|
||||
SZ_DEF(1500) \
|
||||
SZ_DEF(1536) \
|
||||
SZ_DEF(1620) \
|
||||
SZ_DEF(1728) \
|
||||
SZ_DEF(1800) \
|
||||
SZ_DEF(1920) \
|
||||
SZ_DEF(1944) \
|
||||
SZ_DEF(2048) \
|
||||
SZ_DEF(2160) \
|
||||
SZ_DEF(2304) \
|
||||
SZ_DEF(2400) \
|
||||
SZ_DEF(2592) \
|
||||
SZ_DEF(2700) \
|
||||
SZ_DEF(2880) \
|
||||
SZ_DEF(2916) \
|
||||
SZ_DEF(3000) \
|
||||
SZ_DEF(3072) \
|
||||
SZ_DEF(3240) \
|
||||
SZ_DEF(4096) \
|
||||
SZ_DEF(6144) \
|
||||
SZ_DEF(8192) \
|
||||
SZ_DEF(9216) \
|
||||
SZ_DEF(12288) \
|
||||
SZ_DEF(18432) \
|
||||
SZ_DEF(24576) \
|
||||
SZ_DEF(36864) \
|
||||
SZ_DEF(49152) \
|
||||
SZ_DEF(73728) \
|
||||
SZ_DEF(98304)
|
||||
|
||||
#define FOREACH_IDFTSZ(SZ_DEF)\
|
||||
SZ_DEF(64) \
|
||||
SZ_DEF(128) \
|
||||
SZ_DEF(256) \
|
||||
SZ_DEF(512) \
|
||||
SZ_DEF(1024) \
|
||||
SZ_DEF(1536) \
|
||||
SZ_DEF(2048) \
|
||||
SZ_DEF(3072) \
|
||||
SZ_DEF(4096) \
|
||||
SZ_DEF(6144) \
|
||||
SZ_DEF(8192) \
|
||||
SZ_DEF(9216) \
|
||||
SZ_DEF(12288) \
|
||||
SZ_DEF(18432) \
|
||||
SZ_DEF(24576) \
|
||||
SZ_DEF(36864) \
|
||||
SZ_DEF(49152) \
|
||||
SZ_DEF(73728) \
|
||||
SZ_DEF(98304)
|
||||
|
||||
#ifdef OAIDFTS_MAIN
|
||||
typedef void(*adftfunc_t)(int16_t *sigF,int16_t *sig,unsigned char scale_flag);
|
||||
typedef void(*aidftfunc_t)(int16_t *sigF,int16_t *sig,unsigned char scale_flag);
|
||||
typedef void(*adftfunc_t)(int16_t *sigF,int16_t *sig,unsigned char scale_flag);
|
||||
typedef void(*aidftfunc_t)(int16_t *sigF,int16_t *sig,unsigned char scale_flag);
|
||||
|
||||
void dft12(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft24(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft36(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft48(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft60(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft64(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft72(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft96(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft108(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft120(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft128(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft144(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft180(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft192(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft216(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft240(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft256(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft288(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft300(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft324(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft360(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft384(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft432(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft480(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft512(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft540(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft576(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft600(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft648(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft720(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft768(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft864(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft900(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft960(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft972(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft1024(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft1080(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft1152(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft1200(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft1296(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft1440(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft1500(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft1536(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
|
||||
void dft1620(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft1728(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft1800(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft1920(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft1944(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft2048(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft2160(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft2304(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft2400(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft2592(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft2700(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft2880(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft2916(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft3000(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft3072(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
|
||||
void dft3240(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft4096(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft6144(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
|
||||
void dft8192(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft9216(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft12288(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft18432(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft24576(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft36864(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft49152(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft73728(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void dft98304(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
|
||||
|
||||
void idft64(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void idft128(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void idft256(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void idft512(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void idft1024(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void idft1536(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
|
||||
void idft2048(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void idft3072(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
|
||||
void idft4096(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void idft6144(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
|
||||
void idft8192(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void idft9216(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
void idft12288(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
|
||||
void idft18432(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
|
||||
void idft24576(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
|
||||
void idft36864(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
|
||||
void idft49152(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
|
||||
void idft73728(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
|
||||
void idft98304(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
|
||||
#define SZ_FUNC(Sz) void dft ## Sz(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
|
||||
FOREACH_DFTSZ(SZ_FUNC)
|
||||
|
||||
#define SZ_iFUNC(Sz) void idft ## Sz(int16_t *x,int16_t *y,uint8_t scale_flag);
|
||||
|
||||
FOREACH_IDFTSZ(SZ_iFUNC)
|
||||
|
||||
#else
|
||||
typedef void(*dftfunc_t)(uint8_t sizeidx,int16_t *sigF,int16_t *sig,unsigned char scale_flag);
|
||||
typedef void(*idftfunc_t)(uint8_t sizeidx,int16_t *sigF,int16_t *sig,unsigned char scale_flag);
|
||||
typedef void(*dftfunc_t)(uint8_t sizeidx,int16_t *sigF,int16_t *sig,unsigned char scale_flag);
|
||||
typedef void(*idftfunc_t)(uint8_t sizeidx,int16_t *sigF,int16_t *sig,unsigned char scale_flag);
|
||||
# ifdef OAIDFTS_LOADER
|
||||
dftfunc_t dft;
|
||||
idftfunc_t idft;
|
||||
dftfunc_t dft;
|
||||
idftfunc_t idft;
|
||||
# else
|
||||
extern dftfunc_t dft;
|
||||
extern idftfunc_t idft;
|
||||
extern int load_dftslib(void);
|
||||
extern dftfunc_t dft;
|
||||
extern idftfunc_t idft;
|
||||
extern int load_dftslib(void);
|
||||
# endif
|
||||
#endif
|
||||
|
||||
typedef enum DFT_size_idx {
|
||||
DFT_12, DFT_24, DFT_36, DFT_48, DFT_60, DFT_72, DFT_96,
|
||||
DFT_108, DFT_120, DFT_128, DFT_144, DFT_180, DFT_192, DFT_216, DFT_240,
|
||||
DFT_256, DFT_288, DFT_300, DFT_324, DFT_360, DFT_384, DFT_432, DFT_480,
|
||||
DFT_512, DFT_540, DFT_576, DFT_600, DFT_648, DFT_720, DFT_768, DFT_864,
|
||||
DFT_900, DFT_960, DFT_972, DFT_1024, DFT_1080, DFT_1152, DFT_1200, DFT_1296,
|
||||
DFT_1440, DFT_1500, DFT_1536, DFT_1620, DFT_1728, DFT_1800, DFT_1920, DFT_1944,
|
||||
DFT_2048, DFT_2160, DFT_2304, DFT_2400, DFT_2592, DFT_2700, DFT_2880, DFT_2916,
|
||||
DFT_3000, DFT_3072, DFT_3240, DFT_4096, DFT_6144, DFT_8192, DFT_9216, DFT_12288,
|
||||
DFT_18432, DFT_24576, DFT_36864, DFT_49152, DFT_73728, DFT_98304,
|
||||
DFT_SIZE_IDXTABLESIZE
|
||||
} dft_size_idx_t;
|
||||
#define SZ_ENUM(Sz) DFT_ ## Sz,
|
||||
|
||||
#ifdef OAIDFTS_MAIN
|
||||
adftfunc_t dft_ftab[]={
|
||||
dft12, dft24, dft36, dft48, dft60, dft72, dft96,
|
||||
dft108, dft120, dft128, dft144, dft180, dft192, dft216, dft240,
|
||||
dft256, dft288, dft300, dft324, dft360, dft384, dft432, dft480,
|
||||
dft512, dft540, dft576, dft600, dft648, dft720, dft768, dft864,
|
||||
dft900, dft960, dft972, dft1024, dft1080, dft1152, dft1200, dft1296,
|
||||
dft1440, dft1500, dft1536, dft1620, dft1728, dft1800, dft1920, dft1944,
|
||||
dft2048, dft2160, dft2304, dft2400, dft2592, dft2700, dft2880, dft2916,
|
||||
dft3000, dft3072, dft3240, dft4096, dft6144, dft8192, dft9216, dft12288,
|
||||
dft18432, dft24576, dft36864, dft49152, dft73728, dft98304
|
||||
};
|
||||
#endif
|
||||
typedef enum dft_size_idx {
|
||||
FOREACH_DFTSZ(SZ_ENUM)
|
||||
DFT_SIZE_IDXTABLESIZE
|
||||
} dft_size_idx_t;
|
||||
|
||||
#define SZ_iENUM(Sz) IDFT_ ## Sz,
|
||||
|
||||
typedef enum idft_size_idx {
|
||||
IDFT_128, IDFT_256, IDFT_512, IDFT_1024, IDFT_1536, IDFT_2048, IDFT_3072, IDFT_4096,
|
||||
IDFT_6144, IDFT_8192, IDFT_9216, IDFT_12288, IDFT_18432, IDFT_24576, IDFT_36864, IDFT_49152,
|
||||
IDFT_73728, IDFT_98304,
|
||||
IDFT_SIZE_IDXTABLESIZE
|
||||
} idft_size_idx_t;
|
||||
FOREACH_IDFTSZ(SZ_iENUM)
|
||||
IDFT_SIZE_IDXTABLESIZE
|
||||
} idft_size_idx_t;
|
||||
|
||||
#ifdef OAIDFTS_MAIN
|
||||
aidftfunc_t idft_ftab[]={
|
||||
idft128, idft256, idft512, idft1024, idft1536, idft2048, idft3072, idft4096,
|
||||
idft6144, idft8192, idft9216, idft12288, idft18432, idft24576, idft36864, idft49152,
|
||||
idft73728, idft98304
|
||||
|
||||
#define SZ_PTR(Sz) {dft ## Sz,Sz},
|
||||
struct {
|
||||
adftfunc_t func;
|
||||
int size;
|
||||
} dft_ftab[]= {
|
||||
FOREACH_DFTSZ(SZ_PTR)
|
||||
};
|
||||
|
||||
#define SZ_iPTR(Sz) {idft ## Sz,Sz},
|
||||
struct {
|
||||
adftfunc_t func;
|
||||
int size;
|
||||
} idft_ftab[]= {
|
||||
FOREACH_IDFTSZ(SZ_iPTR)
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -387,7 +384,7 @@ int32_t add_real_vector64(int16_t *x,
|
||||
uint32_t N);
|
||||
|
||||
int32_t sub_real_vector64(int16_t *x,
|
||||
int16_t* y,
|
||||
int16_t *y,
|
||||
int16_t *z,
|
||||
uint32_t N);
|
||||
|
||||
@@ -444,7 +441,7 @@ int32_t signal_energy_amp_shift(int32_t *input, uint32_t length);
|
||||
/*!\fn int32_t signal_energy(int *,uint32_t);
|
||||
\brief Computes the signal energy per subcarrier
|
||||
*/
|
||||
int32_t subcarrier_energy(int32_t *,uint32_t, int32_t* subcarrier_energy, uint16_t rx_power_correction);
|
||||
int32_t subcarrier_energy(int32_t *,uint32_t, int32_t *subcarrier_energy, uint16_t rx_power_correction);
|
||||
#endif
|
||||
|
||||
/*!\fn int32_t signal_energy_nodc(int32_t *,uint32_t);
|
||||
|
||||
@@ -850,9 +850,15 @@ typedef struct PHY_VARS_gNB_s {
|
||||
/// counter to average prach energh over first 100 prach opportunities
|
||||
int prach_energy_counter;
|
||||
|
||||
int csi_gold_init;
|
||||
int pdcch_gold_init;
|
||||
int pdsch_gold_init[2];
|
||||
int pusch_gold_init[2];
|
||||
|
||||
int ap_N1;
|
||||
int ap_N2;
|
||||
int ap_XP;
|
||||
|
||||
int pucch0_thres;
|
||||
int pusch_thres;
|
||||
int prach_thres;
|
||||
|
||||
@@ -801,7 +801,10 @@ typedef struct {
|
||||
uint32_t ****nr_gold_pdsch[NUMBER_OF_CONNECTED_eNB_MAX];
|
||||
|
||||
// Scrambling IDs used in PDSCH DMRS
|
||||
uint16_t scramblingID[2];
|
||||
uint16_t scramblingID_dlsch[2];
|
||||
|
||||
// Scrambling IDs used in PUSCH DMRS
|
||||
uint16_t scramblingID_ulsch[2];
|
||||
|
||||
/// PDCCH DMRS
|
||||
uint32_t ***nr_gold_pdcch[NUMBER_OF_CONNECTED_eNB_MAX];
|
||||
@@ -810,7 +813,7 @@ typedef struct {
|
||||
uint16_t scramblingID_pdcch;
|
||||
|
||||
/// PUSCH DMRS sequence
|
||||
uint32_t ***nr_gold_pusch_dmrs;
|
||||
uint32_t ****nr_gold_pusch_dmrs;
|
||||
|
||||
uint32_t X_u[64][839];
|
||||
|
||||
|
||||
@@ -95,6 +95,8 @@
|
||||
#define NR_RX_NB_TH 1
|
||||
#define NR_NB_TH_SLOT 2
|
||||
|
||||
#define NR_NB_NSCID 2
|
||||
|
||||
extern const uint8_t nr_rv_round_map[4];
|
||||
|
||||
static inline
|
||||
|
||||
@@ -158,8 +158,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
|
||||
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,1);
|
||||
|
||||
nr_generate_dci_top(msgTx,
|
||||
gNB->nr_gold_pdcch_dmrs[slot],
|
||||
nr_generate_dci_top(msgTx, slot,
|
||||
&gNB->common_vars.txdataF[0][txdataF_offset],
|
||||
AMP, fp);
|
||||
|
||||
|
||||
@@ -315,6 +315,8 @@ void configure_dlsch(NR_UE_DLSCH_t *dlsch0,
|
||||
dlsch0_harq->mcs = dlsch_config_pdu->mcs;
|
||||
dlsch0_harq->rvidx = dlsch_config_pdu->rv;
|
||||
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
|
||||
dlsch0_harq->nscid = dlsch_config_pdu->nscid;
|
||||
dlsch0_harq->dlDmrsScramblingId = dlsch_config_pdu->dlDmrsScramblingId;
|
||||
//get nrOfLayers from DCI info
|
||||
uint8_t Nl = 0;
|
||||
for (int i = 0; i < 12; i++) { // max 12 ports
|
||||
|
||||
@@ -580,6 +580,8 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int gNB_
|
||||
nr_slot_rx,
|
||||
get_dmrs_port(aatx,dlsch0_harq->dmrs_ports),
|
||||
m,
|
||||
dlsch0_harq->nscid,
|
||||
dlsch0_harq->dlDmrsScramblingId,
|
||||
BWPStart,
|
||||
dlsch0_harq->dmrsConfigType,
|
||||
ue->frame_parms.first_carrier_offset+(BWPStart + pdsch_start_rb)*12,
|
||||
@@ -1481,6 +1483,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
|
||||
gNB_id,
|
||||
nr_slot_rx,
|
||||
l,
|
||||
pdcch_vars->pdcch_config[n_ss].coreset.pdcch_dmrs_scrambling_id,
|
||||
fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
|
||||
coreset_nb_rb);
|
||||
|
||||
|
||||
@@ -961,10 +961,10 @@ int main(int argc, char **argv)
|
||||
nr_gold_pdcch(UE, frame_parms->Nid_cell);
|
||||
|
||||
// compute the scrambling IDs for PDSCH DMRS
|
||||
for (int i = 0; i < 2; i++)
|
||||
UE->scramblingID[i] = frame_parms->Nid_cell;
|
||||
|
||||
nr_gold_pdsch(UE, UE->scramblingID);
|
||||
for (int i = 0; i < 2; i++) {
|
||||
UE->scramblingID_dlsch[i] = frame_parms->Nid_cell;
|
||||
nr_gold_pdsch(UE, i, UE->scramblingID_dlsch[i]);
|
||||
}
|
||||
|
||||
nr_l2_init_ue(NULL);
|
||||
UE_mac = get_mac_inst(0);
|
||||
|
||||
@@ -782,10 +782,10 @@ int main(int argc, char **argv)
|
||||
|
||||
init_nr_ue_transport(UE);
|
||||
|
||||
// initialize the pusch dmrs
|
||||
uint16_t N_n_scid[2] = {frame_parms->Nid_cell,frame_parms->Nid_cell};
|
||||
int n_scid = 0; // This quantity is indicated by higher layer parameter dmrs-SeqInitialization
|
||||
nr_init_pusch_dmrs(UE, N_n_scid, n_scid);
|
||||
for(int n_scid = 0; n_scid<2; n_scid++) {
|
||||
UE->scramblingID_ulsch[n_scid] = frame_parms->Nid_cell;
|
||||
nr_init_pusch_dmrs(UE, frame_parms->Nid_cell, n_scid);
|
||||
}
|
||||
|
||||
//Configure UE
|
||||
NR_UE_RRC_INST_t rrcue;
|
||||
|
||||
Reference in New Issue
Block a user