NFAPI UL indications added and full UE connection tested.
This commit is contained in:
@@ -97,14 +97,21 @@ void phy_config_request(PHY_Config_t *phy_config) {
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fp->nushift = fp->Nid_cell%6;
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fp->nushift = fp->Nid_cell%6;
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fp->eutra_band = eutra_band;
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fp->eutra_band = eutra_band;
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fp->Ncp = Ncp;
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fp->Ncp = Ncp;
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fp->Ncp_UL = Ncp;
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fp->nb_antenna_ports_eNB = p_eNB;
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fp->nb_antenna_ports_eNB = p_eNB;
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fp->threequarter_fs = 0;
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AssertFatal(cfg->phich_config.phich_resource.value<4, "Illegal phich_Resource\n");
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AssertFatal(cfg->phich_config.phich_resource.value<4, "Illegal phich_Resource\n");
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fp->phich_config_common.phich_resource = phich_resource_table[cfg->phich_config.phich_resource.value];
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fp->phich_config_common.phich_resource = phich_resource_table[cfg->phich_config.phich_resource.value];
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fp->phich_config_common.phich_duration = cfg->phich_config.phich_duration.value;
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fp->phich_config_common.phich_duration = cfg->phich_config.phich_duration.value;
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fp->dl_CarrierFreq = from_earfcn(eutra_band,dl_CarrierFreq);
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fp->dl_CarrierFreq = from_earfcn(eutra_band,dl_CarrierFreq);
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fp->ul_CarrierFreq = fp->dl_CarrierFreq - get_uldl_offset(eutra_band);
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fp->ul_CarrierFreq = fp->dl_CarrierFreq - (get_uldl_offset(eutra_band)*100000);
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fp->tdd_config = 0;
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fp->tdd_config_S = 0;
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if (fp->dl_CarrierFreq==fp->ul_CarrierFreq)
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if (fp->dl_CarrierFreq==fp->ul_CarrierFreq)
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fp->frame_type = TDD;
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fp->frame_type = TDD;
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else
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else
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@@ -177,16 +184,20 @@ void phy_config_request(PHY_Config_t *phy_config) {
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init_ul_hopping(fp);
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init_ul_hopping(fp);
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fp->soundingrs_ul_config_common.enabled_flag = 1;
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fp->soundingrs_ul_config_common.enabled_flag = 0;// 1; Don't know how to turn this off in NFAPI
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fp->soundingrs_ul_config_common.srs_BandwidthConfig = cfg->srs_config.bandwidth_configuration.value;
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fp->soundingrs_ul_config_common.srs_BandwidthConfig = cfg->srs_config.bandwidth_configuration.value;
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fp->soundingrs_ul_config_common.srs_SubframeConfig = cfg->srs_config.srs_subframe_configuration.value;
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fp->soundingrs_ul_config_common.srs_SubframeConfig = cfg->srs_config.srs_subframe_configuration.value;
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fp->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission = cfg->srs_config.srs_acknack_srs_simultaneous_transmission.value;
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fp->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission = cfg->srs_config.srs_acknack_srs_simultaneous_transmission.value;
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fp->soundingrs_ul_config_common.srs_MaxUpPts = cfg->srs_config.max_up_pts.value;
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fp->soundingrs_ul_config_common.srs_MaxUpPts = cfg->srs_config.max_up_pts.value;
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fp->num_MBSFN_config = 0;
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init_ncs_cell(fp,RC.eNB[Mod_id][CC_id]->ncs_cell);
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init_ncs_cell(fp,RC.eNB[Mod_id][CC_id]->ncs_cell);
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init_ul_hopping(fp);
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init_ul_hopping(fp);
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RC.eNB[Mod_id][CC_id]->configured = 1;
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LOG_I(PHY,"eNB %d/%d configured\n",Mod_id,CC_id);
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}
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}
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void phy_config_sib1_ue(uint8_t Mod_id,int CC_id,
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void phy_config_sib1_ue(uint8_t Mod_id,int CC_id,
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@@ -1668,6 +1679,7 @@ int phy_init_lte_eNB(PHY_VARS_eNB *eNB,
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if (abstraction_flag==0) {
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if (abstraction_flag==0) {
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common_vars->rxdata = (int32_t **)NULL;
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common_vars->txdataF = (int32_t **)malloc16(NB_ANTENNA_PORTS_ENB*sizeof(int32_t*));
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common_vars->txdataF = (int32_t **)malloc16(NB_ANTENNA_PORTS_ENB*sizeof(int32_t*));
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common_vars->rxdataF = (int32_t **)malloc16(64*sizeof(int32_t*));
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common_vars->rxdataF = (int32_t **)malloc16(64*sizeof(int32_t*));
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@@ -1683,17 +1695,17 @@ int phy_init_lte_eNB(PHY_VARS_eNB *eNB,
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// Channel estimates for SRS
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// Channel estimates for SRS
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for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
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for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
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srs_vars[UE_id].srs_ch_estimates = (int32_t**)malloc16( fp->nb_antennas_rx*sizeof(int32_t*) );
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srs_vars[UE_id].srs_ch_estimates = (int32_t**)malloc16( 64*sizeof(int32_t*) );
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srs_vars[UE_id].srs_ch_estimates_time = (int32_t**)malloc16( fp->nb_antennas_rx*sizeof(int32_t*) );
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srs_vars[UE_id].srs_ch_estimates_time = (int32_t**)malloc16( 64*sizeof(int32_t*) );
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for (i=0; i<fp->nb_antennas_rx; i++) {
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for (i=0; i<64; i++) {
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srs_vars[UE_id].srs_ch_estimates[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size );
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srs_vars[UE_id].srs_ch_estimates[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size );
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srs_vars[UE_id].srs_ch_estimates_time[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2 );
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srs_vars[UE_id].srs_ch_estimates_time[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2 );
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}
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}
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} //UE_id
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} //UE_id
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} // abstraction_flag = 0
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} // abstraction_flag = 0
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else { //UPLINK abstraction = 1
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else { //UPLINK abstraction = 1
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eNB->sinr_dB = (double*) malloc16_clear( fp->N_RB_DL*12*sizeof(double) );
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eNB->sinr_dB = (double*) malloc16_clear( fp->N_RB_DL*12*sizeof(double) );
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@@ -1732,28 +1744,28 @@ int phy_init_lte_eNB(PHY_VARS_eNB *eNB,
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pusch_vars[UE_id] = (LTE_eNB_PUSCH*)malloc16_clear( NUMBER_OF_UE_MAX*sizeof(LTE_eNB_PUSCH) );
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pusch_vars[UE_id] = (LTE_eNB_PUSCH*)malloc16_clear( NUMBER_OF_UE_MAX*sizeof(LTE_eNB_PUSCH) );
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if (abstraction_flag==0) {
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if (abstraction_flag==0) {
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for (eNB_id=0; eNB_id<3; eNB_id++) {
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pusch_vars[UE_id]->rxdataF_ext = (int32_t**)malloc16( 2*sizeof(int32_t*) );
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pusch_vars[UE_id]->rxdataF_ext2 = (int32_t**)malloc16( 2*sizeof(int32_t*) );
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pusch_vars[UE_id]->drs_ch_estimates = (int32_t**)malloc16( 2*sizeof(int32_t*) );
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pusch_vars[UE_id]->drs_ch_estimates_time = (int32_t**)malloc16( 2*sizeof(int32_t*) );
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pusch_vars[UE_id]->rxdataF_comp = (int32_t**)malloc16( 2*sizeof(int32_t*) );
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pusch_vars[UE_id]->ul_ch_mag = (int32_t**)malloc16( 2*sizeof(int32_t*) );
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pusch_vars[UE_id]->ul_ch_magb = (int32_t**)malloc16( 2*sizeof(int32_t*) );
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pusch_vars[UE_id]->rxdataF_ext = (int32_t**)malloc16( 2*sizeof(int32_t*) );
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AssertFatal(fp->ofdm_symbol_size > 127, "fp->ofdm_symbol_size %d<128\n",fp->ofdm_symbol_size);
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pusch_vars[UE_id]->rxdataF_ext2 = (int32_t**)malloc16( 2*sizeof(int32_t*) );
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AssertFatal(fp->symbols_per_tti > 11, "fp->symbols_per_tti %d < 12\n",fp->symbols_per_tti);
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pusch_vars[UE_id]->drs_ch_estimates = (int32_t**)malloc16( 2*sizeof(int32_t*) );
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AssertFatal(fp->N_RB_UL > 5, "fp->N_RB_UL %d < 6\n",fp->N_RB_UL);
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pusch_vars[UE_id]->drs_ch_estimates_time = (int32_t**)malloc16( 2*sizeof(int32_t*) );
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for (i=0; i<2; i++) {
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pusch_vars[UE_id]->rxdataF_comp = (int32_t**)malloc16( 2*sizeof(int32_t*) );
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// RK 2 times because of output format of FFT!
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pusch_vars[UE_id]->ul_ch_mag = (int32_t**)malloc16( 2*sizeof(int32_t*) );
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// FIXME We should get rid of this
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pusch_vars[UE_id]->ul_ch_magb = (int32_t**)malloc16( 2*sizeof(int32_t*) );
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pusch_vars[UE_id]->rxdataF_ext[i] = (int32_t*)malloc16_clear( 2*sizeof(int32_t)*fp->N_RB_UL*12*fp->symbols_per_tti );
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pusch_vars[UE_id]->rxdataF_ext2[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->N_RB_UL*12*fp->symbols_per_tti );
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for (i=0; i<2; i++) {
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pusch_vars[UE_id]->drs_ch_estimates[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->N_RB_UL*12*fp->symbols_per_tti );
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// RK 2 times because of output format of FFT!
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pusch_vars[UE_id]->drs_ch_estimates_time[i] = (int32_t*)malloc16_clear( 2*2*sizeof(int32_t)*fp->ofdm_symbol_size );
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// FIXME We should get rid of this
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pusch_vars[UE_id]->rxdataF_comp[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->N_RB_UL*12*fp->symbols_per_tti );
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pusch_vars[UE_id]->rxdataF_ext[i] = (int32_t*)malloc16_clear( 2*sizeof(int32_t)*fp->N_RB_UL*12*fp->symbols_per_tti );
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pusch_vars[UE_id]->ul_ch_mag[i] = (int32_t*)malloc16_clear( fp->symbols_per_tti*sizeof(int32_t)*fp->N_RB_UL*12 );
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pusch_vars[UE_id]->rxdataF_ext2[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->N_RB_UL*12*fp->symbols_per_tti );
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pusch_vars[UE_id]->ul_ch_magb[i] = (int32_t*)malloc16_clear( fp->symbols_per_tti*sizeof(int32_t)*fp->N_RB_UL*12 );
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pusch_vars[UE_id]->drs_ch_estimates[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->N_RB_UL*12*fp->symbols_per_tti );
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}
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pusch_vars[UE_id]->drs_ch_estimates_time[i] = (int32_t*)malloc16_clear( 2*2*sizeof(int32_t)*fp->ofdm_symbol_size );
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pusch_vars[UE_id]->rxdataF_comp[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->N_RB_UL*12*fp->symbols_per_tti );
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pusch_vars[UE_id]->ul_ch_mag[i] = (int32_t*)malloc16_clear( fp->symbols_per_tti*sizeof(int32_t)*fp->N_RB_UL*12 );
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pusch_vars[UE_id]->ul_ch_magb[i] = (int32_t*)malloc16_clear( fp->symbols_per_tti*sizeof(int32_t)*fp->N_RB_UL*12 );
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}
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} //eNB_id
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pusch_vars[UE_id]->llr = (int16_t*)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) );
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pusch_vars[UE_id]->llr = (int16_t*)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) );
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} // abstraction_flag
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} // abstraction_flag
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@@ -304,6 +304,11 @@ void freq_equalization(LTE_DL_FRAME_PARMS *frame_parms,
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ul_ch_magb128 = (int16x8_t*)&ul_ch_magb[0][symbol*frame_parms->N_RB_DL*12];
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ul_ch_magb128 = (int16x8_t*)&ul_ch_magb[0][symbol*frame_parms->N_RB_DL*12];
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#endif
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#endif
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AssertFatal(symbol<frame_parms->symbols_per_tti,"symbol %d >= %d\n",
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symbol,frame_parms->symbols_per_tti);
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AssertFatal(Msc_RS<frame_parms->N_RB_UL*12,"Msc_RS %d >= %d\n",
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Msc_RS,frame_parms->N_RB_UL*12);
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for (re=0; re<(Msc_RS>>2); re++) {
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for (re=0; re<(Msc_RS>>2); re++) {
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amp=(*((int16_t*)&ul_ch_mag128[re]));
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amp=(*((int16_t*)&ul_ch_mag128[re]));
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@@ -210,7 +210,9 @@ int lte_est_timing_advance_pusch(PHY_VARS_eNB* eNB,uint8_t UE_id)
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uint8_t cyclic_shift = 0;
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uint8_t cyclic_shift = 0;
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int sync_pos = (frame_parms->ofdm_symbol_size-cyclic_shift*frame_parms->ofdm_symbol_size/12)%(frame_parms->ofdm_symbol_size);
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int sync_pos = (frame_parms->ofdm_symbol_size-cyclic_shift*frame_parms->ofdm_symbol_size/12)%(frame_parms->ofdm_symbol_size);
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AssertFatal(frame_parms->ofdm_symbol_size > 127,"frame_parms->ofdm_symbol_size %d<128\n",frame_parms->ofdm_symbol_size);
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AssertFatal(frame_parms->nb_antennas_rx >0 && frame_parms->nb_antennas_rx<3,"frame_parms->nb_antennas_rx %d not in [0,1]\n",
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frame_parms->nb_antennas_rx);
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for (i = 0; i < frame_parms->ofdm_symbol_size; i++) {
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for (i = 0; i < frame_parms->ofdm_symbol_size; i++) {
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temp = 0;
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temp = 0;
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@@ -236,9 +238,9 @@ int lte_est_timing_advance_pusch(PHY_VARS_eNB* eNB,uint8_t UE_id)
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} else
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} else
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max_pos_fil2 = ((max_pos_fil2 * coef) + (max_pos * ncoef)) >> 15;
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max_pos_fil2 = ((max_pos_fil2 * coef) + (max_pos * ncoef)) >> 15;
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#ifdef DEBUG_PHY
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//#ifdef DEBUG_PHY
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LOG_D(PHY,"frame %d: max_pos = %d, max_pos_fil = %d, sync_pos=%d\n",eNB->proc.frame_rx,max_pos,max_pos_fil2,sync_pos);
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LOG_I(PHY,"frame %d: max_pos = %d, max_pos_fil = %d, sync_pos=%d\n",eNB->proc.frame_rx,max_pos,max_pos_fil2,sync_pos);
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#endif //DEBUG_PHY
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//#endif //DEBUG_PHY
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return(max_pos_fil2-sync_pos);
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return(max_pos_fil2-sync_pos);
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}
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}
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@@ -216,12 +216,14 @@ uint8_t *generate_dci0(uint8_t *dci,
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uint16_t coded_bits;
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uint16_t coded_bits;
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uint8_t dci_flip[8];
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uint8_t dci_flip[8];
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if (aggregation_level>3) {
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AssertFatal((aggregation_level==1) ||
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printf("dci.c: generate_dci FATAL, illegal aggregation_level %d\n",aggregation_level);
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(aggregation_level==2) ||
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return NULL;
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(aggregation_level==4) ||
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}
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(aggregation_level==8),
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"generate_dci FATAL, illegal aggregation_level %d\n",aggregation_level);
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coded_bits = 72 * (1<<aggregation_level);
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coded_bits = 72 * aggregation_level;
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/*
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/*
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@@ -1967,7 +1969,7 @@ void pdcch_unscrambling(LTE_DL_FRAME_PARMS *frame_parms,
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}
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}
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}
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}
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/*
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uint8_t get_num_pdcch_symbols(uint8_t num_dci,
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uint8_t get_num_pdcch_symbols(uint8_t num_dci,
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DCI_ALLOC_t *dci_alloc,
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DCI_ALLOC_t *dci_alloc,
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LTE_DL_FRAME_PARMS *frame_parms,
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LTE_DL_FRAME_PARMS *frame_parms,
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@@ -2036,8 +2038,10 @@ uint8_t get_num_pdcch_symbols(uint8_t num_dci,
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//exit(-1);
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//exit(-1);
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return(0);
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return(0);
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}
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}
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*/
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uint8_t generate_dci_top(uint8_t num_dci,
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uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
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uint8_t num_dci,
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DCI_ALLOC_t *dci_alloc,
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DCI_ALLOC_t *dci_alloc,
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uint32_t n_rnti,
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uint32_t n_rnti,
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int16_t amp,
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int16_t amp,
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@@ -2046,7 +2050,7 @@ uint8_t generate_dci_top(uint8_t num_dci,
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uint32_t subframe)
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uint32_t subframe)
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{
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{
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uint8_t *e_ptr,num_pdcch_symbols;
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uint8_t *e_ptr;
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int8_t L;
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int8_t L;
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uint32_t i, lprime;
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uint32_t i, lprime;
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uint32_t gain_lin_QPSK,kprime,kprime_mod12,mprime,nsymb,symbol_offset,tti_offset;
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uint32_t gain_lin_QPSK,kprime,kprime_mod12,mprime,nsymb,symbol_offset,tti_offset;
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@@ -2093,7 +2097,6 @@ uint8_t generate_dci_top(uint8_t num_dci,
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break;
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break;
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}
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}
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num_pdcch_symbols = get_num_pdcch_symbols(num_dci,dci_alloc,frame_parms,subframe);
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generate_pcfich(num_pdcch_symbols,
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generate_pcfich(num_pdcch_symbols,
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amp,
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amp,
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@@ -2115,13 +2118,13 @@ uint8_t generate_dci_top(uint8_t num_dci,
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// generate DCIs in order of decreasing aggregation level, then common/ue spec
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// generate DCIs in order of decreasing aggregation level, then common/ue spec
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// MAC is assumed to have ordered the UE spec DCI according to the RNTI-based randomization
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// MAC is assumed to have ordered the UE spec DCI according to the RNTI-based randomization
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for (L=3; L>=0; L--) {
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for (L=8; L>=1; L>>=1) {
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for (i=0; i<num_dci; i++) {
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for (i=0; i<num_dci; i++) {
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|
|
||||||
if (dci_alloc[i].L == (uint8_t)L) {
|
if (dci_alloc[i].L == (uint8_t)L) {
|
||||||
|
|
||||||
//#ifdef DEBUG_DCI_ENCODING
|
//#ifdef DEBUG_DCI_ENCODING
|
||||||
LOG_I(PHY,"Generating DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x)\n",i,num_dci,dci_alloc[i].firstCCE,dci_alloc[i].dci_length,1<<dci_alloc[i].L,
|
LOG_I(PHY,"Generating DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x)\n",i,num_dci,dci_alloc[i].firstCCE,dci_alloc[i].dci_length,dci_alloc[i].L,
|
||||||
*(unsigned int*)dci_alloc[i].dci_pdu);
|
*(unsigned int*)dci_alloc[i].dci_pdu);
|
||||||
dump_dci(frame_parms,&dci_alloc[i]);
|
dump_dci(frame_parms,&dci_alloc[i]);
|
||||||
//#endif
|
//#endif
|
||||||
@@ -2360,10 +2363,8 @@ void dci_decoding(uint8_t DCI_LENGTH,
|
|||||||
int32_t i;
|
int32_t i;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
if (aggregation_level>3) {
|
AssertFatal(aggregation_level<4,
|
||||||
LOG_I(PHY," dci.c: dci_decoding FATAL, illegal aggregation_level %d\n",aggregation_level);
|
"dci_decoding FATAL, illegal aggregation_level %d\n",aggregation_level);
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
coded_bits = 72 * (1<<aggregation_level);
|
coded_bits = 72 * (1<<aggregation_level);
|
||||||
|
|
||||||
|
|||||||
@@ -802,9 +802,9 @@ int8_t find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type)
|
|||||||
uint8_t i;
|
uint8_t i;
|
||||||
int8_t first_free_index=-1;
|
int8_t first_free_index=-1;
|
||||||
|
|
||||||
AssertFatal(eNB==NULL,"eNB is null\n");
|
AssertFatal(eNB!=NULL,"eNB is null\n");
|
||||||
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
|
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
|
||||||
AssertFatal(eNB->ulsch[i]==NULL,"eNB->dlsch[%d] is null\n",i);
|
AssertFatal(eNB->ulsch[i]!=NULL,"eNB->dlsch[%d] is null\n",i);
|
||||||
if ((eNB->ulsch[i]->harq_mask >0) &&
|
if ((eNB->ulsch[i]->harq_mask >0) &&
|
||||||
(eNB->ulsch[i]->rnti==rnti)) return(i);
|
(eNB->ulsch[i]->rnti==rnti)) return(i);
|
||||||
else if ((eNB->ulsch[i]->harq_mask == 0) && (first_free_index==-1)) first_free_index=i;
|
else if ((eNB->ulsch[i]->harq_mask == 0) && (first_free_index==-1)) first_free_index=i;
|
||||||
@@ -960,7 +960,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
|
|||||||
((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
|
((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
|
||||||
// printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
|
// printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
|
||||||
} else {
|
} else {
|
||||||
dci_alloc->dci_length = sizeof_DCI1A_20MHz_FDD_t;
|
dci_alloc->dci_length = sizeof_DCI1A_10MHz_FDD_t;
|
||||||
((DCI1A_10MHz_FDD_t *)dci_pdu)->type = 1;
|
((DCI1A_10MHz_FDD_t *)dci_pdu)->type = 1;
|
||||||
((DCI1A_10MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
|
((DCI1A_10MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
|
||||||
((DCI1A_10MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1;
|
((DCI1A_10MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1;
|
||||||
@@ -7489,15 +7489,6 @@ int generate_ue_dlsch_params_from_dci(int frame,
|
|||||||
|
|
||||||
uint8_t subframe2harq_pid(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t subframe)
|
uint8_t subframe2harq_pid(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t subframe)
|
||||||
{
|
{
|
||||||
/*
|
|
||||||
#ifdef DEBUG_DCI
|
|
||||||
if (frame_parms->frame_type == TDD)
|
|
||||||
printf("dci_tools.c: subframe2_harq_pid, subframe %d for TDD configuration %d\n",subframe,frame_parms->tdd_config);
|
|
||||||
else
|
|
||||||
printf("dci_tools.c: subframe2_harq_pid, subframe %d for FDD \n",subframe);
|
|
||||||
#endif
|
|
||||||
*/
|
|
||||||
|
|
||||||
uint8_t ret = 255;
|
uint8_t ret = 255;
|
||||||
|
|
||||||
if (frame_parms->frame_type == FDD) {
|
if (frame_parms->frame_type == FDD) {
|
||||||
|
|||||||
@@ -374,8 +374,12 @@ typedef struct {
|
|||||||
uint8_t rar_alloc;
|
uint8_t rar_alloc;
|
||||||
/// Status Flag indicating for this ULSCH (idle,active,disabled)
|
/// Status Flag indicating for this ULSCH (idle,active,disabled)
|
||||||
SCH_status_t status;
|
SCH_status_t status;
|
||||||
/// Subframe scheduling indicator (i.e. Transmission opportunity indicator)
|
/// Flag to indicate that eNB should decode UE Msg3
|
||||||
uint8_t subframe_scheduling_flag;
|
uint8_t Msg3_flag;
|
||||||
|
/// Subframe for reception
|
||||||
|
uint8_t subframe;
|
||||||
|
/// Frame for reception
|
||||||
|
uint32_t frame;
|
||||||
/// Subframe cba scheduling indicator (i.e. CBA Transmission opportunity indicator)
|
/// Subframe cba scheduling indicator (i.e. CBA Transmission opportunity indicator)
|
||||||
uint8_t subframe_cba_scheduling_flag;
|
uint8_t subframe_cba_scheduling_flag;
|
||||||
/// PHICH active flag
|
/// PHICH active flag
|
||||||
@@ -505,12 +509,6 @@ typedef struct {
|
|||||||
uint16_t beta_offset_harqack_times8;
|
uint16_t beta_offset_harqack_times8;
|
||||||
/// Flag to indicate that eNB awaits UE Msg3
|
/// Flag to indicate that eNB awaits UE Msg3
|
||||||
uint8_t Msg3_active;
|
uint8_t Msg3_active;
|
||||||
/// Flag to indicate that eNB should decode UE Msg3
|
|
||||||
uint8_t Msg3_flag;
|
|
||||||
/// Subframe for Msg3
|
|
||||||
uint8_t Msg3_subframe;
|
|
||||||
/// Frame for Msg3
|
|
||||||
uint32_t Msg3_frame;
|
|
||||||
/// RNTI attributed to this ULSCH
|
/// RNTI attributed to this ULSCH
|
||||||
uint16_t rnti;
|
uint16_t rnti;
|
||||||
/// cyclic shift for DM RS
|
/// cyclic shift for DM RS
|
||||||
|
|||||||
@@ -151,9 +151,9 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,uint32_
|
|||||||
dlsch->Nsoft = Nsoft;
|
dlsch->Nsoft = Nsoft;
|
||||||
|
|
||||||
for (layer=0; layer<4; layer++) {
|
for (layer=0; layer<4; layer++) {
|
||||||
dlsch->ue_spec_bf_weights[layer] = (int32_t**)malloc16(frame_parms->nb_antennas_tx*sizeof(int32_t*));
|
dlsch->ue_spec_bf_weights[layer] = (int32_t**)malloc16(64*sizeof(int32_t*));
|
||||||
|
|
||||||
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
|
for (aa=0; aa<64; aa++) {
|
||||||
dlsch->ue_spec_bf_weights[layer][aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t));
|
dlsch->ue_spec_bf_weights[layer][aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t));
|
||||||
for (re=0;re<OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES; re++) {
|
for (re=0;re<OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES; re++) {
|
||||||
dlsch->ue_spec_bf_weights[layer][aa][re] = 0x00007fff;
|
dlsch->ue_spec_bf_weights[layer][aa][re] = 0x00007fff;
|
||||||
|
|||||||
@@ -2216,7 +2216,9 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
|
|||||||
for (eNB_id=0;eNB_id<ru->num_eNB;eNB_id++){
|
for (eNB_id=0;eNB_id<ru->num_eNB;eNB_id++){
|
||||||
if (phy_vars_eNB == ru->eNB_list[eNB_id]) {
|
if (phy_vars_eNB == ru->eNB_list[eNB_id]) {
|
||||||
for (aa=0;aa<ru->nb_tx;aa++){
|
for (aa=0;aa<ru->nb_tx;aa++){
|
||||||
memcpy(ru->beam_weights[eNB_id][5][aa],dlsch0->ue_spec_bf_weights[ru_id][0][aa],frame_parms->ofdm_symbol_size*sizeof(int32_t));
|
memcpy(ru->beam_weights[eNB_id][5][aa],
|
||||||
|
dlsch0->ue_spec_bf_weights[ru_id][0],
|
||||||
|
frame_parms->ofdm_symbol_size*sizeof(int32_t));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -2454,6 +2456,7 @@ int dlsch_modulation_SIC(int32_t **sic_buffer,
|
|||||||
int G)
|
int G)
|
||||||
{
|
{
|
||||||
|
|
||||||
|
AssertFatal(1==0,"This function needs to be reintegrated ...\n");
|
||||||
uint8_t harq_pid = -1;//dlsch0->current_harq_pid;
|
uint8_t harq_pid = -1;//dlsch0->current_harq_pid;
|
||||||
LTE_DL_eNB_HARQ_t *dlsch0_harq = dlsch0->harq_processes[harq_pid];
|
LTE_DL_eNB_HARQ_t *dlsch0_harq = dlsch0->harq_processes[harq_pid];
|
||||||
uint32_t i,jj,re_allocated=0;
|
uint32_t i,jj,re_allocated=0;
|
||||||
|
|||||||
@@ -385,14 +385,22 @@ void malloc_IF4p5_buffer(RU_t *ru) {
|
|||||||
int i;
|
int i;
|
||||||
|
|
||||||
if (eth->flags == ETH_RAW_IF4p5_MODE) {
|
if (eth->flags == ETH_RAW_IF4p5_MODE) {
|
||||||
for (i=0;i<10;i++)
|
for (i=0;i<10;i++) {
|
||||||
ru->ifbuffer.tx[i] = malloc(RAW_IF4p5_PRACH_SIZE_BYTES);
|
ru->ifbuffer.tx[i] = malloc(RAW_IF4p5_PRACH_SIZE_BYTES);
|
||||||
|
memset((void*)ru->ifbuffer.tx[i],0,RAW_IF4p5_PRACH_SIZE_BYTES);
|
||||||
|
}
|
||||||
ru->ifbuffer.tx_prach = malloc(RAW_IF4p5_PRACH_SIZE_BYTES);
|
ru->ifbuffer.tx_prach = malloc(RAW_IF4p5_PRACH_SIZE_BYTES);
|
||||||
|
memset((void*)ru->ifbuffer.tx_prach,0,RAW_IF4p5_PRACH_SIZE_BYTES);
|
||||||
ru->ifbuffer.rx = malloc(RAW_IF4p5_PRACH_SIZE_BYTES);
|
ru->ifbuffer.rx = malloc(RAW_IF4p5_PRACH_SIZE_BYTES);
|
||||||
|
memset((void*)ru->ifbuffer.rx,0,RAW_IF4p5_PRACH_SIZE_BYTES);
|
||||||
} else {
|
} else {
|
||||||
for (i=0;i<10;i++)
|
for (i=0;i<10;i++) {
|
||||||
ru->ifbuffer.tx[i] = malloc(UDP_IF4p5_PRACH_SIZE_BYTES);
|
ru->ifbuffer.tx[i] = malloc(UDP_IF4p5_PRACH_SIZE_BYTES);
|
||||||
|
memset((void*)ru->ifbuffer.tx[i],0,UDP_IF4p5_PRACH_SIZE_BYTES);
|
||||||
|
}
|
||||||
ru->ifbuffer.tx_prach = malloc(UDP_IF4p5_PRACH_SIZE_BYTES);
|
ru->ifbuffer.tx_prach = malloc(UDP_IF4p5_PRACH_SIZE_BYTES);
|
||||||
|
memset((void*)ru->ifbuffer.tx_prach,0,UDP_IF4p5_PRACH_SIZE_BYTES);
|
||||||
ru->ifbuffer.rx = malloc(UDP_IF4p5_PRACH_SIZE_BYTES);
|
ru->ifbuffer.rx = malloc(UDP_IF4p5_PRACH_SIZE_BYTES);
|
||||||
|
memset((void*)ru->ifbuffer.rx,0,UDP_IF4p5_PRACH_SIZE_BYTES);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -67,9 +67,9 @@ void generate_pcfich_reg_mapping(LTE_DL_FRAME_PARMS *frame_parms)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
#ifdef DEBUG_PCFICH
|
//#ifdef DEBUG_PCFICH
|
||||||
printf("pcfich_reg : %d,%d,%d,%d\n",pcfich_reg[0],pcfich_reg[1],pcfich_reg[2],pcfich_reg[3]);
|
printf("pcfich_reg : %d,%d,%d,%d\n",pcfich_reg[0],pcfich_reg[1],pcfich_reg[2],pcfich_reg[3]);
|
||||||
#endif
|
//#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
void pcfich_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
|
void pcfich_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
|
||||||
@@ -144,7 +144,8 @@ void generate_pcfich(uint8_t num_pdcch_symbols,
|
|||||||
|
|
||||||
int nushiftmod3 = frame_parms->nushift%3;
|
int nushiftmod3 = frame_parms->nushift%3;
|
||||||
#ifdef DEBUG_PCFICH
|
#ifdef DEBUG_PCFICH
|
||||||
printf("[PHY] Generating PCFICH for %d PDCCH symbols, AMP %d\n",num_pdcch_symbols,amp);
|
LOG_D(PHY,"Generating PCFICH in subfrmae %d for %d PDCCH symbols, AMP %d, p %d, Ncp %d\n",
|
||||||
|
subframe,num_pdcch_symbols,amp,frame_parms->nb_antenna_ports_eNB,frame_parms->Ncp);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
// scrambling
|
// scrambling
|
||||||
@@ -199,7 +200,6 @@ void generate_pcfich(uint8_t num_pdcch_symbols,
|
|||||||
if (reg_offset>=frame_parms->ofdm_symbol_size)
|
if (reg_offset>=frame_parms->ofdm_symbol_size)
|
||||||
reg_offset=1 + reg_offset-frame_parms->ofdm_symbol_size;
|
reg_offset=1 + reg_offset-frame_parms->ofdm_symbol_size;
|
||||||
|
|
||||||
// printf("mapping pcfich reg_offset %d\n",reg_offset);
|
|
||||||
for (i=0; i<6; i++) {
|
for (i=0; i<6; i++) {
|
||||||
if ((i!=nushiftmod3)&&(i!=(nushiftmod3+3))) {
|
if ((i!=nushiftmod3)&&(i!=(nushiftmod3+3))) {
|
||||||
txdataF[0][symbol_offset+reg_offset+i] = pcfich_d[0][m];
|
txdataF[0][symbol_offset+reg_offset+i] = pcfich_d[0][m];
|
||||||
|
|||||||
@@ -318,7 +318,7 @@ void generate_phich_reg_mapping(LTE_DL_FRAME_PARMS *frame_parms)
|
|||||||
Ngroup_PHICH<<=1;
|
Ngroup_PHICH<<=1;
|
||||||
}
|
}
|
||||||
|
|
||||||
// #ifdef DEBUG_PHICH
|
#ifdef DEBUG_PHICH
|
||||||
LOG_I(PHY,"Ngroup_PHICH %d (phich_config_common.phich_resource %d,phich_config_common.phich_duration %s, NidCell %d,Ncp %d, frame_type %d), smallest pcfich REG %d, n0 %d, n1 %d (first PHICH REG %d)\n",
|
LOG_I(PHY,"Ngroup_PHICH %d (phich_config_common.phich_resource %d,phich_config_common.phich_duration %s, NidCell %d,Ncp %d, frame_type %d), smallest pcfich REG %d, n0 %d, n1 %d (first PHICH REG %d)\n",
|
||||||
((frame_parms->Ncp == NORMAL)?Ngroup_PHICH:(Ngroup_PHICH>>1)),
|
((frame_parms->Ncp == NORMAL)?Ngroup_PHICH:(Ngroup_PHICH>>1)),
|
||||||
frame_parms->phich_config_common.phich_resource,
|
frame_parms->phich_config_common.phich_resource,
|
||||||
@@ -328,7 +328,7 @@ void generate_phich_reg_mapping(LTE_DL_FRAME_PARMS *frame_parms)
|
|||||||
n0,
|
n0,
|
||||||
n1,
|
n1,
|
||||||
((frame_parms->Nid_cell))%n0);
|
((frame_parms->Nid_cell))%n0);
|
||||||
//#endif
|
#endif
|
||||||
|
|
||||||
// This is the algorithm from Section 6.9.3 in 36-211, it works only for normal PHICH duration for now ...
|
// This is the algorithm from Section 6.9.3 in 36-211, it works only for normal PHICH duration for now ...
|
||||||
|
|
||||||
@@ -382,9 +382,9 @@ void generate_phich_reg_mapping(LTE_DL_FRAME_PARMS *frame_parms)
|
|||||||
if (frame_parms->phich_reg[mprime][2]>=pcfich_reg[(frame_parms->pcfich_first_reg_idx+3)&3])
|
if (frame_parms->phich_reg[mprime][2]>=pcfich_reg[(frame_parms->pcfich_first_reg_idx+3)&3])
|
||||||
frame_parms->phich_reg[mprime][2]++;
|
frame_parms->phich_reg[mprime][2]++;
|
||||||
|
|
||||||
#ifdef DEBUG_PHICH
|
#ifdef DEBUG_PHICH
|
||||||
printf("phich_reg :%d => %d,%d,%d\n",mprime,frame_parms->phich_reg[mprime][0],frame_parms->phich_reg[mprime][1],frame_parms->phich_reg[mprime][2]);
|
printf("phich_reg :%d => %d,%d,%d\n",mprime,frame_parms->phich_reg[mprime][0],frame_parms->phich_reg[mprime][1],frame_parms->phich_reg[mprime][2]);
|
||||||
#endif
|
#endif
|
||||||
} else { // extended PHICH duration
|
} else { // extended PHICH duration
|
||||||
frame_parms->phich_reg[mprime<<1][0] = (frame_parms->Nid_cell + mprime)%n0;
|
frame_parms->phich_reg[mprime<<1][0] = (frame_parms->Nid_cell + mprime)%n0;
|
||||||
frame_parms->phich_reg[1+(mprime<<1)][0] = (frame_parms->Nid_cell + mprime)%n0;
|
frame_parms->phich_reg[1+(mprime<<1)][0] = (frame_parms->Nid_cell + mprime)%n0;
|
||||||
@@ -1473,7 +1473,7 @@ void rx_phich(PHY_VARS_UE *ue,
|
|||||||
// harqId-8 corresponds to the temporary struct. In total we have 8 harq process(0 ..7) + 1 temporary harq process()
|
// harqId-8 corresponds to the temporary struct. In total we have 8 harq process(0 ..7) + 1 temporary harq process()
|
||||||
//ulsch->harq_processes[8] = ulsch->harq_processes[harq_pid];
|
//ulsch->harq_processes[8] = ulsch->harq_processes[harq_pid];
|
||||||
|
|
||||||
ulsch->harq_processes[harq_pid]->subframe_scheduling_flag =0;
|
|
||||||
ulsch->harq_processes[harq_pid]->status = SCH_IDLE;
|
ulsch->harq_processes[harq_pid]->status = SCH_IDLE;
|
||||||
ulsch->harq_processes[harq_pid]->round = 0;
|
ulsch->harq_processes[harq_pid]->round = 0;
|
||||||
// inform MAC?
|
// inform MAC?
|
||||||
@@ -1524,7 +1524,7 @@ void generate_phich_top(PHY_VARS_eNB *eNB,
|
|||||||
if ((ulsch[UE_id])&&(ulsch[UE_id]->rnti>0)) {
|
if ((ulsch[UE_id])&&(ulsch[UE_id]->rnti>0)) {
|
||||||
if (ulsch[UE_id]->harq_processes[harq_pid]->phich_active == 1) {
|
if (ulsch[UE_id]->harq_processes[harq_pid]->phich_active == 1) {
|
||||||
|
|
||||||
LOG_D(PHY,"[eNB][PUSCH %d/%x] Frame %d subframe %d (pusch_subframe %d,pusch_frame %d) phich active %d\n",
|
LOG_I(PHY,"[eNB][PUSCH %d/%x] Frame %d subframe %d (pusch_subframe %d,pusch_frame %d) phich active %d\n",
|
||||||
harq_pid,ulsch[UE_id]->rnti,proc->frame_tx,subframe,pusch_subframe,pusch_frame,ulsch[UE_id]->harq_processes[harq_pid]->phich_active);
|
harq_pid,ulsch[UE_id]->rnti,proc->frame_tx,subframe,pusch_subframe,pusch_frame,ulsch[UE_id]->harq_processes[harq_pid]->phich_active);
|
||||||
|
|
||||||
/* the HARQ process may have been reused by a new scheduling, so we use
|
/* the HARQ process may have been reused by a new scheduling, so we use
|
||||||
@@ -1542,7 +1542,7 @@ void generate_phich_top(PHY_VARS_eNB *eNB,
|
|||||||
|
|
||||||
nseq_PHICH = ((ulsch[UE_id]->harq_processes[harq_pid]->previous_first_rb/Ngroup_PHICH) +
|
nseq_PHICH = ((ulsch[UE_id]->harq_processes[harq_pid]->previous_first_rb/Ngroup_PHICH) +
|
||||||
ulsch[UE_id]->harq_processes[harq_pid]->previous_n_DMRS)%(2*NSF_PHICH);
|
ulsch[UE_id]->harq_processes[harq_pid]->previous_n_DMRS)%(2*NSF_PHICH);
|
||||||
LOG_D(PHY,"[eNB %d][PUSCH %d] Frame %d subframe %d Generating PHICH, ngroup_PHICH %d/%d, nseq_PHICH %d : HI %d, first_rb %d dci_alloc %d)\n",
|
LOG_I(PHY,"[eNB %d][PUSCH %d] Frame %d subframe %d Generating PHICH, ngroup_PHICH %d/%d, nseq_PHICH %d : HI %d, first_rb %d dci_alloc %d)\n",
|
||||||
eNB->Mod_id,harq_pid,proc->frame_tx,
|
eNB->Mod_id,harq_pid,proc->frame_tx,
|
||||||
subframe,ngroup_PHICH,Ngroup_PHICH,nseq_PHICH,
|
subframe,ngroup_PHICH,Ngroup_PHICH,nseq_PHICH,
|
||||||
ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK,
|
ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK,
|
||||||
@@ -1558,7 +1558,7 @@ void generate_phich_top(PHY_VARS_eNB *eNB,
|
|||||||
T_INT(ulsch[UE_id]->harq_processes[harq_pid]->previous_n_DMRS));
|
T_INT(ulsch[UE_id]->harq_processes[harq_pid]->previous_n_DMRS));
|
||||||
|
|
||||||
if (ulsch[UE_id]->Msg3_active == 1) {
|
if (ulsch[UE_id]->Msg3_active == 1) {
|
||||||
LOG_D(PHY,"[eNB %d][PUSCH %d][RAPROC] Frame %d, subframe %d: Generating Msg3 PHICH for UE %d, ngroup_PHICH %d/%d, nseq_PHICH %d : HI %d, first_rb %d\n",
|
LOG_I(PHY,"[eNB %d][PUSCH %d][RAPROC] Frame %d, subframe %d: Generating Msg3 PHICH for UE %d, ngroup_PHICH %d/%d, nseq_PHICH %d : HI %d, first_rb %d\n",
|
||||||
eNB->Mod_id,harq_pid,proc->frame_tx,subframe,
|
eNB->Mod_id,harq_pid,proc->frame_tx,subframe,
|
||||||
UE_id,ngroup_PHICH,Ngroup_PHICH,nseq_PHICH,ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK,
|
UE_id,ngroup_PHICH,Ngroup_PHICH,nseq_PHICH,ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK,
|
||||||
ulsch[UE_id]->harq_processes[harq_pid]->previous_first_rb);
|
ulsch[UE_id]->harq_processes[harq_pid]->previous_first_rb);
|
||||||
@@ -1591,9 +1591,11 @@ void generate_phich_top(PHY_VARS_eNB *eNB,
|
|||||||
if (ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK==0 ) {
|
if (ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK==0 ) {
|
||||||
T(T_ENB_PHY_ULSCH_UE_NO_DCI_RETRANSMISSION, T_INT(eNB->Mod_id), T_INT(proc->frame_tx),
|
T(T_ENB_PHY_ULSCH_UE_NO_DCI_RETRANSMISSION, T_INT(eNB->Mod_id), T_INT(proc->frame_tx),
|
||||||
T_INT(subframe), T_INT(UE_id), T_INT(ulsch[UE_id]->rnti), T_INT(harq_pid));
|
T_INT(subframe), T_INT(UE_id), T_INT(ulsch[UE_id]->rnti), T_INT(harq_pid));
|
||||||
LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d, subframe %d : PHICH NACK / (no format0 DCI) Setting subframe_scheduling_flag\n",
|
LOG_I(PHY,"[eNB %d][PUSCH %d] frame %d, subframe %d : PHICH NACK / (no format0 DCI) Setting subframe_scheduling_flag\n",
|
||||||
eNB->Mod_id,harq_pid,proc->frame_tx,subframe);
|
eNB->Mod_id,harq_pid,proc->frame_tx,subframe);
|
||||||
ulsch[UE_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
|
// ulsch[UE_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
|
||||||
|
ulsch[UE_id]->harq_processes[harq_pid]->subframe = (subframe + 4)%10;
|
||||||
|
if (subframe>5) ulsch[UE_id]->harq_processes[harq_pid]->frame++;
|
||||||
ulsch[UE_id]->harq_processes[harq_pid]->rvidx = rv_table[ulsch[UE_id]->harq_processes[harq_pid]->round&3];
|
ulsch[UE_id]->harq_processes[harq_pid]->rvidx = rv_table[ulsch[UE_id]->harq_processes[harq_pid]->round&3];
|
||||||
ulsch[UE_id]->harq_processes[harq_pid]->O_RI = 0;
|
ulsch[UE_id]->harq_processes[harq_pid]->O_RI = 0;
|
||||||
ulsch[UE_id]->harq_processes[harq_pid]->Or2 = 0;
|
ulsch[UE_id]->harq_processes[harq_pid]->Or2 = 0;
|
||||||
@@ -1601,9 +1603,9 @@ void generate_phich_top(PHY_VARS_eNB *eNB,
|
|||||||
ulsch[UE_id]->harq_processes[harq_pid]->uci_format = HLC_subband_cqi_nopmi;
|
ulsch[UE_id]->harq_processes[harq_pid]->uci_format = HLC_subband_cqi_nopmi;
|
||||||
|
|
||||||
} else {
|
} else {
|
||||||
LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d PHICH ACK (no format0 DCI) Clearing subframe_scheduling_flag, setting round to 0\n",
|
LOG_I(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d PHICH ACK (no format0 DCI) Clearing subframe_scheduling_flag, setting round to 0\n",
|
||||||
eNB->Mod_id,harq_pid,proc->frame_tx,subframe);
|
eNB->Mod_id,harq_pid,proc->frame_tx,subframe);
|
||||||
ulsch[UE_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 0;
|
ulsch[UE_id]->harq_processes[harq_pid]->status = SCH_IDLE;
|
||||||
ulsch[UE_id]->harq_processes[harq_pid]->round=0;
|
ulsch[UE_id]->harq_processes[harq_pid]->round=0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -1403,6 +1403,7 @@ void dci_encoding(uint8_t *a,
|
|||||||
uint16_t rnti);
|
uint16_t rnti);
|
||||||
|
|
||||||
/*! \brief Top-level DCI entry point. This routine codes an set of DCI PDUs and performs PDCCH modulation, interleaving and mapping.
|
/*! \brief Top-level DCI entry point. This routine codes an set of DCI PDUs and performs PDCCH modulation, interleaving and mapping.
|
||||||
|
\param num_dci Number of pdcch symbols
|
||||||
\param num_dci Number of DCI pdus to encode
|
\param num_dci Number of DCI pdus to encode
|
||||||
\param dci_alloc Allocation vectors for each DCI pdu
|
\param dci_alloc Allocation vectors for each DCI pdu
|
||||||
\param n_rnti n_RNTI (see )
|
\param n_rnti n_RNTI (see )
|
||||||
@@ -1412,7 +1413,8 @@ void dci_encoding(uint8_t *a,
|
|||||||
\param sub_frame_offset subframe offset in frame
|
\param sub_frame_offset subframe offset in frame
|
||||||
@returns Number of PDCCH symbols
|
@returns Number of PDCCH symbols
|
||||||
*/
|
*/
|
||||||
uint8_t generate_dci_top(uint8_t num_dci,
|
uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
|
||||||
|
uint8_t num_dci,
|
||||||
DCI_ALLOC_t *dci_alloc,
|
DCI_ALLOC_t *dci_alloc,
|
||||||
uint32_t n_rnti,
|
uint32_t n_rnti,
|
||||||
int16_t amp,
|
int16_t amp,
|
||||||
@@ -1679,11 +1681,10 @@ int32_t generate_eNB_dlsch_params_from_dci(int frame,
|
|||||||
uint16_t DL_pmi_single,
|
uint16_t DL_pmi_single,
|
||||||
uint8_t beamforming_mode);
|
uint8_t beamforming_mode);
|
||||||
|
|
||||||
int32_t generate_eNB_ulsch_params_from_rar(uint8_t *rar_pdu,
|
int generate_eNB_ulsch_params_from_rar(PHY_VARS_eNB *eNB,
|
||||||
frame_t frame,
|
unsigned char *rar_pdu,
|
||||||
uint8_t subframe,
|
uint32_t frame,
|
||||||
LTE_eNB_ULSCH_t *ulsch,
|
unsigned char subframe);
|
||||||
LTE_DL_FRAME_PARMS *frame_parms);
|
|
||||||
|
|
||||||
int generate_ue_ulsch_params_from_dci(void *dci_pdu,
|
int generate_ue_ulsch_params_from_dci(void *dci_pdu,
|
||||||
rnti_t rnti,
|
rnti_t rnti,
|
||||||
|
|||||||
@@ -52,16 +52,16 @@ extern uint16_t RIV_max6,RIV_max25,RIV_max50,RIV_max100;
|
|||||||
|
|
||||||
//#define DEBUG_RAR
|
//#define DEBUG_RAR
|
||||||
|
|
||||||
#ifdef OPENAIR2
|
|
||||||
int generate_eNB_ulsch_params_from_rar(unsigned char *rar_pdu,
|
int generate_eNB_ulsch_params_from_rar(PHY_VARS_eNB *eNB,
|
||||||
|
unsigned char *rar_pdu,
|
||||||
uint32_t frame,
|
uint32_t frame,
|
||||||
unsigned char subframe,
|
unsigned char subframe){
|
||||||
LTE_eNB_ULSCH_t *ulsch,
|
|
||||||
LTE_DL_FRAME_PARMS *frame_parms)
|
|
||||||
{
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
|
||||||
|
|
||||||
// RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *)rar_pdu;
|
// RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *)rar_pdu;
|
||||||
// RAR_PDU *rar = (RAR_PDU *)(rar_pdu+1);
|
// RAR_PDU *rar = (RAR_PDU *)(rar_pdu+1);
|
||||||
uint8_t *rar = (uint8_t *)(rar_pdu+1);
|
uint8_t *rar = (uint8_t *)(rar_pdu+1);
|
||||||
@@ -71,8 +71,20 @@ int generate_eNB_ulsch_params_from_rar(unsigned char *rar_pdu,
|
|||||||
uint16_t *RIV2nb_rb_LUT, *RIV2first_rb_LUT;
|
uint16_t *RIV2nb_rb_LUT, *RIV2first_rb_LUT;
|
||||||
uint16_t RIV_max;
|
uint16_t RIV_max;
|
||||||
uint16_t use_srs=0;
|
uint16_t use_srs=0;
|
||||||
|
uint16_t rnti;
|
||||||
|
LTE_eNB_ULSCH_t *ulsch;
|
||||||
|
LTE_UL_eNB_HARQ_t *ulsch_harq;
|
||||||
|
int8_t UE_id;
|
||||||
|
|
||||||
LOG_D(PHY,"[eNB][RAPROC] generate_eNB_ulsch_params_from_rar: subframe %d (harq_pid %d)\n",subframe,harq_pid);
|
LOG_I(PHY,"[eNB][RAPROC] generate_eNB_ulsch_params_from_rar: subframe %d (harq_pid %d)\n",subframe,harq_pid);
|
||||||
|
|
||||||
|
rnti = (((uint16_t)rar[4])<<8)+rar[5];
|
||||||
|
|
||||||
|
AssertFatal((UE_id = find_ulsch(rnti,eNB,SEARCH_EXIST_OR_FREE))>=0,
|
||||||
|
"Cannot get UE id for RAR (rnti %x)\n",rnti);
|
||||||
|
|
||||||
|
ulsch = eNB->ulsch[UE_id];
|
||||||
|
ulsch_harq = ulsch->harq_processes[harq_pid];
|
||||||
|
|
||||||
switch (frame_parms->N_RB_DL) {
|
switch (frame_parms->N_RB_DL) {
|
||||||
case 6:
|
case 6:
|
||||||
@@ -104,7 +116,7 @@ int generate_eNB_ulsch_params_from_rar(unsigned char *rar_pdu,
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
ulsch->harq_processes[harq_pid]->TPC = (rar[3]>>2)&7;//rar->TPC;
|
ulsch_harq->TPC = (rar[3]>>2)&7;//rar->TPC;
|
||||||
rballoc = (((uint16_t)(rar[1]&7))<<7)|(rar[2]>>1);
|
rballoc = (((uint16_t)(rar[1]&7))<<7)|(rar[2]>>1);
|
||||||
|
|
||||||
if (rballoc>RIV_max) {
|
if (rballoc>RIV_max) {
|
||||||
@@ -112,43 +124,44 @@ int generate_eNB_ulsch_params_from_rar(unsigned char *rar_pdu,
|
|||||||
return(-1);
|
return(-1);
|
||||||
}
|
}
|
||||||
|
|
||||||
ulsch->harq_processes[harq_pid]->rar_alloc = 1;
|
ulsch_harq->rar_alloc = 1;
|
||||||
ulsch->harq_processes[harq_pid]->first_rb = RIV2first_rb_LUT[rballoc];
|
ulsch_harq->first_rb = RIV2first_rb_LUT[rballoc];
|
||||||
ulsch->harq_processes[harq_pid]->nb_rb = RIV2nb_rb_LUT[rballoc];
|
ulsch_harq->nb_rb = RIV2nb_rb_LUT[rballoc];
|
||||||
// ulsch->harq_processes[harq_pid]->Ndi = 1;
|
// ulsch_harq->Ndi = 1;
|
||||||
|
|
||||||
cqireq = rar[3]&1;
|
cqireq = rar[3]&1;
|
||||||
|
|
||||||
if (cqireq==1) {
|
if (cqireq==1) {
|
||||||
ulsch->harq_processes[harq_pid]->Or2 = sizeof_wideband_cqi_rank2_2A_5MHz;
|
ulsch_harq->Or2 = sizeof_wideband_cqi_rank2_2A_5MHz;
|
||||||
ulsch->harq_processes[harq_pid]->Or1 = sizeof_wideband_cqi_rank1_2A_5MHz;
|
ulsch_harq->Or1 = sizeof_wideband_cqi_rank1_2A_5MHz;
|
||||||
ulsch->harq_processes[harq_pid]->O_RI = 1;
|
ulsch_harq->O_RI = 1;
|
||||||
} else {
|
} else {
|
||||||
ulsch->harq_processes[harq_pid]->O_RI = 0;//1;
|
ulsch_harq->O_RI = 0;//1;
|
||||||
ulsch->harq_processes[harq_pid]->Or2 = 0;
|
ulsch_harq->Or2 = 0;
|
||||||
ulsch->harq_processes[harq_pid]->Or1 = 0;
|
ulsch_harq->Or1 = 0;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
ulsch->harq_processes[harq_pid]->O_ACK = 0;//2;
|
ulsch_harq->O_ACK = 0;//2;
|
||||||
ulsch->beta_offset_cqi_times8 = 18;
|
ulsch->beta_offset_cqi_times8 = 18;
|
||||||
ulsch->beta_offset_ri_times8 = 10;
|
ulsch->beta_offset_ri_times8 = 10;
|
||||||
ulsch->beta_offset_harqack_times8 = 16;
|
ulsch->beta_offset_harqack_times8 = 16;
|
||||||
|
|
||||||
ulsch->rnti = (((uint16_t)rar[4])<<8)+rar[5];
|
ulsch->rnti = rnti;
|
||||||
|
ulsch->harq_mask = 1<<harq_pid;
|
||||||
|
|
||||||
if (ulsch->harq_processes[harq_pid]->round == 0) {
|
if (ulsch_harq->round == 0) {
|
||||||
ulsch->harq_processes[harq_pid]->status = ACTIVE;
|
ulsch_harq->status = ACTIVE;
|
||||||
ulsch->harq_processes[harq_pid]->rvidx = 0;
|
ulsch_harq->rvidx = 0;
|
||||||
ulsch->harq_processes[harq_pid]->mcs = ((rar[2]&1)<<3)|(rar[3]>>5);
|
ulsch_harq->mcs = ((rar[2]&1)<<3)|(rar[3]>>5);
|
||||||
//ulsch->harq_processes[harq_pid]->TBS = dlsch_tbs25[ulsch->harq_processes[harq_pid]->mcs][ulsch->harq_processes[harq_pid]->nb_rb-1];
|
//ulsch_harq->TBS = dlsch_tbs25[ulsch_harq->mcs][ulsch_harq->nb_rb-1];
|
||||||
ulsch->harq_processes[harq_pid]->TBS = TBStable[get_I_TBS_UL(ulsch->harq_processes[harq_pid]->mcs)][ulsch->harq_processes[harq_pid]->nb_rb-1];
|
ulsch_harq->TBS = TBStable[get_I_TBS_UL(ulsch_harq->mcs)][ulsch_harq->nb_rb-1];
|
||||||
ulsch->harq_processes[harq_pid]->Msc_initial = 12*ulsch->harq_processes[harq_pid]->nb_rb;
|
ulsch_harq->Msc_initial = 12*ulsch_harq->nb_rb;
|
||||||
ulsch->harq_processes[harq_pid]->Nsymb_initial = 9;
|
ulsch_harq->Nsymb_initial = 9;
|
||||||
ulsch->harq_processes[harq_pid]->round = 0;
|
ulsch_harq->round = 0;
|
||||||
} else {
|
} else {
|
||||||
ulsch->harq_processes[harq_pid]->rvidx = 0;
|
ulsch_harq->rvidx = 0;
|
||||||
ulsch->harq_processes[harq_pid]->round++;
|
ulsch_harq->round++;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -157,23 +170,23 @@ int generate_eNB_ulsch_params_from_rar(unsigned char *rar_pdu,
|
|||||||
get_Msg3_alloc(frame_parms,
|
get_Msg3_alloc(frame_parms,
|
||||||
subframe,
|
subframe,
|
||||||
frame,
|
frame,
|
||||||
&ulsch->Msg3_frame,
|
&ulsch_harq->frame,
|
||||||
&ulsch->Msg3_subframe);
|
&ulsch_harq->subframe);
|
||||||
|
|
||||||
use_srs = is_srs_occasion_common(frame_parms,ulsch->Msg3_frame,ulsch->Msg3_subframe);
|
use_srs = is_srs_occasion_common(frame_parms,ulsch_harq->frame,ulsch_harq->subframe);
|
||||||
ulsch->harq_processes[harq_pid]->Nsymb_pusch = 12-(frame_parms->Ncp<<1)-(use_srs==0?0:1);
|
ulsch_harq->Nsymb_pusch = 12-(frame_parms->Ncp<<1)-(use_srs==0?0:1);
|
||||||
ulsch->harq_processes[harq_pid]->srs_active = use_srs;
|
ulsch_harq->srs_active = use_srs;
|
||||||
|
|
||||||
#ifdef DEBUG_RAR
|
#ifdef DEBUG_RAR
|
||||||
LOG_D(PHY,"ulsch ra (eNB): harq_pid %d\n",harq_pid);
|
LOG_D(PHY,"ulsch ra (eNB): harq_pid %d\n",harq_pid);
|
||||||
LOG_D(PHY,"ulsch ra (eNB): NBRB %d\n",ulsch->harq_processes[harq_pid]->nb_rb);
|
LOG_D(PHY,"ulsch ra (eNB): NBRB %d\n",ulsch_harq->nb_rb);
|
||||||
LOG_D(PHY,"ulsch ra (eNB): rballoc %x\n",ulsch->harq_processes[harq_pid]->first_rb);
|
LOG_D(PHY,"ulsch ra (eNB): rballoc %x\n",ulsch_harq->first_rb);
|
||||||
LOG_D(PHY,"ulsch ra (eNB): harq_pid %d\n",harq_pid);
|
LOG_D(PHY,"ulsch ra (eNB): harq_pid %d\n",harq_pid);
|
||||||
LOG_D(PHY,"ulsch ra (eNB): round %d\n",ulsch->harq_processes[harq_pid]->round);
|
LOG_D(PHY,"ulsch ra (eNB): round %d\n",ulsch_harq->round);
|
||||||
LOG_D(PHY,"ulsch ra (eNB): TBS %d\n",ulsch->harq_processes[harq_pid]->TBS);
|
LOG_D(PHY,"ulsch ra (eNB): TBS %d\n",ulsch_harq->TBS);
|
||||||
LOG_D(PHY,"ulsch ra (eNB): mcs %d\n",ulsch->harq_processes[harq_pid]->mcs);
|
LOG_D(PHY,"ulsch ra (eNB): mcs %d\n",ulsch_harq->mcs);
|
||||||
LOG_D(PHY,"ulsch ra (eNB): Or1 %d\n",ulsch->harq_processes[harq_pid]->Or1);
|
LOG_D(PHY,"ulsch ra (eNB): Or1 %d\n",ulsch_harq->Or1);
|
||||||
LOG_D(PHY,"ulsch ra (eNB): ORI %d\n",ulsch->harq_processes[harq_pid]->O_RI);
|
LOG_D(PHY,"ulsch ra (eNB): ORI %d\n",ulsch_harq->O_RI);
|
||||||
#endif
|
#endif
|
||||||
return(0);
|
return(0);
|
||||||
}
|
}
|
||||||
@@ -337,4 +350,4 @@ int generate_ue_ulsch_params_from_rar(PHY_VARS_UE *ue,
|
|||||||
//#endif
|
//#endif
|
||||||
return(0);
|
return(0);
|
||||||
}
|
}
|
||||||
#endif
|
|
||||||
|
|||||||
@@ -146,8 +146,6 @@ LTE_eNB_ULSCH_t *new_eNB_ulsch(uint8_t max_turbo_iterations,uint8_t N_RB_UL, uin
|
|||||||
else
|
else
|
||||||
exit_flag=2;
|
exit_flag=2;
|
||||||
}
|
}
|
||||||
|
|
||||||
ulsch->harq_processes[i]->subframe_scheduling_flag = 0;
|
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
exit_flag=1;
|
exit_flag=1;
|
||||||
@@ -177,7 +175,6 @@ void clean_eNb_ulsch(LTE_eNB_ULSCH_t *ulsch)
|
|||||||
if (ulsch->harq_processes[i]) {
|
if (ulsch->harq_processes[i]) {
|
||||||
// ulsch->harq_processes[i]->Ndi = 0;
|
// ulsch->harq_processes[i]->Ndi = 0;
|
||||||
ulsch->harq_processes[i]->status = 0;
|
ulsch->harq_processes[i]->status = 0;
|
||||||
ulsch->harq_processes[i]->subframe_scheduling_flag = 0;
|
|
||||||
//ulsch->harq_processes[i]->phich_active = 0; //this will be done later after transmission of PHICH
|
//ulsch->harq_processes[i]->phich_active = 0; //this will be done later after transmission of PHICH
|
||||||
ulsch->harq_processes[i]->phich_ACK = 0;
|
ulsch->harq_processes[i]->phich_ACK = 0;
|
||||||
ulsch->harq_processes[i]->round = 0;
|
ulsch->harq_processes[i]->round = 0;
|
||||||
|
|||||||
@@ -47,7 +47,6 @@
|
|||||||
static short jitter[8] __attribute__ ((aligned(16))) = {1,0,0,1,0,1,1,0};
|
static short jitter[8] __attribute__ ((aligned(16))) = {1,0,0,1,0,1,1,0};
|
||||||
static short jitterc[8] __attribute__ ((aligned(16))) = {0,1,1,0,1,0,0,1};
|
static short jitterc[8] __attribute__ ((aligned(16))) = {0,1,1,0,1,0,0,1};
|
||||||
|
|
||||||
#ifndef OFDMA_ULSCH
|
|
||||||
void lte_idft(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *z, uint16_t Msc_PUSCH)
|
void lte_idft(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *z, uint16_t Msc_PUSCH)
|
||||||
{
|
{
|
||||||
#if defined(__x86_64__) || defined(__i386__)
|
#if defined(__x86_64__) || defined(__i386__)
|
||||||
@@ -455,7 +454,7 @@ void lte_idft(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *z, uint16_t Msc_PUSCH)
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
}
|
}
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -726,6 +725,9 @@ void ulsch_extract_rbs_single(int32_t **rxdataF,
|
|||||||
//uint8_t symbol = l+Ns*frame_parms->symbols_per_tti/2;
|
//uint8_t symbol = l+Ns*frame_parms->symbols_per_tti/2;
|
||||||
uint8_t symbol = l+((7-frame_parms->Ncp)*(Ns&1)); ///symbol within sub-frame
|
uint8_t symbol = l+((7-frame_parms->Ncp)*(Ns&1)); ///symbol within sub-frame
|
||||||
|
|
||||||
|
AssertFatal((frame_parms->nb_antennas_rx>0) && (frame_parms->nb_antennas_rx<3),
|
||||||
|
"nb_antennas_rx not in (1-2)\n");
|
||||||
|
|
||||||
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
|
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
|
||||||
|
|
||||||
|
|
||||||
@@ -744,20 +746,12 @@ void ulsch_extract_rbs_single(int32_t **rxdataF,
|
|||||||
rxF_ext += nb_rb1*6;
|
rxF_ext += nb_rb1*6;
|
||||||
|
|
||||||
if (nb_rb2) {
|
if (nb_rb2) {
|
||||||
//#ifdef OFDMA_ULSCH
|
|
||||||
// rxF = &rxdataF[aarx][(1 + symbol*frame_parms->ofdm_symbol_size)*2];
|
|
||||||
//#else
|
|
||||||
rxF = &rxdataF[aarx][(symbol*frame_parms->ofdm_symbol_size)];
|
rxF = &rxdataF[aarx][(symbol*frame_parms->ofdm_symbol_size)];
|
||||||
//#endif
|
|
||||||
memcpy(rxF_ext, rxF, nb_rb2*6*sizeof(int));
|
memcpy(rxF_ext, rxF, nb_rb2*6*sizeof(int));
|
||||||
rxF_ext += nb_rb2*6;
|
rxF_ext += nb_rb2*6;
|
||||||
}
|
}
|
||||||
} else { //there is only data in the second half
|
} else { //there is only data in the second half
|
||||||
//#ifdef OFDMA_ULSCH
|
|
||||||
// rxF = &rxdataF[aarx][(1 + 6*(2*first_rb - frame_parms->N_RB_UL) + symbol*frame_parms->ofdm_symbol_size)*2];
|
|
||||||
//#else
|
|
||||||
rxF = &rxdataF[aarx][(6*(2*first_rb - frame_parms->N_RB_UL) + symbol*frame_parms->ofdm_symbol_size)];
|
rxF = &rxdataF[aarx][(6*(2*first_rb - frame_parms->N_RB_UL) + symbol*frame_parms->ofdm_symbol_size)];
|
||||||
//#endif
|
|
||||||
memcpy(rxF_ext, rxF, nb_rb2*6*sizeof(int));
|
memcpy(rxF_ext, rxF, nb_rb2*6*sizeof(int));
|
||||||
rxF_ext += nb_rb2*6;
|
rxF_ext += nb_rb2*6;
|
||||||
}
|
}
|
||||||
@@ -806,9 +800,6 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext,
|
|||||||
__m128i *ul_ch128,*ul_ch_mag128,*ul_ch_mag128b,*rxdataF128,*rxdataF_comp128;
|
__m128i *ul_ch128,*ul_ch_mag128,*ul_ch_mag128b,*rxdataF128,*rxdataF_comp128;
|
||||||
uint8_t aarx;//,symbol_mod;
|
uint8_t aarx;//,symbol_mod;
|
||||||
__m128i mmtmpU0,mmtmpU1,mmtmpU2,mmtmpU3;
|
__m128i mmtmpU0,mmtmpU1,mmtmpU2,mmtmpU3;
|
||||||
#ifdef OFDMA_ULSCH
|
|
||||||
__m128i QAM_amp128U,QAM_amp128bU;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#elif defined(__arm__)
|
#elif defined(__arm__)
|
||||||
|
|
||||||
@@ -817,35 +808,11 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext,
|
|||||||
|
|
||||||
uint8_t aarx;//,symbol_mod;
|
uint8_t aarx;//,symbol_mod;
|
||||||
int32x4_t mmtmpU0,mmtmpU1,mmtmpU0b,mmtmpU1b;
|
int32x4_t mmtmpU0,mmtmpU1,mmtmpU0b,mmtmpU1b;
|
||||||
#ifdef OFDMA_ULSCH
|
|
||||||
int16x8_t mmtmpU2,mmtmpU3;
|
|
||||||
int16x8_t QAM_amp128U,QAM_amp128bU;
|
|
||||||
#endif
|
|
||||||
int16_t conj[4]__attribute__((aligned(16))) = {1,-1,1,-1};
|
int16_t conj[4]__attribute__((aligned(16))) = {1,-1,1,-1};
|
||||||
int32x4_t output_shift128 = vmovq_n_s32(-(int32_t)output_shift);
|
int32x4_t output_shift128 = vmovq_n_s32(-(int32_t)output_shift);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef OFDMA_ULSCH
|
|
||||||
|
|
||||||
#if defined(__x86_64__) || defined(__i386__)
|
|
||||||
if (Qm == 4)
|
|
||||||
QAM_amp128U = _mm_set1_epi16(QAM16_n1);
|
|
||||||
else if (Qm == 6) {
|
|
||||||
QAM_amp128U = _mm_set1_epi16(QAM64_n1);
|
|
||||||
QAM_amp128bU = _mm_set1_epi16(QAM64_n2);
|
|
||||||
}
|
|
||||||
#elif defined(__arm__)
|
|
||||||
if (Qm == 4)
|
|
||||||
QAM_amp128U = vdupq_n_s16(QAM16_n1);
|
|
||||||
else if (Qm == 6) {
|
|
||||||
QAM_amp128U = vdupq_n_s16(QAM64_n1);
|
|
||||||
QAM_amp128bU = vdupq_n_s16(QAM64_n2);
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
|
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
|
||||||
@@ -870,76 +837,7 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext,
|
|||||||
#endif
|
#endif
|
||||||
for (rb=0; rb<nb_rb; rb++) {
|
for (rb=0; rb<nb_rb; rb++) {
|
||||||
// printf("comp: symbol %d rb %d\n",symbol,rb);
|
// printf("comp: symbol %d rb %d\n",symbol,rb);
|
||||||
#ifdef OFDMA_ULSCH
|
|
||||||
if (Qm>2) {
|
|
||||||
// get channel amplitude if not QPSK
|
|
||||||
|
|
||||||
#if defined(__x86_64__) || defined(__i386__)
|
|
||||||
mmtmpU0 = _mm_madd_epi16(ul_ch128[0],ul_ch128[0]);
|
|
||||||
|
|
||||||
mmtmpU0 = _mm_srai_epi32(mmtmpU0,output_shift);
|
|
||||||
|
|
||||||
mmtmpU1 = _mm_madd_epi16(ul_ch128[1],ul_ch128[1]);
|
|
||||||
mmtmpU1 = _mm_srai_epi32(mmtmpU1,output_shift);
|
|
||||||
mmtmpU0 = _mm_packs_epi32(mmtmpU0,mmtmpU1);
|
|
||||||
|
|
||||||
ul_ch_mag128[0] = _mm_unpacklo_epi16(mmtmpU0,mmtmpU0);
|
|
||||||
ul_ch_mag128b[0] = ul_ch_mag128[0];
|
|
||||||
ul_ch_mag128[0] = _mm_mulhi_epi16(ul_ch_mag128[0],QAM_amp128U);
|
|
||||||
ul_ch_mag128[0] = _mm_slli_epi16(ul_ch_mag128[0],2); // 2 to compensate the scale channel estimate
|
|
||||||
ul_ch_mag128[1] = _mm_unpackhi_epi16(mmtmpU0,mmtmpU0);
|
|
||||||
ul_ch_mag128b[1] = ul_ch_mag128[1];
|
|
||||||
ul_ch_mag128[1] = _mm_mulhi_epi16(ul_ch_mag128[1],QAM_amp128U);
|
|
||||||
ul_ch_mag128[1] = _mm_slli_epi16(ul_ch_mag128[1],2); // 2 to compensate the scale channel estimate
|
|
||||||
|
|
||||||
mmtmpU0 = _mm_madd_epi16(ul_ch128[2],ul_ch128[2]);
|
|
||||||
mmtmpU0 = _mm_srai_epi32(mmtmpU0,output_shift);
|
|
||||||
mmtmpU1 = _mm_packs_epi32(mmtmpU0,mmtmpU0);
|
|
||||||
|
|
||||||
ul_ch_mag128[2] = _mm_unpacklo_epi16(mmtmpU1,mmtmpU1);
|
|
||||||
ul_ch_mag128b[2] = ul_ch_mag128[2];
|
|
||||||
|
|
||||||
ul_ch_mag128[2] = _mm_mulhi_epi16(ul_ch_mag128[2],QAM_amp128U);
|
|
||||||
ul_ch_mag128[2] = _mm_slli_epi16(ul_ch_mag128[2],2); // 2 to compensate the scale channel estimate
|
|
||||||
|
|
||||||
|
|
||||||
ul_ch_mag128b[0] = _mm_mulhi_epi16(ul_ch_mag128b[0],QAM_amp128bU);
|
|
||||||
ul_ch_mag128b[0] = _mm_slli_epi16(ul_ch_mag128b[0],2); // 2 to compensate the scale channel estimate
|
|
||||||
|
|
||||||
|
|
||||||
ul_ch_mag128b[1] = _mm_mulhi_epi16(ul_ch_mag128b[1],QAM_amp128bU);
|
|
||||||
ul_ch_mag128b[1] = _mm_slli_epi16(ul_ch_mag128b[1],2); // 2 to compensate the scale channel estimate
|
|
||||||
|
|
||||||
ul_ch_mag128b[2] = _mm_mulhi_epi16(ul_ch_mag128b[2],QAM_amp128bU);
|
|
||||||
ul_ch_mag128b[2] = _mm_slli_epi16(ul_ch_mag128b[2],2);// 2 to compensate the scale channel estimate
|
|
||||||
|
|
||||||
#elif defined(__arm__)
|
|
||||||
mmtmpU0 = vmull_s16(ul_ch128[0], ul_ch128[0]);
|
|
||||||
mmtmpU0 = vqshlq_s32(vqaddq_s32(mmtmpU0,vrev64q_s32(mmtmpU0)),-output_shift128);
|
|
||||||
mmtmpU1 = vmull_s16(ul_ch128[1], ul_ch128[1]);
|
|
||||||
mmtmpU1 = vqshlq_s32(vqaddq_s32(mmtmpU1,vrev64q_s32(mmtmpU1)),-output_shift128);
|
|
||||||
mmtmpU2 = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
|
|
||||||
mmtmpU0 = vmull_s16(ul_ch128[2], ul_ch128[2]);
|
|
||||||
mmtmpU0 = vqshlq_s32(vqaddq_s32(mmtmpU0,vrev64q_s32(mmtmpU0)),-output_shift128);
|
|
||||||
mmtmpU1 = vmull_s16(ul_ch128[3], ul_ch128[3]);
|
|
||||||
mmtmpU1 = vqshlq_s32(vqaddq_s32(mmtmpU1,vrev64q_s32(mmtmpU1)),-output_shift128);
|
|
||||||
mmtmpU3 = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
|
|
||||||
mmtmpU0 = vmull_s16(ul_ch128[4], ul_ch128[4]);
|
|
||||||
mmtmpU0 = vqshlq_s32(vqaddq_s32(mmtmpU0,vrev64q_s32(mmtmpU0)),-output_shift128);
|
|
||||||
mmtmpU1 = vmull_s16(ul_ch128[5], ul_ch128[5]);
|
|
||||||
mmtmpU1 = vqshlq_s32(vqaddq_s32(mmtmpU1,vrev64q_s32(mmtmpU1)),-output_shift128);
|
|
||||||
mmtmpU4 = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
|
|
||||||
|
|
||||||
ul_ch_mag128b[0] = vqdmulhq_s16(mmtmpU2,QAM_amp128b);
|
|
||||||
ul_ch_mag128b[1] = vqdmulhq_s16(mmtmpU3,QAM_amp128b);
|
|
||||||
ul_ch_mag128[0] = vqdmulhq_s16(mmtmpU2,QAM_amp128);
|
|
||||||
ul_ch_mag128[1] = vqdmulhq_s16(mmtmpU3,QAM_amp128);
|
|
||||||
ul_ch_mag128b[2] = vqdmulhq_s16(mmtmpU4,QAM_amp128b);
|
|
||||||
ul_ch_mag128[2] = vqdmulhq_s16(mmtmpU4,QAM_amp128);
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
#else // SC-FDMA
|
|
||||||
// just compute channel magnitude without scaling, this is done after equalization for SC-FDMA
|
// just compute channel magnitude without scaling, this is done after equalization for SC-FDMA
|
||||||
|
|
||||||
#if defined(__x86_64__) || defined(__i386__)
|
#if defined(__x86_64__) || defined(__i386__)
|
||||||
@@ -965,24 +863,23 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext,
|
|||||||
|
|
||||||
|
|
||||||
#elif defined(__arm__)
|
#elif defined(__arm__)
|
||||||
mmtmpU0 = vmull_s16(ul_ch128[0], ul_ch128[0]);
|
mmtmpU0 = vmull_s16(ul_ch128[0], ul_ch128[0]);
|
||||||
mmtmpU0 = vqshlq_s32(vqaddq_s32(mmtmpU0,vrev64q_s32(mmtmpU0)),-output_shift128);
|
mmtmpU0 = vqshlq_s32(vqaddq_s32(mmtmpU0,vrev64q_s32(mmtmpU0)),-output_shift128);
|
||||||
mmtmpU1 = vmull_s16(ul_ch128[1], ul_ch128[1]);
|
mmtmpU1 = vmull_s16(ul_ch128[1], ul_ch128[1]);
|
||||||
mmtmpU1 = vqshlq_s32(vqaddq_s32(mmtmpU1,vrev64q_s32(mmtmpU1)),-output_shift128);
|
mmtmpU1 = vqshlq_s32(vqaddq_s32(mmtmpU1,vrev64q_s32(mmtmpU1)),-output_shift128);
|
||||||
ul_ch_mag128[0] = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
|
ul_ch_mag128[0] = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
|
||||||
mmtmpU0 = vmull_s16(ul_ch128[2], ul_ch128[2]);
|
mmtmpU0 = vmull_s16(ul_ch128[2], ul_ch128[2]);
|
||||||
mmtmpU0 = vqshlq_s32(vqaddq_s32(mmtmpU0,vrev64q_s32(mmtmpU0)),-output_shift128);
|
mmtmpU0 = vqshlq_s32(vqaddq_s32(mmtmpU0,vrev64q_s32(mmtmpU0)),-output_shift128);
|
||||||
mmtmpU1 = vmull_s16(ul_ch128[3], ul_ch128[3]);
|
mmtmpU1 = vmull_s16(ul_ch128[3], ul_ch128[3]);
|
||||||
mmtmpU1 = vqshlq_s32(vqaddq_s32(mmtmpU1,vrev64q_s32(mmtmpU1)),-output_shift128);
|
mmtmpU1 = vqshlq_s32(vqaddq_s32(mmtmpU1,vrev64q_s32(mmtmpU1)),-output_shift128);
|
||||||
ul_ch_mag128[1] = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
|
ul_ch_mag128[1] = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
|
||||||
mmtmpU0 = vmull_s16(ul_ch128[4], ul_ch128[4]);
|
mmtmpU0 = vmull_s16(ul_ch128[4], ul_ch128[4]);
|
||||||
mmtmpU0 = vqshlq_s32(vqaddq_s32(mmtmpU0,vrev64q_s32(mmtmpU0)),-output_shift128);
|
mmtmpU0 = vqshlq_s32(vqaddq_s32(mmtmpU0,vrev64q_s32(mmtmpU0)),-output_shift128);
|
||||||
mmtmpU1 = vmull_s16(ul_ch128[5], ul_ch128[5]);
|
mmtmpU1 = vmull_s16(ul_ch128[5], ul_ch128[5]);
|
||||||
mmtmpU1 = vqshlq_s32(vqaddq_s32(mmtmpU1,vrev64q_s32(mmtmpU1)),-output_shift128);
|
mmtmpU1 = vqshlq_s32(vqaddq_s32(mmtmpU1,vrev64q_s32(mmtmpU1)),-output_shift128);
|
||||||
ul_ch_mag128[2] = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
|
ul_ch_mag128[2] = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(__x86_64__) || defined(__i386__)
|
#if defined(__x86_64__) || defined(__i386__)
|
||||||
// multiply by conjugated channel
|
// multiply by conjugated channel
|
||||||
@@ -1057,65 +954,65 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext,
|
|||||||
rxdataF128+=3;
|
rxdataF128+=3;
|
||||||
rxdataF_comp128+=3;
|
rxdataF_comp128+=3;
|
||||||
#elif defined(__arm__)
|
#elif defined(__arm__)
|
||||||
mmtmpU0 = vmull_s16(ul_ch128[0], rxdataF128[0]);
|
mmtmpU0 = vmull_s16(ul_ch128[0], rxdataF128[0]);
|
||||||
//mmtmpU0 = [Re(ch[0])Re(rx[0]) Im(ch[0])Im(ch[0]) Re(ch[1])Re(rx[1]) Im(ch[1])Im(ch[1])]
|
//mmtmpU0 = [Re(ch[0])Re(rx[0]) Im(ch[0])Im(ch[0]) Re(ch[1])Re(rx[1]) Im(ch[1])Im(ch[1])]
|
||||||
mmtmpU1 = vmull_s16(ul_ch128[1], rxdataF128[1]);
|
mmtmpU1 = vmull_s16(ul_ch128[1], rxdataF128[1]);
|
||||||
//mmtmpU1 = [Re(ch[2])Re(rx[2]) Im(ch[2])Im(ch[2]) Re(ch[3])Re(rx[3]) Im(ch[3])Im(ch[3])]
|
//mmtmpU1 = [Re(ch[2])Re(rx[2]) Im(ch[2])Im(ch[2]) Re(ch[3])Re(rx[3]) Im(ch[3])Im(ch[3])]
|
||||||
mmtmpU0 = vcombine_s32(vpadd_s32(vget_low_s32(mmtmpU0),vget_high_s32(mmtmpU0)),
|
mmtmpU0 = vcombine_s32(vpadd_s32(vget_low_s32(mmtmpU0),vget_high_s32(mmtmpU0)),
|
||||||
vpadd_s32(vget_low_s32(mmtmpU1),vget_high_s32(mmtmpU1)));
|
vpadd_s32(vget_low_s32(mmtmpU1),vget_high_s32(mmtmpU1)));
|
||||||
//mmtmpU0 = [Re(ch[0])Re(rx[0])+Im(ch[0])Im(ch[0]) Re(ch[1])Re(rx[1])+Im(ch[1])Im(ch[1]) Re(ch[2])Re(rx[2])+Im(ch[2])Im(ch[2]) Re(ch[3])Re(rx[3])+Im(ch[3])Im(ch[3])]
|
//mmtmpU0 = [Re(ch[0])Re(rx[0])+Im(ch[0])Im(ch[0]) Re(ch[1])Re(rx[1])+Im(ch[1])Im(ch[1]) Re(ch[2])Re(rx[2])+Im(ch[2])Im(ch[2]) Re(ch[3])Re(rx[3])+Im(ch[3])Im(ch[3])]
|
||||||
|
|
||||||
mmtmpU0b = vmull_s16(vrev32_s16(vmul_s16(ul_ch128[0],*(int16x4_t*)conj)), rxdataF128[0]);
|
mmtmpU0b = vmull_s16(vrev32_s16(vmul_s16(ul_ch128[0],*(int16x4_t*)conj)), rxdataF128[0]);
|
||||||
//mmtmpU0 = [-Im(ch[0])Re(rx[0]) Re(ch[0])Im(rx[0]) -Im(ch[1])Re(rx[1]) Re(ch[1])Im(rx[1])]
|
//mmtmpU0 = [-Im(ch[0])Re(rx[0]) Re(ch[0])Im(rx[0]) -Im(ch[1])Re(rx[1]) Re(ch[1])Im(rx[1])]
|
||||||
mmtmpU1b = vmull_s16(vrev32_s16(vmul_s16(ul_ch128[1],*(int16x4_t*)conj)), rxdataF128[1]);
|
mmtmpU1b = vmull_s16(vrev32_s16(vmul_s16(ul_ch128[1],*(int16x4_t*)conj)), rxdataF128[1]);
|
||||||
//mmtmpU0 = [-Im(ch[2])Re(rx[2]) Re(ch[2])Im(rx[2]) -Im(ch[3])Re(rx[3]) Re(ch[3])Im(rx[3])]
|
//mmtmpU0 = [-Im(ch[2])Re(rx[2]) Re(ch[2])Im(rx[2]) -Im(ch[3])Re(rx[3]) Re(ch[3])Im(rx[3])]
|
||||||
mmtmpU1 = vcombine_s32(vpadd_s32(vget_low_s32(mmtmpU0b),vget_high_s32(mmtmpU0b)),
|
mmtmpU1 = vcombine_s32(vpadd_s32(vget_low_s32(mmtmpU0b),vget_high_s32(mmtmpU0b)),
|
||||||
vpadd_s32(vget_low_s32(mmtmpU1b),vget_high_s32(mmtmpU1b)));
|
vpadd_s32(vget_low_s32(mmtmpU1b),vget_high_s32(mmtmpU1b)));
|
||||||
//mmtmpU1 = [-Im(ch[0])Re(rx[0])+Re(ch[0])Im(rx[0]) -Im(ch[1])Re(rx[1])+Re(ch[1])Im(rx[1]) -Im(ch[2])Re(rx[2])+Re(ch[2])Im(rx[2]) -Im(ch[3])Re(rx[3])+Re(ch[3])Im(rx[3])]
|
//mmtmpU1 = [-Im(ch[0])Re(rx[0])+Re(ch[0])Im(rx[0]) -Im(ch[1])Re(rx[1])+Re(ch[1])Im(rx[1]) -Im(ch[2])Re(rx[2])+Re(ch[2])Im(rx[2]) -Im(ch[3])Re(rx[3])+Re(ch[3])Im(rx[3])]
|
||||||
|
|
||||||
mmtmpU0 = vqshlq_s32(mmtmpU0,-output_shift128);
|
mmtmpU0 = vqshlq_s32(mmtmpU0,-output_shift128);
|
||||||
mmtmpU1 = vqshlq_s32(mmtmpU1,-output_shift128);
|
mmtmpU1 = vqshlq_s32(mmtmpU1,-output_shift128);
|
||||||
rxdataF_comp128[0] = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
|
rxdataF_comp128[0] = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
|
||||||
mmtmpU0 = vmull_s16(ul_ch128[2], rxdataF128[2]);
|
mmtmpU0 = vmull_s16(ul_ch128[2], rxdataF128[2]);
|
||||||
mmtmpU1 = vmull_s16(ul_ch128[3], rxdataF128[3]);
|
mmtmpU1 = vmull_s16(ul_ch128[3], rxdataF128[3]);
|
||||||
mmtmpU0 = vcombine_s32(vpadd_s32(vget_low_s32(mmtmpU0),vget_high_s32(mmtmpU0)),
|
mmtmpU0 = vcombine_s32(vpadd_s32(vget_low_s32(mmtmpU0),vget_high_s32(mmtmpU0)),
|
||||||
vpadd_s32(vget_low_s32(mmtmpU1),vget_high_s32(mmtmpU1)));
|
vpadd_s32(vget_low_s32(mmtmpU1),vget_high_s32(mmtmpU1)));
|
||||||
mmtmpU0b = vmull_s16(vrev32_s16(vmul_s16(ul_ch128[2],*(int16x4_t*)conj)), rxdataF128[2]);
|
mmtmpU0b = vmull_s16(vrev32_s16(vmul_s16(ul_ch128[2],*(int16x4_t*)conj)), rxdataF128[2]);
|
||||||
mmtmpU1b = vmull_s16(vrev32_s16(vmul_s16(ul_ch128[3],*(int16x4_t*)conj)), rxdataF128[3]);
|
mmtmpU1b = vmull_s16(vrev32_s16(vmul_s16(ul_ch128[3],*(int16x4_t*)conj)), rxdataF128[3]);
|
||||||
mmtmpU1 = vcombine_s32(vpadd_s32(vget_low_s32(mmtmpU0b),vget_high_s32(mmtmpU0b)),
|
mmtmpU1 = vcombine_s32(vpadd_s32(vget_low_s32(mmtmpU0b),vget_high_s32(mmtmpU0b)),
|
||||||
vpadd_s32(vget_low_s32(mmtmpU1b),vget_high_s32(mmtmpU1b)));
|
vpadd_s32(vget_low_s32(mmtmpU1b),vget_high_s32(mmtmpU1b)));
|
||||||
mmtmpU0 = vqshlq_s32(mmtmpU0,-output_shift128);
|
mmtmpU0 = vqshlq_s32(mmtmpU0,-output_shift128);
|
||||||
mmtmpU1 = vqshlq_s32(mmtmpU1,-output_shift128);
|
mmtmpU1 = vqshlq_s32(mmtmpU1,-output_shift128);
|
||||||
rxdataF_comp128[1] = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
|
rxdataF_comp128[1] = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
|
||||||
|
|
||||||
mmtmpU0 = vmull_s16(ul_ch128[4], rxdataF128[4]);
|
mmtmpU0 = vmull_s16(ul_ch128[4], rxdataF128[4]);
|
||||||
mmtmpU1 = vmull_s16(ul_ch128[5], rxdataF128[5]);
|
mmtmpU1 = vmull_s16(ul_ch128[5], rxdataF128[5]);
|
||||||
mmtmpU0 = vcombine_s32(vpadd_s32(vget_low_s32(mmtmpU0),vget_high_s32(mmtmpU0)),
|
mmtmpU0 = vcombine_s32(vpadd_s32(vget_low_s32(mmtmpU0),vget_high_s32(mmtmpU0)),
|
||||||
vpadd_s32(vget_low_s32(mmtmpU1),vget_high_s32(mmtmpU1)));
|
vpadd_s32(vget_low_s32(mmtmpU1),vget_high_s32(mmtmpU1)));
|
||||||
|
|
||||||
mmtmpU0b = vmull_s16(vrev32_s16(vmul_s16(ul_ch128[4],*(int16x4_t*)conj)), rxdataF128[4]);
|
mmtmpU0b = vmull_s16(vrev32_s16(vmul_s16(ul_ch128[4],*(int16x4_t*)conj)), rxdataF128[4]);
|
||||||
mmtmpU1b = vmull_s16(vrev32_s16(vmul_s16(ul_ch128[5],*(int16x4_t*)conj)), rxdataF128[5]);
|
mmtmpU1b = vmull_s16(vrev32_s16(vmul_s16(ul_ch128[5],*(int16x4_t*)conj)), rxdataF128[5]);
|
||||||
mmtmpU1 = vcombine_s32(vpadd_s32(vget_low_s32(mmtmpU0b),vget_high_s32(mmtmpU0b)),
|
mmtmpU1 = vcombine_s32(vpadd_s32(vget_low_s32(mmtmpU0b),vget_high_s32(mmtmpU0b)),
|
||||||
vpadd_s32(vget_low_s32(mmtmpU1b),vget_high_s32(mmtmpU1b)));
|
vpadd_s32(vget_low_s32(mmtmpU1b),vget_high_s32(mmtmpU1b)));
|
||||||
|
|
||||||
|
|
||||||
mmtmpU0 = vqshlq_s32(mmtmpU0,-output_shift128);
|
mmtmpU0 = vqshlq_s32(mmtmpU0,-output_shift128);
|
||||||
mmtmpU1 = vqshlq_s32(mmtmpU1,-output_shift128);
|
mmtmpU1 = vqshlq_s32(mmtmpU1,-output_shift128);
|
||||||
rxdataF_comp128[2] = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
|
rxdataF_comp128[2] = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
|
||||||
|
|
||||||
// Add a jitter to compensate for the saturation in "packs" resulting in a bias on the DC after IDFT
|
// Add a jitter to compensate for the saturation in "packs" resulting in a bias on the DC after IDFT
|
||||||
rxdataF_comp128[0] = vqaddq_s16(rxdataF_comp128[0],(*(int16x8_t*)&jitter[0]));
|
rxdataF_comp128[0] = vqaddq_s16(rxdataF_comp128[0],(*(int16x8_t*)&jitter[0]));
|
||||||
rxdataF_comp128[1] = vqaddq_s16(rxdataF_comp128[1],(*(int16x8_t*)&jitter[0]));
|
rxdataF_comp128[1] = vqaddq_s16(rxdataF_comp128[1],(*(int16x8_t*)&jitter[0]));
|
||||||
rxdataF_comp128[2] = vqaddq_s16(rxdataF_comp128[2],(*(int16x8_t*)&jitter[0]));
|
rxdataF_comp128[2] = vqaddq_s16(rxdataF_comp128[2],(*(int16x8_t*)&jitter[0]));
|
||||||
|
|
||||||
|
|
||||||
ul_ch128+=6;
|
ul_ch128+=6;
|
||||||
ul_ch_mag128+=3;
|
ul_ch_mag128+=3;
|
||||||
ul_ch_mag128b+=3;
|
ul_ch_mag128b+=3;
|
||||||
rxdataF128+=6;
|
rxdataF128+=6;
|
||||||
rxdataF_comp128+=3;
|
rxdataF_comp128+=3;
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1669,7 +1566,7 @@ void rx_ulsch(PHY_VARS_eNB *eNB,
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
for (l=0; l<frame_parms->symbols_per_tti-ulsch[UE_id]->harq_processes[harq_pid]->srs_active; l++) {
|
for (l=0; l<(frame_parms->symbols_per_tti-ulsch[UE_id]->harq_processes[harq_pid]->srs_active); l++) {
|
||||||
|
|
||||||
if (((frame_parms->Ncp == 0) && ((l==3) || (l==10)))|| // skip pilots
|
if (((frame_parms->Ncp == 0) && ((l==3) || (l==10)))|| // skip pilots
|
||||||
((frame_parms->Ncp == 1) && ((l==2) || (l==8)))) {
|
((frame_parms->Ncp == 1) && ((l==2) || (l==8)))) {
|
||||||
@@ -1688,34 +1585,34 @@ void rx_ulsch(PHY_VARS_eNB *eNB,
|
|||||||
ulsch[UE_id]->harq_processes[harq_pid]->nb_rb,
|
ulsch[UE_id]->harq_processes[harq_pid]->nb_rb,
|
||||||
log2_maxh); // log2_maxh+I0_shift
|
log2_maxh); // log2_maxh+I0_shift
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
if (frame_parms->nb_antennas_rx > 1)
|
|
||||||
ulsch_detection_mrc(frame_parms,
|
if (frame_parms->nb_antennas_rx > 1)
|
||||||
|
ulsch_detection_mrc(frame_parms,
|
||||||
|
pusch_vars->rxdataF_comp,
|
||||||
|
pusch_vars->ul_ch_mag,
|
||||||
|
pusch_vars->ul_ch_magb,
|
||||||
|
l,
|
||||||
|
ulsch[UE_id]->harq_processes[harq_pid]->nb_rb);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
// if ((eNB->measurements.n0_power_dB[0]+3)<pusch_vars->ulsch_power[0]) {
|
||||||
|
if (23<pusch_vars->ulsch_power[0]) {
|
||||||
|
freq_equalization(frame_parms,
|
||||||
pusch_vars->rxdataF_comp,
|
pusch_vars->rxdataF_comp,
|
||||||
pusch_vars->ul_ch_mag,
|
pusch_vars->ul_ch_mag,
|
||||||
pusch_vars->ul_ch_magb,
|
pusch_vars->ul_ch_magb,
|
||||||
l,
|
l,
|
||||||
ulsch[UE_id]->harq_processes[harq_pid]->nb_rb);
|
ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12,
|
||||||
|
Qm);
|
||||||
#ifndef OFDMA_ULSCH
|
}
|
||||||
|
|
||||||
if ((eNB->measurements.n0_power_dB[0]+3)<pusch_vars->ulsch_power[0]) {
|
|
||||||
|
|
||||||
freq_equalization(frame_parms,
|
|
||||||
pusch_vars->rxdataF_comp,
|
|
||||||
pusch_vars->ul_ch_mag,
|
|
||||||
pusch_vars->ul_ch_magb,
|
|
||||||
l,
|
|
||||||
ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12,
|
|
||||||
Qm);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
#ifndef OFDMA_ULSCH
|
|
||||||
|
|
||||||
//#ifdef DEBUG_ULSCH
|
//#ifdef DEBUG_ULSCH
|
||||||
// Inverse-Transform equalized outputs
|
// Inverse-Transform equalized outputs
|
||||||
@@ -1726,7 +1623,7 @@ void rx_ulsch(PHY_VARS_eNB *eNB,
|
|||||||
// printf("Done\n");
|
// printf("Done\n");
|
||||||
//#endif //DEBUG_ULSCH
|
//#endif //DEBUG_ULSCH
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@@ -803,6 +803,7 @@ typedef struct PHY_VARS_eNB_s {
|
|||||||
/// Module ID indicator for this instance
|
/// Module ID indicator for this instance
|
||||||
module_id_t Mod_id;
|
module_id_t Mod_id;
|
||||||
uint8_t CC_id;
|
uint8_t CC_id;
|
||||||
|
uint8_t configured;
|
||||||
eNB_proc_t proc;
|
eNB_proc_t proc;
|
||||||
int single_thread_flag;
|
int single_thread_flag;
|
||||||
int abstraction_flag;
|
int abstraction_flag;
|
||||||
@@ -827,6 +828,9 @@ typedef struct PHY_VARS_eNB_s {
|
|||||||
PHY_MEASUREMENTS_eNB measurements;
|
PHY_MEASUREMENTS_eNB measurements;
|
||||||
IF_Module_t *if_inst;
|
IF_Module_t *if_inst;
|
||||||
UL_IND_t UL_INFO;
|
UL_IND_t UL_INFO;
|
||||||
|
pthread_mutex_t UL_INFO_mutex;
|
||||||
|
nfapi_rx_indication_pdu_t rx_pdu_list[NFAPI_RX_IND_MAX_PDU];
|
||||||
|
nfapi_crc_indication_pdu_t crc_pdu_list[NFAPI_CRC_IND_MAX_PDU];
|
||||||
Sched_Rsp_t Sched_INFO;
|
Sched_Rsp_t Sched_INFO;
|
||||||
LTE_eNB_PDCCH pdcch_vars[2];
|
LTE_eNB_PDCCH pdcch_vars[2];
|
||||||
LTE_eNB_COMMON common_vars;
|
LTE_eNB_COMMON common_vars;
|
||||||
|
|||||||
@@ -35,6 +35,7 @@
|
|||||||
|
|
||||||
|
|
||||||
#include "types.h"
|
#include "types.h"
|
||||||
|
#include "nfapi_interface.h"
|
||||||
//#include "defs.h"
|
//#include "defs.h"
|
||||||
#include "openair2/COMMON/platform_types.h"
|
#include "openair2/COMMON/platform_types.h"
|
||||||
|
|
||||||
@@ -1048,6 +1049,8 @@ typedef struct {
|
|||||||
int16_t *prach;
|
int16_t *prach;
|
||||||
} LTE_UE_PRACH;
|
} LTE_UE_PRACH;
|
||||||
|
|
||||||
|
#define MAX_NUM_RX_PRACH_PREAMBLES 4
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
/// \brief ?.
|
/// \brief ?.
|
||||||
/// first index: ? [0..1023] (hard coded)
|
/// first index: ? [0..1023] (hard coded)
|
||||||
@@ -1060,6 +1063,8 @@ typedef struct {
|
|||||||
/// first index: rx antenna [0..63] (hard coded) \note Hard coded array size indexed by \c nb_antennas_rx.
|
/// first index: rx antenna [0..63] (hard coded) \note Hard coded array size indexed by \c nb_antennas_rx.
|
||||||
/// second index: ? [0..2047] (hard coded)
|
/// second index: ? [0..2047] (hard coded)
|
||||||
int16_t *prach_ifft[64];
|
int16_t *prach_ifft[64];
|
||||||
|
/// NFAPI PRACH information
|
||||||
|
nfapi_preamble_pdu_t preamble_list[MAX_NUM_RX_PRACH_PREAMBLES];
|
||||||
} LTE_eNB_PRACH;
|
} LTE_eNB_PRACH;
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
|
|||||||
@@ -951,6 +951,7 @@ int is_srs_occasion_common(LTE_DL_FRAME_PARMS *frame_parms,int frame_tx,int subf
|
|||||||
}
|
}
|
||||||
LOG_D(PHY," ISTDD: %d, TSFC: %d, deltaTSFC: %d, AbsSubframeTX: %d.%d\n", frame_parms->frame_type, TSFC, deltaTSFC, frame_tx, subframe_tx);
|
LOG_D(PHY," ISTDD: %d, TSFC: %d, deltaTSFC: %d, AbsSubframeTX: %d.%d\n", frame_parms->frame_type, TSFC, deltaTSFC, frame_tx, subframe_tx);
|
||||||
}
|
}
|
||||||
|
LOG_D(PHY," isSubframeSRS %d\n", isSubframeSRS);
|
||||||
return(isSubframeSRS);
|
return(isSubframeSRS);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
File diff suppressed because it is too large
Load Diff
@@ -1679,7 +1679,6 @@ void ue_ulsch_uespec_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB
|
|||||||
proc->subframe_rx,
|
proc->subframe_rx,
|
||||||
ue->transmission_mode[eNB_id],0,0)==0,
|
ue->transmission_mode[eNB_id],0,0)==0,
|
||||||
"ulsch_coding.c: FATAL ERROR: returning\n");
|
"ulsch_coding.c: FATAL ERROR: returning\n");
|
||||||
return;
|
|
||||||
|
|
||||||
stop_meas(&ue->ulsch_encoding_stats);
|
stop_meas(&ue->ulsch_encoding_stats);
|
||||||
|
|
||||||
@@ -1690,8 +1689,9 @@ void ue_ulsch_uespec_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB
|
|||||||
frame_tx,
|
frame_tx,
|
||||||
eNB_id);
|
eNB_id);
|
||||||
}
|
}
|
||||||
|
LOG_I(PHY,"Done Msg3 encoding\n");
|
||||||
} // Msg3_flag==1
|
} // Msg3_flag==1
|
||||||
else {
|
else {// Msg3_flag==0
|
||||||
input_buffer_length = ue->ulsch[eNB_id]->harq_processes[harq_pid]->TBS/8;
|
input_buffer_length = ue->ulsch[eNB_id]->harq_processes[harq_pid]->TBS/8;
|
||||||
|
|
||||||
if (ue->mac_enabled==1) {
|
if (ue->mac_enabled==1) {
|
||||||
@@ -1740,11 +1740,12 @@ void ue_ulsch_uespec_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB
|
|||||||
LOG_E(PHY,"ulsch_coding.c: FATAL ERROR: returning\n");
|
LOG_E(PHY,"ulsch_coding.c: FATAL ERROR: returning\n");
|
||||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX, VCD_FUNCTION_OUT);
|
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX, VCD_FUNCTION_OUT);
|
||||||
stop_meas(&ue->phy_proc_tx);
|
stop_meas(&ue->phy_proc_tx);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
}
|
} // Msg3_flag==0
|
||||||
stop_meas(&ue->ulsch_encoding_stats);
|
stop_meas(&ue->ulsch_encoding_stats);
|
||||||
|
|
||||||
|
LOG_I(PHY,"Doing ULSCH modulation\n");
|
||||||
|
|
||||||
if (ue->mac_enabled==1) {
|
if (ue->mac_enabled==1) {
|
||||||
pusch_power_cntl(ue,proc,eNB_id,1, abstraction_flag);
|
pusch_power_cntl(ue,proc,eNB_id,1, abstraction_flag);
|
||||||
@@ -1767,7 +1768,7 @@ void ue_ulsch_uespec_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB
|
|||||||
T(T_UE_PHY_PUSCH_TX_POWER, T_INT(eNB_id),T_INT(Mod_id), T_INT(frame_tx%1024), T_INT(subframe_tx),T_INT(ue->tx_power_dBm[subframe_tx]),
|
T(T_UE_PHY_PUSCH_TX_POWER, T_INT(eNB_id),T_INT(Mod_id), T_INT(frame_tx%1024), T_INT(subframe_tx),T_INT(ue->tx_power_dBm[subframe_tx]),
|
||||||
T_INT(tx_amp),T_INT(ue->ulsch[eNB_id]->f_pusch),T_INT(get_PL(Mod_id,0,eNB_id)),T_INT(nb_rb));
|
T_INT(tx_amp),T_INT(ue->ulsch[eNB_id]->f_pusch),T_INT(get_PL(Mod_id,0,eNB_id)),T_INT(nb_rb));
|
||||||
#endif
|
#endif
|
||||||
LOG_D(PHY,"[UE %d][PUSCH %d] AbsSubFrame %d.%d, generating PUSCH, Po_PUSCH: %d dBm (max %d dBm), amp %d\n",
|
LOG_I(PHY,"[UE %d][PUSCH %d] AbsSubFrame %d.%d, generating PUSCH, Po_PUSCH: %d dBm (max %d dBm), amp %d\n",
|
||||||
Mod_id,harq_pid,frame_tx%1024,subframe_tx,ue->tx_power_dBm[subframe_tx],ue->tx_power_max_dBm, tx_amp);
|
Mod_id,harq_pid,frame_tx%1024,subframe_tx,ue->tx_power_dBm[subframe_tx],ue->tx_power_max_dBm, tx_amp);
|
||||||
start_meas(&ue->ulsch_modulation_stats);
|
start_meas(&ue->ulsch_modulation_stats);
|
||||||
ulsch_modulation(ue->common_vars.txdataF,
|
ulsch_modulation(ue->common_vars.txdataF,
|
||||||
|
|||||||
@@ -76,7 +76,7 @@ int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *eNB,uint8_t UE_id,uint8_t h
|
|||||||
//#warning "This condition happens sometimes. Need more investigation" // navid
|
//#warning "This condition happens sometimes. Need more investigation" // navid
|
||||||
//DevAssert( MPR_x100/6 < 100 );
|
//DevAssert( MPR_x100/6 < 100 );
|
||||||
|
|
||||||
if (eNB->ul_power_control_dedicated[UE_id].deltaMCS_Enabled == 1) {
|
if (1==1) { //eNB->ul_power_control_dedicated[UE_id].deltaMCS_Enabled == 1) {
|
||||||
// This is the formula from Section 5.1.1.1 in 36.213 10*log10(deltaIF_PUSCH = (2^(MPR*Ks)-1)*beta_offset_pusch)
|
// This is the formula from Section 5.1.1.1 in 36.213 10*log10(deltaIF_PUSCH = (2^(MPR*Ks)-1)*beta_offset_pusch)
|
||||||
if (bw_factor == 1) {
|
if (bw_factor == 1) {
|
||||||
uint8_t nb_rb = eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb;
|
uint8_t nb_rb = eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb;
|
||||||
|
|||||||
@@ -341,10 +341,9 @@ void *eNB_app_task(void *args_p)
|
|||||||
RC.rrc = (eNB_RRC_INST **)malloc(RC.nb_inst*sizeof(eNB_RRC_INST *));
|
RC.rrc = (eNB_RRC_INST **)malloc(RC.nb_inst*sizeof(eNB_RRC_INST *));
|
||||||
|
|
||||||
for (enb_id = enb_id_start; (enb_id < enb_id_end) ; enb_id++) {
|
for (enb_id = enb_id_start; (enb_id < enb_id_end) ; enb_id++) {
|
||||||
// configure_phy(enb_id);//
|
|
||||||
RC.rrc[enb_id] = (eNB_RRC_INST*)malloc(sizeof(eNB_RRC_INST));
|
RC.rrc[enb_id] = (eNB_RRC_INST*)malloc(sizeof(eNB_RRC_INST));
|
||||||
|
memset((void *)RC.rrc[enb_id],0,sizeof(eNB_RRC_INST));
|
||||||
configure_rrc(enb_id);//
|
configure_rrc(enb_id);
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined (FLEXRAN_AGENT_SB_IF)
|
#if defined (FLEXRAN_AGENT_SB_IF)
|
||||||
|
|||||||
@@ -471,7 +471,7 @@ void RCconfig_RU() {
|
|||||||
if (setting != NULL) {
|
if (setting != NULL) {
|
||||||
|
|
||||||
|
|
||||||
if (RC.ru==NULL) RC.ru = (RU_t**)malloc(RC.nb_RU*sizeof(RU_t*));
|
RC.ru = (RU_t**)malloc(RC.nb_RU*sizeof(RU_t*));
|
||||||
|
|
||||||
RC.ru_mask=(1<<NB_RU) - 1;
|
RC.ru_mask=(1<<NB_RU) - 1;
|
||||||
|
|
||||||
@@ -551,10 +551,9 @@ void RCconfig_RU() {
|
|||||||
}
|
}
|
||||||
printf("RU %d: Transport %s\n",j,tr_preference);
|
printf("RU %d: Transport %s\n",j,tr_preference);
|
||||||
|
|
||||||
if (RC.ru[j]==NULL) {
|
RC.ru[j] = (RU_t*)malloc(sizeof(RU_t));
|
||||||
RC.ru[j] = (RU_t*)malloc(sizeof(RU_t));
|
memset((void*)RC.ru[j],0,sizeof(RU_t));
|
||||||
memset((void*)RC.ru[j],0,sizeof(RU_t));
|
|
||||||
}
|
|
||||||
RC.ru[j]->idx = j;
|
RC.ru[j]->idx = j;
|
||||||
RC.ru[j]->eth_params.local_if_name = strdup(if_name);
|
RC.ru[j]->eth_params.local_if_name = strdup(if_name);
|
||||||
RC.ru[j]->eth_params.my_addr = strdup(ipv4);
|
RC.ru[j]->eth_params.my_addr = strdup(ipv4);
|
||||||
@@ -680,6 +679,7 @@ void RCconfig_L1() {
|
|||||||
for (i=0;i<RC.nb_L1_CC[j];i++) {
|
for (i=0;i<RC.nb_L1_CC[j];i++) {
|
||||||
if (RC.eNB[j][i] == NULL) {
|
if (RC.eNB[j][i] == NULL) {
|
||||||
RC.eNB[j][i] = (PHY_VARS_eNB *)malloc(sizeof(PHY_VARS_eNB));
|
RC.eNB[j][i] = (PHY_VARS_eNB *)malloc(sizeof(PHY_VARS_eNB));
|
||||||
|
memset((void*)RC.eNB[j][i],0,sizeof(PHY_VARS_eNB));
|
||||||
LOG_I(PHY,"RC.eNB[%d][%d] = %p\n",j,i,RC.eNB[j][i]);
|
LOG_I(PHY,"RC.eNB[%d][%d] = %p\n",j,i,RC.eNB[j][i]);
|
||||||
RC.eNB[j][i]->Mod_id = j;
|
RC.eNB[j][i]->Mod_id = j;
|
||||||
RC.eNB[j][i]->CC_id = i;
|
RC.eNB[j][i]->CC_id = i;
|
||||||
|
|||||||
@@ -195,8 +195,11 @@ uint32_t from_earfcn(int eutra_bandP,uint32_t dl_earfcn) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
int32_t get_uldl_offset(int eutra_band) {
|
int32_t get_uldl_offset(int eutra_bandP) {
|
||||||
return(-eutra_bandtable[eutra_band].dl_min + eutra_bandtable[eutra_band].ul_min);
|
int i;
|
||||||
|
|
||||||
|
for (i=0;i<69 && eutra_bandtable[i].band!=eutra_bandP;i++);
|
||||||
|
return(eutra_bandtable[i].dl_min - eutra_bandtable[i].ul_min);
|
||||||
}
|
}
|
||||||
|
|
||||||
uint32_t bw_table[6] = {6*180,15*180,25*180,50*180,75*180,100*180};
|
uint32_t bw_table[6] = {6*180,15*180,25*180,50*180,75*180,100*180};
|
||||||
@@ -414,6 +417,12 @@ void config_dedicated(int Mod_idP,
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void config_dedicated_scell(int Mod_idP,
|
||||||
|
uint16_t rnti,
|
||||||
|
SCellToAddMod_r10_t *sCellToAddMod_r10) {
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
int rrc_mac_config_req_eNB(module_id_t Mod_idP,
|
int rrc_mac_config_req_eNB(module_id_t Mod_idP,
|
||||||
int CC_idP,
|
int CC_idP,
|
||||||
int physCellId,
|
int physCellId,
|
||||||
@@ -424,6 +433,7 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
|
|||||||
#ifdef Rel14
|
#ifdef Rel14
|
||||||
int pbch_repetition,
|
int pbch_repetition,
|
||||||
#endif
|
#endif
|
||||||
|
rnti_t rntiP,
|
||||||
BCCH_BCH_Message_t *mib,
|
BCCH_BCH_Message_t *mib,
|
||||||
RadioResourceConfigCommonSIB_t *radioResourceConfigCommon,
|
RadioResourceConfigCommonSIB_t *radioResourceConfigCommon,
|
||||||
#ifdef Rel14
|
#ifdef Rel14
|
||||||
@@ -462,6 +472,7 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
|
|||||||
|
|
||||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_IN);
|
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_IN);
|
||||||
|
|
||||||
|
|
||||||
if (mib!=NULL) {
|
if (mib!=NULL) {
|
||||||
if (RC.mac == NULL) l2_init_eNB();
|
if (RC.mac == NULL) l2_init_eNB();
|
||||||
|
|
||||||
@@ -520,6 +531,10 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
|
|||||||
LOG_I(MAC,"[CONFIG]pusch_config_common.sequenceHoppingEnabled = %d\n",radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled);
|
LOG_I(MAC,"[CONFIG]pusch_config_common.sequenceHoppingEnabled = %d\n",radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled);
|
||||||
LOG_I(MAC,"[CONFIG]pusch_config_common.cyclicShift = %ld\n",radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.cyclicShift);
|
LOG_I(MAC,"[CONFIG]pusch_config_common.cyclicShift = %ld\n",radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.cyclicShift);
|
||||||
|
|
||||||
|
AssertFatal(radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx > 0,
|
||||||
|
"radioResourceconfigCommon %d == 0\n",
|
||||||
|
radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx);
|
||||||
|
|
||||||
RC.mac[Mod_idP]->common_channels[CC_idP].radioResourceConfigCommon = radioResourceConfigCommon;
|
RC.mac[Mod_idP]->common_channels[CC_idP].radioResourceConfigCommon = radioResourceConfigCommon;
|
||||||
if (ul_CarrierFreq>0) RC.mac[Mod_idP]->common_channels[CC_idP].ul_CarrierFreq = ul_CarrierFreq;
|
if (ul_CarrierFreq>0) RC.mac[Mod_idP]->common_channels[CC_idP].ul_CarrierFreq = ul_CarrierFreq;
|
||||||
if (ul_Bandwidth) RC.mac[Mod_idP]->common_channels[CC_idP].ul_Bandwidth = *ul_Bandwidth;
|
if (ul_Bandwidth) RC.mac[Mod_idP]->common_channels[CC_idP].ul_Bandwidth = *ul_Bandwidth;
|
||||||
@@ -535,8 +550,11 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
// SRB2_lchan_config->choice.explicitValue.ul_SpecificParameters->logicalChannelGroup
|
// SRB2_lchan_config->choice.explicitValue.ul_SpecificParameters->logicalChannelGroup
|
||||||
if (logicalChannelConfig!= NULL) { // check for eMTC specific things
|
if (logicalChannelConfig!= NULL) { // check for eMTC specific things
|
||||||
|
UE_id = find_UE_id(Mod_idP, rntiP);
|
||||||
|
|
||||||
if (UE_id == -1) {
|
if (UE_id == -1) {
|
||||||
LOG_E(MAC,"%s:%d:%s: ERROR, UE_id == -1\n", __FILE__, __LINE__, __FUNCTION__);
|
LOG_E(MAC,"%s:%d:%s: ERROR, UE_id == -1\n", __FILE__, __LINE__, __FUNCTION__);
|
||||||
} else {
|
} else {
|
||||||
@@ -549,6 +567,8 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
|
|||||||
|
|
||||||
|
|
||||||
if (physicalConfigDedicated != NULL) {
|
if (physicalConfigDedicated != NULL) {
|
||||||
|
UE_id = find_UE_id(Mod_idP, rntiP);
|
||||||
|
|
||||||
if (UE_id == -1)
|
if (UE_id == -1)
|
||||||
LOG_E(MAC,"%s:%d:%s: ERROR, UE_id == -1\n", __FILE__, __LINE__, __FUNCTION__);
|
LOG_E(MAC,"%s:%d:%s: ERROR, UE_id == -1\n", __FILE__, __LINE__, __FUNCTION__);
|
||||||
else
|
else
|
||||||
@@ -561,11 +581,11 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
|
|||||||
#if defined(Rel10) || defined(Rel14)
|
#if defined(Rel10) || defined(Rel14)
|
||||||
|
|
||||||
if (sCellToAddMod_r10 != NULL) {
|
if (sCellToAddMod_r10 != NULL) {
|
||||||
|
UE_id = find_UE_id(Mod_idP, rntiP);
|
||||||
if (UE_id == -1)
|
if (UE_id == -1)
|
||||||
LOG_E(MAC,"%s:%d:%s: ERROR, UE_id == -1\n", __FILE__, __LINE__, __FUNCTION__);
|
LOG_E(MAC,"%s:%d:%s: ERROR, UE_id == -1\n", __FILE__, __LINE__, __FUNCTION__);
|
||||||
else
|
else
|
||||||
config_dedicated_scell(Mod_idP,UE_RNTI(Mod_idP,UE_id),sCellToAddMod_r10,1);
|
config_dedicated_scell(Mod_idP,rntiP,sCellToAddMod_r10);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -776,12 +776,13 @@ typedef struct {
|
|||||||
// resource scheduling information
|
// resource scheduling information
|
||||||
uint8_t harq_pid[MAX_NUM_CCs];
|
uint8_t harq_pid[MAX_NUM_CCs];
|
||||||
uint8_t round[MAX_NUM_CCs];
|
uint8_t round[MAX_NUM_CCs];
|
||||||
uint8_t round_UL[MAX_NUM_CCs];
|
uint8_t round_UL[8][MAX_NUM_CCs];
|
||||||
uint8_t dl_pow_off[MAX_NUM_CCs];
|
uint8_t dl_pow_off[MAX_NUM_CCs];
|
||||||
uint16_t pre_nb_available_rbs[MAX_NUM_CCs];
|
uint16_t pre_nb_available_rbs[MAX_NUM_CCs];
|
||||||
unsigned char rballoc_sub_UE[MAX_NUM_CCs][N_RBG_MAX];
|
unsigned char rballoc_sub_UE[MAX_NUM_CCs][N_RBG_MAX];
|
||||||
uint16_t ta_timer;
|
uint16_t ta_timer;
|
||||||
int16_t ta_update;
|
int16_t ta_update;
|
||||||
|
uint8_t ul_cqi;
|
||||||
int32_t context_active_timer;
|
int32_t context_active_timer;
|
||||||
int32_t cqi_req_timer;
|
int32_t cqi_req_timer;
|
||||||
int32_t ul_inactivity_timer;
|
int32_t ul_inactivity_timer;
|
||||||
@@ -817,6 +818,8 @@ typedef struct {
|
|||||||
uint8_t preamble_subframe;
|
uint8_t preamble_subframe;
|
||||||
/// Subframe where Msg3 is to be sent
|
/// Subframe where Msg3 is to be sent
|
||||||
uint8_t Msg3_subframe;
|
uint8_t Msg3_subframe;
|
||||||
|
/// Subframe where Msg3 is to be sent
|
||||||
|
uint8_t Msg3_frame;
|
||||||
/// Flag to indicate the eNB should generate Msg4 upon reception of SDU from RRC. This is triggered by first ULSCH reception at eNB for new user.
|
/// Flag to indicate the eNB should generate Msg4 upon reception of SDU from RRC. This is triggered by first ULSCH reception at eNB for new user.
|
||||||
uint8_t generate_Msg4;
|
uint8_t generate_Msg4;
|
||||||
/// Flag to indicate that eNB is waiting for ACK that UE has received Msg3.
|
/// Flag to indicate that eNB is waiting for ACK that UE has received Msg3.
|
||||||
@@ -833,6 +836,8 @@ typedef struct {
|
|||||||
int16_t timing_offset;
|
int16_t timing_offset;
|
||||||
/// Timeout for RRC connection
|
/// Timeout for RRC connection
|
||||||
int16_t RRC_timer;
|
int16_t RRC_timer;
|
||||||
|
/// Round of Msg3 HARQ
|
||||||
|
uint8_t msg3_round;
|
||||||
} RA_TEMPLATE;
|
} RA_TEMPLATE;
|
||||||
|
|
||||||
|
|
||||||
@@ -957,20 +962,22 @@ typedef struct eNB_MAC_INST_s {
|
|||||||
/// Preallocated DL pdu list
|
/// Preallocated DL pdu list
|
||||||
nfapi_dl_config_request_pdu_t dl_config_pdu_list[MAX_NUM_CCs][MAX_NUM_DL_PDU];
|
nfapi_dl_config_request_pdu_t dl_config_pdu_list[MAX_NUM_CCs][MAX_NUM_DL_PDU];
|
||||||
/// NFAPI DL Config Request Structure
|
/// NFAPI DL Config Request Structure
|
||||||
nfapi_dl_config_request_body_t DL_req[MAX_NUM_CCs];
|
nfapi_dl_config_request_t DL_req[MAX_NUM_CCs];
|
||||||
/// Preallocated UL pdu list
|
/// Preallocated UL pdu list
|
||||||
nfapi_ul_config_request_pdu_t ul_config_pdu_list[MAX_NUM_CCs][MAX_NUM_UL_PDU];
|
nfapi_ul_config_request_pdu_t ul_config_pdu_list[MAX_NUM_CCs][MAX_NUM_UL_PDU];
|
||||||
|
nfapi_ul_config_request_pdu_t ul_config_pdu_list_msg3[MAX_NUM_CCs];
|
||||||
/// NFAPI UL Config Request Structure
|
/// NFAPI UL Config Request Structure
|
||||||
nfapi_ul_config_request_body_t UL_req[MAX_NUM_CCs];
|
nfapi_ul_config_request_t UL_req[MAX_NUM_CCs];
|
||||||
/// Preallocated HI_DCI0 pdu list
|
/// Preallocated HI_DCI0 pdu list
|
||||||
nfapi_hi_dci0_request_pdu_t hi_dci0_pdu_list[MAX_NUM_CCs][MAX_NUM_HI_DCI0_PDU];
|
nfapi_hi_dci0_request_pdu_t hi_dci0_pdu_list[MAX_NUM_CCs][MAX_NUM_HI_DCI0_PDU];
|
||||||
/// NFAPI HI/DCI0 Config Request Structure
|
/// NFAPI HI/DCI0 Config Request Structure
|
||||||
nfapi_hi_dci0_request_body_t HI_DCI0_req[MAX_NUM_CCs];
|
nfapi_hi_dci0_request_t HI_DCI0_req[MAX_NUM_CCs];
|
||||||
/// Prealocated TX pdu list
|
/// Prealocated TX pdu list
|
||||||
nfapi_tx_request_pdu_t tx_request_pdu[MAX_NUM_CCs][MAX_NUM_TX_REQUEST_PDU];
|
nfapi_tx_request_pdu_t tx_request_pdu[MAX_NUM_CCs][MAX_NUM_TX_REQUEST_PDU];
|
||||||
/// NFAPI DL PDU structure
|
/// NFAPI DL PDU structure
|
||||||
nfapi_tx_request_body_t TX_req[MAX_NUM_CCs];
|
nfapi_tx_request_t TX_req[MAX_NUM_CCs];
|
||||||
|
/// UL handle
|
||||||
|
uint32_t ul_handle;
|
||||||
UE_list_t UE_list;
|
UE_list_t UE_list;
|
||||||
|
|
||||||
///subband bitmap configuration
|
///subband bitmap configuration
|
||||||
|
|||||||
@@ -74,7 +74,7 @@ void check_ul_failure(module_id_t module_idP,int CC_id,int UE_id,
|
|||||||
frame_t frameP, sub_frame_t subframeP) {
|
frame_t frameP, sub_frame_t subframeP) {
|
||||||
|
|
||||||
UE_list_t *UE_list = &RC.mac[module_idP]->UE_list;
|
UE_list_t *UE_list = &RC.mac[module_idP]->UE_list;
|
||||||
nfapi_dl_config_request_body_t *DL_req = &RC.mac[module_idP]->DL_req[0];
|
nfapi_dl_config_request_t *DL_req = &RC.mac[module_idP]->DL_req[0];
|
||||||
uint16_t rnti = UE_RNTI(module_idP,UE_id);
|
uint16_t rnti = UE_RNTI(module_idP,UE_id);
|
||||||
eNB_UE_STATS *eNB_UE_stats = &RC.mac[module_idP]->UE_list.eNB_UE_stats[CC_id][UE_id];
|
eNB_UE_STATS *eNB_UE_stats = &RC.mac[module_idP]->UE_list.eNB_UE_stats[CC_id][UE_id];
|
||||||
COMMON_channels_t *cc = RC.mac[module_idP]->common_channels;
|
COMMON_channels_t *cc = RC.mac[module_idP]->common_channels;
|
||||||
@@ -88,10 +88,10 @@ void check_ul_failure(module_id_t module_idP,int CC_id,int UE_id,
|
|||||||
|
|
||||||
// add a format 1A dci for this UE to request an RA procedure (only one UE per subframe)
|
// add a format 1A dci for this UE to request an RA procedure (only one UE per subframe)
|
||||||
LOG_D(MAC,"UE %d rnti %x: sending PDCCH order for RAPROC (failure timer %d) \n",UE_id,rnti,UE_list->UE_sched_ctrl[UE_id].ul_failure_timer);
|
LOG_D(MAC,"UE %d rnti %x: sending PDCCH order for RAPROC (failure timer %d) \n",UE_id,rnti,UE_list->UE_sched_ctrl[UE_id].ul_failure_timer);
|
||||||
nfapi_dl_config_request_pdu_t* dl_config_pdu = &DL_req[CC_id].dl_config_pdu_list[DL_req[CC_id].number_pdu];
|
nfapi_dl_config_request_pdu_t* dl_config_pdu = &DL_req[CC_id].dl_config_request_body.dl_config_pdu_list[DL_req[CC_id].dl_config_request_body.number_pdu];
|
||||||
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
||||||
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
|
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
|
||||||
dl_config_pdu->pdu_size = 2+sizeof(nfapi_dl_config_dci_dl_pdu);
|
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dci_dl_pdu));
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1A;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1A;
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = get_aggregation(get_bw_index(module_idP,CC_id),eNB_UE_stats->dl_cqi,format1A);
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = get_aggregation(get_bw_index(module_idP,CC_id),eNB_UE_stats->dl_cqi,format1A);
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = rnti;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = rnti;
|
||||||
@@ -101,8 +101,8 @@ void check_ul_failure(module_id_t module_idP,int CC_id,int UE_id,
|
|||||||
AssertFatal((cc[CC_id].mib->message.dl_Bandwidth >=0) && (cc[CC_id].mib->message.dl_Bandwidth<6),
|
AssertFatal((cc[CC_id].mib->message.dl_Bandwidth >=0) && (cc[CC_id].mib->message.dl_Bandwidth<6),
|
||||||
"illegal dl_Bandwidth %d\n",(int)cc[CC_id].mib->message.dl_Bandwidth);
|
"illegal dl_Bandwidth %d\n",(int)cc[CC_id].mib->message.dl_Bandwidth);
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = pdcch_order_table[cc[CC_id].mib->message.dl_Bandwidth];
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = pdcch_order_table[cc[CC_id].mib->message.dl_Bandwidth];
|
||||||
DL_req[CC_id].number_dci++;
|
DL_req[CC_id].dl_config_request_body.number_dci++;
|
||||||
DL_req[CC_id].number_pdu++;
|
DL_req[CC_id].dl_config_request_body.number_pdu++;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
add_ue_spec_dci(&DL_req[CC_id],
|
add_ue_spec_dci(&DL_req[CC_id],
|
||||||
@@ -146,18 +146,18 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
UE_list_t *UE_list=&RC.mac[module_idP]->UE_list;
|
UE_list_t *UE_list=&RC.mac[module_idP]->UE_list;
|
||||||
rnti_t rnti;
|
rnti_t rnti;
|
||||||
|
|
||||||
COMMON_channels_t *cc = RC.mac[module_idP]->common_channels;
|
COMMON_channels_t *cc = RC.mac[module_idP]->common_channels;
|
||||||
nfapi_dl_config_request_body_t *DL_req = &RC.mac[module_idP]->DL_req[0];
|
nfapi_dl_config_request_t *DL_req = &RC.mac[module_idP]->DL_req[0];
|
||||||
nfapi_ul_config_request_body_t *UL_req = &RC.mac[module_idP]->UL_req[0];
|
nfapi_ul_config_request_t *UL_req = &RC.mac[module_idP]->UL_req[0];
|
||||||
nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[0];
|
nfapi_hi_dci0_request_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[0];
|
||||||
nfapi_tx_request_body_t *TX_req = &RC.mac[module_idP]->TX_req[0];
|
nfapi_tx_request_t *TX_req = &RC.mac[module_idP]->TX_req[0];
|
||||||
eNB_UE_STATS *eNB_UE_stats;
|
eNB_UE_STATS *eNB_UE_stats;
|
||||||
#if defined(FLEXRAN_AGENT_SB_IF)
|
#if defined(FLEXRAN_AGENT_SB_IF)
|
||||||
Protocol__FlexranMessage *msg;
|
Protocol__FlexranMessage *msg;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
LOG_I(MAC,"[eNB %d] Frame %d, Subframe %d, entering MAC scheduler (UE_list->head %d)\n",module_idP, frameP, subframeP,UE_list->head);
|
// LOG_I(MAC,"[eNB %d] Frame %d, Subframe %d, entering MAC scheduler (UE_list->head %d)\n",module_idP, frameP, subframeP,UE_list->head);
|
||||||
|
|
||||||
start_meas(&RC.mac[module_idP]->eNB_scheduler);
|
start_meas(&RC.mac[module_idP]->eNB_scheduler);
|
||||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
|
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
|
||||||
@@ -169,22 +169,20 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
|
|
||||||
// clear DL/UL info for new scheduling round
|
// clear DL/UL info for new scheduling round
|
||||||
|
|
||||||
RC.mac[module_idP]->pdu_index[CC_id] = 0;
|
RC.mac[module_idP]->pdu_index[CC_id] = 0;
|
||||||
DL_req[CC_id].number_pdcch_ofdm_symbols = 1;
|
DL_req[CC_id].dl_config_request_body.number_pdcch_ofdm_symbols = 1;
|
||||||
DL_req[CC_id].number_dci = 0;
|
DL_req[CC_id].dl_config_request_body.number_dci = 0;
|
||||||
DL_req[CC_id].number_pdu = 0;
|
DL_req[CC_id].dl_config_request_body.number_pdu = 0;
|
||||||
DL_req[CC_id].number_pdsch_rnti = 0;
|
DL_req[CC_id].dl_config_request_body.number_pdsch_rnti = 0;
|
||||||
DL_req[CC_id].transmission_power_pcfich = 6000;
|
DL_req[CC_id].dl_config_request_body.transmission_power_pcfich = 6000;
|
||||||
|
|
||||||
HI_DCI0_req[CC_id].sfnsf = subframeP + (frameP<<3);
|
HI_DCI0_req[CC_id].hi_dci0_request_body.sfnsf = subframeP + (frameP<<3);
|
||||||
HI_DCI0_req[CC_id].number_of_dci = 0;
|
HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci = 0;
|
||||||
HI_DCI0_req[CC_id].number_of_hi = 0;
|
|
||||||
|
|
||||||
UL_req[CC_id].number_of_pdus = 0;
|
UL_req[CC_id].ul_config_request_body.number_of_pdus = 0;
|
||||||
UL_req[CC_id].rach_prach_frequency_resources = 0; // ignored, handled by PHY for now
|
UL_req[CC_id].ul_config_request_body.rach_prach_frequency_resources = 0; // ignored, handled by PHY for now
|
||||||
UL_req[CC_id].srs_present = 0; // ignored, handled by PHY for now
|
UL_req[CC_id].ul_config_request_body.srs_present = 0; // ignored, handled by PHY for now
|
||||||
|
TX_req[CC_id].tx_request_body.number_of_pdus = 0;
|
||||||
TX_req[CC_id].number_of_pdus = 0;
|
|
||||||
#if defined(Rel10) || defined(Rel14)
|
#if defined(Rel10) || defined(Rel14)
|
||||||
cc[CC_id].mcch_active =0;
|
cc[CC_id].mcch_active =0;
|
||||||
#endif
|
#endif
|
||||||
@@ -315,7 +313,10 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
}
|
}
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
LOG_I(MAC,"[eNB %d][before switch] Frame %d, Subframe %d CC_id %d RA 0 is active, Msg3 in (%d,%d), (%d,%d,%d,%d) UL_pdus %d\n",
|
||||||
|
module_idP,frameP,subframeP,CC_id,cc[0].RA_template[0].Msg3_frame,cc[0].RA_template[0].Msg3_subframe,
|
||||||
|
cc[0].RA_template[0].RA_active,cc[0].RA_template[1].RA_active,cc[0].RA_template[2].RA_active,cc[0].RA_template[3].RA_active,
|
||||||
|
RC.mac[module_idP]->UL_req[0].ul_config_request_body.number_of_pdus);
|
||||||
switch (subframeP) {
|
switch (subframeP) {
|
||||||
case 0:
|
case 0:
|
||||||
|
|
||||||
@@ -328,8 +329,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
LOG_I(MAC,"Scheduling MIB\n");
|
LOG_I(MAC,"Scheduling MIB\n");
|
||||||
if ((frameP&3) == 0) schedule_mib(module_idP,frameP,subframeP);
|
if ((frameP&3) == 0) schedule_mib(module_idP,frameP,subframeP);
|
||||||
LOG_I(MAC,"NFAPI: number_of_pdus %d, number_of_TX_req %d\n",
|
LOG_I(MAC,"NFAPI: number_of_pdus %d, number_of_TX_req %d\n",
|
||||||
DL_req[0].number_pdu,
|
DL_req[0].dl_config_request_body.number_pdu,
|
||||||
TX_req[0].number_of_pdus);
|
TX_req[0].tx_request_body.number_of_pdus);
|
||||||
if (cc[0].tdd_Config == NULL) { //FDD
|
if (cc[0].tdd_Config == NULL) { //FDD
|
||||||
schedule_ulsch(module_idP,frameP,cooperation_flag,0,4);//,calibration_flag);
|
schedule_ulsch(module_idP,frameP,cooperation_flag,0,4);//,calibration_flag);
|
||||||
} else if ((cc[0].tdd_Config->subframeAssignment == 0) ||
|
} else if ((cc[0].tdd_Config->subframeAssignment == 0) ||
|
||||||
@@ -1025,12 +1026,21 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
LOG_I(MAC,"FrameP %d, subframeP %d : Scheduling CCEs\n",frameP,subframeP);
|
LOG_I(MAC,"FrameP %d, subframeP %d : Scheduling CCEs/Msg3\n",frameP,subframeP);
|
||||||
|
|
||||||
// Allocate CCEs for good after scheduling is done
|
LOG_I(MAC,"[eNB %d][before] Frame %d, Subframe %d CC_id %d RA 0 is active, Msg3 in (%d,%d) (%d,%d,%d,%d) UL_pdus %d\n",
|
||||||
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++)
|
module_idP,frameP,subframeP,CC_id,cc[0].RA_template[0].Msg3_frame,cc[0].RA_template[0].Msg3_subframe,
|
||||||
|
cc[0].RA_template[0].RA_active,cc[0].RA_template[1].RA_active,cc[0].RA_template[2].RA_active,cc[0].RA_template[3].RA_active,
|
||||||
|
RC.mac[module_idP]->UL_req[0].ul_config_request_body.number_of_pdus);
|
||||||
|
// Allocate CCEs and Msg3 for good after scheduling is done
|
||||||
|
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
|
||||||
allocate_CCEs(module_idP,CC_id,subframeP,0);
|
allocate_CCEs(module_idP,CC_id,subframeP,0);
|
||||||
|
check_and_add_msg3(module_idP,frameP,subframeP);
|
||||||
|
}
|
||||||
|
LOG_I(MAC,"[eNB %d][after] Frame %d, Subframe %d CC_id 0 RA 0 is active, Msg3 in (%d,%d) (%d,%d,%d,%d) UL_pdus %d\n",
|
||||||
|
module_idP,frameP,subframeP,cc[0].RA_template[0].Msg3_frame,cc[0].RA_template[0].Msg3_subframe,
|
||||||
|
cc[0].RA_template[0].RA_active,cc[0].RA_template[1].RA_active,cc[0].RA_template[2].RA_active,cc[0].RA_template[3].RA_active,
|
||||||
|
RC.mac[module_idP]->UL_req[0].ul_config_request_body.number_of_pdus);
|
||||||
#if defined(FLEXRAN_AGENT_SB_IF)
|
#if defined(FLEXRAN_AGENT_SB_IF)
|
||||||
#ifndef DISABLE_CONT_STATS
|
#ifndef DISABLE_CONT_STATS
|
||||||
//Send subframe trigger to the controller
|
//Send subframe trigger to the controller
|
||||||
|
|||||||
@@ -61,7 +61,6 @@
|
|||||||
#include "SIMULATION/TOOLS/defs.h" // for taus
|
#include "SIMULATION/TOOLS/defs.h" // for taus
|
||||||
|
|
||||||
#include "T.h"
|
#include "T.h"
|
||||||
|
|
||||||
// eMTC notes
|
// eMTC notes
|
||||||
// Implements MSG2 and MSG4
|
// Implements MSG2 and MSG4
|
||||||
// fill_rar for eMTC
|
// fill_rar for eMTC
|
||||||
@@ -69,6 +68,87 @@
|
|||||||
// resource allocation for format 1A (4->6 PRBs)
|
// resource allocation for format 1A (4->6 PRBs)
|
||||||
// initiate_ra_proc: add detection of BR/CE UEs
|
// initiate_ra_proc: add detection of BR/CE UEs
|
||||||
|
|
||||||
|
void check_and_add_msg3(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP) {
|
||||||
|
|
||||||
|
eNB_MAC_INST *eNB = RC.mac[module_idP];
|
||||||
|
RA_TEMPLATE *RA_template;
|
||||||
|
COMMON_channels_t *cc = eNB->common_channels;
|
||||||
|
uint8_t i;
|
||||||
|
int msg3_prog_subframe,msg3_prog_frame;
|
||||||
|
int CC_id;
|
||||||
|
nfapi_ul_config_request_pdu_t *ul_config_pdu;
|
||||||
|
nfapi_ul_config_request_body_t *ul_req;
|
||||||
|
nfapi_hi_dci0_request_body_t *hi_dci0_req;
|
||||||
|
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
|
||||||
|
|
||||||
|
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||||
|
hi_dci0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body;
|
||||||
|
ul_req = &eNB->UL_req[CC_id].ul_config_request_body;
|
||||||
|
|
||||||
|
for (i=0; i<NB_RA_PROC_MAX; i++) {
|
||||||
|
|
||||||
|
RA_template = (RA_TEMPLATE *)&cc[CC_id].RA_template[i];
|
||||||
|
|
||||||
|
if (RA_template->RA_active == TRUE) {
|
||||||
|
|
||||||
|
|
||||||
|
msg3_prog_subframe = (RA_template->Msg3_subframe + 6)%10;
|
||||||
|
|
||||||
|
if (RA_template->Msg3_subframe<4) msg3_prog_frame=(RA_template->Msg3_frame+1023)&1023;
|
||||||
|
else msg3_prog_frame=RA_template->Msg3_frame;
|
||||||
|
LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d CC_id %d RA %d is active, Msg3 in (%d,%d), programmed in (%d,%d)\n",
|
||||||
|
module_idP,frameP,subframeP,CC_id,i,RA_template->Msg3_frame,RA_template->Msg3_subframe,
|
||||||
|
msg3_prog_frame,msg3_prog_subframe);
|
||||||
|
|
||||||
|
if ((msg3_prog_frame==frameP) &&
|
||||||
|
(msg3_prog_subframe==subframeP)) {
|
||||||
|
LOG_I(MAC,"Frame %d, Subframe %d Adding Msg3 UL Config Request for (%d,%d)\n",
|
||||||
|
frameP,subframeP,RA_template->Msg3_frame,RA_template->Msg3_subframe);
|
||||||
|
eNB->UL_req[CC_id].sfn_sf = (RA_template->Msg3_frame<<3) + RA_template->Msg3_subframe;
|
||||||
|
if (RA_template->msg3_round == 0) { // program ULSCH
|
||||||
|
ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus];
|
||||||
|
|
||||||
|
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t));
|
||||||
|
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE;
|
||||||
|
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_pdu));
|
||||||
|
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle = eNB->ul_handle++;
|
||||||
|
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti = RA_template->rnti;
|
||||||
|
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start = 1;
|
||||||
|
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks = 1;
|
||||||
|
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2;
|
||||||
|
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = 0;
|
||||||
|
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag = 0;
|
||||||
|
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits = 0;
|
||||||
|
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication = 0;
|
||||||
|
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version = 0;
|
||||||
|
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number = 0;
|
||||||
|
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode = 0;
|
||||||
|
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb = 0;
|
||||||
|
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs = 1;
|
||||||
|
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size = get_TBS_UL(10,ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks);
|
||||||
|
ul_req->number_of_pdus++;
|
||||||
|
}
|
||||||
|
else { // program HI
|
||||||
|
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[hi_dci0_req->number_of_dci+hi_dci0_req->number_of_hi];
|
||||||
|
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
|
||||||
|
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_HI_PDU_TYPE;
|
||||||
|
hi_dci0_pdu->pdu_size = 2+sizeof(nfapi_hi_dci0_hi_pdu);
|
||||||
|
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.resource_block_start = 1; // note this is hard-coded like in fill_rar
|
||||||
|
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = 0;
|
||||||
|
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0;
|
||||||
|
hi_dci0_req->number_of_hi++;
|
||||||
|
|
||||||
|
LOG_I(MAC,"[eNB %d][PUSCH-RA %x] CC_id %d Frame %d subframeP %d Scheduled (PHICH) RA %d (mcs %d, first rb %d, nb_rb %d,round %d)\n",
|
||||||
|
module_idP,RA_template[i].rnti,CC_id,frameP,subframeP,i,10,
|
||||||
|
1,1,
|
||||||
|
RA_template[i].msg3_round-1);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,unsigned char Msg3_subframe)
|
void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,unsigned char Msg3_subframe)
|
||||||
{
|
{
|
||||||
|
|
||||||
@@ -92,15 +172,15 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
|||||||
nfapi_tx_request_pdu_t *TX_req;
|
nfapi_tx_request_pdu_t *TX_req;
|
||||||
UE_list_t *UE_list=&eNB->UE_list;
|
UE_list_t *UE_list=&eNB->UE_list;
|
||||||
int round;
|
int round;
|
||||||
|
nfapi_dl_config_request_body_t *dl_req;
|
||||||
|
|
||||||
start_meas(&eNB->schedule_ra);
|
start_meas(&eNB->schedule_ra);
|
||||||
|
|
||||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||||
|
|
||||||
|
|
||||||
vrb_map = cc[CC_id].vrb_map;
|
vrb_map = cc[CC_id].vrb_map;
|
||||||
|
|
||||||
dl_config_pdu = &eNB->DL_req[CC_id].dl_config_pdu_list[eNB->DL_req[CC_id].number_pdu];
|
dl_req = &eNB->DL_req[CC_id].dl_config_request_body;
|
||||||
|
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
|
||||||
N_RB_DL = to_prb(cc[CC_id].mib->message.dl_Bandwidth);
|
N_RB_DL = to_prb(cc[CC_id].mib->message.dl_Bandwidth);
|
||||||
|
|
||||||
for (i=0; i<NB_RA_PROC_MAX; i++) {
|
for (i=0; i<NB_RA_PROC_MAX; i++) {
|
||||||
@@ -128,7 +208,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
|||||||
|
|
||||||
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
||||||
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
|
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
|
||||||
dl_config_pdu->pdu_size = 2+sizeof(nfapi_dl_config_dci_dl_pdu);
|
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dci_dl_pdu));
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1A;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1A;
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = 4;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = 4;
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = RA_template->RA_rnti;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = RA_template->RA_rnti;
|
||||||
@@ -142,25 +222,56 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
|||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.redundancy_version_1 = 0;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.redundancy_version_1 = 0;
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.virtual_resource_block_assignment_flag = 0;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.virtual_resource_block_assignment_flag = 0;
|
||||||
|
|
||||||
if (!CCE_allocation_infeasible(module_idP,CC_id,1,subframeP,2,RA_template->RA_rnti)) {
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,4);
|
||||||
|
|
||||||
|
if (!CCE_allocation_infeasible(module_idP,CC_id,1,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,RA_template->RA_rnti)) {
|
||||||
LOG_D(MAC,"Frame %d: Subframe %d : Adding common DCI for RA_RNTI %x\n",
|
LOG_D(MAC,"Frame %d: Subframe %d : Adding common DCI for RA_RNTI %x\n",
|
||||||
frameP,subframeP,RA_template->RA_rnti);
|
frameP,subframeP,RA_template->RA_rnti);
|
||||||
eNB->DL_req[CC_id].number_dci++;
|
dl_req->number_dci++;
|
||||||
eNB->DL_req[CC_id].number_pdu++;
|
dl_req->number_pdu++;
|
||||||
|
|
||||||
|
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
|
||||||
|
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
||||||
|
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE;
|
||||||
|
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dlsch_pdu));
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = eNB->pdu_index[CC_id];
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = RA_template->RA_rnti;
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2; // format 1A/1B/1D
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,4);
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = 2; //QPSK
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.redundancy_version = 0;
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = 1;// first block
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_block_to_codeword_swap_flag = 0;
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_scheme = (cc->p_eNB==1 ) ? 0 : 1;
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_layers = 1;
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_subbands = 1;
|
||||||
|
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.codebook_index = ;
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ue_category_capacity = 1;
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pa = 4; // 0 dB
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.delta_power_offset_index = 0;
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ngap = 0;
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.nprb = get_subbandsize(cc->mib->message.dl_Bandwidth); // ignored
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_mode = (cc->p_eNB==1 ) ? 1 : 2;
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_prb_per_subband = 1;
|
||||||
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_vector = 1;
|
||||||
|
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.bf_vector = ;
|
||||||
|
dl_req->number_pdu++;
|
||||||
|
|
||||||
|
// Program UL processing for Msg3
|
||||||
|
get_Msg3alloc(&cc[CC_id],subframeP,frameP,&RA_template->Msg3_frame,&RA_template->Msg3_subframe);
|
||||||
|
|
||||||
/* this will be updated when PHY calls set_msg3_subframe */
|
|
||||||
RA_template->Msg3_subframe = -1;
|
|
||||||
|
|
||||||
fill_rar(module_idP,CC_id,frameP,cc[CC_id].RAR_pdu.payload,N_RB_DL,7);
|
fill_rar(module_idP,CC_id,frameP,cc[CC_id].RAR_pdu.payload,N_RB_DL,7);
|
||||||
// DL request
|
// DL request
|
||||||
|
eNB->TX_req[CC_id].sfn_sf = (frameP<<3)+subframeP;
|
||||||
TX_req = &eNB->TX_req[CC_id].tx_pdu_list[eNB->TX_req[CC_id].number_of_pdus];
|
TX_req = &eNB->TX_req[CC_id].tx_request_body.tx_pdu_list[eNB->TX_req[CC_id].tx_request_body.number_of_pdus];
|
||||||
TX_req->pdu_length = 7; // This should be changed if we have more than 1 preamble
|
TX_req->pdu_length = 7; // This should be changed if we have more than 1 preamble
|
||||||
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
|
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
|
||||||
TX_req->num_segments = 1;
|
TX_req->num_segments = 1;
|
||||||
TX_req->segments[0].segment_length = 7;
|
TX_req->segments[0].segment_length = 7;
|
||||||
TX_req->segments[0].segment_data = cc[CC_id].RAR_pdu.payload;
|
TX_req->segments[0].segment_data = cc[CC_id].RAR_pdu.payload;
|
||||||
eNB->TX_req[CC_id].number_of_pdus++;
|
eNB->TX_req[CC_id].tx_request_body.number_of_pdus++;
|
||||||
}
|
}
|
||||||
} else if (RA_template->generate_Msg4 == 1) {
|
} else if (RA_template->generate_Msg4 == 1) {
|
||||||
|
|
||||||
@@ -168,25 +279,24 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
|||||||
UE_id = find_UE_id(module_idP,RA_template->rnti);
|
UE_id = find_UE_id(module_idP,RA_template->rnti);
|
||||||
AssertFatal(UE_id>=0,"Can't find UE for t-crnti\n");
|
AssertFatal(UE_id>=0,"Can't find UE for t-crnti\n");
|
||||||
|
|
||||||
if (Is_rrc_registered == 1) {
|
|
||||||
|
|
||||||
// Get RRCConnectionSetup for Piggyback
|
// Get RRCConnectionSetup for Piggyback
|
||||||
rrc_sdu_length = mac_rrc_data_req(module_idP,
|
rrc_sdu_length = mac_rrc_data_req(module_idP,
|
||||||
CC_id,
|
CC_id,
|
||||||
frameP,
|
frameP,
|
||||||
CCCH,
|
CCCH,
|
||||||
1, // 1 transport block
|
1, // 1 transport block
|
||||||
&cc[CC_id].CCCH_pdu.payload[0],
|
&cc[CC_id].CCCH_pdu.payload[0],
|
||||||
ENB_FLAG_YES,
|
ENB_FLAG_YES,
|
||||||
module_idP,
|
module_idP,
|
||||||
0); // not used in this case
|
0); // not used in this case
|
||||||
|
|
||||||
AssertFatal(rrc_sdu_length>=0,
|
AssertFatal(rrc_sdu_length>=0,
|
||||||
"[MAC][eNB Scheduler] CCCH not allocated\n");
|
"[MAC][eNB Scheduler] CCCH not allocated\n");
|
||||||
}
|
|
||||||
|
|
||||||
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: UE_id %d, Is_rrc_registered %d, rrc_sdu_length %d\n",
|
|
||||||
module_idP, CC_id, frameP, subframeP,UE_id, Is_rrc_registered,rrc_sdu_length);
|
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: UE_id %d, rrc_sdu_length %d\n",
|
||||||
|
module_idP, CC_id, frameP, subframeP,UE_id, rrc_sdu_length);
|
||||||
|
|
||||||
if (rrc_sdu_length>0) {
|
if (rrc_sdu_length>0) {
|
||||||
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Generating Msg4 with RRC Piggyback (RA proc %d, RNTI %x)\n",
|
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Generating Msg4 with RRC Piggyback (RA proc %d, RNTI %x)\n",
|
||||||
@@ -202,7 +312,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
|||||||
|
|
||||||
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
||||||
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
|
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
|
||||||
dl_config_pdu->pdu_size = 2+sizeof(nfapi_dl_config_dci_dl_pdu);
|
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dci_dl_pdu));
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1A;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1A;
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = 4;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = 4;
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = RA_template->rnti;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = RA_template->rnti;
|
||||||
@@ -241,9 +351,9 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
|||||||
|
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding= getRIV(N_RB_DL,first_rb,4);
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding= getRIV(N_RB_DL,first_rb,4);
|
||||||
|
|
||||||
if (!CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,2,RA_template->rnti)) {
|
if (!CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,RA_template->rnti)) {
|
||||||
eNB->DL_req[CC_id].number_dci++;
|
dl_req->number_dci++;
|
||||||
eNB->DL_req[CC_id].number_pdu++;
|
dl_req->number_pdu++;
|
||||||
|
|
||||||
RA_template->generate_Msg4=0;
|
RA_template->generate_Msg4=0;
|
||||||
RA_template->wait_ack_Msg4=1;
|
RA_template->wait_ack_Msg4=1;
|
||||||
@@ -280,14 +390,14 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
|||||||
rrc_sdu_length);
|
rrc_sdu_length);
|
||||||
|
|
||||||
// DL request
|
// DL request
|
||||||
|
eNB->TX_req[CC_id].sfn_sf = (frameP<<3)+subframeP;
|
||||||
TX_req = &eNB->TX_req[CC_id].tx_pdu_list[eNB->TX_req[CC_id].number_of_pdus];
|
TX_req = &eNB->TX_req[CC_id].tx_request_body.tx_pdu_list[eNB->TX_req[CC_id].tx_request_body.number_of_pdus];
|
||||||
TX_req->pdu_length = rrc_sdu_length;
|
TX_req->pdu_length = rrc_sdu_length;
|
||||||
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
|
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
|
||||||
TX_req->num_segments = 1;
|
TX_req->num_segments = 1;
|
||||||
TX_req->segments[0].segment_length = rrc_sdu_length;
|
TX_req->segments[0].segment_length = rrc_sdu_length;
|
||||||
TX_req->segments[0].segment_data = eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0];
|
TX_req->segments[0].segment_data = eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0];
|
||||||
eNB->TX_req[CC_id].number_of_pdus++;
|
eNB->TX_req[CC_id].tx_request_body.number_of_pdus++;
|
||||||
|
|
||||||
T(T_ENB_MAC_UE_DL_PDU_WITH_DATA, T_INT(module_idP), T_INT(CC_id), T_INT(RA_template->rnti), T_INT(frameP), T_INT(subframeP),
|
T(T_ENB_MAC_UE_DL_PDU_WITH_DATA, T_INT(module_idP), T_INT(CC_id), T_INT(RA_template->rnti), T_INT(frameP), T_INT(subframeP),
|
||||||
T_INT(0 /*harq_pid always 0?*/), T_BUFFER(&eNB->UE_list.DLSCH_pdu[CC_id][0][UE_id].payload[0], TBsize));
|
T_INT(0 /*harq_pid always 0?*/), T_BUFFER(&eNB->UE_list.DLSCH_pdu[CC_id][0][UE_id].payload[0], TBsize));
|
||||||
@@ -328,7 +438,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
|||||||
|
|
||||||
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
||||||
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
|
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
|
||||||
dl_config_pdu->pdu_size = 2+sizeof(nfapi_dl_config_dci_dl_pdu);
|
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dci_dl_pdu));
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1A;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1A;
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = 4;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = 4;
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = RA_template->rnti;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = RA_template->rnti;
|
||||||
@@ -367,9 +477,9 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
|||||||
|
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding= getRIV(N_RB_DL,first_rb,4);
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding= getRIV(N_RB_DL,first_rb,4);
|
||||||
|
|
||||||
if (!CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,2,RA_template->rnti)) {
|
if (!CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,RA_template->rnti)) {
|
||||||
eNB->DL_req[CC_id].number_dci++;
|
dl_req->number_dci++;
|
||||||
eNB->DL_req[CC_id].number_pdu++;
|
dl_req->number_pdu++;
|
||||||
|
|
||||||
LOG_I(MAC,"msg4 retransmission for rnti %x (round %d) fsf %d/%d\n", RA_template->rnti, round, frameP, subframeP);
|
LOG_I(MAC,"msg4 retransmission for rnti %x (round %d) fsf %d/%d\n", RA_template->rnti, round, frameP, subframeP);
|
||||||
}
|
}
|
||||||
@@ -393,8 +503,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
|||||||
}
|
}
|
||||||
|
|
||||||
// handles the event of MSG1 reception
|
// handles the event of MSG1 reception
|
||||||
void initiate_ra_proc(module_id_t module_idP, int CC_id,frame_t frameP, uint16_t preamble_index,int16_t timing_offset,uint8_t sect_id,sub_frame_t subframeP,
|
void initiate_ra_proc(module_id_t module_idP, int CC_id,frame_t frameP, sub_frame_t subframeP,uint16_t preamble_index,int16_t timing_offset,uint16_t ra_rnti)
|
||||||
uint8_t f_id)
|
|
||||||
{
|
{
|
||||||
|
|
||||||
uint8_t i;
|
uint8_t i;
|
||||||
@@ -409,11 +518,12 @@ void initiate_ra_proc(module_id_t module_idP, int CC_id,frame_t frameP, uint16_t
|
|||||||
if (RA_template[i].RA_active==FALSE &&
|
if (RA_template[i].RA_active==FALSE &&
|
||||||
RA_template[i].wait_ack_Msg4 == 0) {
|
RA_template[i].wait_ack_Msg4 == 0) {
|
||||||
int loop = 0;
|
int loop = 0;
|
||||||
RA_template[i].RA_active=TRUE;
|
RA_template[i].RA_active = TRUE;
|
||||||
RA_template[i].generate_rar=1;
|
RA_template[i].generate_rar = 1;
|
||||||
RA_template[i].generate_Msg4=0;
|
RA_template[i].generate_Msg4 = 0;
|
||||||
RA_template[i].wait_ack_Msg4=0;
|
RA_template[i].wait_ack_Msg4 = 0;
|
||||||
RA_template[i].timing_offset=timing_offset;
|
RA_template[i].timing_offset = timing_offset;
|
||||||
|
RA_template[i].preamble_subframe = subframeP;
|
||||||
/* TODO: find better procedure to allocate RNTI */
|
/* TODO: find better procedure to allocate RNTI */
|
||||||
do {
|
do {
|
||||||
RA_template[i].rnti = taus();
|
RA_template[i].rnti = taus();
|
||||||
@@ -426,7 +536,7 @@ void initiate_ra_proc(module_id_t module_idP, int CC_id,frame_t frameP, uint16_t
|
|||||||
/* 1024 and 60000 arbirarily chosen, not coming from standard */
|
/* 1024 and 60000 arbirarily chosen, not coming from standard */
|
||||||
RA_template[i].rnti >= 1024 && RA_template[i].rnti < 60000));
|
RA_template[i].rnti >= 1024 && RA_template[i].rnti < 60000));
|
||||||
if (loop == 100) { printf("%s:%d:%s: FATAL ERROR! contact the authors\n", __FILE__, __LINE__, __FUNCTION__); abort(); }
|
if (loop == 100) { printf("%s:%d:%s: FATAL ERROR! contact the authors\n", __FILE__, __LINE__, __FUNCTION__); abort(); }
|
||||||
RA_template[i].RA_rnti = 1+subframeP+(10*f_id);
|
RA_template[i].RA_rnti = ra_rnti;
|
||||||
RA_template[i].preamble_index = preamble_index;
|
RA_template[i].preamble_index = preamble_index;
|
||||||
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d Activating RAR generation for process %d, rnti %x, RA_active %d\n",
|
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d Activating RAR generation for process %d, rnti %x, RA_active %d\n",
|
||||||
module_idP,CC_id,frameP,i,RA_template[i].rnti,
|
module_idP,CC_id,frameP,i,RA_template[i].rnti,
|
||||||
@@ -456,6 +566,7 @@ void cancel_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP, rnti_t rn
|
|||||||
RA_template[i].timing_offset=0;
|
RA_template[i].timing_offset=0;
|
||||||
RA_template[i].RRC_timer=20;
|
RA_template[i].RRC_timer=20;
|
||||||
RA_template[i].rnti = 0;
|
RA_template[i].rnti = 0;
|
||||||
|
RA_template[i].msg3_round = 0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -82,7 +82,7 @@ schedule_SI(
|
|||||||
int N_RB_DL;
|
int N_RB_DL;
|
||||||
nfapi_dl_config_request_pdu_t *dl_config_pdu;
|
nfapi_dl_config_request_pdu_t *dl_config_pdu;
|
||||||
nfapi_tx_request_pdu_t *TX_req;
|
nfapi_tx_request_pdu_t *TX_req;
|
||||||
|
nfapi_dl_config_request_body_t *dl_req;
|
||||||
start_meas(&eNB->schedule_si);
|
start_meas(&eNB->schedule_si);
|
||||||
|
|
||||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||||
@@ -90,6 +90,8 @@ schedule_SI(
|
|||||||
cc = &eNB->common_channels[CC_id];
|
cc = &eNB->common_channels[CC_id];
|
||||||
vrb_map = (void*)&cc->vrb_map;
|
vrb_map = (void*)&cc->vrb_map;
|
||||||
N_RB_DL = to_prb(cc->mib->message.dl_Bandwidth);
|
N_RB_DL = to_prb(cc->mib->message.dl_Bandwidth);
|
||||||
|
dl_req = &eNB->DL_req[CC_id].dl_config_request_body;
|
||||||
|
|
||||||
|
|
||||||
bcch_sdu_length = mac_rrc_data_req(module_idP,
|
bcch_sdu_length = mac_rrc_data_req(module_idP,
|
||||||
CC_id,
|
CC_id,
|
||||||
@@ -157,7 +159,9 @@ schedule_SI(
|
|||||||
} else if (bcch_sdu_length <= 49) {
|
} else if (bcch_sdu_length <= 49) {
|
||||||
mcs=8;
|
mcs=8;
|
||||||
}
|
}
|
||||||
dl_config_pdu = &eNB->DL_req[CC_id].dl_config_pdu_list[eNB->DL_req[CC_id].number_pdu];
|
|
||||||
|
|
||||||
|
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
|
||||||
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
||||||
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
|
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
|
||||||
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dci_dl_pdu));
|
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dci_dl_pdu));
|
||||||
@@ -175,12 +179,12 @@ schedule_SI(
|
|||||||
|
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,4);
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,4);
|
||||||
|
|
||||||
if (!CCE_allocation_infeasible(module_idP,CC_id,1,subframeP,2,SI_RNTI)) {
|
if (!CCE_allocation_infeasible(module_idP,CC_id,1,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,SI_RNTI)) {
|
||||||
LOG_I(MAC,"Frame %d: Subframe %d : Adding common DCI for S_RNTI\n",
|
LOG_I(MAC,"Frame %d: Subframe %d : Adding common DCI for S_RNTI\n",
|
||||||
frameP,subframeP);
|
frameP,subframeP);
|
||||||
eNB->DL_req[CC_id].number_dci++;
|
dl_req->number_dci++;
|
||||||
eNB->DL_req[CC_id].number_pdu++;
|
dl_req->number_pdu++;
|
||||||
dl_config_pdu = &eNB->DL_req[CC_id].dl_config_pdu_list[eNB->DL_req[CC_id].number_pdu];
|
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
|
||||||
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
||||||
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE;
|
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE;
|
||||||
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dlsch_pdu));
|
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dlsch_pdu));
|
||||||
@@ -206,16 +210,16 @@ schedule_SI(
|
|||||||
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_prb_per_subband = 1;
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_prb_per_subband = 1;
|
||||||
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_vector = 1;
|
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_vector = 1;
|
||||||
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.bf_vector = ;
|
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.bf_vector = ;
|
||||||
eNB->DL_req[CC_id].number_pdu++;
|
dl_req->number_pdu++;
|
||||||
|
|
||||||
// Program TX Request
|
// Program TX Request
|
||||||
TX_req = &eNB->TX_req[CC_id].tx_pdu_list[eNB->TX_req[CC_id].number_of_pdus];
|
TX_req = &eNB->TX_req[CC_id].tx_request_body.tx_pdu_list[eNB->TX_req[CC_id].tx_request_body.number_of_pdus];
|
||||||
TX_req->pdu_length = bcch_sdu_length;
|
TX_req->pdu_length = bcch_sdu_length;
|
||||||
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
|
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
|
||||||
TX_req->num_segments = 1;
|
TX_req->num_segments = 1;
|
||||||
TX_req->segments[0].segment_length = bcch_sdu_length;
|
TX_req->segments[0].segment_length = bcch_sdu_length;
|
||||||
TX_req->segments[0].segment_data = cc->BCCH_pdu.payload;
|
TX_req->segments[0].segment_data = cc->BCCH_pdu.payload;
|
||||||
eNB->TX_req[CC_id].number_of_pdus++;
|
eNB->TX_req[CC_id].tx_request_body.number_of_pdus++;
|
||||||
|
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
@@ -276,12 +280,14 @@ void schedule_mib(module_id_t module_idP,
|
|||||||
nfapi_tx_request_pdu_t *TX_req;
|
nfapi_tx_request_pdu_t *TX_req;
|
||||||
int mib_sdu_length;
|
int mib_sdu_length;
|
||||||
int CC_id;
|
int CC_id;
|
||||||
|
nfapi_dl_config_request_body_t *dl_req;
|
||||||
|
|
||||||
AssertFatal(subframeP==0,"Subframe must be 0\n");
|
AssertFatal(subframeP==0,"Subframe must be 0\n");
|
||||||
AssertFatal((frameP&3)==0,"Frame must be a multiple of 4\n");
|
AssertFatal((frameP&3)==0,"Frame must be a multiple of 4\n");
|
||||||
|
|
||||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||||
|
|
||||||
|
dl_req = &eNB->DL_req[CC_id].dl_config_request_body;
|
||||||
cc = &eNB->common_channels[CC_id];
|
cc = &eNB->common_channels[CC_id];
|
||||||
|
|
||||||
mib_sdu_length = mac_rrc_data_req(module_idP,
|
mib_sdu_length = mac_rrc_data_req(module_idP,
|
||||||
@@ -299,28 +305,28 @@ void schedule_mib(module_id_t module_idP,
|
|||||||
if (mib_sdu_length > 0) {
|
if (mib_sdu_length > 0) {
|
||||||
|
|
||||||
LOG_I(MAC,"Frame %d, subframe %d: Adding BCH PDU in position %d (length %d)\n",
|
LOG_I(MAC,"Frame %d, subframe %d: Adding BCH PDU in position %d (length %d)\n",
|
||||||
frameP,subframeP,eNB->DL_req[CC_id].number_pdu,mib_sdu_length);
|
frameP,subframeP,dl_req->number_pdu,mib_sdu_length);
|
||||||
|
|
||||||
dl_config_pdu = &eNB->DL_req[CC_id].dl_config_pdu_list[eNB->DL_req[CC_id].number_pdu];
|
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
|
||||||
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
||||||
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_BCH_PDU_TYPE,
|
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_BCH_PDU_TYPE,
|
||||||
dl_config_pdu->pdu_size = 2+sizeof(nfapi_dl_config_bch_pdu);
|
dl_config_pdu->pdu_size = 2+sizeof(nfapi_dl_config_bch_pdu);
|
||||||
dl_config_pdu->bch_pdu.bch_pdu_rel8.length = mib_sdu_length;
|
dl_config_pdu->bch_pdu.bch_pdu_rel8.length = mib_sdu_length;
|
||||||
dl_config_pdu->bch_pdu.bch_pdu_rel8.pdu_index = eNB->pdu_index[CC_id];
|
dl_config_pdu->bch_pdu.bch_pdu_rel8.pdu_index = eNB->pdu_index[CC_id];
|
||||||
dl_config_pdu->bch_pdu.bch_pdu_rel8.transmission_power = 6000;
|
dl_config_pdu->bch_pdu.bch_pdu_rel8.transmission_power = 6000;
|
||||||
eNB->DL_req[CC_id].number_pdu++;
|
dl_req->number_pdu++;
|
||||||
|
|
||||||
LOG_I(MAC,"eNB->DL_req[0].number_pdu %d (%p)\n",
|
LOG_I(MAC,"eNB->DL_req[0].number_pdu %d (%p)\n",
|
||||||
eNB->DL_req[CC_id].number_pdu,&eNB->DL_req[CC_id].number_pdu);
|
dl_req->number_pdu,&dl_req->number_pdu);
|
||||||
// DL request
|
// DL request
|
||||||
|
|
||||||
TX_req = &eNB->TX_req[CC_id].tx_pdu_list[eNB->TX_req[CC_id].number_of_pdus];
|
TX_req = &eNB->TX_req[CC_id].tx_request_body.tx_pdu_list[eNB->TX_req[CC_id].tx_request_body.number_of_pdus];
|
||||||
TX_req->pdu_length = 3;
|
TX_req->pdu_length = 3;
|
||||||
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
|
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
|
||||||
TX_req->num_segments = 1;
|
TX_req->num_segments = 1;
|
||||||
TX_req->segments[0].segment_length = 0;
|
TX_req->segments[0].segment_length = 0;
|
||||||
TX_req->segments[0].segment_data = cc[CC_id].MIB_pdu.payload;
|
TX_req->segments[0].segment_data = cc[CC_id].MIB_pdu.payload;
|
||||||
eNB->TX_req[CC_id].number_of_pdus++;
|
eNB->TX_req[CC_id].tx_request_body.number_of_pdus++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -122,7 +122,7 @@ generate_dlsch_header(
|
|||||||
unsigned short *sdu_lengths,
|
unsigned short *sdu_lengths,
|
||||||
unsigned char *sdu_lcids,
|
unsigned char *sdu_lcids,
|
||||||
unsigned char drx_cmd,
|
unsigned char drx_cmd,
|
||||||
short timing_advance_cmd,
|
unsigned short timing_advance_cmd,
|
||||||
unsigned char *ue_cont_res_id,
|
unsigned char *ue_cont_res_id,
|
||||||
unsigned char short_padding,
|
unsigned char short_padding,
|
||||||
unsigned short post_padding
|
unsigned short post_padding
|
||||||
@@ -183,7 +183,8 @@ generate_dlsch_header(
|
|||||||
last_size=1;
|
last_size=1;
|
||||||
// msg("last_size %d,mac_header_ptr %p\n",last_size,mac_header_ptr);
|
// msg("last_size %d,mac_header_ptr %p\n",last_size,mac_header_ptr);
|
||||||
((TIMING_ADVANCE_CMD *)ce_ptr)->R=0;
|
((TIMING_ADVANCE_CMD *)ce_ptr)->R=0;
|
||||||
((TIMING_ADVANCE_CMD *)ce_ptr)->TA=(timing_advance_cmd+31)&0x3f;
|
AssertFatal(timing_advance_cmd < 64,"timing_advance_cmd %d > 63\n",timing_advance_cmd);
|
||||||
|
((TIMING_ADVANCE_CMD *)ce_ptr)->TA=timing_advance_cmd;//(timing_advance_cmd+31)&0x3f;
|
||||||
LOG_D(MAC,"timing advance =%d (%d)\n",timing_advance_cmd,((TIMING_ADVANCE_CMD *)ce_ptr)->TA);
|
LOG_D(MAC,"timing advance =%d (%d)\n",timing_advance_cmd,((TIMING_ADVANCE_CMD *)ce_ptr)->TA);
|
||||||
ce_ptr+=sizeof(TIMING_ADVANCE_CMD);
|
ce_ptr+=sizeof(TIMING_ADVANCE_CMD);
|
||||||
//msg("offset %d\n",ce_ptr-mac_header_control_elements);
|
//msg("offset %d\n",ce_ptr-mac_header_control_elements);
|
||||||
@@ -452,6 +453,7 @@ schedule_ue_spec(
|
|||||||
int N_RB_DL[MAX_NUM_CCs];
|
int N_RB_DL[MAX_NUM_CCs];
|
||||||
int total_nb_available_rb[MAX_NUM_CCs];
|
int total_nb_available_rb[MAX_NUM_CCs];
|
||||||
int N_RBG[MAX_NUM_CCs];
|
int N_RBG[MAX_NUM_CCs];
|
||||||
|
nfapi_dl_config_request_body_t *dl_req;
|
||||||
nfapi_dl_config_request_pdu_t *dl_config_pdu;
|
nfapi_dl_config_request_pdu_t *dl_config_pdu;
|
||||||
nfapi_tx_request_pdu_t *TX_req;
|
nfapi_tx_request_pdu_t *TX_req;
|
||||||
|
|
||||||
@@ -501,6 +503,8 @@ schedule_ue_spec(
|
|||||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||||
LOG_D(MAC, "doing schedule_ue_spec for CC_id %d\n",CC_id);
|
LOG_D(MAC, "doing schedule_ue_spec for CC_id %d\n",CC_id);
|
||||||
|
|
||||||
|
dl_req = &eNB->DL_req[CC_id].dl_config_request_body;
|
||||||
|
|
||||||
if (mbsfn_flag[CC_id]>0)
|
if (mbsfn_flag[CC_id]>0)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
@@ -655,10 +659,10 @@ schedule_ue_spec(
|
|||||||
case 2:
|
case 2:
|
||||||
case 7:
|
case 7:
|
||||||
default:
|
default:
|
||||||
dl_config_pdu = &eNB->DL_req[CC_id].dl_config_pdu_list[eNB->DL_req[CC_id].number_pdu];
|
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
|
||||||
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
||||||
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
|
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
|
||||||
dl_config_pdu->pdu_size = 2+sizeof(nfapi_dl_config_dci_dl_pdu);
|
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dci_dl_pdu));
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1;
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = get_aggregation(get_bw_index(module_idP,CC_id),eNB_UE_stats->dl_cqi,format1);
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = get_aggregation(get_bw_index(module_idP,CC_id),eNB_UE_stats->dl_cqi,format1);
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = rnti;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = rnti;
|
||||||
@@ -686,8 +690,8 @@ schedule_ue_spec(
|
|||||||
if (!CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,
|
if (!CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,
|
||||||
rnti)) {
|
rnti)) {
|
||||||
eNB->DL_req[CC_id].number_dci++;
|
dl_req->number_dci++;
|
||||||
eNB->DL_req[CC_id].number_pdu++;
|
dl_req->number_pdu++;
|
||||||
|
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
@@ -1115,10 +1119,10 @@ schedule_ue_spec(
|
|||||||
tpc = 1; //0
|
tpc = 1; //0
|
||||||
}
|
}
|
||||||
|
|
||||||
dl_config_pdu = &eNB->DL_req[CC_id].dl_config_pdu_list[eNB->DL_req[CC_id].number_pdu];
|
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
|
||||||
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
|
||||||
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
|
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
|
||||||
dl_config_pdu->pdu_size = 2+sizeof(nfapi_dl_config_dci_dl_pdu);
|
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dci_dl_pdu));
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1;
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = get_aggregation(get_bw_index(module_idP,CC_id),eNB_UE_stats->dl_cqi,format1);
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = get_aggregation(get_bw_index(module_idP,CC_id),eNB_UE_stats->dl_cqi,format1);
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = rnti;
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = rnti;
|
||||||
@@ -1144,8 +1148,8 @@ schedule_ue_spec(
|
|||||||
module_idP,CC_id,harq_pid,round,mcs);
|
module_idP,CC_id,harq_pid,round,mcs);
|
||||||
|
|
||||||
}
|
}
|
||||||
eNB->DL_req[CC_id].number_dci++;
|
dl_req->number_dci++;
|
||||||
eNB->DL_req[CC_id].number_pdu++;
|
dl_req->number_pdu++;
|
||||||
|
|
||||||
// Toggle NDI for next time
|
// Toggle NDI for next time
|
||||||
LOG_D(MAC,"CC_id %d Frame %d, subframeP %d: Toggling Format1 NDI for UE %d (rnti %x/%d) oldNDI %d\n",
|
LOG_D(MAC,"CC_id %d Frame %d, subframeP %d: Toggling Format1 NDI for UE %d (rnti %x/%d) oldNDI %d\n",
|
||||||
@@ -1156,13 +1160,14 @@ schedule_ue_spec(
|
|||||||
UE_list->UE_template[CC_id][UE_id].oldmcs1[harq_pid] = mcs;
|
UE_list->UE_template[CC_id][UE_id].oldmcs1[harq_pid] = mcs;
|
||||||
UE_list->UE_template[CC_id][UE_id].oldmcs2[harq_pid] = 0;
|
UE_list->UE_template[CC_id][UE_id].oldmcs2[harq_pid] = 0;
|
||||||
|
|
||||||
TX_req = &eNB->TX_req[CC_id].tx_pdu_list[eNB->TX_req[CC_id].number_of_pdus];
|
eNB->TX_req[CC_id].sfn_sf = (frameP<<3)+subframeP;
|
||||||
|
TX_req = &eNB->TX_req[CC_id].tx_request_body.tx_pdu_list[eNB->TX_req[CC_id].tx_request_body.number_of_pdus];
|
||||||
TX_req->pdu_length = TBS;
|
TX_req->pdu_length = TBS;
|
||||||
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
|
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
|
||||||
TX_req->num_segments = 1;
|
TX_req->num_segments = 1;
|
||||||
TX_req->segments[0].segment_length = TBS;
|
TX_req->segments[0].segment_length = TBS;
|
||||||
TX_req->segments[0].segment_data = eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[harq_pid];
|
TX_req->segments[0].segment_data = eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[harq_pid];
|
||||||
eNB->TX_req[CC_id].number_of_pdus++;
|
eNB->TX_req[CC_id].tx_request_body.number_of_pdus++;
|
||||||
|
|
||||||
} else { // There is no data from RLC or MAC header, so don't schedule
|
} else { // There is no data from RLC or MAC header, so don't schedule
|
||||||
|
|
||||||
@@ -1245,11 +1250,11 @@ fill_DLSCH_dci(
|
|||||||
rballoc_sub[i] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][i];
|
rballoc_sub[i] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][i];
|
||||||
}
|
}
|
||||||
|
|
||||||
nfapi_dl_config_request_body_t *DL_req = &RC.mac[module_idP]->DL_req[0];
|
nfapi_dl_config_request_t *DL_req = &RC.mac[module_idP]->DL_req[0];
|
||||||
nfapi_dl_config_request_pdu_t* dl_config_pdu;
|
nfapi_dl_config_request_pdu_t* dl_config_pdu;
|
||||||
|
|
||||||
for (i=0;i<DL_req[CC_id].number_pdu;i++) {
|
for (i=0;i<DL_req[CC_id].dl_config_request_body.number_pdu;i++) {
|
||||||
dl_config_pdu = &DL_req[CC_id].dl_config_pdu_list[i];
|
dl_config_pdu = &DL_req[CC_id].dl_config_request_body.dl_config_pdu_list[i];
|
||||||
if ((dl_config_pdu->pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)&&
|
if ((dl_config_pdu->pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)&&
|
||||||
(dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti == rnti)) {
|
(dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti == rnti)) {
|
||||||
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||||
@@ -1308,13 +1313,13 @@ void update_ul_dci(module_id_t module_idP,
|
|||||||
//------------------------------------------------------------------------------
|
//------------------------------------------------------------------------------
|
||||||
{
|
{
|
||||||
|
|
||||||
nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_idP];
|
nfapi_hi_dci0_request_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_idP];
|
||||||
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[0];
|
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &HI_DCI0_req->hi_dci0_request_body.hi_dci0_pdu_list[0];
|
||||||
COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_idP];
|
COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_idP];
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
if (cc->tdd_Config != NULL) { // TDD
|
if (cc->tdd_Config != NULL) { // TDD
|
||||||
for (i=0; i<HI_DCI0_req->number_of_dci + HI_DCI0_req->number_of_dci; i++) {
|
for (i=0; i<HI_DCI0_req->hi_dci0_request_body.number_of_dci + HI_DCI0_req->hi_dci0_request_body.number_of_dci; i++) {
|
||||||
|
|
||||||
if ((hi_dci0_pdu[i].pdu_type == NFAPI_HI_DCI0_DCI_PDU_TYPE) &&
|
if ((hi_dci0_pdu[i].pdu_type == NFAPI_HI_DCI0_DCI_PDU_TYPE) &&
|
||||||
(hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.rnti == rntiP))
|
(hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.rnti == rntiP))
|
||||||
|
|||||||
@@ -97,6 +97,310 @@ uint16_t mac_computeRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs) {
|
|||||||
return(RIV);
|
return(RIV);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void get_Msg3alloc(COMMON_channels_t *cc,
|
||||||
|
unsigned char current_subframe,
|
||||||
|
unsigned int current_frame,
|
||||||
|
unsigned int *frame,
|
||||||
|
unsigned char *subframe)
|
||||||
|
{
|
||||||
|
|
||||||
|
// Fill in other TDD Configuration!!!!
|
||||||
|
|
||||||
|
if (cc->tdd_Config==NULL) { // FDD
|
||||||
|
*subframe = current_subframe+6;
|
||||||
|
|
||||||
|
if (*subframe>9) {
|
||||||
|
*subframe = *subframe-10;
|
||||||
|
*frame = (current_frame+1) & 1023;
|
||||||
|
} else {
|
||||||
|
*frame=current_frame;
|
||||||
|
}
|
||||||
|
} else { // TDD
|
||||||
|
if (cc->tdd_Config->subframeAssignment == 1) {
|
||||||
|
switch (current_subframe) {
|
||||||
|
|
||||||
|
case 0:
|
||||||
|
*subframe = 7;
|
||||||
|
*frame = current_frame;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 4:
|
||||||
|
*subframe = 2;
|
||||||
|
*frame = (current_frame+1) & 1023;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 5:
|
||||||
|
*subframe = 2;
|
||||||
|
*frame = (current_frame+1) & 1023;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 9:
|
||||||
|
*subframe = 7;
|
||||||
|
*frame = (current_frame+1) & 1023;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
} else if (cc->tdd_Config->subframeAssignment == 3) {
|
||||||
|
switch (current_subframe) {
|
||||||
|
|
||||||
|
case 0:
|
||||||
|
case 5:
|
||||||
|
case 6:
|
||||||
|
*subframe = 2;
|
||||||
|
*frame = (current_frame+1) & 1023;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 7:
|
||||||
|
*subframe = 3;
|
||||||
|
*frame = (current_frame+1) & 1023;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 8:
|
||||||
|
*subframe = 4;
|
||||||
|
*frame = (current_frame+1) & 1023;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 9:
|
||||||
|
*subframe = 2;
|
||||||
|
*frame = (current_frame+2) & 1023;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
} else if (cc->tdd_Config->subframeAssignment == 4) {
|
||||||
|
switch (current_subframe) {
|
||||||
|
|
||||||
|
case 0:
|
||||||
|
case 4:
|
||||||
|
case 5:
|
||||||
|
case 6:
|
||||||
|
*subframe = 2;
|
||||||
|
*frame = (current_frame+1) & 1023;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 7:
|
||||||
|
*subframe = 3;
|
||||||
|
*frame = (current_frame+1) & 1023;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 8:
|
||||||
|
case 9:
|
||||||
|
*subframe = 2;
|
||||||
|
*frame = (current_frame+2) & 1023;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
} else if (cc->tdd_Config->subframeAssignment == 5) {
|
||||||
|
switch (current_subframe) {
|
||||||
|
|
||||||
|
case 0:
|
||||||
|
case 4:
|
||||||
|
case 5:
|
||||||
|
case 6:
|
||||||
|
*subframe = 2;
|
||||||
|
*frame = (current_frame+1) & 1023;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 7:
|
||||||
|
case 8:
|
||||||
|
case 9:
|
||||||
|
*subframe = 2;
|
||||||
|
*frame = (current_frame+2) & 1023;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void get_Msg3allocret(COMMON_channels_t *cc,
|
||||||
|
unsigned char current_subframe,
|
||||||
|
unsigned int current_frame,
|
||||||
|
unsigned int *frame,
|
||||||
|
unsigned char *subframe)
|
||||||
|
{
|
||||||
|
if (cc->tdd_Config == NULL) { //FDD
|
||||||
|
/* always retransmit in n+8 */
|
||||||
|
*subframe = current_subframe + 8;
|
||||||
|
|
||||||
|
if (*subframe > 9) {
|
||||||
|
*subframe = *subframe - 10;
|
||||||
|
*frame = (current_frame + 1) & 1023;
|
||||||
|
} else {
|
||||||
|
*frame = current_frame;
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
if (cc->tdd_Config->subframeAssignment == 1) {
|
||||||
|
// original PUSCH in 2, PHICH in 6 (S), ret in 2
|
||||||
|
// original PUSCH in 3, PHICH in 9, ret in 3
|
||||||
|
// original PUSCH in 7, PHICH in 1 (S), ret in 7
|
||||||
|
// original PUSCH in 8, PHICH in 4, ret in 8
|
||||||
|
*frame = (current_frame+1) & 1023;
|
||||||
|
} else if (cc->tdd_Config->subframeAssignment == 3) {
|
||||||
|
// original PUSCH in 2, PHICH in 8, ret in 2 next frame
|
||||||
|
// original PUSCH in 3, PHICH in 9, ret in 3 next frame
|
||||||
|
// original PUSCH in 4, PHICH in 0, ret in 4 next frame
|
||||||
|
*frame=(current_frame+1) & 1023;
|
||||||
|
} else if (cc->tdd_Config->subframeAssignment == 4) {
|
||||||
|
// original PUSCH in 2, PHICH in 8, ret in 2 next frame
|
||||||
|
// original PUSCH in 3, PHICH in 9, ret in 3 next frame
|
||||||
|
*frame=(current_frame+1) & 1023;
|
||||||
|
} else if (cc->tdd_Config->subframeAssignment == 5) {
|
||||||
|
// original PUSCH in 2, PHICH in 8, ret in 2 next frame
|
||||||
|
*frame=(current_frame+1) & 1023;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t subframe2harqpid(COMMON_channels_t *cc,uint32_t frame,uint8_t subframe)
|
||||||
|
{
|
||||||
|
uint8_t ret = 255;
|
||||||
|
|
||||||
|
AssertFatal(cc!=NULL,"cc is null\n");
|
||||||
|
|
||||||
|
if (cc->tdd_Config == NULL) { // FDD
|
||||||
|
ret = (((frame<<1)+subframe)&7);
|
||||||
|
} else {
|
||||||
|
|
||||||
|
switch (cc->tdd_Config->subframeAssignment) {
|
||||||
|
|
||||||
|
case 1:
|
||||||
|
if ((subframe==2) ||
|
||||||
|
(subframe==3) ||
|
||||||
|
(subframe==7) ||
|
||||||
|
(subframe==8))
|
||||||
|
switch (subframe) {
|
||||||
|
case 2:
|
||||||
|
case 3:
|
||||||
|
ret = (subframe-2);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 7:
|
||||||
|
case 8:
|
||||||
|
ret = (subframe-5);
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
AssertFatal(1==0,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,(int)cc->tdd_Config->subframeAssignment);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 2:
|
||||||
|
AssertFatal((subframe==2) || (subframe==7),
|
||||||
|
"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,(int)cc->tdd_Config->subframeAssignment);
|
||||||
|
|
||||||
|
ret = (subframe/7);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 3:
|
||||||
|
AssertFatal((subframe>1) && (subframe<5),
|
||||||
|
"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,(int)cc->tdd_Config->subframeAssignment);
|
||||||
|
ret = (subframe-2);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 4:
|
||||||
|
AssertFatal((subframe>1) && (subframe<4),
|
||||||
|
"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,(int)cc->tdd_Config->subframeAssignment);
|
||||||
|
ret = (subframe-2);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 5:
|
||||||
|
AssertFatal(subframe==2,
|
||||||
|
"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,(int)cc->tdd_Config->subframeAssignment);
|
||||||
|
ret = (subframe-2);
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
AssertFatal(1==0,"subframe2_harq_pid, Unsupported TDD mode %d\n",(int)cc->tdd_Config->subframeAssignment);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t get_Msg3harqpid(COMMON_channels_t *cc,
|
||||||
|
uint32_t frame,
|
||||||
|
unsigned char current_subframe)
|
||||||
|
{
|
||||||
|
|
||||||
|
uint8_t ul_subframe=0;
|
||||||
|
uint32_t ul_frame=0;
|
||||||
|
|
||||||
|
if (cc->tdd_Config == NULL) { // FDD
|
||||||
|
ul_subframe = (current_subframe>3) ? (current_subframe-4) : (current_subframe+6);
|
||||||
|
ul_frame = (current_subframe>3) ? ((frame+1)&1023) : frame;
|
||||||
|
} else {
|
||||||
|
switch (cc->tdd_Config->subframeAssignment) {
|
||||||
|
case 1:
|
||||||
|
switch (current_subframe) {
|
||||||
|
|
||||||
|
case 9:
|
||||||
|
case 0:
|
||||||
|
ul_subframe = 7;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 5:
|
||||||
|
case 7:
|
||||||
|
ul_subframe = 2;
|
||||||
|
break;
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 3:
|
||||||
|
switch (current_subframe) {
|
||||||
|
|
||||||
|
case 0:
|
||||||
|
case 5:
|
||||||
|
case 6:
|
||||||
|
ul_subframe = 2;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 7:
|
||||||
|
ul_subframe = 3;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 8:
|
||||||
|
ul_subframe = 4;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 9:
|
||||||
|
ul_subframe = 2;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 4:
|
||||||
|
switch (current_subframe) {
|
||||||
|
|
||||||
|
case 0:
|
||||||
|
case 5:
|
||||||
|
case 6:
|
||||||
|
case 8:
|
||||||
|
case 9:
|
||||||
|
ul_subframe = 2;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 7:
|
||||||
|
ul_subframe = 3;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 5:
|
||||||
|
ul_subframe =2;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
LOG_E(PHY,"get_Msg3_harq_pid: Unsupported TDD configuration %d\n",(int)cc->tdd_Config->subframeAssignment);
|
||||||
|
AssertFatal(1==0,"get_Msg3_harq_pid: Unsupported TDD configuration");
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return(subframe2harqpid(cc,ul_frame,ul_subframe));
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
//------------------------------------------------------------------------------
|
//------------------------------------------------------------------------------
|
||||||
void init_ue_sched_info(void)
|
void init_ue_sched_info(void)
|
||||||
//------------------------------------------------------------------------------
|
//------------------------------------------------------------------------------
|
||||||
@@ -148,6 +452,24 @@ int find_UE_id(module_id_t mod_idP, rnti_t rntiP)
|
|||||||
return(-1);
|
return(-1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
int find_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP)
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
{
|
||||||
|
int RA_id;
|
||||||
|
AssertFatal(RC.mac[mod_idP],"RC.mac[%d] is null\n",mod_idP);
|
||||||
|
|
||||||
|
RA_TEMPLATE *RA_template = (RA_TEMPLATE *)&RC.mac[mod_idP]->common_channels[CC_idP].RA_template[0];
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
for (RA_id = 0; RA_id < NB_RA_PROC_MAX; RA_id++)
|
||||||
|
if (RA_template[RA_id].RA_active==TRUE &&
|
||||||
|
RA_template[RA_id].wait_ack_Msg4 == 0 &&
|
||||||
|
RA_template[RA_id].rnti == rntiP) return(RA_id);
|
||||||
|
return(-1);
|
||||||
|
}
|
||||||
|
|
||||||
//------------------------------------------------------------------------------
|
//------------------------------------------------------------------------------
|
||||||
int UE_num_active_CC(UE_list_t *listP,int ue_idP)
|
int UE_num_active_CC(UE_list_t *listP,int ue_idP)
|
||||||
//------------------------------------------------------------------------------
|
//------------------------------------------------------------------------------
|
||||||
@@ -274,7 +596,6 @@ int add_new_ue(module_id_t mod_idP, int cc_idP, rnti_t rntiP,int harq_pidP)
|
|||||||
|
|
||||||
for (i = 0; i < NUMBER_OF_UE_MAX; i++) {
|
for (i = 0; i < NUMBER_OF_UE_MAX; i++) {
|
||||||
if (UE_list->active[i] == TRUE) continue;
|
if (UE_list->active[i] == TRUE) continue;
|
||||||
printf("MAC: new UE id %d rnti %x\n", i, rntiP);
|
|
||||||
UE_id = i;
|
UE_id = i;
|
||||||
UE_list->UE_template[cc_idP][UE_id].rnti = rntiP;
|
UE_list->UE_template[cc_idP][UE_id].rnti = rntiP;
|
||||||
UE_list->UE_template[cc_idP][UE_id].configured = FALSE;
|
UE_list->UE_template[cc_idP][UE_id].configured = FALSE;
|
||||||
@@ -286,6 +607,7 @@ printf("MAC: new UE id %d rnti %x\n", i, rntiP);
|
|||||||
UE_list->num_UEs++;
|
UE_list->num_UEs++;
|
||||||
UE_list->active[UE_id] = TRUE;
|
UE_list->active[UE_id] = TRUE;
|
||||||
memset((void*)&UE_list->UE_sched_ctrl[UE_id],0,sizeof(UE_sched_ctrl));
|
memset((void*)&UE_list->UE_sched_ctrl[UE_id],0,sizeof(UE_sched_ctrl));
|
||||||
|
memset((void*)&UE_list->eNB_UE_stats[cc_idP][UE_id],0,sizeof(eNB_UE_STATS));
|
||||||
|
|
||||||
for (j=0; j<8; j++) {
|
for (j=0; j<8; j++) {
|
||||||
UE_list->UE_template[cc_idP][UE_id].oldNDI[j] = (j==0)?1:0; // 1 because first transmission is with format1A (Msg4) for harq_pid 0
|
UE_list->UE_template[cc_idP][UE_id].oldNDI[j] = (j==0)?1:0; // 1 because first transmission is with format1A (Msg4) for harq_pid 0
|
||||||
@@ -299,7 +621,7 @@ printf("MAC: new UE id %d rnti %x\n", i, rntiP);
|
|||||||
return(UE_id);
|
return(UE_id);
|
||||||
}
|
}
|
||||||
|
|
||||||
printf("MAC: cannot add new UE for rnti %x\n", rntiP);
|
printf("MAC: cannot add new UE for rnti %x\n", rntiP);
|
||||||
LOG_E(MAC,"error in add_new_ue(), could not find space in UE_list, Dumping UE list\n");
|
LOG_E(MAC,"error in add_new_ue(), could not find space in UE_list, Dumping UE list\n");
|
||||||
dump_ue_list(UE_list,0);
|
dump_ue_list(UE_list,0);
|
||||||
return(-1);
|
return(-1);
|
||||||
@@ -681,24 +1003,29 @@ uint8_t get_tmode(module_id_t module_idP,int CC_idP,int UE_idP) {
|
|||||||
|
|
||||||
struct PhysicalConfigDedicated *physicalConfigDedicated = eNB->UE_list.physicalConfigDedicated[CC_idP][UE_idP];
|
struct PhysicalConfigDedicated *physicalConfigDedicated = eNB->UE_list.physicalConfigDedicated[CC_idP][UE_idP];
|
||||||
|
|
||||||
AssertFatal(physicalConfigDedicated->antennaInfo!=NULL,
|
if (physicalConfigDedicated == NULL ) { // RRCConnectionSetup not received by UE yet
|
||||||
"antennaInfo is null for CCId %d, UEid %d\n",CC_idP,UE_idP);
|
|
||||||
|
|
||||||
AssertFatal(physicalConfigDedicated->antennaInfo->present != PhysicalConfigDedicated__antennaInfo_PR_NOTHING,
|
|
||||||
"antennaInfo (mod_id %d, CC_id %d) is set to NOTHING\n",module_idP,CC_idP);
|
|
||||||
|
|
||||||
if (physicalConfigDedicated->antennaInfo->present == PhysicalConfigDedicated__antennaInfo_PR_explicitValue) {
|
|
||||||
return(physicalConfigDedicated->antennaInfo->choice.explicitValue.transmissionMode);
|
|
||||||
}
|
|
||||||
else if (physicalConfigDedicated->antennaInfo->present == PhysicalConfigDedicated__antennaInfo_PR_defaultValue) {
|
|
||||||
AssertFatal(cc->p_eNB<=2,"p_eNB is %d, should be <2\n",cc->p_eNB);
|
AssertFatal(cc->p_eNB<=2,"p_eNB is %d, should be <2\n",cc->p_eNB);
|
||||||
return(cc->p_eNB);
|
return(cc->p_eNB);
|
||||||
}
|
}
|
||||||
else AssertFatal(1==0,"Shouldn't be here\n");
|
else {
|
||||||
|
AssertFatal(physicalConfigDedicated->antennaInfo!=NULL,
|
||||||
|
"antennaInfo is null for CCId %d, UEid %d\n",CC_idP,UE_idP);
|
||||||
|
|
||||||
|
AssertFatal(physicalConfigDedicated->antennaInfo->present != PhysicalConfigDedicated__antennaInfo_PR_NOTHING,
|
||||||
|
"antennaInfo (mod_id %d, CC_id %d) is set to NOTHING\n",module_idP,CC_idP);
|
||||||
|
|
||||||
|
if (physicalConfigDedicated->antennaInfo->present == PhysicalConfigDedicated__antennaInfo_PR_explicitValue) {
|
||||||
|
return(physicalConfigDedicated->antennaInfo->choice.explicitValue.transmissionMode);
|
||||||
|
}
|
||||||
|
else if (physicalConfigDedicated->antennaInfo->present == PhysicalConfigDedicated__antennaInfo_PR_defaultValue) {
|
||||||
|
AssertFatal(cc->p_eNB<=2,"p_eNB is %d, should be <2\n",cc->p_eNB);
|
||||||
|
return(cc->p_eNB);
|
||||||
|
}
|
||||||
|
else AssertFatal(1==0,"Shouldn't be here\n");
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
int8_t get_UL_harq(module_id_t module_idP,int CC_idP,uint16_t frameP,uint8_t subframeP) {
|
int8_t get_ULharq(module_id_t module_idP,int CC_idP,uint16_t frameP,uint8_t subframeP) {
|
||||||
|
|
||||||
uint8_t ret = -1;
|
uint8_t ret = -1;
|
||||||
eNB_MAC_INST *eNB = RC.mac[module_idP];
|
eNB_MAC_INST *eNB = RC.mac[module_idP];
|
||||||
@@ -727,48 +1054,39 @@ int8_t get_UL_harq(module_id_t module_idP,int CC_idP,uint16_t frameP,uint8_t sub
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframeP,cc->tdd_Config->subframeAssignment);
|
AssertFatal(1==0,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframeP,(int)cc->tdd_Config->subframeAssignment);
|
||||||
ret = -1;
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 2:
|
case 2:
|
||||||
if ((subframeP!=2) && (subframeP!=7)) {
|
AssertFatal((subframeP==2) || (subframeP==7),
|
||||||
LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframeP,cc->tdd_Config->subframeAssignment);
|
"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframeP,(int)cc->tdd_Config->subframeAssignment);
|
||||||
ret=-1;
|
ret = (subframeP/7);
|
||||||
}
|
|
||||||
else ret = (subframeP/7);
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 3:
|
case 3:
|
||||||
if ((subframeP<2) || (subframeP>4)) {
|
AssertFatal((subframeP>1) && (subframeP<5),
|
||||||
LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframeP,cc->tdd_Config->subframeAssignment);
|
"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframeP,(int)cc->tdd_Config->subframeAssignment);
|
||||||
ret = -1;
|
ret = (subframeP-2);
|
||||||
}
|
|
||||||
else ret = (subframeP-2);
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 4:
|
case 4:
|
||||||
if ((subframeP<2) || (subframeP>3)) {
|
AssertFatal((subframeP>1) && (subframeP<4),
|
||||||
LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframeP,cc->tdd_Config->subframeAssignment);
|
"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframeP,(int)cc->tdd_Config->subframeAssignment);
|
||||||
ret = -1;
|
ret = (subframeP-2);
|
||||||
}
|
|
||||||
else ret = (subframeP-2);
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 5:
|
case 5:
|
||||||
if (subframeP!=2) {
|
AssertFatal(subframeP==2,
|
||||||
LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframeP,cc->tdd_Config->subframeAssignment);
|
"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframeP,(int)cc->tdd_Config->subframeAssignment);
|
||||||
ret = -1;
|
ret = (subframeP-2);
|
||||||
}
|
|
||||||
else ret = (subframeP-2);
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
LOG_E(PHY,"subframe2_harq_pid, Unsupported TDD mode %d\n",cc->tdd_Config->subframeAssignment);
|
AssertFatal(1==0,"subframe2_harq_pid, Unsupported TDD mode %d\n",(int)cc->tdd_Config->subframeAssignment);
|
||||||
ret = -1;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1013,14 +1331,14 @@ int get_nCCE_offset(int *CCE_table,
|
|||||||
nb_candidates = (L==4) ? 4 : 2;
|
nb_candidates = (L==4) ? 4 : 2;
|
||||||
nb_candidates = min(nb_candidates,nCCE/L);
|
nb_candidates = min(nb_candidates,nCCE/L);
|
||||||
|
|
||||||
// printf("Common DCI nb_candidates %d, L %d\n",nb_candidates,L);
|
printf("Common DCI nb_candidates %d, L %d\n",nb_candidates,L);
|
||||||
|
|
||||||
for (m = nb_candidates-1 ; m >=0 ; m--) {
|
for (m = nb_candidates-1 ; m >=0 ; m--) {
|
||||||
|
|
||||||
search_space_free = 1;
|
search_space_free = 1;
|
||||||
for (l=0; l<L; l++) {
|
for (l=0; l<L; l++) {
|
||||||
|
|
||||||
// printf("CCE_table[%d] %d\n",(m*L)+l,CCE_table[(m*L)+l]);
|
printf("CCE_table[%d] %d\n",(m*L)+l,CCE_table[(m*L)+l]);
|
||||||
if (CCE_table[(m*L) + l] == 1) {
|
if (CCE_table[(m*L) + l] == 1) {
|
||||||
search_space_free = 0;
|
search_space_free = 0;
|
||||||
break;
|
break;
|
||||||
@@ -1265,8 +1583,8 @@ int allocate_CCEs(int module_idP,
|
|||||||
|
|
||||||
|
|
||||||
int *CCE_table = RC.mac[module_idP]->CCE_table[CC_idP];
|
int *CCE_table = RC.mac[module_idP]->CCE_table[CC_idP];
|
||||||
nfapi_dl_config_request_body_t *DL_req = &RC.mac[module_idP]->DL_req[CC_idP];
|
nfapi_dl_config_request_body_t *DL_req = &RC.mac[module_idP]->DL_req[CC_idP].dl_config_request_body;
|
||||||
nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_idP];
|
nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_idP].hi_dci0_request_body;
|
||||||
nfapi_dl_config_request_pdu_t *dl_config_pdu = &DL_req->dl_config_pdu_list[0];
|
nfapi_dl_config_request_pdu_t *dl_config_pdu = &DL_req->dl_config_pdu_list[0];
|
||||||
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[0];
|
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[0];
|
||||||
int nCCE_max = get_nCCE_max(&RC.mac[module_idP]->common_channels[CC_idP],1,subframeP);
|
int nCCE_max = get_nCCE_max(&RC.mac[module_idP]->common_channels[CC_idP],1,subframeP);
|
||||||
@@ -1471,9 +1789,9 @@ boolean_t CCE_allocation_infeasible(int module_idP,
|
|||||||
int aggregation,
|
int aggregation,
|
||||||
int rnti) {
|
int rnti) {
|
||||||
|
|
||||||
nfapi_dl_config_request_body_t *DL_req = &RC.mac[module_idP]->DL_req[CC_idP];
|
nfapi_dl_config_request_body_t *DL_req = &RC.mac[module_idP]->DL_req[CC_idP].dl_config_request_body;
|
||||||
nfapi_dl_config_request_pdu_t* dl_config_pdu = &DL_req->dl_config_pdu_list[DL_req->number_pdu];
|
nfapi_dl_config_request_pdu_t* dl_config_pdu = &DL_req->dl_config_pdu_list[DL_req->number_pdu];
|
||||||
nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_idP];
|
nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_idP].hi_dci0_request_body;
|
||||||
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[HI_DCI0_req->number_of_dci+HI_DCI0_req->number_of_hi];
|
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[HI_DCI0_req->number_of_dci+HI_DCI0_req->number_of_hi];
|
||||||
//DCI_ALLOC_t *dci_alloc;
|
//DCI_ALLOC_t *dci_alloc;
|
||||||
int ret;
|
int ret;
|
||||||
|
|||||||
@@ -70,19 +70,23 @@ void rx_sdu(const module_id_t enb_mod_idP,
|
|||||||
const rnti_t rntiP,
|
const rnti_t rntiP,
|
||||||
uint8_t *sduP,
|
uint8_t *sduP,
|
||||||
const uint16_t sdu_lenP,
|
const uint16_t sdu_lenP,
|
||||||
const int harq_pidP,
|
const uint16_t timing_advance,
|
||||||
uint8_t *msg3_flagP)
|
const uint8_t ul_cqi) {
|
||||||
{
|
|
||||||
|
|
||||||
unsigned char rx_ces[MAX_NUM_CE],num_ce,num_sdu,i,*payload_ptr;
|
unsigned char rx_ces[MAX_NUM_CE],num_ce,num_sdu,i,*payload_ptr;
|
||||||
unsigned char rx_lcids[NB_RB_MAX];
|
unsigned char rx_lcids[NB_RB_MAX];
|
||||||
unsigned short rx_lengths[NB_RB_MAX];
|
unsigned short rx_lengths[NB_RB_MAX];
|
||||||
int UE_id = find_UE_id(enb_mod_idP,rntiP);
|
int UE_id = find_UE_id(enb_mod_idP,rntiP);
|
||||||
|
int RA_id;
|
||||||
int ii,j;
|
int ii,j;
|
||||||
eNB_MAC_INST *eNB = RC.mac[enb_mod_idP];
|
eNB_MAC_INST *eNB = RC.mac[enb_mod_idP];
|
||||||
|
int harq_pid = subframe2harqpid(&eNB->common_channels[CC_idP],frameP,subframeP);
|
||||||
|
|
||||||
UE_list_t *UE_list= &eNB->UE_list;
|
UE_list_t *UE_list= &eNB->UE_list;
|
||||||
int crnti_rx=0;
|
int crnti_rx=0;
|
||||||
int old_buffer_info;
|
int old_buffer_info;
|
||||||
|
RA_TEMPLATE *RA_template = (RA_TEMPLATE *)&RC.mac[enb_mod_idP]->common_channels[CC_idP].RA_template[0];
|
||||||
|
|
||||||
start_meas(&eNB->rx_ulsch_sdu);
|
start_meas(&eNB->rx_ulsch_sdu);
|
||||||
|
|
||||||
@@ -98,31 +102,58 @@ void rx_sdu(const module_id_t enb_mod_idP,
|
|||||||
enb_mod_idP, frameP, rntiP, sdu_lenP);
|
enb_mod_idP, frameP, rntiP, sdu_lenP);
|
||||||
}
|
}
|
||||||
|
|
||||||
LOG_D(MAC,"[eNB %d] CC_id %d Received ULSCH sdu from PHY (rnti %x, UE_id %d), parsing header\n",enb_mod_idP,CC_idP,rntiP,UE_id);
|
|
||||||
|
|
||||||
if (sduP==NULL) { // we've got an error after N rounds
|
|
||||||
UE_list->UE_sched_ctrl[UE_id].ul_scheduled &= (~(1<<harq_pidP));
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (UE_id!=-1) {
|
if (UE_id!=-1) {
|
||||||
UE_list->UE_sched_ctrl[UE_id].ul_inactivity_timer=0;
|
|
||||||
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer =0;
|
LOG_I(MAC,"[eNB %d] CC_id %d Received ULSCH sdu from PHY (rnti %x, UE_id %d)\n",enb_mod_idP,CC_idP,rntiP,UE_id);
|
||||||
UE_list->UE_sched_ctrl[UE_id].ul_scheduled &= (~(1<<harq_pidP));
|
|
||||||
|
UE_list->UE_sched_ctrl[UE_id].ul_inactivity_timer = 0;
|
||||||
|
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer = 0;
|
||||||
|
UE_list->UE_sched_ctrl[UE_id].ul_scheduled &= (~(1<<harq_pid));
|
||||||
|
UE_list->UE_sched_ctrl[UE_id].ta_update = timing_advance;
|
||||||
|
UE_list->UE_sched_ctrl[UE_id].ul_cqi = ul_cqi;
|
||||||
|
|
||||||
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync > 0) {
|
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync > 0) {
|
||||||
UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync=0;
|
UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync=0;
|
||||||
mac_eNB_rrc_ul_in_sync(enb_mod_idP,CC_idP,frameP,subframeP,UE_RNTI(enb_mod_idP,UE_id));
|
mac_eNB_rrc_ul_in_sync(enb_mod_idP,CC_idP,frameP,subframeP,UE_RNTI(enb_mod_idP,UE_id));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (sduP==NULL) { // we've got an error
|
||||||
|
LOG_I(MAC,"[eNB %d] CC_id %d ULSCH in error in round %d\n",enb_mod_idP,CC_idP,UE_list->UE_sched_ctrl[UE_id].round_UL[harq_pid][CC_idP]);
|
||||||
|
AssertFatal(1==0,"ulsch in error\n");
|
||||||
|
if (UE_list->UE_sched_ctrl[UE_id].round_UL[harq_pid][CC_idP] == 7)
|
||||||
|
UE_list->UE_sched_ctrl[UE_id].ul_scheduled &= (~(1<<harq_pid));
|
||||||
|
return;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
else {
|
||||||
|
AssertFatal((RA_id = find_RA_id(enb_mod_idP,CC_idP,rntiP))!=-1,
|
||||||
|
"Cannot find rnti %x in RA list\n",rntiP);
|
||||||
|
AssertFatal(eNB->common_channels[CC_idP].radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx>1,
|
||||||
|
"maxHARQ %d should be greater than 1\n",
|
||||||
|
(int)eNB->common_channels[CC_idP].radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx);
|
||||||
|
|
||||||
|
if (sduP==NULL) { // we've got an error
|
||||||
|
LOG_I(MAC,"[eNB %d] CC_id %d, RA %d ULSCH in error in round %d/%d\n",enb_mod_idP,CC_idP,RA_id,
|
||||||
|
RA_template[RA_id].msg3_round,
|
||||||
|
(int)eNB->common_channels[CC_idP].radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx);
|
||||||
|
if (RA_template[RA_id].msg3_round == eNB->common_channels[CC_idP].radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx-1) {
|
||||||
|
cancel_ra_proc(enb_mod_idP,CC_idP,frameP,rntiP);
|
||||||
|
}
|
||||||
|
|
||||||
|
RA_template[RA_id].msg3_round++;
|
||||||
|
// prepare handling of retransmission
|
||||||
|
RA_template[RA_id].Msg3_frame += ((RA_template[RA_id].Msg3_subframe>1) ? 1 : 0);
|
||||||
|
RA_template[RA_id].Msg3_subframe = (RA_template[RA_id].Msg3_subframe+8)%10;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
payload_ptr = parse_ulsch_header(sduP,&num_ce,&num_sdu,rx_ces,rx_lcids,rx_lengths,sdu_lenP);
|
payload_ptr = parse_ulsch_header(sduP,&num_ce,&num_sdu,rx_ces,rx_lcids,rx_lengths,sdu_lenP);
|
||||||
|
|
||||||
T(T_ENB_MAC_UE_UL_PDU, T_INT(enb_mod_idP), T_INT(CC_idP), T_INT(rntiP), T_INT(frameP), T_INT(subframeP),
|
T(T_ENB_MAC_UE_UL_PDU, T_INT(enb_mod_idP), T_INT(CC_idP), T_INT(rntiP), T_INT(frameP), T_INT(subframeP),
|
||||||
T_INT(harq_pidP), T_INT(sdu_lenP), T_INT(num_ce), T_INT(num_sdu));
|
T_INT(harq_pid), T_INT(sdu_lenP), T_INT(num_ce), T_INT(num_sdu));
|
||||||
T(T_ENB_MAC_UE_UL_PDU_WITH_DATA, T_INT(enb_mod_idP), T_INT(CC_idP), T_INT(rntiP), T_INT(frameP), T_INT(subframeP),
|
T(T_ENB_MAC_UE_UL_PDU_WITH_DATA, T_INT(enb_mod_idP), T_INT(CC_idP), T_INT(rntiP), T_INT(frameP), T_INT(subframeP),
|
||||||
T_INT(harq_pidP), T_INT(sdu_lenP), T_INT(num_ce), T_INT(num_sdu), T_BUFFER(sduP, sdu_lenP));
|
T_INT(harq_pid), T_INT(sdu_lenP), T_INT(num_ce), T_INT(num_sdu), T_BUFFER(sduP, sdu_lenP));
|
||||||
|
|
||||||
eNB->eNB_stats[CC_idP].ulsch_bytes_rx=sdu_lenP;
|
eNB->eNB_stats[CC_idP].ulsch_bytes_rx=sdu_lenP;
|
||||||
eNB->eNB_stats[CC_idP].total_ulsch_bytes_rx+=sdu_lenP;
|
eNB->eNB_stats[CC_idP].total_ulsch_bytes_rx+=sdu_lenP;
|
||||||
@@ -159,10 +190,11 @@ void rx_sdu(const module_id_t enb_mod_idP,
|
|||||||
}
|
}
|
||||||
crnti_rx=1;
|
crnti_rx=1;
|
||||||
payload_ptr+=2;
|
payload_ptr+=2;
|
||||||
|
/*
|
||||||
if (msg3_flagP != NULL) {
|
if (msg3_flagP != NULL) {
|
||||||
*msg3_flagP = 0;
|
*msg3_flagP = 0;
|
||||||
}
|
}*/
|
||||||
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TRUNCATED_BSR:
|
case TRUNCATED_BSR:
|
||||||
@@ -336,7 +368,7 @@ void rx_sdu(const module_id_t enb_mod_idP,
|
|||||||
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d CCCH: Received Msg3: length %d, offset %ld\n",
|
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d CCCH: Received Msg3: length %d, offset %ld\n",
|
||||||
enb_mod_idP,CC_idP,frameP,rx_lengths[i],payload_ptr-sduP);
|
enb_mod_idP,CC_idP,frameP,rx_lengths[i],payload_ptr-sduP);
|
||||||
|
|
||||||
if ((UE_id=add_new_ue(enb_mod_idP,CC_idP,eNB->common_channels[CC_idP].RA_template[ii].rnti,harq_pidP)) == -1 ) {
|
if ((UE_id=add_new_ue(enb_mod_idP,CC_idP,eNB->common_channels[CC_idP].RA_template[ii].rnti,harq_pid)) == -1 ) {
|
||||||
AssertFatal(1==0,"[MAC][eNB] Max user count reached\n");
|
AssertFatal(1==0,"[MAC][eNB] Max user count reached\n");
|
||||||
// kill RA procedure
|
// kill RA procedure
|
||||||
} else
|
} else
|
||||||
@@ -348,18 +380,17 @@ void rx_sdu(const module_id_t enb_mod_idP,
|
|||||||
// kill RA procedure
|
// kill RA procedure
|
||||||
}
|
}
|
||||||
|
|
||||||
if (Is_rrc_registered == 1)
|
mac_rrc_data_ind(
|
||||||
mac_rrc_data_ind(
|
enb_mod_idP,
|
||||||
enb_mod_idP,
|
CC_idP,
|
||||||
CC_idP,
|
frameP,subframeP,
|
||||||
frameP,subframeP,
|
rntiP,
|
||||||
rntiP,
|
CCCH,
|
||||||
CCCH,
|
(uint8_t*)payload_ptr,
|
||||||
(uint8_t*)payload_ptr,
|
rx_lengths[i],
|
||||||
rx_lengths[i],
|
ENB_FLAG_YES,
|
||||||
ENB_FLAG_YES,
|
enb_mod_idP,
|
||||||
enb_mod_idP,
|
0);
|
||||||
0);
|
|
||||||
|
|
||||||
|
|
||||||
if (num_ce >0) { // handle msg3 which is not RRCConnectionRequest
|
if (num_ce >0) { // handle msg3 which is not RRCConnectionRequest
|
||||||
@@ -481,13 +512,13 @@ void rx_sdu(const module_id_t enb_mod_idP,
|
|||||||
if ((num_sdu == 0) && (num_ce==0)) {
|
if ((num_sdu == 0) && (num_ce==0)) {
|
||||||
if (UE_id != -1)
|
if (UE_id != -1)
|
||||||
UE_list->eNB_UE_stats[CC_idP][UE_id].total_num_errors_rx+=1;
|
UE_list->eNB_UE_stats[CC_idP][UE_id].total_num_errors_rx+=1;
|
||||||
|
/*
|
||||||
if (msg3_flagP != NULL) {
|
if (msg3_flagP != NULL) {
|
||||||
if( *msg3_flagP == 1 ) {
|
if( *msg3_flagP == 1 ) {
|
||||||
LOG_N(MAC,"[eNB %d] CC_id %d frame %d : false msg3 detection: signal phy to canceling RA and remove the UE\n", enb_mod_idP, CC_idP, frameP);
|
LOG_N(MAC,"[eNB %d] CC_id %d frame %d : false msg3 detection: signal phy to canceling RA and remove the UE\n", enb_mod_idP, CC_idP, frameP);
|
||||||
*msg3_flagP=0;
|
*msg3_flagP=0;
|
||||||
}
|
}
|
||||||
}
|
}*/
|
||||||
} else {
|
} else {
|
||||||
if (UE_id != -1) {
|
if (UE_id != -1) {
|
||||||
UE_list->eNB_UE_stats[CC_idP][UE_id].pdu_bytes_rx=sdu_lenP;
|
UE_list->eNB_UE_stats[CC_idP][UE_id].pdu_bytes_rx=sdu_lenP;
|
||||||
@@ -658,6 +689,7 @@ void schedule_ulsch(module_id_t module_idP,
|
|||||||
// Msg3 is using 1 PRB so we need to increase first_rb accordingly
|
// Msg3 is using 1 PRB so we need to increase first_rb accordingly
|
||||||
// not sure about the break (can there be more than 1 active RA procedure?)
|
// not sure about the break (can there be more than 1 active RA procedure?)
|
||||||
|
|
||||||
|
|
||||||
for (i=0; i<NB_RA_PROC_MAX; i++) {
|
for (i=0; i<NB_RA_PROC_MAX; i++) {
|
||||||
if ((eNB->common_channels[CC_id].RA_template[i].RA_active == TRUE) &&
|
if ((eNB->common_channels[CC_id].RA_template[i].RA_active == TRUE) &&
|
||||||
(eNB->common_channels[CC_id].RA_template[i].generate_rar == 0) &&
|
(eNB->common_channels[CC_id].RA_template[i].generate_rar == 0) &&
|
||||||
@@ -665,7 +697,7 @@ void schedule_ulsch(module_id_t module_idP,
|
|||||||
(eNB->common_channels[CC_id].RA_template[i].wait_ack_Msg4 == 0) &&
|
(eNB->common_channels[CC_id].RA_template[i].wait_ack_Msg4 == 0) &&
|
||||||
(eNB->common_channels[CC_id].RA_template[i].Msg3_subframe == sched_subframe)) {
|
(eNB->common_channels[CC_id].RA_template[i].Msg3_subframe == sched_subframe)) {
|
||||||
first_rb[CC_id]++;
|
first_rb[CC_id]++;
|
||||||
eNB->common_channels[CC_id].RA_template[i].Msg3_subframe = -1;
|
// eNB->common_channels[CC_id].RA_template[i].Msg3_subframe = -1;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -697,7 +729,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
|||||||
uint8_t status = 0;
|
uint8_t status = 0;
|
||||||
uint8_t rb_table_index = -1;
|
uint8_t rb_table_index = -1;
|
||||||
uint16_t TBS = 0;
|
uint16_t TBS = 0;
|
||||||
uint32_t cqi_req,cshift,ndi,mcs=0,rballoc,tpc;
|
uint32_t cqi_req,cshift,ndi,mcs=0,tpc;
|
||||||
int32_t normalized_rx_power;
|
int32_t normalized_rx_power;
|
||||||
int32_t target_rx_power=-90;
|
int32_t target_rx_power=-90;
|
||||||
static int32_t tpc_accumulated=0;
|
static int32_t tpc_accumulated=0;
|
||||||
@@ -710,11 +742,10 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
|||||||
UE_list_t *UE_list=&eNB->UE_list;
|
UE_list_t *UE_list=&eNB->UE_list;
|
||||||
UE_TEMPLATE *UE_template;
|
UE_TEMPLATE *UE_template;
|
||||||
UE_sched_ctrl *UE_sched_ctrl;
|
UE_sched_ctrl *UE_sched_ctrl;
|
||||||
|
nfapi_hi_dci0_request_body_t *hi_dci0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body;
|
||||||
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
|
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
|
||||||
|
|
||||||
LOG_D(MAC,"entering ulsch preprocesor\n");
|
LOG_D(MAC,"entering ulsch preprocesor\n");
|
||||||
|
|
||||||
ulsch_scheduler_pre_processor(module_idP,
|
ulsch_scheduler_pre_processor(module_idP,
|
||||||
frameP,
|
frameP,
|
||||||
subframeP,
|
subframeP,
|
||||||
@@ -722,6 +753,9 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
|||||||
|
|
||||||
LOG_D(MAC,"exiting ulsch preprocesor\n");
|
LOG_D(MAC,"exiting ulsch preprocesor\n");
|
||||||
|
|
||||||
|
eNB->HI_DCI0_req[CC_id].sfn_sf = (frameP<<3)+subframeP;
|
||||||
|
hi_dci0_req->number_of_dci = 0;
|
||||||
|
hi_dci0_req->number_of_hi = 0;
|
||||||
// loop over all active UEs
|
// loop over all active UEs
|
||||||
for (UE_id=UE_list->head_ul; UE_id>=0; UE_id=UE_list->next_ul[UE_id]) {
|
for (UE_id=UE_list->head_ul; UE_id>=0; UE_id=UE_list->next_ul[UE_id]) {
|
||||||
|
|
||||||
@@ -800,8 +834,8 @@ abort();
|
|||||||
|
|
||||||
UE_template = &UE_list->UE_template[CC_id][UE_id];
|
UE_template = &UE_list->UE_template[CC_id][UE_id];
|
||||||
UE_sched_ctrl = &UE_list->UE_sched_ctrl[UE_id];
|
UE_sched_ctrl = &UE_list->UE_sched_ctrl[UE_id];
|
||||||
harq_pid = get_UL_harq(frameP,subframeP);
|
harq_pid = subframe2harqpid(&cc[CC_id],frameP,subframeP);
|
||||||
round = UE_sched_ctrl->round_UL[CC_id];
|
round = UE_sched_ctrl->round_UL[harq_pid][CC_id];
|
||||||
/*
|
/*
|
||||||
if (get_UL_harq_info(module_idP,CC_id,frameP,subframeP,&harq_pid,&round)<0) {
|
if (get_UL_harq_info(module_idP,CC_id,frameP,subframeP,&harq_pid,&round)<0) {
|
||||||
LOG_W(MAC,"[eNB %d] Scheduler Frame %d, subframeP %d: candidate harq_pid from PHY for UE %d CC %d RNTI %x\n",
|
LOG_W(MAC,"[eNB %d] Scheduler Frame %d, subframeP %d: candidate harq_pid from PHY for UE %d CC %d RNTI %x\n",
|
||||||
@@ -896,9 +930,6 @@ abort();
|
|||||||
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used_rx+=rb_table[rb_table_index];
|
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used_rx+=rb_table[rb_table_index];
|
||||||
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_TBS=TBS;
|
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_TBS=TBS;
|
||||||
// buffer_occupancy -= TBS;
|
// buffer_occupancy -= TBS;
|
||||||
rballoc = getRIV(N_RB_UL,
|
|
||||||
first_rb[CC_id],
|
|
||||||
rb_table[rb_table_index]);
|
|
||||||
|
|
||||||
T(T_ENB_MAC_UE_UL_SCHEDULE, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP),
|
T(T_ENB_MAC_UE_UL_SCHEDULE, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP),
|
||||||
T_INT(subframeP), T_INT(harq_pid), T_INT(mcs), T_INT(first_rb[CC_id]), T_INT(rb_table[rb_table_index]),
|
T_INT(subframeP), T_INT(harq_pid), T_INT(mcs), T_INT(first_rb[CC_id]), T_INT(rb_table[rb_table_index]),
|
||||||
@@ -932,7 +963,7 @@ abort();
|
|||||||
cshift = 0;// values from 0 to 7 can be used for mapping the cyclic shift (36.211 , Table 5.5.2.1.1-1)
|
cshift = 0;// values from 0 to 7 can be used for mapping the cyclic shift (36.211 , Table 5.5.2.1.1-1)
|
||||||
// save it for a potential retransmission
|
// save it for a potential retransmission
|
||||||
UE_template->cshift[harq_pid] = cshift;
|
UE_template->cshift[harq_pid] = cshift;
|
||||||
hi_dci0_pdu = &eNB->HI_DCI0_req[CC_id].hi_dci0_pdu_list[eNB->HI_DCI0_req[CC_id].number_of_dci+eNB->HI_DCI0_req[CC_id].number_of_hi];
|
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci+eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi];
|
||||||
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
|
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
|
||||||
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE;
|
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE;
|
||||||
hi_dci0_pdu->pdu_size = 2+sizeof(nfapi_hi_dci0_dci_pdu);
|
hi_dci0_pdu->pdu_size = 2+sizeof(nfapi_hi_dci0_dci_pdu);
|
||||||
@@ -953,7 +984,7 @@ abort();
|
|||||||
if (!CCE_allocation_infeasible(module_idP,CC_id,2,subframeP,
|
if (!CCE_allocation_infeasible(module_idP,CC_id,2,subframeP,
|
||||||
aggregation,
|
aggregation,
|
||||||
rnti))
|
rnti))
|
||||||
eNB->HI_DCI0_req[CC_id].number_of_dci++;
|
eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci++;
|
||||||
|
|
||||||
add_ue_ulsch_info(module_idP,
|
add_ue_ulsch_info(module_idP,
|
||||||
CC_id,
|
CC_id,
|
||||||
@@ -964,25 +995,26 @@ abort();
|
|||||||
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generated ULSCH DCI for next UE_id %d, format 0\n", module_idP,CC_id,frameP,subframeP,UE_id);
|
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generated ULSCH DCI for next UE_id %d, format 0\n", module_idP,CC_id,frameP,subframeP,UE_id);
|
||||||
|
|
||||||
}
|
}
|
||||||
else {
|
else { // round > 0 => retransmission
|
||||||
T(T_ENB_MAC_UE_UL_SCHEDULE_RETRANSMISSION, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP),
|
T(T_ENB_MAC_UE_UL_SCHEDULE_RETRANSMISSION, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP),
|
||||||
T_INT(subframeP), T_INT(harq_pid), T_INT(mcs), T_INT(first_rb[CC_id]), T_INT(rb_table[rb_table_index]),
|
T_INT(subframeP), T_INT(harq_pid), T_INT(mcs), T_INT(first_rb[CC_id]), T_INT(rb_table[rb_table_index]),
|
||||||
T_INT(round));
|
T_INT(round));
|
||||||
|
|
||||||
// fill in NAK information
|
// fill in NAK information
|
||||||
hi_dci0_pdu = &eNB->HI_DCI0_req[CC_id].hi_dci0_pdu_list[eNB->HI_DCI0_req[CC_id].number_of_dci+eNB->HI_DCI0_req[CC_id].number_of_hi];
|
|
||||||
|
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[hi_dci0_req->number_of_dci+hi_dci0_req->number_of_hi];
|
||||||
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
|
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
|
||||||
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_HI_PDU_TYPE;
|
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_HI_PDU_TYPE;
|
||||||
hi_dci0_pdu->pdu_size = 2+sizeof(nfapi_hi_dci0_hi_pdu);
|
hi_dci0_pdu->pdu_size = 2+sizeof(nfapi_hi_dci0_hi_pdu);
|
||||||
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.resource_block_start = UE_template->first_rb_ul[harq_pid];
|
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.resource_block_start = UE_template->first_rb_ul[harq_pid];
|
||||||
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = UE_template->cshift[harq_pid];
|
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = UE_template->cshift[harq_pid];
|
||||||
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0;
|
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0;
|
||||||
eNB->HI_DCI0_req[CC_id].number_of_hi++;
|
hi_dci0_req->number_of_hi++;
|
||||||
|
|
||||||
LOG_D(MAC,"[eNB %d][PUSCH %d/%x] CC_id %d Frame %d subframeP %d Scheduled (PHICH) UE %d (mcs %d, first rb %d, nb_rb %d, rb_table_index %d, TBS %d, harq_pid %d,round %d)\n",
|
LOG_D(MAC,"[eNB %d][PUSCH %d/%x] CC_id %d Frame %d subframeP %d Scheduled (PHICH) UE %d (mcs %d, first rb %d, nb_rb %d, TBS %d, harq_pid %d,round %d)\n",
|
||||||
module_idP,harq_pid,rnti,CC_id,frameP,subframeP,UE_id,mcs,
|
module_idP,harq_pid,rnti,CC_id,frameP,subframeP,UE_id,mcs,
|
||||||
first_rb[CC_id],rb_table[rb_table_index],
|
UE_template->first_rb_ul[harq_pid], UE_template->nb_rb_ul[harq_pid],
|
||||||
rb_table_index,TBS,harq_pid,round);
|
TBS,harq_pid,round);
|
||||||
}/*
|
}/*
|
||||||
else if (round > 0) { //we schedule a retransmission
|
else if (round > 0) { //we schedule a retransmission
|
||||||
|
|
||||||
|
|||||||
@@ -54,14 +54,13 @@ extern const uint8_t cqi2fmt2x_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE];
|
|||||||
|
|
||||||
extern UE_RRC_INST *UE_rrc_inst;
|
extern UE_RRC_INST *UE_rrc_inst;
|
||||||
extern UE_MAC_INST *UE_mac_inst;
|
extern UE_MAC_INST *UE_mac_inst;
|
||||||
extern uint8_t Is_rrc_registered;
|
|
||||||
|
|
||||||
extern eNB_ULSCH_INFO eNB_ulsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
|
extern eNB_ULSCH_INFO eNB_ulsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
|
||||||
extern eNB_DLSCH_INFO eNB_dlsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
|
extern eNB_DLSCH_INFO eNB_dlsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
extern uint8_t Is_rrc_registered;
|
|
||||||
|
|
||||||
#ifndef PHYSIM
|
#ifndef PHYSIM
|
||||||
#define NB_INST 1
|
#define NB_INST 1
|
||||||
|
|||||||
@@ -172,10 +172,11 @@ int mac_top_init_eNB()
|
|||||||
LOG_D(MAC,"[MAIN] ALLOCATE %zu Bytes for %d eNB_MAC_INST @ %p\n",sizeof(eNB_MAC_INST),RC.nb_macrlc_inst,RC.mac);
|
LOG_D(MAC,"[MAIN] ALLOCATE %zu Bytes for %d eNB_MAC_INST @ %p\n",sizeof(eNB_MAC_INST),RC.nb_macrlc_inst,RC.mac);
|
||||||
bzero(RC.mac[i],sizeof(eNB_MAC_INST));
|
bzero(RC.mac[i],sizeof(eNB_MAC_INST));
|
||||||
for (j=0;j<MAX_NUM_CCs;j++) {
|
for (j=0;j<MAX_NUM_CCs;j++) {
|
||||||
RC.mac[i]->DL_req[j].dl_config_pdu_list = RC.mac[i]->dl_config_pdu_list[j];
|
RC.mac[i]->DL_req[j].dl_config_request_body.dl_config_pdu_list = RC.mac[i]->dl_config_pdu_list[j];
|
||||||
RC.mac[i]->UL_req[j].ul_config_pdu_list = RC.mac[i]->ul_config_pdu_list[j];
|
RC.mac[i]->UL_req[j].ul_config_request_body.ul_config_pdu_list = RC.mac[i]->ul_config_pdu_list[j];
|
||||||
RC.mac[i]->HI_DCI0_req[j].hi_dci0_pdu_list = RC.mac[i]->hi_dci0_pdu_list[j];
|
RC.mac[i]->HI_DCI0_req[j].hi_dci0_request_body.hi_dci0_pdu_list = RC.mac[i]->hi_dci0_pdu_list[j];
|
||||||
RC.mac[i]->TX_req[j].tx_pdu_list = RC.mac[i]->tx_request_pdu[j];
|
RC.mac[i]->TX_req[j].tx_request_body.tx_pdu_list = RC.mac[i]->tx_request_pdu[j];
|
||||||
|
RC.mac[i]->ul_handle = 0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
|
|||||||
@@ -189,11 +189,12 @@ void assign_rbs_required (module_id_t Mod_id,
|
|||||||
if (UE_list->active[UE_id] != TRUE) continue;
|
if (UE_list->active[UE_id] != TRUE) continue;
|
||||||
|
|
||||||
pCCid = UE_PCCID(Mod_id,UE_id);
|
pCCid = UE_PCCID(Mod_id,UE_id);
|
||||||
eNB_UE_stats = &UE_list->eNB_UE_stats[CC_id][UE_id];
|
|
||||||
//update CQI information across component carriers
|
//update CQI information across component carriers
|
||||||
for (n=0; n<UE_list->numactiveCCs[UE_id]; n++) {
|
for (n=0; n<UE_list->numactiveCCs[UE_id]; n++) {
|
||||||
|
|
||||||
CC_id = UE_list->ordered_CCids[n][UE_id];
|
CC_id = UE_list->ordered_CCids[n][UE_id];
|
||||||
|
eNB_UE_stats = &UE_list->eNB_UE_stats[CC_id][UE_id];
|
||||||
|
|
||||||
eNB_UE_stats->dlsch_mcs1=cqi_to_mcs[eNB_UE_stats->dl_cqi];
|
eNB_UE_stats->dlsch_mcs1=cqi_to_mcs[eNB_UE_stats->dl_cqi];
|
||||||
|
|
||||||
@@ -886,7 +887,7 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
LOG_I(MAC,"Running preprocessor for UE %d (%x)\n",UE_id,rnti);
|
||||||
// initialize harq_pid and round
|
// initialize harq_pid and round
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -1171,7 +1172,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|||||||
for (n=0; n<UE_list->numactiveULCCs[UE_id]; n++) {
|
for (n=0; n<UE_list->numactiveULCCs[UE_id]; n++) {
|
||||||
// This is the actual CC_id in the list
|
// This is the actual CC_id in the list
|
||||||
CC_id = UE_list->ordered_ULCCids[n][UE_id];
|
CC_id = UE_list->ordered_ULCCids[n][UE_id];
|
||||||
harq_pid = get_UL_harq(frameP,subframeP);
|
harq_pid = subframe2harqpid(&RC.mac[module_idP]->common_channels[CC_id],frameP,subframeP);
|
||||||
|
|
||||||
// mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,openair_harq_UL);
|
// mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,openair_harq_UL);
|
||||||
|
|
||||||
|
|||||||
@@ -206,7 +206,7 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP, uint8_t cooperation_flag,
|
|||||||
@param preamble_index index of the received RA request
|
@param preamble_index index of the received RA request
|
||||||
@param timing_offset Offset in samples of the received PRACH w.r.t. eNB timing. This is used to
|
@param timing_offset Offset in samples of the received PRACH w.r.t. eNB timing. This is used to
|
||||||
*/
|
*/
|
||||||
void initiate_ra_proc(module_id_t module_idP,int CC_id,frame_t frameP, uint16_t preamble_index,int16_t timing_offset,uint8_t sect_id,sub_frame_t subframe,uint8_t f_id);
|
void initiate_ra_proc(module_id_t module_idP,int CC_id,frame_t frameP, sub_frame_t subframeP, uint16_t preamble_index,int16_t timing_offset,uint16_t rnti);
|
||||||
|
|
||||||
/* \brief Function in eNB to fill RAR pdu when requested by PHY. This provides a single RAR SDU for the moment and returns the t-CRNTI.
|
/* \brief Function in eNB to fill RAR pdu when requested by PHY. This provides a single RAR SDU for the moment and returns the t-CRNTI.
|
||||||
@param Mod_id Instance ID of eNB
|
@param Mod_id Instance ID of eNB
|
||||||
@@ -250,12 +250,23 @@ void set_msg3_subframe(module_id_t Mod_id,
|
|||||||
|
|
||||||
/* \brief Function to indicate a received SDU on ULSCH.
|
/* \brief Function to indicate a received SDU on ULSCH.
|
||||||
@param Mod_id Instance ID of eNB
|
@param Mod_id Instance ID of eNB
|
||||||
@param rnti RNTI of UE transmitting the SR
|
@param CC_id Component carrier index
|
||||||
|
@param rnti RNTI of UE transmitting the SDU
|
||||||
@param sdu Pointer to received SDU
|
@param sdu Pointer to received SDU
|
||||||
@param harq_pid Index of harq process corresponding to this sdu
|
@param sdu_len Length of SDU
|
||||||
@param msg3_flag flag indicating that this sdu is msg3
|
@param timing_advance timing advance adjustment after this pdu
|
||||||
|
@param ul_cqi Uplink CQI estimate after this pdu (SNR quantized to 8 bits, -64 ... 63.5 dB in .5dB steps)
|
||||||
*/
|
*/
|
||||||
void rx_sdu(const module_id_t module_idP, const int CC_id,const frame_t frameP, const sub_frame_t subframeP, const rnti_t rnti, uint8_t *sdu, const uint16_t sdu_len, const int harq_pid,uint8_t *msg3_flag);
|
void rx_sdu(const module_id_t enb_mod_idP,
|
||||||
|
const int CC_idP,
|
||||||
|
const frame_t frameP,
|
||||||
|
const sub_frame_t subframeP,
|
||||||
|
const rnti_t rntiP,
|
||||||
|
uint8_t *sduP,
|
||||||
|
const uint16_t sdu_lenP,
|
||||||
|
const uint16_t timing_advance,
|
||||||
|
const uint8_t ul_cqi);
|
||||||
|
|
||||||
|
|
||||||
/* \brief Function to indicate a scheduled schduling request (SR) was received by eNB.
|
/* \brief Function to indicate a scheduled schduling request (SR) was received by eNB.
|
||||||
@param Mod_id Instance ID of eNB
|
@param Mod_id Instance ID of eNB
|
||||||
@@ -706,7 +717,7 @@ unsigned char generate_dlsch_header(unsigned char *mac_header,
|
|||||||
unsigned short *sdu_lengths,
|
unsigned short *sdu_lengths,
|
||||||
unsigned char *sdu_lcids,
|
unsigned char *sdu_lcids,
|
||||||
unsigned char drx_cmd,
|
unsigned char drx_cmd,
|
||||||
short timing_advance_cmd,
|
unsigned short timing_advance_cmd,
|
||||||
unsigned char *ue_cont_res_id,
|
unsigned char *ue_cont_res_id,
|
||||||
unsigned char short_padding,
|
unsigned char short_padding,
|
||||||
unsigned short post_padding);
|
unsigned short post_padding);
|
||||||
@@ -715,6 +726,7 @@ unsigned char generate_dlsch_header(unsigned char *mac_header,
|
|||||||
@param Mod_id Instance ID of eNB
|
@param Mod_id Instance ID of eNB
|
||||||
@param CC_id Component Carrier of the eNB
|
@param CC_id Component Carrier of the eNB
|
||||||
@param mib Pointer to MIB
|
@param mib Pointer to MIB
|
||||||
|
|
||||||
@param radioResourceConfigCommon Structure from SIB2 for common radio parameters (if NULL keep existing configuration)
|
@param radioResourceConfigCommon Structure from SIB2 for common radio parameters (if NULL keep existing configuration)
|
||||||
@param physicalConfigDedicated Structure from RRCConnectionSetup or RRCConnectionReconfiguration for dedicated PHY parameters (if NULL keep existing configuration)
|
@param physicalConfigDedicated Structure from RRCConnectionSetup or RRCConnectionReconfiguration for dedicated PHY parameters (if NULL keep existing configuration)
|
||||||
@param measObj Structure from RRCConnectionReconfiguration for UE measurement procedures
|
@param measObj Structure from RRCConnectionReconfiguration for UE measurement procedures
|
||||||
@@ -742,6 +754,7 @@ int rrc_mac_config_req_eNB(module_id_t module_idP,
|
|||||||
#ifdef Rel14
|
#ifdef Rel14
|
||||||
int pbch_repetition,
|
int pbch_repetition,
|
||||||
#endif
|
#endif
|
||||||
|
rnti_t rntiP,
|
||||||
BCCH_BCH_Message_t *mib,
|
BCCH_BCH_Message_t *mib,
|
||||||
RadioResourceConfigCommonSIB_t *radioResourceConfigCommon,
|
RadioResourceConfigCommonSIB_t *radioResourceConfigCommon,
|
||||||
#ifdef Rel14
|
#ifdef Rel14
|
||||||
@@ -839,5 +852,31 @@ uint16_t getRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs);
|
|||||||
|
|
||||||
int get_subbandsize(uint8_t dl_bandwidth);
|
int get_subbandsize(uint8_t dl_bandwidth);
|
||||||
|
|
||||||
|
uint8_t subframe2harqpid(COMMON_channels_t *cc,uint32_t frame,uint8_t subframe);
|
||||||
|
|
||||||
|
void get_Msg3allocret(COMMON_channels_t *cc,
|
||||||
|
unsigned char current_subframe,
|
||||||
|
unsigned int current_frame,
|
||||||
|
unsigned int *frame,
|
||||||
|
unsigned char *subframe);
|
||||||
|
|
||||||
|
void get_Msg3alloc(COMMON_channels_t *cc,
|
||||||
|
unsigned char current_subframe,
|
||||||
|
unsigned int current_frame,
|
||||||
|
unsigned int *frame,
|
||||||
|
unsigned char *subframe);
|
||||||
|
|
||||||
|
uint16_t mac_computeRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs);
|
||||||
|
|
||||||
|
int get_phich_resource_times6(COMMON_channels_t *cc);
|
||||||
|
|
||||||
|
int to_rbg(int dl_Bandwidth);
|
||||||
|
|
||||||
|
int to_prb(int dl_Bandwidth);
|
||||||
|
|
||||||
|
uint8_t get_Msg3harqpid(COMMON_channels_t *cc,
|
||||||
|
uint32_t frame,
|
||||||
|
unsigned char current_subframe);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
/** @}*/
|
/** @}*/
|
||||||
|
|||||||
+179
-182
@@ -307,218 +307,215 @@ PRACH_RESOURCES_t *ue_get_rach(module_id_t module_idP,int CC_id,frame_t frameP,
|
|||||||
return(NULL);
|
return(NULL);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (Is_rrc_registered == 1) {
|
if (UE_mac_inst[module_idP].RA_active == 0) {
|
||||||
|
LOG_I(MAC,"RA not active\n");
|
||||||
|
// check if RRC is ready to initiate the RA procedure
|
||||||
|
Size = mac_rrc_data_req(module_idP,
|
||||||
|
CC_id,
|
||||||
|
frameP,
|
||||||
|
CCCH,1,
|
||||||
|
&UE_mac_inst[module_idP].CCCH_pdu.payload[sizeof(SCH_SUBHEADER_SHORT)+1],0,
|
||||||
|
eNB_indexP,
|
||||||
|
0);
|
||||||
|
Size16 = (uint16_t)Size;
|
||||||
|
|
||||||
if (UE_mac_inst[module_idP].RA_active == 0) {
|
// LOG_D(MAC,"[UE %d] Frame %d: Requested RRCConnectionRequest, got %d bytes\n",module_idP,frameP,Size);
|
||||||
LOG_D(MAC,"RA not active\n");
|
LOG_I(RRC, "[MSC_MSG][FRAME %05d][RRC_UE][MOD %02d][][--- MAC_DATA_REQ (RRCConnectionRequest eNB %d) --->][MAC_UE][MOD %02d][]\n",
|
||||||
// check if RRC is ready to initiate the RA procedure
|
frameP, module_idP, eNB_indexP, module_idP);
|
||||||
Size = mac_rrc_data_req(module_idP,
|
LOG_I(MAC,"[UE %d] Frame %d: Requested RRCConnectionRequest, got %d bytes\n",module_idP,frameP,Size);
|
||||||
CC_id,
|
|
||||||
frameP,
|
|
||||||
CCCH,1,
|
|
||||||
&UE_mac_inst[module_idP].CCCH_pdu.payload[sizeof(SCH_SUBHEADER_SHORT)+1],0,
|
|
||||||
eNB_indexP,
|
|
||||||
0);
|
|
||||||
Size16 = (uint16_t)Size;
|
|
||||||
|
|
||||||
// LOG_D(MAC,"[UE %d] Frame %d: Requested RRCConnectionRequest, got %d bytes\n",module_idP,frameP,Size);
|
if (Size>0) {
|
||||||
LOG_D(RRC, "[MSC_MSG][FRAME %05d][RRC_UE][MOD %02d][][--- MAC_DATA_REQ (RRCConnectionRequest eNB %d) --->][MAC_UE][MOD %02d][]\n",
|
|
||||||
frameP, module_idP, eNB_indexP, module_idP);
|
|
||||||
LOG_D(MAC,"[UE %d] Frame %d: Requested RRCConnectionRequest, got %d bytes\n",module_idP,frameP,Size);
|
|
||||||
|
|
||||||
if (Size>0) {
|
UE_mac_inst[module_idP].RA_active = 1;
|
||||||
|
UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER = 1;
|
||||||
|
UE_mac_inst[module_idP].RA_Msg3_size = Size+sizeof(SCH_SUBHEADER_SHORT)+sizeof(SCH_SUBHEADER_SHORT);
|
||||||
|
UE_mac_inst[module_idP].RA_prachMaskIndex = 0;
|
||||||
|
UE_mac_inst[module_idP].RA_prach_resources.Msg3 = UE_mac_inst[module_idP].CCCH_pdu.payload;
|
||||||
|
UE_mac_inst[module_idP].RA_backoff_cnt = 0; // add the backoff condition here if we have it from a previous RA reponse which failed (i.e. backoff indicator)
|
||||||
|
|
||||||
UE_mac_inst[module_idP].RA_active = 1;
|
AssertFatal(rach_ConfigCommon!=NULL,
|
||||||
UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER = 1;
|
"[UE %d] FATAL Frame %d: rach_ConfigCommon is NULL !!!\n",module_idP,frameP);
|
||||||
UE_mac_inst[module_idP].RA_Msg3_size = Size+sizeof(SCH_SUBHEADER_SHORT)+sizeof(SCH_SUBHEADER_SHORT);
|
UE_mac_inst[module_idP].RA_window_cnt = 2+ rach_ConfigCommon->ra_SupervisionInfo.ra_ResponseWindowSize;
|
||||||
UE_mac_inst[module_idP].RA_prachMaskIndex = 0;
|
|
||||||
UE_mac_inst[module_idP].RA_prach_resources.Msg3 = UE_mac_inst[module_idP].CCCH_pdu.payload;
|
|
||||||
UE_mac_inst[module_idP].RA_backoff_cnt = 0; // add the backoff condition here if we have it from a previous RA reponse which failed (i.e. backoff indicator)
|
|
||||||
|
|
||||||
AssertFatal(rach_ConfigCommon==NULL,
|
if (UE_mac_inst[module_idP].RA_window_cnt == 9) {
|
||||||
"[UE %d] FATAL Frame %d: rach_ConfigCommon is NULL !!!\n",module_idP,frameP);
|
UE_mac_inst[module_idP].RA_window_cnt = 10; // Note: 9 subframe window doesn't exist, after 8 is 10!
|
||||||
UE_mac_inst[module_idP].RA_window_cnt = 2+ rach_ConfigCommon->ra_SupervisionInfo.ra_ResponseWindowSize;
|
}
|
||||||
|
|
||||||
if (UE_mac_inst[module_idP].RA_window_cnt == 9) {
|
UE_mac_inst[module_idP].RA_tx_frame = frameP;
|
||||||
UE_mac_inst[module_idP].RA_window_cnt = 10; // Note: 9 subframe window doesn't exist, after 8 is 10!
|
UE_mac_inst[module_idP].RA_tx_subframe = subframeP;
|
||||||
}
|
UE_mac_inst[module_idP].RA_backoff_frame = frameP;
|
||||||
|
UE_mac_inst[module_idP].RA_backoff_subframe = subframeP;
|
||||||
|
// Fill in preamble and PRACH resource
|
||||||
|
get_prach_resources(module_idP,CC_id,eNB_indexP,subframeP,1,NULL);
|
||||||
|
|
||||||
UE_mac_inst[module_idP].RA_tx_frame = frameP;
|
generate_ulsch_header((uint8_t*)&UE_mac_inst[module_idP].CCCH_pdu.payload[0], // mac header
|
||||||
UE_mac_inst[module_idP].RA_tx_subframe = subframeP;
|
1, // num sdus
|
||||||
UE_mac_inst[module_idP].RA_backoff_frame = frameP;
|
0, // short pading
|
||||||
UE_mac_inst[module_idP].RA_backoff_subframe = subframeP;
|
&Size16, // sdu length
|
||||||
// Fill in preamble and PRACH resource
|
&lcid, // sdu lcid
|
||||||
get_prach_resources(module_idP,CC_id,eNB_indexP,subframeP,1,NULL);
|
NULL, // power headroom
|
||||||
|
NULL, // crnti
|
||||||
|
NULL, // truncated bsr
|
||||||
|
NULL, // short bsr
|
||||||
|
NULL, // long_bsr
|
||||||
|
1); //post_padding
|
||||||
|
return(&UE_mac_inst[module_idP].RA_prach_resources);
|
||||||
|
|
||||||
generate_ulsch_header((uint8_t*)&UE_mac_inst[module_idP].CCCH_pdu.payload[0], // mac header
|
} else if (UE_mac_inst[module_idP].scheduling_info.BSR_bytes[UE_mac_inst[module_idP].scheduling_info.LCGID[DCCH]] > 0) {
|
||||||
1, // num sdus
|
// This is for triggering a transmission on DCCH using PRACH (during handover, or sending SR for example)
|
||||||
0, // short pading
|
dcch_header_len = 2 + 2; /// SHORT Subheader + C-RNTI control element
|
||||||
&Size16, // sdu length
|
rlc_status = mac_rlc_status_ind(module_idP,UE_mac_inst[module_idP].crnti, eNB_indexP,frameP,subframeP,ENB_FLAG_NO,MBMS_FLAG_NO,
|
||||||
&lcid, // sdu lcid
|
DCCH,
|
||||||
NULL, // power headroom
|
6);
|
||||||
NULL, // crnti
|
|
||||||
NULL, // truncated bsr
|
|
||||||
NULL, // short bsr
|
|
||||||
NULL, // long_bsr
|
|
||||||
1); //post_padding
|
|
||||||
return(&UE_mac_inst[module_idP].RA_prach_resources);
|
|
||||||
|
|
||||||
} else if (UE_mac_inst[module_idP].scheduling_info.BSR_bytes[UE_mac_inst[module_idP].scheduling_info.LCGID[DCCH]] > 0) {
|
if (UE_mac_inst[module_idP].crnti_before_ho)
|
||||||
// This is for triggering a transmission on DCCH using PRACH (during handover, or sending SR for example)
|
LOG_D(MAC,
|
||||||
dcch_header_len = 2 + 2; /// SHORT Subheader + C-RNTI control element
|
"[UE %d] Frame %d : UL-DCCH -> ULSCH, HO RRCConnectionReconfigurationComplete (%x, %x), RRC message has %d bytes to send throug PRACH (mac header len %d)\n",
|
||||||
rlc_status = mac_rlc_status_ind(module_idP,UE_mac_inst[module_idP].crnti, eNB_indexP,frameP,subframeP,ENB_FLAG_NO,MBMS_FLAG_NO,
|
module_idP,frameP, UE_mac_inst[module_idP].crnti,UE_mac_inst[module_idP].crnti_before_ho, rlc_status.bytes_in_buffer,dcch_header_len);
|
||||||
DCCH,
|
else
|
||||||
6);
|
LOG_D(MAC,"[UE %d] Frame %d : UL-DCCH -> ULSCH, RRC message has %d bytes to send through PRACH(mac header len %d)\n",
|
||||||
|
module_idP,frameP, rlc_status.bytes_in_buffer,dcch_header_len);
|
||||||
|
|
||||||
if (UE_mac_inst[module_idP].crnti_before_ho)
|
sdu_lengths[0] = mac_rlc_data_req(module_idP, UE_mac_inst[module_idP].crnti,
|
||||||
LOG_D(MAC,
|
eNB_indexP, frameP,ENB_FLAG_NO, MBMS_FLAG_NO,
|
||||||
"[UE %d] Frame %d : UL-DCCH -> ULSCH, HO RRCConnectionReconfigurationComplete (%x, %x), RRC message has %d bytes to send throug PRACH (mac header len %d)\n",
|
DCCH,
|
||||||
module_idP,frameP, UE_mac_inst[module_idP].crnti,UE_mac_inst[module_idP].crnti_before_ho, rlc_status.bytes_in_buffer,dcch_header_len);
|
6, //not used
|
||||||
else
|
(char *)&ulsch_buff[0]);
|
||||||
LOG_D(MAC,"[UE %d] Frame %d : UL-DCCH -> ULSCH, RRC message has %d bytes to send through PRACH(mac header len %d)\n",
|
|
||||||
module_idP,frameP, rlc_status.bytes_in_buffer,dcch_header_len);
|
|
||||||
|
|
||||||
sdu_lengths[0] = mac_rlc_data_req(module_idP, UE_mac_inst[module_idP].crnti,
|
LOG_D(MAC,"[UE %d] TX Got %d bytes for DCCH\n",module_idP,sdu_lengths[0]);
|
||||||
eNB_indexP, frameP,ENB_FLAG_NO, MBMS_FLAG_NO,
|
update_bsr(module_idP, frameP, subframeP,eNB_indexP);
|
||||||
DCCH,
|
UE_mac_inst[module_idP].scheduling_info.BSR[UE_mac_inst[module_idP].scheduling_info.LCGID[DCCH]] =
|
||||||
6, //not used
|
locate_BsrIndexByBufferSize(BSR_TABLE, BSR_TABLE_SIZE, UE_mac_inst[module_idP].scheduling_info.BSR_bytes[UE_mac_inst[module_idP].scheduling_info.LCGID[DCCH]]);
|
||||||
(char *)&ulsch_buff[0]);
|
|
||||||
|
|
||||||
LOG_D(MAC,"[UE %d] TX Got %d bytes for DCCH\n",module_idP,sdu_lengths[0]);
|
//TO DO: fill BSR infos in UL TBS
|
||||||
update_bsr(module_idP, frameP, subframeP,eNB_indexP);
|
|
||||||
UE_mac_inst[module_idP].scheduling_info.BSR[UE_mac_inst[module_idP].scheduling_info.LCGID[DCCH]] =
|
|
||||||
locate_BsrIndexByBufferSize(BSR_TABLE, BSR_TABLE_SIZE, UE_mac_inst[module_idP].scheduling_info.BSR_bytes[UE_mac_inst[module_idP].scheduling_info.LCGID[DCCH]]);
|
|
||||||
|
|
||||||
//TO DO: fill BSR infos in UL TBS
|
//header_len +=2;
|
||||||
|
UE_mac_inst[module_idP].RA_active = 1;
|
||||||
|
UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER = 1;
|
||||||
|
UE_mac_inst[module_idP].RA_Msg3_size = Size+dcch_header_len;
|
||||||
|
UE_mac_inst[module_idP].RA_prachMaskIndex = 0;
|
||||||
|
UE_mac_inst[module_idP].RA_prach_resources.Msg3 = ulsch_buff;
|
||||||
|
UE_mac_inst[module_idP].RA_backoff_cnt = 0; // add the backoff condition here if we have it from a previous RA reponse which failed (i.e. backoff indicator)
|
||||||
|
|
||||||
//header_len +=2;
|
AssertFatal(rach_ConfigCommon!=NULL,
|
||||||
UE_mac_inst[module_idP].RA_active = 1;
|
"[UE %d] FATAL Frame %d: rach_ConfigCommon is NULL !!!\n",module_idP,frameP);
|
||||||
UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER = 1;
|
UE_mac_inst[module_idP].RA_window_cnt = 2+ rach_ConfigCommon->ra_SupervisionInfo.ra_ResponseWindowSize;
|
||||||
UE_mac_inst[module_idP].RA_Msg3_size = Size+dcch_header_len;
|
|
||||||
UE_mac_inst[module_idP].RA_prachMaskIndex = 0;
|
|
||||||
UE_mac_inst[module_idP].RA_prach_resources.Msg3 = ulsch_buff;
|
|
||||||
UE_mac_inst[module_idP].RA_backoff_cnt = 0; // add the backoff condition here if we have it from a previous RA reponse which failed (i.e. backoff indicator)
|
|
||||||
|
|
||||||
AssertFatal(rach_ConfigCommon!=NULL,
|
if (UE_mac_inst[module_idP].RA_window_cnt == 9) {
|
||||||
"[UE %d] FATAL Frame %d: rach_ConfigCommon is NULL !!!\n",module_idP,frameP);
|
UE_mac_inst[module_idP].RA_window_cnt = 10; // Note: 9 subframe window doesn't exist, after 8 is 10!
|
||||||
UE_mac_inst[module_idP].RA_window_cnt = 2+ rach_ConfigCommon->ra_SupervisionInfo.ra_ResponseWindowSize;
|
}
|
||||||
|
|
||||||
if (UE_mac_inst[module_idP].RA_window_cnt == 9) {
|
|
||||||
UE_mac_inst[module_idP].RA_window_cnt = 10; // Note: 9 subframe window doesn't exist, after 8 is 10!
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
UE_mac_inst[module_idP].RA_tx_frame = frameP;
|
UE_mac_inst[module_idP].RA_tx_frame = frameP;
|
||||||
UE_mac_inst[module_idP].RA_tx_subframe = subframeP;
|
UE_mac_inst[module_idP].RA_tx_subframe = subframeP;
|
||||||
UE_mac_inst[module_idP].RA_backoff_frame = frameP;
|
UE_mac_inst[module_idP].RA_backoff_frame = frameP;
|
||||||
UE_mac_inst[module_idP].RA_backoff_subframe = subframeP;
|
UE_mac_inst[module_idP].RA_backoff_subframe = subframeP;
|
||||||
// Fill in preamble and PRACH resource
|
// Fill in preamble and PRACH resource
|
||||||
get_prach_resources(module_idP,CC_id,eNB_indexP,subframeP,1,NULL);
|
get_prach_resources(module_idP,CC_id,eNB_indexP,subframeP,1,NULL);
|
||||||
generate_ulsch_header((uint8_t*)ulsch_buff, // mac header
|
generate_ulsch_header((uint8_t*)ulsch_buff, // mac header
|
||||||
1, // num sdus
|
1, // num sdus
|
||||||
0, // short pading
|
0, // short pading
|
||||||
&Size16, // sdu length
|
&Size16, // sdu length
|
||||||
&lcid, // sdu lcid
|
&lcid, // sdu lcid
|
||||||
NULL, // power headroom
|
NULL, // power headroom
|
||||||
&UE_mac_inst[module_idP].crnti, // crnti
|
&UE_mac_inst[module_idP].crnti, // crnti
|
||||||
NULL, // truncated bsr
|
NULL, // truncated bsr
|
||||||
NULL, // short bsr
|
NULL, // short bsr
|
||||||
NULL, // long_bsr
|
NULL, // long_bsr
|
||||||
0); //post_padding
|
0); //post_padding
|
||||||
|
|
||||||
return(&UE_mac_inst[module_idP].RA_prach_resources);
|
return(&UE_mac_inst[module_idP].RA_prach_resources);
|
||||||
}
|
}
|
||||||
} else { // RACH is active
|
} else { // RACH is active
|
||||||
LOG_D(MAC,"[MAC][UE %d][RAPROC] frameP %d, subframe %d: RA Active, window cnt %d (RA_tx_frame %d, RA_tx_subframe %d)\n",module_idP,
|
LOG_D(MAC,"[MAC][UE %d][RAPROC] frameP %d, subframe %d: RA Active, window cnt %d (RA_tx_frame %d, RA_tx_subframe %d)\n",module_idP,
|
||||||
frameP,subframeP,UE_mac_inst[module_idP].RA_window_cnt,
|
frameP,subframeP,UE_mac_inst[module_idP].RA_window_cnt,
|
||||||
UE_mac_inst[module_idP].RA_tx_frame,UE_mac_inst[module_idP].RA_tx_subframe);
|
UE_mac_inst[module_idP].RA_tx_frame,UE_mac_inst[module_idP].RA_tx_subframe);
|
||||||
|
|
||||||
// compute backoff parameters
|
// compute backoff parameters
|
||||||
if (UE_mac_inst[module_idP].RA_backoff_cnt>0) {
|
if (UE_mac_inst[module_idP].RA_backoff_cnt>0) {
|
||||||
frame_diff = (sframe_t)frameP - UE_mac_inst[module_idP].RA_backoff_frame;
|
frame_diff = (sframe_t)frameP - UE_mac_inst[module_idP].RA_backoff_frame;
|
||||||
|
|
||||||
if (frame_diff < 0) {
|
if (frame_diff < 0) {
|
||||||
frame_diff = -frame_diff;
|
frame_diff = -frame_diff;
|
||||||
}
|
}
|
||||||
|
|
||||||
UE_mac_inst[module_idP].RA_backoff_cnt -= ((10*frame_diff) + (subframeP-UE_mac_inst[module_idP].RA_backoff_subframe));
|
UE_mac_inst[module_idP].RA_backoff_cnt -= ((10*frame_diff) + (subframeP-UE_mac_inst[module_idP].RA_backoff_subframe));
|
||||||
|
|
||||||
UE_mac_inst[module_idP].RA_backoff_frame = frameP;
|
UE_mac_inst[module_idP].RA_backoff_frame = frameP;
|
||||||
UE_mac_inst[module_idP].RA_backoff_subframe = subframeP;
|
UE_mac_inst[module_idP].RA_backoff_subframe = subframeP;
|
||||||
}
|
}
|
||||||
|
|
||||||
// compute RA window parameters
|
// compute RA window parameters
|
||||||
if (UE_mac_inst[module_idP].RA_window_cnt>0) {
|
if (UE_mac_inst[module_idP].RA_window_cnt>0) {
|
||||||
frame_diff = (frame_t)frameP - UE_mac_inst[module_idP].RA_tx_frame;
|
frame_diff = (frame_t)frameP - UE_mac_inst[module_idP].RA_tx_frame;
|
||||||
|
|
||||||
if (frame_diff < 0) {
|
if (frame_diff < 0) {
|
||||||
frame_diff = -frame_diff;
|
frame_diff = -frame_diff;
|
||||||
}
|
}
|
||||||
|
|
||||||
UE_mac_inst[module_idP].RA_window_cnt -= ((10*frame_diff) + (subframeP-UE_mac_inst[module_idP].RA_tx_subframe));
|
UE_mac_inst[module_idP].RA_window_cnt -= ((10*frame_diff) + (subframeP-UE_mac_inst[module_idP].RA_tx_subframe));
|
||||||
LOG_D(MAC,"[MAC][UE %d][RAPROC] frameP %d, subframe %d: RA Active, adjusted window cnt %d\n",module_idP,
|
LOG_D(MAC,"[MAC][UE %d][RAPROC] frameP %d, subframe %d: RA Active, adjusted window cnt %d\n",module_idP,
|
||||||
frameP,subframeP,UE_mac_inst[module_idP].RA_window_cnt);
|
frameP,subframeP,UE_mac_inst[module_idP].RA_window_cnt);
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((UE_mac_inst[module_idP].RA_window_cnt<=0) &&
|
if ((UE_mac_inst[module_idP].RA_window_cnt<=0) &&
|
||||||
(UE_mac_inst[module_idP].RA_backoff_cnt<=0)) {
|
(UE_mac_inst[module_idP].RA_backoff_cnt<=0)) {
|
||||||
|
|
||||||
UE_mac_inst[module_idP].RA_tx_frame = frameP;
|
UE_mac_inst[module_idP].RA_tx_frame = frameP;
|
||||||
UE_mac_inst[module_idP].RA_tx_subframe = subframeP;
|
UE_mac_inst[module_idP].RA_tx_subframe = subframeP;
|
||||||
UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER++;
|
UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER++;
|
||||||
UE_mac_inst[module_idP].RA_prach_resources.ra_PREAMBLE_RECEIVED_TARGET_POWER +=
|
UE_mac_inst[module_idP].RA_prach_resources.ra_PREAMBLE_RECEIVED_TARGET_POWER +=
|
||||||
(rach_ConfigCommon->powerRampingParameters.powerRampingStep<<1); // 2dB increments in ASN.1 definition
|
(rach_ConfigCommon->powerRampingParameters.powerRampingStep<<1); // 2dB increments in ASN.1 definition
|
||||||
int preambleTransMax = -1;
|
int preambleTransMax = -1;
|
||||||
switch (rach_ConfigCommon->ra_SupervisionInfo.preambleTransMax) {
|
switch (rach_ConfigCommon->ra_SupervisionInfo.preambleTransMax) {
|
||||||
case PreambleTransMax_n3:
|
case PreambleTransMax_n3:
|
||||||
preambleTransMax = 3;
|
preambleTransMax = 3;
|
||||||
break;
|
break;
|
||||||
case PreambleTransMax_n4:
|
case PreambleTransMax_n4:
|
||||||
preambleTransMax = 4;
|
preambleTransMax = 4;
|
||||||
break;
|
break;
|
||||||
case PreambleTransMax_n5:
|
case PreambleTransMax_n5:
|
||||||
preambleTransMax = 5;
|
preambleTransMax = 5;
|
||||||
break;
|
break;
|
||||||
case PreambleTransMax_n6:
|
case PreambleTransMax_n6:
|
||||||
preambleTransMax = 6;
|
preambleTransMax = 6;
|
||||||
break;
|
break;
|
||||||
case PreambleTransMax_n7:
|
case PreambleTransMax_n7:
|
||||||
preambleTransMax = 7;
|
preambleTransMax = 7;
|
||||||
break;
|
break;
|
||||||
case PreambleTransMax_n8:
|
case PreambleTransMax_n8:
|
||||||
preambleTransMax = 8;
|
preambleTransMax = 8;
|
||||||
break;
|
break;
|
||||||
case PreambleTransMax_n10:
|
case PreambleTransMax_n10:
|
||||||
preambleTransMax = 10;
|
preambleTransMax = 10;
|
||||||
break;
|
break;
|
||||||
case PreambleTransMax_n20:
|
case PreambleTransMax_n20:
|
||||||
preambleTransMax = 20;
|
preambleTransMax = 20;
|
||||||
break;
|
break;
|
||||||
case PreambleTransMax_n50:
|
case PreambleTransMax_n50:
|
||||||
preambleTransMax = 50;
|
preambleTransMax = 50;
|
||||||
break;
|
break;
|
||||||
case PreambleTransMax_n100:
|
case PreambleTransMax_n100:
|
||||||
preambleTransMax = 100;
|
preambleTransMax = 100;
|
||||||
break;
|
break;
|
||||||
case PreambleTransMax_n200:
|
case PreambleTransMax_n200:
|
||||||
preambleTransMax = 200;
|
preambleTransMax = 200;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER == preambleTransMax) {
|
if (UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER == preambleTransMax) {
|
||||||
LOG_D(MAC,"[UE %d] Frame %d: Maximum number of RACH attempts (%d)\n",module_idP,frameP,preambleTransMax);
|
LOG_D(MAC,"[UE %d] Frame %d: Maximum number of RACH attempts (%d)\n",module_idP,frameP,preambleTransMax);
|
||||||
// send message to RRC
|
// send message to RRC
|
||||||
UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER=1;
|
UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER=1;
|
||||||
UE_mac_inst[module_idP].RA_prach_resources.ra_PREAMBLE_RECEIVED_TARGET_POWER = get_Po_NOMINAL_PUSCH(module_idP,CC_id);
|
UE_mac_inst[module_idP].RA_prach_resources.ra_PREAMBLE_RECEIVED_TARGET_POWER = get_Po_NOMINAL_PUSCH(module_idP,CC_id);
|
||||||
}
|
}
|
||||||
|
|
||||||
UE_mac_inst[module_idP].RA_window_cnt = 2+ rach_ConfigCommon->ra_SupervisionInfo.ra_ResponseWindowSize;
|
UE_mac_inst[module_idP].RA_window_cnt = 2+ rach_ConfigCommon->ra_SupervisionInfo.ra_ResponseWindowSize;
|
||||||
UE_mac_inst[module_idP].RA_backoff_cnt = 0;
|
UE_mac_inst[module_idP].RA_backoff_cnt = 0;
|
||||||
|
|
||||||
// Fill in preamble and PRACH resource
|
// Fill in preamble and PRACH resource
|
||||||
get_prach_resources(module_idP,CC_id,eNB_indexP,subframeP,0,NULL);
|
get_prach_resources(module_idP,CC_id,eNB_indexP,subframeP,0,NULL);
|
||||||
return(&UE_mac_inst[module_idP].RA_prach_resources);
|
return(&UE_mac_inst[module_idP].RA_prach_resources);
|
||||||
}
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
} else if (UE_mode == PUSCH) {
|
} else if (UE_mode == PUSCH) {
|
||||||
|
|||||||
@@ -99,7 +99,7 @@ unsigned short fill_rar(
|
|||||||
RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
|
RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
|
||||||
rar[0] = (uint8_t)(RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset>>(2+4)); // 7 MSBs of timing advance + divide by 4
|
rar[0] = (uint8_t)(RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset>>(2+4)); // 7 MSBs of timing advance + divide by 4
|
||||||
rar[1] = (uint8_t)(RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4
|
rar[1] = (uint8_t)(RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4
|
||||||
rballoc = mac_computeRIV(N_RB_UL,26,1); // first PRB only for UL Grant
|
rballoc = mac_computeRIV(N_RB_UL,1,1); // first PRB only for UL Grant
|
||||||
rar[1] |= (rballoc>>7)&7; // Hopping = 0 (bit 3), 3 MSBs of rballoc
|
rar[1] |= (rballoc>>7)&7; // Hopping = 0 (bit 3), 3 MSBs of rballoc
|
||||||
rar[2] = ((uint8_t)(rballoc&0xff))<<1; // 7 LSBs of rballoc
|
rar[2] = ((uint8_t)(rballoc&0xff))<<1; // 7 LSBs of rballoc
|
||||||
mcs = 10;
|
mcs = 10;
|
||||||
|
|||||||
@@ -100,7 +100,6 @@ int pCC_id[NUMBER_OF_eNB_MAX];
|
|||||||
eNB_ULSCH_INFO eNB_ulsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
|
eNB_ULSCH_INFO eNB_ulsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
|
||||||
eNB_DLSCH_INFO eNB_dlsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
|
eNB_DLSCH_INFO eNB_dlsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
|
||||||
|
|
||||||
uint8_t Is_rrc_registered;
|
|
||||||
|
|
||||||
#ifdef OPENAIR2
|
#ifdef OPENAIR2
|
||||||
unsigned char NB_eNB_INST=0;
|
unsigned char NB_eNB_INST=0;
|
||||||
|
|||||||
@@ -10,6 +10,63 @@
|
|||||||
IF_Module_t *if_inst[MAX_IF_MODULES];
|
IF_Module_t *if_inst[MAX_IF_MODULES];
|
||||||
Sched_Rsp_t Sched_INFO[MAX_IF_MODULES][MAX_NUM_CCs];
|
Sched_Rsp_t Sched_INFO[MAX_IF_MODULES][MAX_NUM_CCs];
|
||||||
|
|
||||||
|
void handle_rach(UL_IND_t *UL_info) {
|
||||||
|
|
||||||
|
if (UL_info->rach_ind.number_of_preambles>0) {
|
||||||
|
|
||||||
|
AssertFatal(UL_info->rach_ind.number_of_preambles==1,"More than 1 preamble not supported\n");
|
||||||
|
UL_info->rach_ind.number_of_preambles=0;
|
||||||
|
LOG_I(MAC,"Frame %d, Subframe %d Calling initiate_ra_proc\n",UL_info->frame,UL_info->subframe);
|
||||||
|
initiate_ra_proc(UL_info->module_id,
|
||||||
|
UL_info->CC_id,
|
||||||
|
UL_info->frame,
|
||||||
|
UL_info->subframe,
|
||||||
|
UL_info->rach_ind.preamble_list[0].preamble_rel8.preamble,
|
||||||
|
UL_info->rach_ind.preamble_list[0].preamble_rel8.timing_advance,
|
||||||
|
UL_info->rach_ind.preamble_list[0].preamble_rel8.rnti);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void handle_ulsch(UL_IND_t *UL_info) {
|
||||||
|
|
||||||
|
int i;
|
||||||
|
|
||||||
|
for (i=0;i<UL_info->rx_ind.number_of_pdus;i++) {
|
||||||
|
|
||||||
|
LOG_I(MAC,"Frame %d, Subframe %d Calling rx_sdu \n",UL_info->frame,UL_info->subframe);
|
||||||
|
rx_sdu(UL_info->module_id,
|
||||||
|
UL_info->CC_id,
|
||||||
|
UL_info->frame,
|
||||||
|
UL_info->subframe,
|
||||||
|
UL_info->rx_ind.rx_pdu_list[i].rx_ue_information.rnti,
|
||||||
|
UL_info->rx_ind.rx_pdu_list[i].data,
|
||||||
|
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.length,
|
||||||
|
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.timing_advance,
|
||||||
|
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
|
||||||
|
|
||||||
|
}
|
||||||
|
UL_info->rx_ind.number_of_pdus=0;
|
||||||
|
|
||||||
|
for (i=0;i<UL_info->crc_ind.number_of_crcs;i++) {
|
||||||
|
|
||||||
|
if (UL_info->crc_ind.crc_pdu_list[i].crc_indication_rel8.crc_flag == 1) { // CRC error indication
|
||||||
|
LOG_I(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->subframe);
|
||||||
|
rx_sdu(UL_info->module_id,
|
||||||
|
UL_info->CC_id,
|
||||||
|
UL_info->frame,
|
||||||
|
UL_info->subframe,
|
||||||
|
UL_info->crc_ind.crc_pdu_list[i].rx_ue_information.rnti,
|
||||||
|
(uint8_t *)NULL,
|
||||||
|
0,
|
||||||
|
0,
|
||||||
|
0);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
UL_info->crc_ind.number_of_crcs=0;
|
||||||
|
}
|
||||||
|
|
||||||
void UL_indication(UL_IND_t *UL_info)
|
void UL_indication(UL_IND_t *UL_info)
|
||||||
{
|
{
|
||||||
|
|
||||||
@@ -38,12 +95,12 @@ void UL_indication(UL_IND_t *UL_info)
|
|||||||
|
|
||||||
|
|
||||||
|
|
||||||
// Call uplink indication function
|
handle_rach(UL_info);
|
||||||
AssertFatal(ifi->UL_indication!=NULL,"UL_indication is null (mod %d, cc %d)\n",
|
|
||||||
module_id,
|
|
||||||
CC_id);
|
|
||||||
|
|
||||||
// ifi->UL_indication(UL_info);
|
// clear HI prior to hanling ULSCH
|
||||||
|
mac->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi = 0;
|
||||||
|
|
||||||
|
handle_ulsch(UL_info);
|
||||||
|
|
||||||
if (ifi->CC_mask == ((1<<MAX_NUM_CCs)-1)) {
|
if (ifi->CC_mask == ((1<<MAX_NUM_CCs)-1)) {
|
||||||
|
|
||||||
@@ -67,8 +124,8 @@ void UL_indication(UL_IND_t *UL_info)
|
|||||||
module_id,
|
module_id,
|
||||||
CC_id);
|
CC_id);
|
||||||
ifi->schedule_response(sched_info);
|
ifi->schedule_response(sched_info);
|
||||||
LOG_I(PHY,"Schedule_response: frame %d, subframe %d (dl_pdus %d / %p)\n",sched_info->frame,sched_info->subframe,sched_info->DL_req->number_pdu,
|
LOG_I(PHY,"Schedule_response: frame %d, subframe %d (dl_pdus %d / %p)\n",sched_info->frame,sched_info->subframe,sched_info->DL_req->dl_config_request_body.number_pdu,
|
||||||
&sched_info->DL_req->number_pdu);
|
&sched_info->DL_req->dl_config_request_body.number_pdu);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -75,22 +75,22 @@ typedef struct{
|
|||||||
sub_frame_t subframe;
|
sub_frame_t subframe;
|
||||||
|
|
||||||
/// harq indication list
|
/// harq indication list
|
||||||
nfapi_harq_indication_body_t *harq_ind[MAX_NUM_HARQ_IND];
|
nfapi_harq_indication_body_t harq_ind;
|
||||||
|
|
||||||
/// crc indication list
|
/// crc indication list
|
||||||
nfapi_crc_indication_body_t *crc_ind[MAX_NUM_CRC_IND];
|
nfapi_crc_indication_body_t crc_ind;
|
||||||
|
|
||||||
/// SR indication list
|
/// SR indication list
|
||||||
nfapi_sr_indication_body_t sr_ind[MAX_NUM_SR_IND];
|
nfapi_sr_indication_body_t sr_ind;
|
||||||
|
|
||||||
/// CQI indication list
|
/// CQI indication list
|
||||||
nfapi_cqi_indication_body_t cqi_ind[MAX_NUM_CQI_IND];
|
nfapi_cqi_indication_body_t cqi_ind;
|
||||||
|
|
||||||
/// RACH indication list
|
/// RACH indication list
|
||||||
nfapi_rach_indication_body_t rach_ind[MAX_NUM_RACH_IND];
|
nfapi_rach_indication_body_t rach_ind;
|
||||||
|
|
||||||
/// SRS indication list
|
/// SRS indication list
|
||||||
nfapi_srs_indication_body_t srs_ind[MAX_NUM_SRS_IND];
|
nfapi_srs_indication_body_t srs_ind;
|
||||||
|
|
||||||
/// RX indication
|
/// RX indication
|
||||||
nfapi_rx_indication_body_t rx_ind;
|
nfapi_rx_indication_body_t rx_ind;
|
||||||
@@ -110,13 +110,13 @@ typedef struct{
|
|||||||
/// subframe
|
/// subframe
|
||||||
sub_frame_t subframe;
|
sub_frame_t subframe;
|
||||||
/// nFAPI DL Config Request
|
/// nFAPI DL Config Request
|
||||||
nfapi_dl_config_request_body_t *DL_req;
|
nfapi_dl_config_request_t *DL_req;
|
||||||
/// nFAPI UL Config Request
|
/// nFAPI UL Config Request
|
||||||
nfapi_ul_config_request_body_t *UL_req;
|
nfapi_ul_config_request_t *UL_req;
|
||||||
/// nFAPI HI_DCI Request
|
/// nFAPI HI_DCI Request
|
||||||
nfapi_hi_dci0_request_body_t *HI_DCI0_req;
|
nfapi_hi_dci0_request_t *HI_DCI0_req;
|
||||||
/// Pointers to DL SDUs
|
/// Pointers to DL SDUs
|
||||||
nfapi_tx_request_body_t *TX_req;
|
nfapi_tx_request_t *TX_req;
|
||||||
}Sched_Rsp_t;
|
}Sched_Rsp_t;
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
|
|||||||
@@ -79,16 +79,24 @@ mac_rrc_data_req(
|
|||||||
SRB_INFO *Srb_info;
|
SRB_INFO *Srb_info;
|
||||||
uint8_t Sdu_size = 0;
|
uint8_t Sdu_size = 0;
|
||||||
uint8_t sfn = (uint8_t)((frameP>>2)&0xff);
|
uint8_t sfn = (uint8_t)((frameP>>2)&0xff);
|
||||||
eNB_RRC_INST *rrc = RC.rrc[Mod_idP];
|
|
||||||
rrc_eNB_carrier_data_t *carrier = &rrc->carrier[0];
|
|
||||||
BCCH_BCH_Message_t *mib = &carrier->mib;
|
|
||||||
#ifdef DEBUG_RRC
|
#ifdef DEBUG_RRC
|
||||||
int i;
|
int i;
|
||||||
LOG_T(RRC,"[eNB %d] mac_rrc_data_req to SRB ID=%d\n",Mod_idP,Srb_id);
|
LOG_T(RRC,"[eNB %d] mac_rrc_data_req to SRB ID=%d\n",Mod_idP,Srb_id);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
eNB_RRC_INST *rrc;
|
||||||
|
rrc_eNB_carrier_data_t *carrier;
|
||||||
|
BCCH_BCH_Message_t *mib;
|
||||||
|
|
||||||
if( enb_flagP == ENB_FLAG_YES) {
|
if( enb_flagP == ENB_FLAG_YES) {
|
||||||
|
|
||||||
|
rrc = RC.rrc[Mod_idP];
|
||||||
|
carrier = &rrc->carrier[0];
|
||||||
|
mib = &carrier->mib;
|
||||||
|
|
||||||
if((Srb_id & RAB_OFFSET) == BCCH) {
|
if((Srb_id & RAB_OFFSET) == BCCH) {
|
||||||
if(RC.rrc[Mod_idP]->carrier[CC_id].SI.Active==0) {
|
if(RC.rrc[Mod_idP]->carrier[CC_id].SI.Active==0) {
|
||||||
return 0;
|
return 0;
|
||||||
@@ -188,8 +196,8 @@ mac_rrc_data_req(
|
|||||||
enc_rval = uper_encode_to_buffer(&asn_DEF_BCCH_BCH_Message,
|
enc_rval = uper_encode_to_buffer(&asn_DEF_BCCH_BCH_Message,
|
||||||
(void*)mib,
|
(void*)mib,
|
||||||
carrier->MIB,
|
carrier->MIB,
|
||||||
100);
|
24);
|
||||||
LOG_I(RRC,"Encoded MIB for frame %d (%p)\n",sfn,carrier->MIB);
|
LOG_I(RRC,"Encoded MIB for frame %d (%p), bits %lu\n",sfn,carrier->MIB,enc_rval.encoded);
|
||||||
buffer_pP[0]=carrier->MIB[0];
|
buffer_pP[0]=carrier->MIB[0];
|
||||||
buffer_pP[1]=carrier->MIB[1];
|
buffer_pP[1]=carrier->MIB[1];
|
||||||
buffer_pP[2]=carrier->MIB[2];
|
buffer_pP[2]=carrier->MIB[2];
|
||||||
@@ -298,6 +306,7 @@ mac_rrc_data_req(
|
|||||||
#endif //Rel10 || Rel14
|
#endif //Rel10 || Rel14
|
||||||
} else { //This is an UE
|
} else { //This is an UE
|
||||||
|
|
||||||
|
|
||||||
LOG_D(RRC,"[UE %d] Frame %d Filling CCCH SRB_ID %d\n",Mod_idP,frameP,Srb_id);
|
LOG_D(RRC,"[UE %d] Frame %d Filling CCCH SRB_ID %d\n",Mod_idP,frameP,Srb_id);
|
||||||
LOG_D(RRC,"[UE %d] Frame %d buffer_pP status %d,\n",Mod_idP,frameP, UE_rrc_inst[Mod_idP].Srb0[eNB_index].Tx_buffer.payload_size);
|
LOG_D(RRC,"[UE %d] Frame %d buffer_pP status %d,\n",Mod_idP,frameP, UE_rrc_inst[Mod_idP].Srb0[eNB_index].Tx_buffer.payload_size);
|
||||||
|
|
||||||
|
|||||||
@@ -661,7 +661,7 @@ uint8_t do_SIB23(uint8_t Mod_id,
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
// SRS Config
|
// SRS Config
|
||||||
if (configuration->srs_enable[CC_id]) {
|
if (configuration->srs_enable[CC_id]==1) {
|
||||||
(*sib2)->radioResourceConfigCommon.soundingRS_UL_ConfigCommon.present
|
(*sib2)->radioResourceConfigCommon.soundingRS_UL_ConfigCommon.present
|
||||||
= SoundingRS_UL_ConfigCommon_PR_setup;
|
= SoundingRS_UL_ConfigCommon_PR_setup;
|
||||||
(*sib2)->radioResourceConfigCommon.soundingRS_UL_ConfigCommon.choice.setup.srs_BandwidthConfig
|
(*sib2)->radioResourceConfigCommon.soundingRS_UL_ConfigCommon.choice.setup.srs_BandwidthConfig
|
||||||
@@ -678,7 +678,9 @@ uint8_t do_SIB23(uint8_t Mod_id,
|
|||||||
} else {
|
} else {
|
||||||
(*sib2)->radioResourceConfigCommon.soundingRS_UL_ConfigCommon.choice.setup.srs_MaxUpPts = NULL;
|
(*sib2)->radioResourceConfigCommon.soundingRS_UL_ConfigCommon.choice.setup.srs_MaxUpPts = NULL;
|
||||||
}
|
}
|
||||||
|
RC.rrc[Mod_id]->srs_enable[CC_id] = 1;
|
||||||
} else {
|
} else {
|
||||||
|
RC.rrc[Mod_id]->srs_enable[CC_id] = 0;
|
||||||
(*sib2)->radioResourceConfigCommon.soundingRS_UL_ConfigCommon.present=SoundingRS_UL_ConfigCommon_PR_release;
|
(*sib2)->radioResourceConfigCommon.soundingRS_UL_ConfigCommon.present=SoundingRS_UL_ConfigCommon_PR_release;
|
||||||
(*sib2)->radioResourceConfigCommon.soundingRS_UL_ConfigCommon.choice.release=0;
|
(*sib2)->radioResourceConfigCommon.soundingRS_UL_ConfigCommon.choice.release=0;
|
||||||
}
|
}
|
||||||
@@ -1363,7 +1365,7 @@ do_RRCConnectionSetup(
|
|||||||
physicalConfigDedicated2->tpc_PDCCH_ConfigPUCCH = CALLOC(1,sizeof(*physicalConfigDedicated2->tpc_PDCCH_ConfigPUCCH));
|
physicalConfigDedicated2->tpc_PDCCH_ConfigPUCCH = CALLOC(1,sizeof(*physicalConfigDedicated2->tpc_PDCCH_ConfigPUCCH));
|
||||||
physicalConfigDedicated2->tpc_PDCCH_ConfigPUSCH = CALLOC(1,sizeof(*physicalConfigDedicated2->tpc_PDCCH_ConfigPUSCH));
|
physicalConfigDedicated2->tpc_PDCCH_ConfigPUSCH = CALLOC(1,sizeof(*physicalConfigDedicated2->tpc_PDCCH_ConfigPUSCH));
|
||||||
physicalConfigDedicated2->cqi_ReportConfig = CALLOC(1,sizeof(*physicalConfigDedicated2->cqi_ReportConfig));
|
physicalConfigDedicated2->cqi_ReportConfig = CALLOC(1,sizeof(*physicalConfigDedicated2->cqi_ReportConfig));
|
||||||
if (rrc->srs_enable[CC_id])
|
if (rrc->srs_enable[CC_id]==1)
|
||||||
physicalConfigDedicated2->soundingRS_UL_ConfigDedicated = CALLOC(1,sizeof(*physicalConfigDedicated2->soundingRS_UL_ConfigDedicated));
|
physicalConfigDedicated2->soundingRS_UL_ConfigDedicated = CALLOC(1,sizeof(*physicalConfigDedicated2->soundingRS_UL_ConfigDedicated));
|
||||||
else
|
else
|
||||||
physicalConfigDedicated2->soundingRS_UL_ConfigDedicated = NULL;
|
physicalConfigDedicated2->soundingRS_UL_ConfigDedicated = NULL;
|
||||||
@@ -1455,7 +1457,7 @@ do_RRCConnectionSetup(
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
//soundingRS-UL-ConfigDedicated
|
//soundingRS-UL-ConfigDedicated
|
||||||
if (rrc->srs_enable[CC_id]) {
|
if (rrc->srs_enable[CC_id]==1) {
|
||||||
physicalConfigDedicated2->soundingRS_UL_ConfigDedicated->present = SoundingRS_UL_ConfigDedicated_PR_setup;
|
physicalConfigDedicated2->soundingRS_UL_ConfigDedicated->present = SoundingRS_UL_ConfigDedicated_PR_setup;
|
||||||
physicalConfigDedicated2->soundingRS_UL_ConfigDedicated->choice.setup.srs_Bandwidth =
|
physicalConfigDedicated2->soundingRS_UL_ConfigDedicated->choice.setup.srs_Bandwidth =
|
||||||
SoundingRS_UL_ConfigDedicated__setup__srs_Bandwidth_bw0;
|
SoundingRS_UL_ConfigDedicated__setup__srs_Bandwidth_bw0;
|
||||||
|
|||||||
@@ -133,7 +133,7 @@ init_SI(
|
|||||||
int i;
|
int i;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].MIB = (uint8_t*) malloc16(3);
|
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].MIB = (uint8_t*) malloc16(4);
|
||||||
// copy basic parameters
|
// copy basic parameters
|
||||||
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].physCellId = configuration->Nid_cell[CC_id];
|
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].physCellId = configuration->Nid_cell[CC_id];
|
||||||
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].p_eNB = configuration->nb_antenna_ports[CC_id];
|
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].p_eNB = configuration->nb_antenna_ports[CC_id];
|
||||||
@@ -256,6 +256,7 @@ init_SI(
|
|||||||
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib13->mbsfn_AreaInfoList_r9.list.array[i]->mcch_Config_r9.mcch_Offset_r9);
|
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib13->mbsfn_AreaInfoList_r9.list.array[i]->mcch_Config_r9.mcch_Offset_r9);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
else memset((void*)&RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib13,0,sizeof(RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib13));
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
LOG_D(RRC,
|
LOG_D(RRC,
|
||||||
@@ -271,6 +272,7 @@ init_SI(
|
|||||||
#ifdef Rel14
|
#ifdef Rel14
|
||||||
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].pbch_repetition,
|
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].pbch_repetition,
|
||||||
#endif
|
#endif
|
||||||
|
0, // rnti
|
||||||
(BCCH_BCH_Message_t *)
|
(BCCH_BCH_Message_t *)
|
||||||
&RC.rrc[ctxt_pP->module_id]->carrier[CC_id].mib,
|
&RC.rrc[ctxt_pP->module_id]->carrier[CC_id].mib,
|
||||||
(RadioResourceConfigCommonSIB_t *) &
|
(RadioResourceConfigCommonSIB_t *) &
|
||||||
@@ -369,6 +371,7 @@ init_MCCH(
|
|||||||
#ifdef Rel14
|
#ifdef Rel14
|
||||||
0,
|
0,
|
||||||
#endif
|
#endif
|
||||||
|
0,//rnti
|
||||||
(BCCH_BCH_Message_t *)NULL,
|
(BCCH_BCH_Message_t *)NULL,
|
||||||
(RadioResourceConfigCommonSIB_t *) NULL,
|
(RadioResourceConfigCommonSIB_t *) NULL,
|
||||||
(RadioResourceConfigCommonSIB_t *) NULL,
|
(RadioResourceConfigCommonSIB_t *) NULL,
|
||||||
@@ -542,8 +545,8 @@ rrc_eNB_get_next_free_ue_context(
|
|||||||
{
|
{
|
||||||
struct rrc_eNB_ue_context_s* ue_context_p = NULL;
|
struct rrc_eNB_ue_context_s* ue_context_p = NULL;
|
||||||
ue_context_p = rrc_eNB_get_ue_context(
|
ue_context_p = rrc_eNB_get_ue_context(
|
||||||
RC.rrc[ctxt_pP->module_id],
|
RC.rrc[ctxt_pP->module_id],
|
||||||
ctxt_pP->rnti);
|
ctxt_pP->rnti);
|
||||||
|
|
||||||
if (ue_context_p == NULL) {
|
if (ue_context_p == NULL) {
|
||||||
RB_FOREACH(ue_context_p, rrc_ue_tree_s, &(RC.rrc[ctxt_pP->module_id]->rrc_ue_head)) {
|
RB_FOREACH(ue_context_p, rrc_ue_tree_s, &(RC.rrc[ctxt_pP->module_id]->rrc_ue_head)) {
|
||||||
@@ -2729,6 +2732,7 @@ rrc_eNB_generate_RRCConnectionReconfiguration_handover(
|
|||||||
#ifdef Rel14
|
#ifdef Rel14
|
||||||
0,
|
0,
|
||||||
#endif
|
#endif
|
||||||
|
ue_context_pP->ue_context.rnti,
|
||||||
(BCCH_BCH_Message_t *) NULL,
|
(BCCH_BCH_Message_t *) NULL,
|
||||||
(RadioResourceConfigCommonSIB_t*) NULL,
|
(RadioResourceConfigCommonSIB_t*) NULL,
|
||||||
(RadioResourceConfigCommonSIB_t*) NULL,
|
(RadioResourceConfigCommonSIB_t*) NULL,
|
||||||
@@ -3307,6 +3311,7 @@ rrc_eNB_generate_RRCConnectionReconfiguration_handover(
|
|||||||
#ifdef Rel14
|
#ifdef Rel14
|
||||||
0,
|
0,
|
||||||
#endif
|
#endif
|
||||||
|
ue_context_pP->ue_context.rnti,
|
||||||
(BCCH_BCH_Message_t *) NULL,
|
(BCCH_BCH_Message_t *) NULL,
|
||||||
(RadioResourceConfigCommonSIB_t *) NULL,
|
(RadioResourceConfigCommonSIB_t *) NULL,
|
||||||
(RadioResourceConfigCommonSIB_t *) NULL,
|
(RadioResourceConfigCommonSIB_t *) NULL,
|
||||||
@@ -3608,6 +3613,7 @@ rrc_eNB_process_RRCConnectionReconfigurationComplete(
|
|||||||
#ifdef Rel14
|
#ifdef Rel14
|
||||||
0,
|
0,
|
||||||
#endif
|
#endif
|
||||||
|
ue_context_pP->ue_context.rnti,
|
||||||
(BCCH_BCH_Message_t *) NULL,
|
(BCCH_BCH_Message_t *) NULL,
|
||||||
(RadioResourceConfigCommonSIB_t *) NULL,
|
(RadioResourceConfigCommonSIB_t *) NULL,
|
||||||
(RadioResourceConfigCommonSIB_t *) NULL,
|
(RadioResourceConfigCommonSIB_t *) NULL,
|
||||||
@@ -3659,6 +3665,7 @@ rrc_eNB_process_RRCConnectionReconfigurationComplete(
|
|||||||
#ifdef Rel14
|
#ifdef Rel14
|
||||||
0,
|
0,
|
||||||
#endif
|
#endif
|
||||||
|
ue_context_pP->ue_context.rnti,
|
||||||
(BCCH_BCH_Message_t *) NULL,
|
(BCCH_BCH_Message_t *) NULL,
|
||||||
(RadioResourceConfigCommonSIB_t *) NULL,
|
(RadioResourceConfigCommonSIB_t *) NULL,
|
||||||
(RadioResourceConfigCommonSIB_t *) NULL,
|
(RadioResourceConfigCommonSIB_t *) NULL,
|
||||||
@@ -3711,7 +3718,7 @@ rrc_eNB_generate_RRCConnectionSetup(
|
|||||||
ue_context_pP,
|
ue_context_pP,
|
||||||
CC_id,
|
CC_id,
|
||||||
(uint8_t*) RC.rrc[ctxt_pP->module_id]->carrier[CC_id].Srb0.Tx_buffer.Payload,
|
(uint8_t*) RC.rrc[ctxt_pP->module_id]->carrier[CC_id].Srb0.Tx_buffer.Payload,
|
||||||
(uint8_t*) RC.rrc[ctxt_pP->module_id]->carrier[CC_id].p_eNB, //at this point we do not have the UE capability information, so it can only be TM1 or TM2
|
(uint8_t) RC.rrc[ctxt_pP->module_id]->carrier[CC_id].p_eNB, //at this point we do not have the UE capability information, so it can only be TM1 or TM2
|
||||||
rrc_eNB_get_next_transaction_identifier(ctxt_pP->module_id),
|
rrc_eNB_get_next_transaction_identifier(ctxt_pP->module_id),
|
||||||
SRB_configList,
|
SRB_configList,
|
||||||
&ue_context_pP->ue_context.physicalConfigDedicated);
|
&ue_context_pP->ue_context.physicalConfigDedicated);
|
||||||
@@ -3755,6 +3762,7 @@ rrc_eNB_generate_RRCConnectionSetup(
|
|||||||
#ifdef Rel14
|
#ifdef Rel14
|
||||||
0,
|
0,
|
||||||
#endif
|
#endif
|
||||||
|
ue_context_pP->ue_context.rnti,
|
||||||
(BCCH_BCH_Message_t *) NULL,
|
(BCCH_BCH_Message_t *) NULL,
|
||||||
(RadioResourceConfigCommonSIB_t *) NULL,
|
(RadioResourceConfigCommonSIB_t *) NULL,
|
||||||
(RadioResourceConfigCommonSIB_t *) NULL,
|
(RadioResourceConfigCommonSIB_t *) NULL,
|
||||||
@@ -3989,7 +3997,7 @@ rrc_eNB_decode_ccch(
|
|||||||
|
|
||||||
//memset(ul_ccch_msg,0,sizeof(UL_CCCH_Message_t));
|
//memset(ul_ccch_msg,0,sizeof(UL_CCCH_Message_t));
|
||||||
|
|
||||||
LOG_D(RRC, PROTOCOL_RRC_CTXT_UE_FMT" Decoding UL CCCH %x.%x.%x.%x.%x.%x (%p)\n",
|
LOG_I(RRC, PROTOCOL_RRC_CTXT_UE_FMT" Decoding UL CCCH %x.%x.%x.%x.%x.%x (%p)\n",
|
||||||
PROTOCOL_RRC_CTXT_UE_ARGS(ctxt_pP),
|
PROTOCOL_RRC_CTXT_UE_ARGS(ctxt_pP),
|
||||||
((uint8_t*) Srb_info->Rx_buffer.Payload)[0],
|
((uint8_t*) Srb_info->Rx_buffer.Payload)[0],
|
||||||
((uint8_t *) Srb_info->Rx_buffer.Payload)[1],
|
((uint8_t *) Srb_info->Rx_buffer.Payload)[1],
|
||||||
@@ -4006,6 +4014,7 @@ rrc_eNB_decode_ccch(
|
|||||||
0,
|
0,
|
||||||
0);
|
0);
|
||||||
|
|
||||||
|
/*
|
||||||
#if defined(ENABLE_ITTI)
|
#if defined(ENABLE_ITTI)
|
||||||
# if defined(DISABLE_ITTI_XER_PRINT)
|
# if defined(DISABLE_ITTI_XER_PRINT)
|
||||||
{
|
{
|
||||||
@@ -4034,6 +4043,7 @@ rrc_eNB_decode_ccch(
|
|||||||
}
|
}
|
||||||
# endif
|
# endif
|
||||||
#endif
|
#endif
|
||||||
|
*/
|
||||||
|
|
||||||
for (i = 0; i < 8; i++) {
|
for (i = 0; i < 8; i++) {
|
||||||
LOG_T(RRC, "%x.", ((uint8_t *) & ul_ccch_msg)[i]);
|
LOG_T(RRC, "%x.", ((uint8_t *) & ul_ccch_msg)[i]);
|
||||||
@@ -4963,10 +4973,16 @@ rrc_enb_task(
|
|||||||
CC_id = RRC_MAC_CCCH_DATA_IND(msg_p).CC_id;
|
CC_id = RRC_MAC_CCCH_DATA_IND(msg_p).CC_id;
|
||||||
srb_info_p = &RC.rrc[instance]->carrier[CC_id].Srb0;
|
srb_info_p = &RC.rrc[instance]->carrier[CC_id].Srb0;
|
||||||
|
|
||||||
|
LOG_I(RRC,"Decoding CCCH : inst %d, CC_id %d, ctxt %p, sib_info_p->Rx_buffer.payload_size %d\n",
|
||||||
|
instance,CC_id,&ctxt, RRC_MAC_CCCH_DATA_IND(msg_p).sdu_size);
|
||||||
|
AssertFatal(RRC_MAC_CCCH_DATA_IND(msg_p).sdu_size < RRC_BUFFER_SIZE_MAX,
|
||||||
|
"CCCH message has size %d > %d\n",
|
||||||
|
RRC_MAC_CCCH_DATA_IND(msg_p).sdu_size,RRC_BUFFER_SIZE_MAX);
|
||||||
memcpy(srb_info_p->Rx_buffer.Payload,
|
memcpy(srb_info_p->Rx_buffer.Payload,
|
||||||
RRC_MAC_CCCH_DATA_IND(msg_p).sdu,
|
RRC_MAC_CCCH_DATA_IND(msg_p).sdu,
|
||||||
RRC_MAC_CCCH_DATA_IND(msg_p).sdu_size);
|
RRC_MAC_CCCH_DATA_IND(msg_p).sdu_size);
|
||||||
srb_info_p->Rx_buffer.payload_size = RRC_MAC_CCCH_DATA_IND(msg_p).sdu_size;
|
srb_info_p->Rx_buffer.payload_size = RRC_MAC_CCCH_DATA_IND(msg_p).sdu_size;
|
||||||
|
|
||||||
rrc_eNB_decode_ccch(&ctxt, srb_info_p, CC_id);
|
rrc_eNB_decode_ccch(&ctxt, srb_info_p, CC_id);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
|||||||
@@ -127,7 +127,7 @@ rrc_eNB_allocate_new_UE_context(
|
|||||||
//------------------------------------------------------------------------------
|
//------------------------------------------------------------------------------
|
||||||
{
|
{
|
||||||
struct rrc_eNB_ue_context_s* new_p;
|
struct rrc_eNB_ue_context_s* new_p;
|
||||||
new_p = malloc(sizeof(struct rrc_eNB_ue_context_s));
|
new_p = (struct rrc_eNB_ue_context_s* )malloc(sizeof(struct rrc_eNB_ue_context_s));
|
||||||
|
|
||||||
if (new_p == NULL) {
|
if (new_p == NULL) {
|
||||||
LOG_E(RRC, "Cannot allocate new ue context\n");
|
LOG_E(RRC, "Cannot allocate new ue context\n");
|
||||||
|
|||||||
@@ -160,6 +160,7 @@ static int s1ap_eNB_decode_successful_outcome(s1ap_message *message,
|
|||||||
DevAssert(successfullOutcome_p != NULL);
|
DevAssert(successfullOutcome_p != NULL);
|
||||||
|
|
||||||
message_string = malloc(sizeof(char) * 10000);
|
message_string = malloc(sizeof(char) * 10000);
|
||||||
|
memset((void*)message_string,0,sizeof(char) * 10000);
|
||||||
|
|
||||||
s1ap_string_total_size = 0;
|
s1ap_string_total_size = 0;
|
||||||
|
|
||||||
|
|||||||
+29
-16
@@ -157,13 +157,14 @@ static inline int rxtx(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, char *thread_nam
|
|||||||
|
|
||||||
// UE-specific RX processing for subframe n
|
// UE-specific RX processing for subframe n
|
||||||
phy_procedures_eNB_uespec_RX(eNB, proc, no_relay );
|
phy_procedures_eNB_uespec_RX(eNB, proc, no_relay );
|
||||||
LOG_I(PHY,"uespec_RX complete: frame %d, subframe %d\n",proc->frame_rx,proc->subframe_rx);
|
|
||||||
|
pthread_mutex_lock(&eNB->UL_INFO_mutex);
|
||||||
eNB->UL_INFO.frame = proc->frame_rx;
|
eNB->UL_INFO.frame = proc->frame_rx;
|
||||||
eNB->UL_INFO.subframe = proc->subframe_rx;
|
eNB->UL_INFO.subframe = proc->subframe_rx;
|
||||||
eNB->UL_INFO.module_id = eNB->Mod_id;
|
eNB->UL_INFO.module_id = eNB->Mod_id;
|
||||||
eNB->UL_INFO.CC_id = eNB->CC_id;
|
eNB->UL_INFO.CC_id = eNB->CC_id;
|
||||||
eNB->if_inst->UL_indication(&eNB->UL_INFO);
|
eNB->if_inst->UL_indication(&eNB->UL_INFO);
|
||||||
|
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
|
||||||
// *****************************************
|
// *****************************************
|
||||||
// TX processing for subframe n+4
|
// TX processing for subframe n+4
|
||||||
// run PHY TX procedures the one after the other for all CCs to avoid race conditions
|
// run PHY TX procedures the one after the other for all CCs to avoid race conditions
|
||||||
@@ -501,6 +502,7 @@ void init_eNB_proc(int inst) {
|
|||||||
proc->RU_mask=0;
|
proc->RU_mask=0;
|
||||||
proc->RU_mask_prach=0;
|
proc->RU_mask_prach=0;
|
||||||
|
|
||||||
|
pthread_mutex_init( &eNB->UL_INFO_mutex, NULL);
|
||||||
pthread_mutex_init( &proc_rxtx[0].mutex_rxtx, NULL);
|
pthread_mutex_init( &proc_rxtx[0].mutex_rxtx, NULL);
|
||||||
pthread_mutex_init( &proc_rxtx[1].mutex_rxtx, NULL);
|
pthread_mutex_init( &proc_rxtx[1].mutex_rxtx, NULL);
|
||||||
pthread_cond_init( &proc_rxtx[0].cond_rxtx, NULL);
|
pthread_cond_init( &proc_rxtx[0].cond_rxtx, NULL);
|
||||||
@@ -531,17 +533,19 @@ void init_eNB_proc(int inst) {
|
|||||||
attr_te = &proc->attr_te;
|
attr_te = &proc->attr_te;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
pthread_create( &proc_rxtx[0].pthread_rxtx, attr0, eNB_thread_rxtx, &proc_rxtx[0] );
|
if (eNB->single_thread_flag==0) {
|
||||||
pthread_create( &proc_rxtx[1].pthread_rxtx, attr1, eNB_thread_rxtx, &proc_rxtx[1] );
|
pthread_create( &proc_rxtx[0].pthread_rxtx, attr0, eNB_thread_rxtx, &proc_rxtx[0] );
|
||||||
|
pthread_create( &proc_rxtx[1].pthread_rxtx, attr1, eNB_thread_rxtx, &proc_rxtx[1] );
|
||||||
|
}
|
||||||
pthread_create( &proc->pthread_prach, attr_prach, eNB_thread_prach, eNB );
|
pthread_create( &proc->pthread_prach, attr_prach, eNB_thread_prach, eNB );
|
||||||
|
|
||||||
char name[16];
|
char name[16];
|
||||||
snprintf( name, sizeof(name), "RXTX0 %d", i );
|
if (eNB->single_thread_flag==0) {
|
||||||
pthread_setname_np( proc_rxtx[0].pthread_rxtx, name );
|
snprintf( name, sizeof(name), "RXTX0 %d", i );
|
||||||
snprintf( name, sizeof(name), "RXTX1 %d", i );
|
pthread_setname_np( proc_rxtx[0].pthread_rxtx, name );
|
||||||
pthread_setname_np( proc_rxtx[1].pthread_rxtx, name );
|
snprintf( name, sizeof(name), "RXTX1 %d", i );
|
||||||
// snprintf( name, sizeof(name), "FH %d", i );
|
pthread_setname_np( proc_rxtx[1].pthread_rxtx, name );
|
||||||
// pthread_setname_np( proc->pthread_FH, name );
|
}
|
||||||
|
|
||||||
AssertFatal(proc->instance_cnt_prach == -1,"instance_cnt_prach = %d\n",proc->instance_cnt_prach);
|
AssertFatal(proc->instance_cnt_prach == -1,"instance_cnt_prach = %d\n",proc->instance_cnt_prach);
|
||||||
|
|
||||||
@@ -601,7 +605,7 @@ void kill_eNB_proc(int inst) {
|
|||||||
pthread_join( proc->pthread_prach, (void**)&status );
|
pthread_join( proc->pthread_prach, (void**)&status );
|
||||||
pthread_mutex_destroy( &proc->mutex_prach );
|
pthread_mutex_destroy( &proc->mutex_prach );
|
||||||
pthread_cond_destroy( &proc->cond_prach );
|
pthread_cond_destroy( &proc->cond_prach );
|
||||||
|
pthread_mutex_destroy(&eNB->UL_INFO_mutex);
|
||||||
int i;
|
int i;
|
||||||
for (i=0;i<2;i++) {
|
for (i=0;i<2;i++) {
|
||||||
pthread_join( proc_rxtx[i].pthread_rxtx, (void**)&status );
|
pthread_join( proc_rxtx[i].pthread_rxtx, (void**)&status );
|
||||||
@@ -714,6 +718,7 @@ void init_eNB_afterRU() {
|
|||||||
// map antennas and PRACH signals to eNB RX
|
// map antennas and PRACH signals to eNB RX
|
||||||
AssertFatal(eNB->num_RU>0,"Number of RU attached to eNB %d is zero\n",eNB->Mod_id);
|
AssertFatal(eNB->num_RU>0,"Number of RU attached to eNB %d is zero\n",eNB->Mod_id);
|
||||||
LOG_I(PHY,"Mapping RX ports from %d RUs to eNB %d\n",eNB->num_RU,eNB->Mod_id);
|
LOG_I(PHY,"Mapping RX ports from %d RUs to eNB %d\n",eNB->num_RU,eNB->Mod_id);
|
||||||
|
eNB->frame_parms.nb_antennas_rx = 0;
|
||||||
for (ru_id=0,aa=0;ru_id<eNB->num_RU;ru_id++) {
|
for (ru_id=0,aa=0;ru_id<eNB->num_RU;ru_id++) {
|
||||||
eNB->frame_parms.nb_antennas_rx += eNB->RU_list[ru_id]->nb_rx;
|
eNB->frame_parms.nb_antennas_rx += eNB->RU_list[ru_id]->nb_rx;
|
||||||
for (i=0;i<eNB->RU_list[ru_id]->nb_rx;aa++,i++) {
|
for (i=0;i<eNB->RU_list[ru_id]->nb_rx;aa++,i++) {
|
||||||
@@ -722,6 +727,9 @@ void init_eNB_afterRU() {
|
|||||||
eNB->common_vars.rxdataF[aa] = eNB->RU_list[ru_id]->common.rxdataF[i];
|
eNB->common_vars.rxdataF[aa] = eNB->RU_list[ru_id]->common.rxdataF[i];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
AssertFatal(eNB->frame_parms.nb_antennas_rx >0,
|
||||||
|
"inst %d, CC_id %d : nb_antennas_rx %d\n",inst,CC_id,eNB->frame_parms.nb_antennas_rx);
|
||||||
|
LOG_I(PHY,"inst %d, CC_id %d : nb_antennas_rx %d\n",inst,CC_id,eNB->frame_parms.nb_antennas_rx);
|
||||||
|
|
||||||
AssertFatal(eNB->frame_parms.nb_antennas_rx <= sizeof(eNB->prach_vars.prach_ifft) / sizeof(eNB->prach_vars.prach_ifft[0]),
|
AssertFatal(eNB->frame_parms.nb_antennas_rx <= sizeof(eNB->prach_vars.prach_ifft) / sizeof(eNB->prach_vars.prach_ifft[0]),
|
||||||
"nb_antennas_rx too large");
|
"nb_antennas_rx too large");
|
||||||
@@ -737,7 +745,7 @@ void init_eNB_afterRU() {
|
|||||||
|
|
||||||
for (ru_id=0;ru_id<RC.nb_RU;ru_id++) {
|
for (ru_id=0;ru_id<RC.nb_RU;ru_id++) {
|
||||||
|
|
||||||
if (RC.ru[ru_id]==NULL) RC.ru[ru_id] = (RU_t*)malloc(sizeof(RU_t));
|
AssertFatal(RC.ru[ru_id]!=NULL,"ru_id %d is null\n",ru_id);
|
||||||
|
|
||||||
RC.ru[ru_id]->wakeup_rxtx = wakeup_rxtx;
|
RC.ru[ru_id]->wakeup_rxtx = wakeup_rxtx;
|
||||||
RC.ru[ru_id]->wakeup_prach_eNB = wakeup_prach_eNB;
|
RC.ru[ru_id]->wakeup_prach_eNB = wakeup_prach_eNB;
|
||||||
@@ -770,15 +778,20 @@ void init_eNB(int single_thread_flag,int wait_for_sync) {
|
|||||||
|
|
||||||
|
|
||||||
LOG_I(PHY,"Registering with MAC interface module\n");
|
LOG_I(PHY,"Registering with MAC interface module\n");
|
||||||
AssertFatal((eNB->if_inst = IF_Module_init(inst))!=NULL,"Cannot register interface");
|
AssertFatal((eNB->if_inst = IF_Module_init(inst))!=NULL,"Cannot register interface");
|
||||||
eNB->if_inst->schedule_response = schedule_response;
|
eNB->if_inst->schedule_response = schedule_response;
|
||||||
eNB->if_inst->PHY_config_req = phy_config_request;
|
eNB->if_inst->PHY_config_req = phy_config_request;
|
||||||
|
memset((void*)&eNB->UL_INFO,0,sizeof(eNB->UL_INFO));
|
||||||
|
memset((void*)&eNB->Sched_INFO,0,sizeof(eNB->Sched_INFO));
|
||||||
|
LOG_I(PHY,"Setting indication lists\n");
|
||||||
|
eNB->UL_INFO.rx_ind.rx_pdu_list = eNB->rx_pdu_list;
|
||||||
|
eNB->UL_INFO.crc_ind.crc_pdu_list = eNB->crc_pdu_list;
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
LOG_D(PHY,"[lte-softmodem.c] eNB structure allocated\n");
|
LOG_I(PHY,"[lte-softmodem.c] eNB structure allocated\n");
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@@ -129,6 +129,7 @@ int attach_rru(RU_t *ru);
|
|||||||
|
|
||||||
int connect_rau(RU_t *ru);
|
int connect_rau(RU_t *ru);
|
||||||
|
|
||||||
|
|
||||||
/*************************************************************/
|
/*************************************************************/
|
||||||
/* Functions to attach and configure RRU */
|
/* Functions to attach and configure RRU */
|
||||||
|
|
||||||
@@ -138,9 +139,11 @@ int attach_rru(RU_t *ru) {
|
|||||||
RRU_CONFIG_msg_t rru_config_msg;
|
RRU_CONFIG_msg_t rru_config_msg;
|
||||||
int received_capabilities=0;
|
int received_capabilities=0;
|
||||||
|
|
||||||
|
wait_eNBs(ru);
|
||||||
// Wait for capabilities
|
// Wait for capabilities
|
||||||
while (received_capabilities==0) {
|
while (received_capabilities==0) {
|
||||||
|
|
||||||
|
memset((void*)&rru_config_msg,0,sizeof(rru_config_msg));
|
||||||
rru_config_msg.type = RAU_tick;
|
rru_config_msg.type = RAU_tick;
|
||||||
rru_config_msg.len = sizeof(RRU_CONFIG_msg_t)-MAX_RRU_CONFIG_SIZE;
|
rru_config_msg.len = sizeof(RRU_CONFIG_msg_t)-MAX_RRU_CONFIG_SIZE;
|
||||||
LOG_I(PHY,"Sending RAU tick to RRU %d\n",ru->idx);
|
LOG_I(PHY,"Sending RAU tick to RRU %d\n",ru->idx);
|
||||||
@@ -188,6 +191,7 @@ int attach_rru(RU_t *ru) {
|
|||||||
((RRU_config_t *)&rru_config_msg.msg[0])->prach_FreqOffset[0],
|
((RRU_config_t *)&rru_config_msg.msg[0])->prach_FreqOffset[0],
|
||||||
((RRU_config_t *)&rru_config_msg.msg[0])->prach_ConfigIndex[0]);
|
((RRU_config_t *)&rru_config_msg.msg[0])->prach_ConfigIndex[0]);
|
||||||
|
|
||||||
|
|
||||||
AssertFatal((ru->ifdevice.trx_ctlsend_func(&ru->ifdevice,&rru_config_msg,rru_config_msg.len)!=-1),
|
AssertFatal((ru->ifdevice.trx_ctlsend_func(&ru->ifdevice,&rru_config_msg,rru_config_msg.len)!=-1),
|
||||||
"RU %d failed send configuration to remote radio\n",ru->idx);
|
"RU %d failed send configuration to remote radio\n",ru->idx);
|
||||||
|
|
||||||
@@ -1542,7 +1546,9 @@ int check_capabilities(RU_t *ru,RRU_capabilities_t *cap) {
|
|||||||
|
|
||||||
|
|
||||||
char rru_format_options[4][20] = {"OAI_IF5_only","OAI_IF4p5_only","OAI_IF5_and_IF4p5","MBP_IF5"};
|
char rru_format_options[4][20] = {"OAI_IF5_only","OAI_IF4p5_only","OAI_IF5_and_IF4p5","MBP_IF5"};
|
||||||
|
|
||||||
char rru_formats[3][20] = {"OAI_IF5","MBP_IF5","OAI_IF4p5"};
|
char rru_formats[3][20] = {"OAI_IF5","MBP_IF5","OAI_IF4p5"};
|
||||||
|
char ru_if_formats[4][20] = {"LOCAL_RF","REMOTE_OAI_IF5","REMOTE_MBP_IF5","REMOTE_OAI_IF4p5"};
|
||||||
|
|
||||||
void configure_ru(int idx,
|
void configure_ru(int idx,
|
||||||
void *arg) {
|
void *arg) {
|
||||||
@@ -1558,7 +1564,8 @@ void configure_ru(int idx,
|
|||||||
if (capabilities->FH_fmt < MAX_FH_FMTs) LOG_I(PHY, "RU FH options %s\n",rru_format_options[capabilities->FH_fmt]);
|
if (capabilities->FH_fmt < MAX_FH_FMTs) LOG_I(PHY, "RU FH options %s\n",rru_format_options[capabilities->FH_fmt]);
|
||||||
if ((ret=check_capabilities(ru,capabilities)) == 0) {
|
if ((ret=check_capabilities(ru,capabilities)) == 0) {
|
||||||
// Pass configuration to RRU
|
// Pass configuration to RRU
|
||||||
LOG_I(PHY, "Using %s fronthaul, band %d \n",rru_formats[ru->if_south],ru->frame_parms.eutra_band);
|
LOG_I(PHY, "Using %s fronthaul (%d), band %d \n",ru_if_formats[ru->if_south],ru->if_south,ru->frame_parms.eutra_band);
|
||||||
|
// wait for configuration
|
||||||
config->FH_fmt = ru->if_south;
|
config->FH_fmt = ru->if_south;
|
||||||
config->num_bands = 1;
|
config->num_bands = 1;
|
||||||
config->band_list[0] = ru->frame_parms.eutra_band;
|
config->band_list[0] = ru->frame_parms.eutra_band;
|
||||||
@@ -1572,6 +1579,9 @@ void configure_ru(int idx,
|
|||||||
if (ru->if_south==REMOTE_IF4p5) {
|
if (ru->if_south==REMOTE_IF4p5) {
|
||||||
config->prach_FreqOffset[0] = ru->frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset;
|
config->prach_FreqOffset[0] = ru->frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset;
|
||||||
config->prach_ConfigIndex[0] = ru->frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex;
|
config->prach_ConfigIndex[0] = ru->frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex;
|
||||||
|
LOG_I(PHY,"REMOTE_IF4p5: prach_FrequOffset %d, prach_ConfigIndex %d\n",
|
||||||
|
config->prach_FreqOffset[0],config->prach_ConfigIndex[0]);
|
||||||
|
|
||||||
}
|
}
|
||||||
// take antenna capabilities of RRU
|
// take antenna capabilities of RRU
|
||||||
ru->nb_tx = capabilities->nb_tx[0];
|
ru->nb_tx = capabilities->nb_tx[0];
|
||||||
@@ -1601,6 +1611,8 @@ void configure_rru(int idx,
|
|||||||
ru->frame_parms.threequarter_fs = config->threequarter_fs[0];
|
ru->frame_parms.threequarter_fs = config->threequarter_fs[0];
|
||||||
ru->frame_parms.pdsch_config_common.referenceSignalPower = ru->max_pdschReferenceSignalPower-config->att_tx[0];
|
ru->frame_parms.pdsch_config_common.referenceSignalPower = ru->max_pdschReferenceSignalPower-config->att_tx[0];
|
||||||
if (ru->function==NGFI_RRU_IF4p5) {
|
if (ru->function==NGFI_RRU_IF4p5) {
|
||||||
|
LOG_I(PHY,"Setting ru->function to NGFI_RRU_IF4p5, prach_FrequOffset %d, prach_ConfigIndex %d\n",
|
||||||
|
config->prach_FreqOffset[0],config->prach_ConfigIndex[0]);
|
||||||
ru->frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset = config->prach_FreqOffset[0];
|
ru->frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset = config->prach_FreqOffset[0];
|
||||||
ru->frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex = config->prach_ConfigIndex[0];
|
ru->frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex = config->prach_ConfigIndex[0];
|
||||||
}
|
}
|
||||||
@@ -1656,10 +1668,12 @@ void init_RU(const char *rf_config_file) {
|
|||||||
pthread_mutex_init(&RC.ru_mutex,NULL);
|
pthread_mutex_init(&RC.ru_mutex,NULL);
|
||||||
pthread_cond_init(&RC.ru_cond,NULL);
|
pthread_cond_init(&RC.ru_cond,NULL);
|
||||||
|
|
||||||
// read in configuration file
|
// read in configuration file)
|
||||||
|
printf("configuring RU from file\n");
|
||||||
RCconfig_RU();
|
RCconfig_RU();
|
||||||
|
printf("number of L1 instaces %d, number of RU %d\n",RC.nb_L1_inst,RC.nb_RU);
|
||||||
|
|
||||||
for (i=0;i<RC.nb_inst;i++)
|
for (i=0;i<RC.nb_L1_inst;i++)
|
||||||
for (CC_id=0;CC_id<RC.nb_CC[i];CC_id++) RC.eNB[i][CC_id]->num_RU=0;
|
for (CC_id=0;CC_id<RC.nb_CC[i];CC_id++) RC.eNB[i][CC_id]->num_RU=0;
|
||||||
|
|
||||||
for (ru_id=0;ru_id<RC.nb_RU;ru_id++) {
|
for (ru_id=0;ru_id<RC.nb_RU;ru_id++) {
|
||||||
@@ -1679,7 +1693,7 @@ void init_RU(const char *rf_config_file) {
|
|||||||
eNB0 = ru->eNB_list[i];
|
eNB0 = ru->eNB_list[i];
|
||||||
eNB0->RU_list[eNB0->num_RU++] = ru;
|
eNB0->RU_list[eNB0->num_RU++] = ru;
|
||||||
}
|
}
|
||||||
LOG_I(PHY,"Initializing RRU descriptor %d : (%s,%s,%d)\n",ru_id,ru_if_types[ru->if_south],eNB_timing[ru->if_timing],ru->function);
|
// LOG_I(PHY,"Initializing RRU descriptor %d : (%s,%s,%d)\n",ru_id,ru_if_types[ru->if_south],eNB_timing[ru->if_timing],ru->function);
|
||||||
|
|
||||||
|
|
||||||
switch (ru->if_south) {
|
switch (ru->if_south) {
|
||||||
|
|||||||
@@ -1063,6 +1063,7 @@ static void get_options (int argc, char **argv) {
|
|||||||
if ((UE_flag == 0) && (conf_config_file_name != NULL)) {
|
if ((UE_flag == 0) && (conf_config_file_name != NULL)) {
|
||||||
|
|
||||||
|
|
||||||
|
memset((void*)&RC,0,sizeof(RC));
|
||||||
|
|
||||||
/* Read RC configuration file */
|
/* Read RC configuration file */
|
||||||
RCConfig(conf_config_file_name);
|
RCConfig(conf_config_file_name);
|
||||||
@@ -1267,6 +1268,25 @@ void wait_RUs() {
|
|||||||
LOG_I(PHY,"RUs configured\n");
|
LOG_I(PHY,"RUs configured\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void wait_eNBs() {
|
||||||
|
|
||||||
|
int i,j;
|
||||||
|
int waiting=1;
|
||||||
|
|
||||||
|
|
||||||
|
while (waiting==1) {
|
||||||
|
printf("Waiting for eNB L1 instances to all get configured ... sleeping 500ms (nb_L1_inst %d)\n",RC.nb_L1_inst);
|
||||||
|
usleep(500000);
|
||||||
|
waiting=0;
|
||||||
|
for (i=0;i<RC.nb_L1_inst;i++)
|
||||||
|
for (j=0;j<RC.nb_L1_CC[i];j++)
|
||||||
|
if (RC.eNB[i][j]->configured==0) {
|
||||||
|
waiting=1;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
printf("eNB L1 are configured\n");
|
||||||
|
}
|
||||||
|
|
||||||
int main( int argc, char **argv )
|
int main( int argc, char **argv )
|
||||||
{
|
{
|
||||||
@@ -1275,7 +1295,7 @@ int main( int argc, char **argv )
|
|||||||
void *status;
|
void *status;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
int inst;
|
||||||
int CC_id;
|
int CC_id;
|
||||||
int ru_id;
|
int ru_id;
|
||||||
uint8_t abstraction_flag=0;
|
uint8_t abstraction_flag=0;
|
||||||
@@ -1668,10 +1688,15 @@ int main( int argc, char **argv )
|
|||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
number_of_cards = 1;
|
number_of_cards = 1;
|
||||||
if (RC.nb_inst > 0) {
|
if (RC.nb_L1_inst > 0) {
|
||||||
printf("Initializing eNB threads\n");
|
printf("Initializing eNB threads\n");
|
||||||
init_eNB(single_thread_flag,wait_for_sync);
|
init_eNB(single_thread_flag,wait_for_sync);
|
||||||
|
for (inst=0;inst<RC.nb_L1_inst;inst++)
|
||||||
|
for (CC_id=0;CC_id<RC.nb_L1_CC[inst];CC_id++) phy_init_lte_eNB(RC.eNB[inst][CC_id],0,0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
wait_eNBs();
|
||||||
|
|
||||||
if (RC.nb_RU >0) {
|
if (RC.nb_RU >0) {
|
||||||
printf("Initializing RU threads\n");
|
printf("Initializing RU threads\n");
|
||||||
init_RU(rf_config_file);
|
init_RU(rf_config_file);
|
||||||
@@ -1681,10 +1706,21 @@ int main( int argc, char **argv )
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
AssertFatal(RC.eNB[0][0]->UL_INFO.crc_ind.crc_pdu_list!=NULL,
|
||||||
|
"RC.eNB[0][0]->UL_INFO.crc_ind.crc_pdu_list is null\n");
|
||||||
|
AssertFatal(RC.eNB[0][0]->UL_INFO.rx_ind.rx_pdu_list!=NULL,
|
||||||
|
"RC.eNB[0][0]->UL_INFO.rx_ind.rx_pdu_list is null\n");
|
||||||
wait_RUs();
|
wait_RUs();
|
||||||
// once all RUs are ready intiailize the rest of the eNBs (dependence on final RU parameters after configuration)
|
AssertFatal(RC.eNB[0][0]->UL_INFO.crc_ind.crc_pdu_list!=NULL,
|
||||||
|
"RC.eNB[0][0]->UL_INFO.crc_ind.crc_pdu_list is null\n");
|
||||||
|
AssertFatal(RC.eNB[0][0]->UL_INFO.rx_ind.rx_pdu_list!=NULL,
|
||||||
|
"RC.eNB[0][0]->UL_INFO.rx_ind.rx_pdu_list is null\n");
|
||||||
|
// once all RUs are ready intiailize the rest of the eNBs ((dependence on final RU parameters after configuration)
|
||||||
init_eNB_afterRU();
|
init_eNB_afterRU();
|
||||||
|
AssertFatal(RC.eNB[0][0]->UL_INFO.crc_ind.crc_pdu_list!=NULL,
|
||||||
|
"RC.eNB[0][0]->UL_INFO.crc_ind.crc_pdu_list is null\n");
|
||||||
|
AssertFatal(RC.eNB[0][0]->UL_INFO.rx_ind.rx_pdu_list!=NULL,
|
||||||
|
"RC.eNB[0][0]->UL_INFO.rx_ind.rx_pdu_list is null\n");
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -144,7 +144,7 @@ PHY_VARS_UE* init_ue_vars(LTE_DL_FRAME_PARMS *frame_parms,
|
|||||||
int i,j;
|
int i,j;
|
||||||
PHY_VARS_UE* ue;
|
PHY_VARS_UE* ue;
|
||||||
|
|
||||||
if (frame_parms!=(PHY_VARS_UE *)NULL) { // if we want to give initial frame parms, allocate the PHY_VARS_UE structure and put them in
|
if (frame_parms!=(LTE_DL_FRAME_PARMS *)NULL) { // if we want to give initial frame parms, allocate the PHY_VARS_UE structure and put them in
|
||||||
ue = (PHY_VARS_UE *)malloc(sizeof(PHY_VARS_UE));
|
ue = (PHY_VARS_UE *)malloc(sizeof(PHY_VARS_UE));
|
||||||
memset(ue,0,sizeof(PHY_VARS_UE));
|
memset(ue,0,sizeof(PHY_VARS_UE));
|
||||||
memcpy(&(ue->frame_parms), frame_parms, sizeof(LTE_DL_FRAME_PARMS));
|
memcpy(&(ue->frame_parms), frame_parms, sizeof(LTE_DL_FRAME_PARMS));
|
||||||
|
|||||||
Reference in New Issue
Block a user