Post-processor: enable multi-UE handling
This commit is contained in:
@@ -548,193 +548,193 @@ void nr_schedule_ue_spec(module_id_t module_id,
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frame_t frame,
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frame_t frame,
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sub_frame_t slot,
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sub_frame_t slot,
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int num_slots_per_tdd) {
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int num_slots_per_tdd) {
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gNB_MAC_INST *gNB_mac = RC.nrmac[module_id];
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NR_UE_info_t *UE_info = &gNB_mac->UE_info;
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if (UE_info->num_UEs == 0)
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return;
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/* PREPROCESSOR */
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/* PREPROCESSOR */
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nr_simple_dlsch_preprocessor(module_id, frame, slot, num_slots_per_tdd);
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nr_simple_dlsch_preprocessor(module_id, frame, slot, num_slots_per_tdd);
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gNB_MAC_INST *gNB_mac = RC.nrmac[module_id];
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NR_UE_info_t *UE_info = &gNB_mac->UE_info;
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const int ta_len = gNB_mac->ta_len;
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const int ta_len = gNB_mac->ta_len;
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const int UE_id = 0;
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const int CC_id = 0;
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const int CC_id = 0;
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NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
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NR_UE_list_t *UE_list = &UE_info->list;
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if (sched_ctrl->rbSize < 0 && !get_softmodem_params()->phy_test)
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for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
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return;
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NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
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if (sched_ctrl->rbSize <= 0 && !get_softmodem_params()->phy_test)
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continue;
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/* POST processing */
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/* POST processing */
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struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList =
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struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList =
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sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
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sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
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AssertFatal(sched_ctrl->time_domain_allocation < tdaList->list.count,
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AssertFatal(sched_ctrl->time_domain_allocation < tdaList->list.count,
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"time_domain_allocation %d>=%d\n",
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"time_domain_allocation %d>=%d\n",
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sched_ctrl->time_domain_allocation,
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sched_ctrl->time_domain_allocation,
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tdaList->list.count);
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tdaList->list.count);
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const int startSymbolAndLength =
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const int startSymbolAndLength =
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tdaList->list.array[sched_ctrl->time_domain_allocation]->startSymbolAndLength;
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tdaList->list.array[sched_ctrl->time_domain_allocation]->startSymbolAndLength;
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int startSymbolIndex, nrOfSymbols;
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int startSymbolIndex, nrOfSymbols;
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SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
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SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
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uint8_t N_PRB_DMRS =
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uint8_t N_PRB_DMRS =
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getN_PRB_DMRS(sched_ctrl->active_bwp, sched_ctrl->numDmrsCdmGrpsNoData);
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getN_PRB_DMRS(sched_ctrl->active_bwp, sched_ctrl->numDmrsCdmGrpsNoData);
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const uint32_t TBS =
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const uint32_t TBS =
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nr_compute_tbs(nr_get_Qm_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
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nr_compute_tbs(nr_get_Qm_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
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nr_get_code_rate_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
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nr_get_code_rate_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
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sched_ctrl->rbSize,
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sched_ctrl->rbSize,
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nrOfSymbols,
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nrOfSymbols,
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N_PRB_DMRS, // FIXME // This should be multiplied by the
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N_PRB_DMRS, // FIXME // This should be multiplied by the
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// number of dmrs symbols
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// number of dmrs symbols
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0 /* N_PRB_oh, 0 for initialBWP */,
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0 /* N_PRB_oh, 0 for initialBWP */,
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0 /* tb_scaling */,
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0 /* tb_scaling */,
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1 /* nrOfLayers */)
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1 /* nrOfLayers */)
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>> 3;
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>> 3;
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/* Get RLC data TODO: remove random data retrieval */
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/* Get RLC data TODO: remove random data retrieval */
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int header_length_total = 0;
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int header_length_total = 0;
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int header_length_last = 0;
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int header_length_last = 0;
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int sdu_length_total = 0;
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int sdu_length_total = 0;
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int num_sdus = 0;
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int num_sdus = 0;
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uint16_t sdu_lengths[NB_RB_MAX] = {0};
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uint16_t sdu_lengths[NB_RB_MAX] = {0};
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uint8_t mac_sdus[MAX_NR_DLSCH_PAYLOAD_BYTES];
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uint8_t mac_sdus[MAX_NR_DLSCH_PAYLOAD_BYTES];
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unsigned char sdu_lcids[NB_RB_MAX] = {0};
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unsigned char sdu_lcids[NB_RB_MAX] = {0};
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const rnti_t rnti = UE_info->rnti[UE_id];
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const rnti_t rnti = UE_info->rnti[UE_id];
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const int lcid = DL_SCH_LCID_DTCH;
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const int lcid = DL_SCH_LCID_DTCH;
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if (sched_ctrl->num_total_bytes > 0) {
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if (sched_ctrl->num_total_bytes > 0) {
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LOG_D(MAC,
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LOG_D(MAC,
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"[gNB %d][USER-PLANE DEFAULT DRB] Frame %d : DTCH->DLSCH, Requesting "
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"[gNB %d][USER-PLANE DEFAULT DRB] Frame %d : DTCH->DLSCH, Requesting "
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"%d bytes from RLC (lcid %d total hdr len %d), TBS: %d \n \n",
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"%d bytes from RLC (lcid %d total hdr len %d), TBS: %d \n \n",
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module_id,
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frame,
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TBS - ta_len - header_length_total - sdu_length_total - 3,
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lcid,
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header_length_total,
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TBS);
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sdu_lengths[num_sdus] = mac_rlc_data_req(module_id,
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rnti,
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module_id,
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module_id,
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frame,
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frame,
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TBS - ta_len - header_length_total - sdu_length_total - 3,
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ENB_FLAG_YES,
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MBMS_FLAG_NO,
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lcid,
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lcid,
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header_length_total,
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TBS - ta_len - header_length_total - sdu_length_total - 3,
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TBS);
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(char *)&mac_sdus[sdu_length_total],
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0,
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0);
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sdu_lengths[num_sdus] = mac_rlc_data_req(module_id,
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LOG_D(MAC,
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rnti,
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"[gNB %d][USER-PLANE DEFAULT DRB] Got %d bytes for DTCH %d \n",
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module_id,
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sdu_lengths[num_sdus],
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lcid);
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sdu_lcids[num_sdus] = lcid;
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sdu_length_total += sdu_lengths[num_sdus];
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header_length_last = 1 + 1 + (sdu_lengths[num_sdus] >= 128);
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header_length_total += header_length_last;
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num_sdus++;
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//ue_sched_ctl->uplane_inactivity_timer = 0;
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}
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else if (get_softmodem_params()->phy_test) {
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LOG_D(MAC, "Configuring DL_TX in %d.%d: random data\n", frame, slot);
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// fill dlsch_buffer with random data
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for (int i = 0; i < TBS; i++)
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mac_sdus[i] = (unsigned char) (lrand48()&0xff);
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sdu_lcids[0] = 0x3f; // DRB
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sdu_lengths[0] = TBS - ta_len - 3;
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header_length_total += 2 + (sdu_lengths[0] >= 128);
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sdu_length_total += sdu_lengths[0];
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num_sdus +=1;
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}
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// there is at least one SDU or TA command
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// if (num_sdus > 0 ){
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if (ta_len + sdu_length_total + header_length_total == 0) {
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// There is no data from RLC or MAC header, so don't schedule
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return;
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}
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// Check if there is data from RLC or CE
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const int post_padding = TBS >= 2 + header_length_total + sdu_length_total + ta_len;
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// padding param currently not in use
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//padding = TBS - header_length_total - sdu_length_total - ta_len - 1;
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const int offset = nr_generate_dlsch_pdu(
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module_id,
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module_id,
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frame,
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(unsigned char *)mac_sdus,
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ENB_FLAG_YES,
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(unsigned char *)gNB_mac->UE_info.DLSCH_pdu[0][0].payload[0],
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MBMS_FLAG_NO,
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num_sdus, // num_sdus
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lcid,
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sdu_lengths,
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TBS - ta_len - header_length_total - sdu_length_total - 3,
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sdu_lcids,
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(char *)&mac_sdus[sdu_length_total],
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255, // no drx
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0,
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NULL, // contention res id
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0);
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post_padding);
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LOG_D(MAC,
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// Padding: fill remainder of DLSCH with 0
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"[gNB %d][USER-PLANE DEFAULT DRB] Got %d bytes for DTCH %d \n",
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if (post_padding > 0) {
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module_id,
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for (int j = 0; j < TBS - offset; j++)
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sdu_lengths[num_sdus],
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gNB_mac->UE_info.DLSCH_pdu[0][0].payload[0][offset + j] = 0;
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lcid);
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}
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sdu_lcids[num_sdus] = lcid;
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const int current_harq_pid = sched_ctrl->current_harq_pid;
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sdu_length_total += sdu_lengths[num_sdus];
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NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
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header_length_last = 1 + 1 + (sdu_lengths[num_sdus] >= 128);
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NR_sched_pucch *pucch = &sched_ctrl->sched_pucch[sched_ctrl->pucch_sched_idx];
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header_length_total += header_length_last;
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harq->feedback_slot = pucch->ul_slot;
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harq->is_waiting = 1;
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UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++;
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if (harq->round == 0)
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UE_info->mac_stats[UE_id].dlsch_total_bytes += TBS;
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num_sdus++;
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nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
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nr_fill_nfapi_dl_pdu(module_id,
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UE_id,
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sched_ctrl->active_bwp->bwp_Id,
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sched_ctrl->search_space,
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sched_ctrl->coreset,
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dl_req,
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pucch,
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1 /* nrOfLayers */,
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sched_ctrl->mcs,
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sched_ctrl->rbSize,
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sched_ctrl->rbStart,
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sched_ctrl->numDmrsCdmGrpsNoData,
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getDmrsConfigType(sched_ctrl->active_bwp),
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sched_ctrl->mcsTableIdx,
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nr_get_code_rate_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
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nr_get_Qm_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
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TBS,
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sched_ctrl->time_domain_allocation,
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startSymbolIndex,
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nrOfSymbols,
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sched_ctrl->aggregation_level,
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sched_ctrl->cce_index,
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current_harq_pid,
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harq->ndi,
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harq->round);
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//ue_sched_ctl->uplane_inactivity_timer = 0;
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nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[gNB_mac->TX_req[CC_id].Number_of_PDUs];
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}
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configure_fapi_dl_Tx(module_id,
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else if (get_softmodem_params()->phy_test) {
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frame,
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LOG_D(MAC, "Configuring DL_TX in %d.%d: random data\n", frame, slot);
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slot,
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// fill dlsch_buffer with random data
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dl_req,
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for (int i = 0; i < TBS; i++)
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tx_req,
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mac_sdus[i] = (unsigned char) (lrand48()&0xff);
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TBS,
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sdu_lcids[0] = 0x3f; // DRB
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gNB_mac->pdu_index[CC_id]);
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sdu_lengths[0] = TBS - ta_len - 3;
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header_length_total += 2 + (sdu_lengths[0] >= 128);
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sdu_length_total += sdu_lengths[0];
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num_sdus +=1;
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}
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// there is at least one SDU or TA command
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// if (num_sdus > 0 ){
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if (ta_len + sdu_length_total + header_length_total == 0) {
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// There is no data from RLC or MAC header, so don't schedule
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return;
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}
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// Check if there is data from RLC or CE
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const int post_padding = TBS >= 2 + header_length_total + sdu_length_total + ta_len;
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// padding param currently not in use
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//padding = TBS - header_length_total - sdu_length_total - ta_len - 1;
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const int offset = nr_generate_dlsch_pdu(
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module_id,
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(unsigned char *)mac_sdus,
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(unsigned char *)gNB_mac->UE_info.DLSCH_pdu[0][0].payload[0],
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num_sdus, // num_sdus
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sdu_lengths,
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sdu_lcids,
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255, // no drx
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NULL, // contention res id
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post_padding);
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// Padding: fill remainder of DLSCH with 0
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if (post_padding > 0) {
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for (int j = 0; j < TBS - offset; j++)
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gNB_mac->UE_info.DLSCH_pdu[0][0].payload[0][offset + j] = 0;
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}
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const int current_harq_pid = sched_ctrl->current_harq_pid;
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NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
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NR_sched_pucch *pucch = &sched_ctrl->sched_pucch[sched_ctrl->pucch_sched_idx];
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harq->feedback_slot = pucch->ul_slot;
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harq->is_waiting = 1;
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UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++;
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if (harq->round == 0)
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UE_info->mac_stats[UE_id].dlsch_total_bytes += TBS;
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nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
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nr_fill_nfapi_dl_pdu(module_id,
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UE_id,
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sched_ctrl->active_bwp->bwp_Id,
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sched_ctrl->search_space,
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sched_ctrl->coreset,
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dl_req,
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pucch,
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1 /* nrOfLayers */,
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sched_ctrl->mcs,
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sched_ctrl->rbSize,
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sched_ctrl->rbStart,
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sched_ctrl->numDmrsCdmGrpsNoData,
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getDmrsConfigType(sched_ctrl->active_bwp),
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sched_ctrl->mcsTableIdx,
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nr_get_code_rate_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
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nr_get_Qm_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
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TBS,
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sched_ctrl->time_domain_allocation,
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startSymbolIndex,
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nrOfSymbols,
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sched_ctrl->aggregation_level,
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sched_ctrl->cce_index,
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current_harq_pid,
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harq->ndi,
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harq->round);
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nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[gNB_mac->TX_req[CC_id].Number_of_PDUs];
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configure_fapi_dl_Tx(module_id,
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frame,
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slot,
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dl_req,
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tx_req,
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TBS,
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gNB_mac->pdu_index[CC_id]);
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#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
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#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
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if (frame%100 == 0){
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if (frame%100 == 0){
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LOG_I(MAC,
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LOG_I(MAC,
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"%d.%d, first 10 payload bytes, TBS size: %d \n",
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"%d.%d, first 10 payload bytes, TBS size: %d \n",
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frame,
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frame,
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slot,
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slot,
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TBS);
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TBS);
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for(int i = 0; i < 10; i++) {
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for(int i = 0; i < 10; i++) {
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LOG_I(MAC, "byte %d : %x\n", i,((uint8_t *)gNB_mac->UE_info.DLSCH_pdu[0][0].payload[0])[i]);
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LOG_I(MAC, "byte %d : %x\n", i,((uint8_t *)gNB_mac->UE_info.DLSCH_pdu[0][0].payload[0])[i]);
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}
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}
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}
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}
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#endif
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#endif
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}
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||||||
}
|
}
|
||||||
|
|||||||
Reference in New Issue
Block a user