From e7c63993d627caf1883bffea551dc710afd54660 Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Mon, 3 Dec 2018 12:25:55 +0100 Subject: [PATCH 1/3] changed name of function initial pdcch scheduling parameters. Currently we set the BWP information to be the full bandwidth of the NR cell. This should be changed to include the CellGroupConfigCommon initial BWP information either from SIB or from LTE RRC. DCI still not updated to start from MSB. Will be in next commit --- .../CODING/nrPolar_tools/nr_polar_decoder.c | 2 +- .../CODING/nrPolar_tools/nr_polar_encoder.c | 5 +++-- openair1/PHY/NR_TRANSPORT/nr_dci.c | 6 +++--- openair1/PHY/NR_TRANSPORT/nr_dci_tools.c | 11 ++++++----- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 12 +++++------- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 18 ++++++++++-------- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 16 ++++++++-------- 7 files changed, 36 insertions(+), 34 deletions(-) diff --git a/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c b/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c index 22972a32b6..d3796143d2 100644 --- a/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c +++ b/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c @@ -1149,7 +1149,7 @@ uint32_t polar_decoder_int16(int16_t *input, crc = (uint64_t)(crc24c(A64_flip,len)>>8); } -#if 0 +#if 1 printf("A %llx B %llx|%llx Cprime %llx|%llx (crc %x,rxcrc %llx %d)\n", Ar, B[1],B[0],Cprime[1],Cprime[0],crc, diff --git a/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c b/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c index 2bb1050dde..7d88588423 100644 --- a/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c +++ b/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c @@ -30,7 +30,7 @@ * \warning */ -//#define DEBUG_POLAR_ENCODER +#define DEBUG_POLAR_ENCODER //#define DEBUG_POLAR_ENCODER_DCI //#define DEBUG_POLAR_ENCODER_TIMING @@ -391,7 +391,8 @@ void polar_encoder_fast(uint64_t *A, t_nrPolar_paramsPtr polarParams) { AssertFatal(polarParams->K > 32, "K = %d < 33, is not supported yet\n",polarParams->K); - AssertFatal(polarParams->K < 129, "K = %d > 64, is not supported yet\n",polarParams->K); + AssertFatal(polarParams->K < 129, "K = %d > 128, is not supported yet\n",polarParams->K); + AssertFatal(polarParams->payloadBits < 65, "payload bits = %d > 64, is not supported yet\n",polarParams->payloadBits); uint64_t B[4]={0,0,0,0},Cprime[4]={0,0,0,0}; int bitlen = polarParams->payloadBits; diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c index ef8dbc8a47..3014156898 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c @@ -32,9 +32,9 @@ #include "nr_dci.h" -//#define DEBUG_PDCCH_DMRS -//#define DEBUG_DCI -//#define DEBUG_CHANNEL_CODING +#define DEBUG_PDCCH_DMRS +#define DEBUG_DCI +#define DEBUG_CHANNEL_CODING #define PDCCH_TEST_POLAR_TEMP_FIX extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT]; diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c b/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c index c1a17e6da7..4d685b6b39 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c @@ -112,15 +112,16 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB, NR_gNB_DCI_ALLOC_t *dci_alloc, nfapi_nr_dl_config_request_pdu_t *pdu) { - NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; + NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; uint8_t n_shift; - uint32_t *dci_pdu = dci_alloc->dci_pdu; + uint32_t *dci_pdu = dci_alloc->dci_pdu; memset((void*)dci_pdu,0,4*sizeof(uint32_t)); - nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &pdu->dci_dl_pdu.dci_dl_pdu_rel15; + nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &pdu->dci_dl_pdu.dci_dl_pdu_rel15; nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &pdu->dci_dl_pdu.pdcch_params_rel15; - nfapi_nr_config_request_t *cfg = &gNB->gNB_config; - uint16_t N_RB = fp->initial_bwp_dl.N_RB; + nfapi_nr_config_request_t *cfg = &gNB->gNB_config; + + uint16_t N_RB = params_rel15->n_RB_BWP; uint8_t fsize=0, pos=0, cand_idx=0; /// Payload generation diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 8b24e4e0c7..3acefdd00c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -59,8 +59,6 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, LOG_I(MAC, "Scheduling common search space DCI type 1 for CC_id %d\n",CC_id); - - dl_req = &nr_mac->DL_req[CC_id].dl_config_request_body; dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu]; memset((void*)dl_config_pdu,0,sizeof(nfapi_nr_dl_config_request_pdu_t)); @@ -70,11 +68,11 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel15; nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &dl_config_pdu->dci_dl_pdu.pdcch_params_rel15; - nr_configure_css_dci_from_mib(params_rel15, - scs, scs, nr_FR1, 0, 0, - slots_per_frame, - dl_carrier_bandwidth); - + nr_configure_css_dci_initial(params_rel15, + scs, scs, nr_FR1, 0, 0, + slots_per_frame, + dl_carrier_bandwidth); + pdu_rel15->frequency_domain_assignment = 5; pdu_rel15->time_domain_assignment = 2; pdu_rel15->vrb_to_prb_mapping = 0; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 5d62337e98..ec2b2b68d8 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -140,14 +140,14 @@ int is_nr_UL_sf(NR_COMMON_channels_t * ccP, sub_frame_t subframeP){ } } -void nr_configure_css_dci_from_mib(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params, - nr_scs_e scs_common, - nr_scs_e pdcch_scs, - nr_frequency_range_e freq_range, - uint8_t rmsi_pdcch_config, - uint8_t ssb_idx, - uint16_t nb_slots_per_frame, - uint16_t N_RB) +void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params, + nr_scs_e scs_common, + nr_scs_e pdcch_scs, + nr_frequency_range_e freq_range, + uint8_t rmsi_pdcch_config, + uint8_t ssb_idx, + uint16_t nb_slots_per_frame, + uint16_t N_RB) { uint8_t O, M; uint8_t ss_idx = rmsi_pdcch_config&0xf; @@ -250,6 +250,8 @@ void nr_configure_css_dci_from_mib(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params->precoder_granularity = NFAPI_NR_CSET_SAME_AS_REG_BUNDLE; pdcch_params->reg_bundle_size = 6; pdcch_params->interleaver_size = 2; + // set initial banwidth part to full bandwidth + pdcch_params->n_RB_BWP = N_RB; } void nr_configure_css_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params, diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 7266b9165d..cb8e1eff4f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -66,14 +66,14 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, sub_frame_t subframeP); -void nr_configure_css_dci_from_mib(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params, - nr_scs_e scs_common, - nr_scs_e pdcch_scs, - nr_frequency_range_e freq_range, - uint8_t rmsi_pdcch_config, - uint8_t ssb_idx, - uint16_t nb_slots_per_frame, - uint16_t N_RB); +void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params, + nr_scs_e scs_common, + nr_scs_e pdcch_scs, + nr_frequency_range_e freq_range, + uint8_t rmsi_pdcch_config, + uint8_t ssb_idx, + uint16_t nb_slots_per_frame, + uint16_t N_RB); void nr_configure_css_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params, From ee1c5cbdbd678bfd1f0d922eb1ce1cef970e8e80 Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Wed, 5 Dec 2018 11:44:44 +0100 Subject: [PATCH 2/3] pdcch channel estimation in UE is ok (273 PRBs) --- openair1/PHY/INIT/nr_parms.c | 2 + openair1/PHY/MODULATION/slot_fep_nr.c | 22 +- openair1/PHY/NR_REFSIG/nr_dmrs_rx.c | 147 +++---- openair1/PHY/NR_TRANSPORT/nr_dci.c | 21 +- .../nr_dl_channel_estimation.c | 8 +- openair1/PHY/defs_gNB.h | 22 +- openair1/PHY/defs_nr_common.h | 5 + openair1/SCHED_NR/fapi_nr_l1.c | 16 +- openair1/SCHED_NR/phy_procedures_nr_common.c | 2 +- openair1/SCHED_NR/phy_procedures_nr_gNB.c | 31 +- openair1/SCHED_NR/sched_nr.h | 20 +- openair1/SCHED_NR_UE/fapi_nr_ue_l1.c | 359 +++++++++--------- openair1/SIMULATION/NR_PHY/dlsim.c | 15 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 3 +- openair2/NR_PHY_INTERFACE/NR_IF_Module.c | 50 +-- openair2/NR_PHY_INTERFACE/NR_IF_Module.h | 14 +- 16 files changed, 384 insertions(+), 353 deletions(-) diff --git a/openair1/PHY/INIT/nr_parms.c b/openair1/PHY/INIT/nr_parms.c index eaa69393bc..381a0c0452 100644 --- a/openair1/PHY/INIT/nr_parms.c +++ b/openair1/PHY/INIT/nr_parms.c @@ -159,6 +159,8 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp, fp->symbols_per_slot = ((Ncp == NORMAL)? 14 : 12); // to redefine for different slot formats fp->samples_per_subframe_wCP = fp->ofdm_symbol_size * fp->symbols_per_slot * fp->slots_per_subframe; fp->samples_per_frame_wCP = 10 * fp->samples_per_subframe_wCP; + fp->samples_per_slot_wCP = fp->symbols_per_slot*fp->ofdm_symbol_size; + fp->samples_per_slot = fp->nb_prefix_samples0 + ((fp->symbols_per_slot-1)*fp->nb_prefix_samples) + (fp->symbols_per_slot*fp->ofdm_symbol_size); fp->samples_per_subframe = (fp->samples_per_subframe_wCP + (fp->nb_prefix_samples0 * fp->slots_per_subframe) + (fp->nb_prefix_samples * fp->slots_per_subframe * (fp->symbols_per_slot - 1))); fp->samples_per_frame = 10 * fp->samples_per_subframe; diff --git a/openair1/PHY/MODULATION/slot_fep_nr.c b/openair1/PHY/MODULATION/slot_fep_nr.c index f1f2a94b93..caf69b52fc 100644 --- a/openair1/PHY/MODULATION/slot_fep_nr.c +++ b/openair1/PHY/MODULATION/slot_fep_nr.c @@ -25,10 +25,15 @@ #include "PHY/LTE_ESTIMATION/lte_estimation.h" #include "PHY/NR_UE_ESTIMATION/nr_estimation.h" -//#define DEBUG_FEP +#define DEBUG_FEP #define SOFFSET 0 +#ifdef LOG_I +#undef LOG_I +#define LOG_I(A,B...) printf(A) +#endif + int nr_slot_fep(PHY_VARS_NR_UE *ue, unsigned char l, unsigned char Ns, @@ -49,8 +54,8 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, //int i; unsigned int frame_length_samples = frame_parms->samples_per_subframe * 10; unsigned int rx_offset; - //NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns>>1]][0]; - uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset+516; + NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns>>1]][0]; + uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset+((int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB)+pdcch_vars->coreset[0].rb_offset)*NR_NB_SC_PER_RB; uint16_t nb_rb_coreset = 24; uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset; uint16_t nb_rb_pdsch = 100; @@ -128,6 +133,12 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, // Align with 256 bit // rx_offset = rx_offset&0xfffffff8; +#ifdef DEBUG_FEP + // if (ue->frame <100) + /*LOG_I(PHY,*/printf("slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, subframe_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx,Ns, symbol, + nb_prefix_samples,nb_prefix_samples0,slot_offset,subframe_offset,sample_offset,rx_offset,frame_length_samples); +#endif + if (l==0) { if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size)) @@ -156,11 +167,6 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, rx_offset += (frame_parms->ofdm_symbol_size+nb_prefix_samples)*l;// + // (frame_parms->ofdm_symbol_size+nb_prefix_samples)*(l-1); -#ifdef DEBUG_FEP - // if (ue->frame <100) - LOG_I(PHY,"slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, subframe_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx,Ns, symbol, - nb_prefix_samples,nb_prefix_samples0,slot_offset,subframe_offset,sample_offset,rx_offset,frame_length_samples); -#endif if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size)) memcpy((void *)&common_vars->rxdata[aa][frame_length_samples], diff --git a/openair1/PHY/NR_REFSIG/nr_dmrs_rx.c b/openair1/PHY/NR_REFSIG/nr_dmrs_rx.c index 7472501316..62a366b698 100644 --- a/openair1/PHY/NR_REFSIG/nr_dmrs_rx.c +++ b/openair1/PHY/NR_REFSIG/nr_dmrs_rx.c @@ -20,17 +20,18 @@ */ /*! \file PHY/NR_REFSIG/nr_dl_dmrs.c -* \brief Top-level routines for generating DMRS from 38-211 -* \author -* \date 2018 -* \version 0.1 -* \company Eurecom -* \email: -* \note -* \warning -*/ + * \brief Top-level routines for generating DMRS from 38-211 + * \author + * \date 2018 + * \version 0.1 + * \company Eurecom + * \email: + * \note + * \warning + */ //#define DEBUG_DL_DMRS +#define DEBUG_PDCCH //#define NR_PBCH_DMRS_LENGTH_DWORD 5 //#define NR_PBCH_DMRS_LENGTH 144 @@ -44,6 +45,10 @@ //#include "nr_mod_table.h" #include "common/utils/LOG/log.h" +#ifdef LOG_I +#undef LOG_I +#define LOG_I(A,B...) printf(B) +#endif /*Table 7.4.1.1.2-1/2 from 38.211 */ int wf1[8][2] = {{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,1}}; int wt1[8][2] = {{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1}}; @@ -54,14 +59,14 @@ int wt2[12][2] = {{1,1},{1,1},{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1 short nr_rx_mod_table[NR_MOD_TABLE_SIZE_SHORT] = {0,0,23170,-23170,-23170,23170,23170,-23170,23170,23170,-23170,-23170,-23170,23170}; /*int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue, - uint8_t eNB_offset, - unsigned int Ns, - unsigned int nr_gold_pdcch[7][20][3][10], - int32_t *output, - unsigned short p, - int length_dmrs, - unsigned short nb_rb_coreset) -{ + uint8_t eNB_offset, + unsigned int Ns, + unsigned int nr_gold_pdcch[7][20][3][10], + int32_t *output, + unsigned short p, + int length_dmrs, + unsigned short nb_rb_coreset) + { int32_t qpsk[4],n; int w,ind,l,ind_dword,ind_qpsk_symb,kp,k; short pamp; @@ -78,32 +83,32 @@ short nr_rx_mod_table[NR_MOD_TABLE_SIZE_SHORT] = {0,0,23170,-23170,-23170,23170, ((short *)&qpsk[3])[1] = pamp; if (p==2000) { - for (n=0; n>4; - ind_qpsk_symb = ind&0xf; + ind = 3*n+kp; + ind_dword = ind>>4; + ind_qpsk_symb = ind&0xf; - output[k] = qpsk[(nr_gold_pdcch[eNB_offset][Ns][l][ind_dword]>>(2*ind_qpsk_symb))&3]; + output[k] = qpsk[(nr_gold_pdcch[eNB_offset][Ns][l][ind_dword]>>(2*ind_qpsk_symb))&3]; -#ifdef DEBUG_DL_DMRS - LOG_I(PHY,"Ns %d, p %d, ind_dword %d, ind_qpsk_symbol %d\n", - Ns,p,idx_dword,idx_qpsk_symb); - LOG_I(PHY,"index = %d\n",(nr_gold_pdsch[0][Ns][lprime][ind_dword]>>(2*ind_qpsk_symb))&3); -#endif + #ifdef DEBUG_DL_DMRS + LOG_I(PHY,"Ns %d, p %d, ind_dword %d, ind_qpsk_symbol %d\n", + Ns,p,idx_dword,idx_qpsk_symb); + LOG_I(PHY,"index = %d\n",(nr_gold_pdsch[0][Ns][lprime][ind_dword]>>(2*ind_qpsk_symb))&3); + #endif - k++; - } - } - } + k++; + } + } + } } else { - LOG_E(PHY,"Illegal PDCCH DMRS port %d\n",p); + LOG_E(PHY,"Illegal PDCCH DMRS port %d\n",p); } return(0); -}*/ + }*/ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue, uint8_t eNB_offset, @@ -152,34 +157,34 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue, wt = (config_type==0) ? wt1 : wt2; if (config_type > 1) - LOG_E(PHY,"Bad PDSCH DMRS config type %d\n", config_type); + LOG_E(PHY,"Bad PDSCH DMRS config type %d\n", config_type); if ((p>=1000) && (p<((config_type==0) ? 1008 : 1012))) { - // r_n from 38.211 7.4.1.1 - for (n=0; n>4; - ind_qpsk_symb = ind&0xf; + ind = 2*n+kp; + ind_dword = ind>>4; + ind_qpsk_symb = ind&0xf; - output[k] = qpsk_p[(nr_gold_pdsch[0][Ns][lp][ind_dword]>>(2*ind_qpsk_symb))&3]; + output[k] = qpsk_p[(nr_gold_pdsch[0][Ns][lp][ind_dword]>>(2*ind_qpsk_symb))&3]; #ifdef DEBUG_DL_DMRS LOG_I(PHY,"Ns %d, p %d, ind_dword %d, ind_qpsk_symbol %d\n", - Ns,p,idx_dword,idx_qpsk_symb); - LOG_I(PHY,"index = %d\n",(nr_gold_pdsch[0][Ns][lprime][ind_dword]>>(2*ind_qpsk_symb))&3); + Ns,p,ind_dword,ind_qpsk_symb); + LOG_I(PHY,"index = %d\n",(nr_gold_pdsch[0][Ns][lp][ind_dword]>>(2*ind_qpsk_symb))&3); #endif - k++; - } - } - } + k++; + } + } + } } else { LOG_E(PHY,"Illegal p %d PDSCH DMRS port\n",p); } @@ -188,32 +193,32 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue, } int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue, - uint8_t eNB_offset, - unsigned int Ns, - unsigned int *nr_gold_pdcch, - int32_t *output, - unsigned short p, - unsigned short nb_rb_coreset) + uint8_t eNB_offset, + unsigned int Ns, + unsigned int *nr_gold_pdcch, + int32_t *output, + unsigned short p, + unsigned short nb_rb_coreset) { - uint8_t idx=0; - //uint8_t pdcch_rb_offset =0; - //nr_gold_pdcch += ((int)floor(ue->frame_parms.ssb_start_subcarrier/12)+pdcch_rb_offset)*3/32; + uint8_t idx=0; + //uint8_t pdcch_rb_offset =0; + //nr_gold_pdcch += ((int)floor(ue->frame_parms.ssb_start_subcarrier/12)+pdcch_rb_offset)*3/32; - if (p==2000) { - for (int i=0; i<((nb_rb_coreset*6)>>1); i++) { - idx = ((((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1); - ((int16_t*)output)[i<<1] = nr_rx_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1]; - ((int16_t*)output)[(i<<1)+1] = nr_rx_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1]; + if (p==2000) { + for (int i=0; i<((nb_rb_coreset*6)>>1); i++) { + idx = ((((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1); + ((int16_t*)output)[i<<1] = nr_rx_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1]; + ((int16_t*)output)[(i<<1)+1] = nr_rx_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1]; #ifdef DEBUG_PDCCH if (i<8) - printf("i %d idx %d pdcch gold %u b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, nr_gold_pdcch[(i<<1)>>5], (((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1), - (((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), ((int16_t*)output)[i<<1], ((int16_t*)output)[(i<<1)+1],&output[0]); + printf("i %d idx %d pdcch gold %u b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, nr_gold_pdcch[(i<<1)>>5], (((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1), + (((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), ((int16_t*)output)[i<<1], ((int16_t*)output)[(i<<1)+1],&output[0]); #endif - } - } + } + } - return(0); + return(0); } int nr_pbch_dmrs_rx(int symbol,unsigned int *nr_gold_pbch,int32_t *output ) diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c index 3014156898..90b1827eec 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c @@ -37,6 +37,7 @@ #define DEBUG_CHANNEL_CODING #define PDCCH_TEST_POLAR_TEMP_FIX + extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT]; uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format, @@ -185,10 +186,12 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars, * in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset * in time: by its first slot and its first symbol*/ uint16_t cset_start_sc = frame_parms.first_carrier_offset + ((int)floor(frame_parms.ssb_start_subcarrier/NR_NB_SC_PER_RB)+pdcch_params.rb_offset)*NR_NB_SC_PER_RB; - uint8_t cset_start_symb = pdcch_params.first_slot*frame_parms.symbols_per_slot + pdcch_params.first_symbol; + // uint8_t cset_start_symb = pdcch_params.first_slot*frame_parms.symbols_per_slot + pdcch_params.first_symbol; + uint8_t cset_start_symb = pdcch_params.first_symbol; uint8_t cset_nsymb = pdcch_params.n_symb; dci_idx = 0; + /// DMRS QPSK modulation /*There is a need to shift from which index the pregenerated DMRS sequence is used * see 38211 r15.2.0 section 7.4.1.3.2: assumption is the reference point for k refers to the DMRS sequence*/ @@ -278,12 +281,12 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0 } } #ifdef DEBUG_DCI -printf("\n Ordered REG list:\n"); -for (int i=0; i> 15; ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15; +#ifdef DEBUG_PDCCH_DMRS + printf("symbol %d position %d => (%d,%d)\n",l,k,((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] , ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]); +#endif k+=4; if (k >= frame_parms.ofdm_symbol_size) k -= frame_parms.ofdm_symbol_size; @@ -315,6 +321,9 @@ printf("\n"); if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_SAME_AS_REG_BUNDLE) { ((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dmrs[l][dmrs_idx<<1]) >> 15; ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15; +#ifdef DEBUG_PDCCH_DMRS + printf("l %d position %d => (%d,%d)\n",l,k,((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] , ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]); +#endif k_prime++; dmrs_idx++; } diff --git a/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c b/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c index ce4f8d4d01..c95d6aba1b 100644 --- a/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c +++ b/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c @@ -28,7 +28,7 @@ #include "PHY/NR_REFSIG/refsig_defs_ue.h" #include "filt16a_32.h" #include "T.h" -//#define DEBUG_CH +#define DEBUG_CH int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue, @@ -295,7 +295,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, fm = filt16a_m1; fr = filt16a_r1; - // generate pilot + // generate pilot nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[0],2000,nb_rb_coreset); for (aarx=0; aarxframe_parms.nb_antennas_rx; aarx++) { @@ -315,7 +315,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, printf("rxF addr %p\n", rxF); printf("dl_ch addr %p\n",dl_ch); //#endif - if ((ue->frame_parms.N_RB_DL&1)==0) { + // if ((ue->frame_parms.N_RB_DL&1)==0) { // Treat first 2 pilots specially (left edge) ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15); @@ -421,7 +421,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, } - } + //} } diff --git a/openair1/PHY/defs_gNB.h b/openair1/PHY/defs_gNB.h index 3df696ee29..bd6c1643fd 100644 --- a/openair1/PHY/defs_gNB.h +++ b/openair1/PHY/defs_gNB.h @@ -83,16 +83,16 @@ typedef struct { } NR_gNB_COMMON; -/// Context data structure for RX/TX portion of subframe processing +/// Context data structure for RX/TX portion of slot processing typedef struct { /// Component Carrier index uint8_t CC_id; /// timestamp transmitted to HW openair0_timestamp timestamp_tx; - /// subframe to act upon for transmission - int subframe_tx; - /// subframe to act upon for reception - int subframe_rx; + /// slot to act upon for transmission + int slot_tx; + /// slot to act upon for reception + int slot_rx; /// frame to act upon for transmission int frame_tx; /// frame to act upon for reception @@ -120,7 +120,7 @@ typedef struct { } gNB_L1_rxtx_proc_t; -/// Context data structure for eNB subframe processing +/// Context data structure for eNB slot processing typedef struct gNB_L1_proc_t_s { /// Component Carrier index uint8_t CC_id; @@ -130,10 +130,10 @@ typedef struct gNB_L1_proc_t_s { openair0_timestamp timestamp_rx; /// timestamp to send to "slave rru" openair0_timestamp timestamp_tx; - /// subframe to act upon for reception - int subframe_rx; - /// subframe to act upon for PRACH - int subframe_prach; + /// slot to act upon for reception + int slot_rx; + /// slot to act upon for PRACH + int slot_prach; /// frame to act upon for reception int frame_rx; /// frame to act upon for transmission @@ -391,7 +391,7 @@ typedef struct PHY_VARS_gNB_s { /// cba_last successful reception for each group, used for collision detection uint8_t cba_last_reception[4]; - // Pointers for active physicalConfigDedicated to be applied in current subframe + // Pointers for active physicalConfigDedicated to be applied in current slot struct PhysicalConfigDedicated *physicalConfigDedicated[NUMBER_OF_UE_MAX]; diff --git a/openair1/PHY/defs_nr_common.h b/openair1/PHY/defs_nr_common.h index cc07173473..596268206d 100644 --- a/openair1/PHY/defs_nr_common.h +++ b/openair1/PHY/defs_nr_common.h @@ -40,6 +40,7 @@ #include "PHY/CODING/nrPolar_tools/nr_polar_defs.h" #define nr_subframe_t lte_subframe_t +#define nr_slot_t lte_subframe_t #define MAX_NUM_SUBCARRIER_SPACING 5 @@ -209,12 +210,16 @@ typedef struct NR_DL_FRAME_PARMS { uint16_t slots_per_frame; /// Number of samples in a subframe uint32_t samples_per_subframe; + /// Number of samples in a slot + uint32_t samples_per_slot; /// Number of OFDM/SC-FDMA symbols in one subframe (to be modified to account for potential different in UL/DL) uint16_t symbols_per_tti; /// Number of samples in a radio frame uint32_t samples_per_frame; /// Number of samples in a subframe without CP uint32_t samples_per_subframe_wCP; + /// Number of samples in a slot without CP + uint32_t samples_per_slot_wCP; /// Number of samples in a radio frame without CP uint32_t samples_per_frame_wCP; /// Number of samples in a tti (same as subrame in LTE, depending on numerology in NR) diff --git a/openair1/SCHED_NR/fapi_nr_l1.c b/openair1/SCHED_NR/fapi_nr_l1.c index 07790e1055..bcb36a5b9f 100644 --- a/openair1/SCHED_NR/fapi_nr_l1.c +++ b/openair1/SCHED_NR/fapi_nr_l1.c @@ -55,19 +55,19 @@ void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB, void handle_nfapi_nr_dci_dl_pdu(PHY_VARS_gNB *gNB, - int frame, int subframe, + int frame, int slot, gNB_L1_rxtx_proc_t *proc, nfapi_nr_dl_config_request_pdu_t *dl_config_pdu) { - int idx = subframe&1; + int idx = slot&1; NR_gNB_PDCCH *pdcch_vars = &gNB->pdcch_vars; - LOG_D(PHY,"Frame %d, Subframe %d: DCI processing - populating pdcch_vars->dci_alloc[%d] proc:subframe_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,subframe, pdcch_vars->num_dci, proc->subframe_tx, idx, pdcch_vars->num_dci); + LOG_D(PHY,"Frame %d, Slot %d: DCI processing - populating pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,slot, pdcch_vars->num_dci, proc->slot_tx, idx, pdcch_vars->num_dci); // copy dci configuration into gNB structure - nr_fill_dci_and_dlsch(gNB,frame,subframe,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],dl_config_pdu); + nr_fill_dci_and_dlsch(gNB,frame,slot,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],dl_config_pdu); - LOG_D(PHY,"Frame %d, Subframe %d: DCI processing - populated pdcch_vars->dci_alloc[%d] proc:subframe_tx:%d idx:%d pdcch_vars->num_dci:%d\n",proc->frame_tx,proc->subframe_tx, pdcch_vars->num_dci, proc->subframe_tx, idx, pdcch_vars->num_dci); + LOG_D(PHY,"Frame %d, Slot %d: DCI processing - populated pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",proc->frame_tx,proc->slot_tx, pdcch_vars->num_dci, proc->slot_tx, idx, pdcch_vars->num_dci); } @@ -80,7 +80,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){ nfapi_nr_dl_config_request_t *DL_req = Sched_INFO->DL_req; nfapi_tx_request_t *TX_req = Sched_INFO->TX_req; frame_t frame = Sched_INFO->frame; - sub_frame_t subframe = Sched_INFO->subframe; + sub_frame_t slot = Sched_INFO->slot; AssertFatal(RC.gNB!=NULL,"RC.gNB is null\n"); AssertFatal(RC.gNB[Mod_id]!=NULL,"RC.gNB[%d] is null\n",Mod_id); @@ -96,7 +96,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){ int i; LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SF:%04d%d DL_req:SFN/SF:%04d%d:dl_pdu:%d tx_req:SFN/SF:%04d%d:pdus:%d \n", - frame,subframe, + frame,slot, NFAPI_SFNSF2SFN(DL_req->sfn_sf),NFAPI_SFNSF2SF(DL_req->sfn_sf),number_dl_pdu, NFAPI_SFNSF2SFN(TX_req->sfn_sf),NFAPI_SFNSF2SF(TX_req->sfn_sf),TX_req->tx_request_body.number_of_pdus); @@ -124,7 +124,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){ case NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE: handle_nfapi_nr_dci_dl_pdu(gNB, - frame, subframe, + frame, slot, proc, dl_config_pdu); gNB->pdcch_vars.num_dci++; diff --git a/openair1/SCHED_NR/phy_procedures_nr_common.c b/openair1/SCHED_NR/phy_procedures_nr_common.c index 8d3341978a..e127e64e3e 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_common.c +++ b/openair1/SCHED_NR/phy_procedures_nr_common.c @@ -36,7 +36,7 @@ -nr_subframe_t nr_subframe_select(nfapi_nr_config_request_t *cfg,unsigned char subframe) +nr_subframe_t nr_slot_select(nfapi_nr_config_request_t *cfg,unsigned char slot) { if (cfg->subframe_config.duplex_mode.value == FDD) return(SF_DL); diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c index 93ff336687..5e85101dc7 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c +++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c @@ -116,32 +116,32 @@ void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PAR LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier,start_rb,cfg->sch_config.ssb_subcarrier_offset.value); } -void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe) { +void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) { NR_DL_FRAME_PARMS *fp=&gNB->frame_parms; nfapi_nr_config_request_t *cfg = &gNB->gNB_config; int **txdataF = gNB->common_vars.txdataF; uint8_t *pbch_pdu=&gNB->pbch_pdu[0]; - int ss_subframe = (cfg->sch_config.half_frame_index.value)? 5 : 0; + int ss_slot = (cfg->sch_config.half_frame_index.value)? 10 : 0; uint8_t Lmax, ssb_index=0, n_hf=0; - LOG_D(PHY,"common_signal_procedures: frame %d, subframe %d\n",frame,subframe); + LOG_D(PHY,"common_signal_procedures: frame %d, slot %d\n",frame,slot); int ssb_start_symbol = nr_get_ssb_start_symbol(cfg, fp); nr_set_ssb_first_subcarrier(cfg, fp); Lmax = (fp->dl_CarrierFreq < 3e9)? 4:8; - if (subframe == ss_subframe) + if (slot == ss_slot) { // Current implementation is based on SSB in first half frame, first candidate - LOG_D(PHY,"SS TX: frame %d, subframe %d, start_symbol %d\n",frame,subframe, ssb_start_symbol); + LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol); nr_generate_pss(gNB->d_pss, txdataF, AMP, ssb_start_symbol, cfg, fp); nr_generate_sss(gNB->d_sss, txdataF, AMP_OVER_2, ssb_start_symbol, cfg, fp); if (!(frame&7)){ - LOG_D(PHY,"%d.%d : pbch_configured %d\n",frame,subframe,gNB->pbch_configured); + LOG_D(PHY,"%d.%d : pbch_configured %d\n",frame,slot,gNB->pbch_configured); if (gNB->pbch_configured != 1)return; gNB->pbch_configured = 0; } @@ -160,12 +160,12 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe) { } void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, - gNB_L1_rxtx_proc_t *proc, - int do_meas) + gNB_L1_rxtx_proc_t *proc, + int do_meas) { int aa; int frame=proc->frame_tx; - int subframe=proc->subframe_tx; + int slot=proc->slot_tx; uint8_t num_dci=0; NR_DL_FRAME_PARMS *fp=&gNB->frame_parms; @@ -173,33 +173,32 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, int offset = gNB->CC_id; - if ((cfg->subframe_config.duplex_mode.value == TDD) && (nr_subframe_select(cfg,subframe)==SF_UL)) return; + if ((cfg->subframe_config.duplex_mode.value == TDD) && (nr_slot_select(cfg,slot)==SF_UL)) return; VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,1); if (do_meas==1) start_meas(&gNB->phy_proc_tx); // clear the transmit data array for the current subframe for (aa=0; aarf_config.tx_antenna_ports.value; aa++) { - memset(gNB->common_vars.txdataF[aa],0,fp->samples_per_subframe_wCP*sizeof(int32_t)); + memset(gNB->common_vars.txdataF[aa],0,fp->samples_per_slot_wCP*sizeof(int32_t)); } if (nfapi_mode == 0 || nfapi_mode == 1) { - nr_common_signal_procedures(gNB,frame, subframe); + nr_common_signal_procedures(gNB,frame, slot); //if (frame == 9) //write_output("txdataF.m","txdataF",gNB->common_vars.txdataF[aa],fp->samples_per_frame_wCP, 1, 1); } num_dci = gNB->pdcch_vars.num_dci; if (num_dci) { - LOG_I(PHY, "[gNB %d] Frame %d subframe %d \ - Calling nr_generate_dci_top (number of DCI %d)\n", gNB->Mod_id, frame, subframe, num_dci); + LOG_I(PHY, "[gNB %d] Frame %d slot %d \ + Calling nr_generate_dci_top (number of DCI %d)\n", gNB->Mod_id, frame, slot, num_dci); - uint8_t slot_idx = gNB->pdcch_vars.dci_alloc[0].pdcch_params.first_slot; if (nfapi_mode == 0 || nfapi_mode == 1) nr_generate_dci_top(gNB->pdcch_vars, &gNB->nrPolar_params, - gNB->nr_gold_pdcch_dmrs[slot_idx], + gNB->nr_gold_pdcch_dmrs[slot], gNB->common_vars.txdataF, AMP, *fp, *cfg); } diff --git a/openair1/SCHED_NR/sched_nr.h b/openair1/SCHED_NR/sched_nr.h index 17354d4fb3..b988b6d3b9 100644 --- a/openair1/SCHED_NR/sched_nr.h +++ b/openair1/SCHED_NR/sched_nr.h @@ -34,22 +34,22 @@ #include "PHY/NR_TRANSPORT/nr_dci.h" -lte_subframe_t nr_subframe_select (nfapi_nr_config_request_t *cfg, unsigned char subframe); +nr_slot_t nr_slot_select (nfapi_nr_config_request_t *cfg, unsigned char slot); void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp); void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, gNB_L1_rxtx_proc_t *proc, int do_meas); -void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe); +void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot); void nr_init_feptx_thread(RU_t *ru,pthread_attr_t *attr_feptx); void nr_feptx_ofdm(RU_t *ru); void nr_feptx_ofdm_2thread(RU_t *ru); void nr_feptx0(RU_t *ru,int slot); -void nr_configure_css_dci_from_mib(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params, - nr_scs_e scs_common, - nr_scs_e pdcch_scs, - nr_frequency_range_e freq_range, - uint8_t rmsi_pdcch_config, - uint8_t ssb_idx, - uint16_t nb_slots_per_frame, - uint16_t N_RB); +void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params, + nr_scs_e scs_common, + nr_scs_e pdcch_scs, + nr_frequency_range_e freq_range, + uint8_t rmsi_pdcch_config, + uint8_t ssb_idx, + uint16_t nb_slots_per_frame, + uint16_t N_RB); #endif diff --git a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c index 69f744a50c..a27af95632 100644 --- a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c +++ b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c @@ -42,212 +42,213 @@ extern PHY_VARS_NR_UE ***PHY_vars_UE_g; int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ - /// module id - module_id_t module_id = scheduled_response->module_id; - /// component carrier id - uint8_t cc_id = scheduled_response->CC_id; - uint32_t i; + /// module id + module_id_t module_id = scheduled_response->module_id; + /// component carrier id + uint8_t cc_id = scheduled_response->CC_id; + uint32_t i; - if(scheduled_response != NULL){ - NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[0][0]; - NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[0][0]; - NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[0]; - NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms; - PRACH_RESOURCES_t *prach_resources = PHY_vars_UE_g[module_id][cc_id]->prach_resources[0]; + if(scheduled_response != NULL){ + // Note: we have to handle the thread IDs for this. To be revisited completely. + NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[0][0]; + NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[0][0]; + NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[0]; + NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms; + PRACH_RESOURCES_t *prach_resources = PHY_vars_UE_g[module_id][cc_id]->prach_resources[0]; -// PUCCH_ConfigCommon_nr_t *pucch_config_common = PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0]; -// PUCCH_Config_t *pucch_config_dedicated = PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0]; + // PUCCH_ConfigCommon_nr_t *pucch_config_common = PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0]; + // PUCCH_Config_t *pucch_config_dedicated = PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0]; - if(scheduled_response->dl_config != NULL){ - fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config; + if(scheduled_response->dl_config != NULL){ + fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config; - for(i=0; inumber_pdus; ++i){ - if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){ - pdcch_vars2->nb_search_space = pdcch_vars2->nb_search_space + 1; - fapi_nr_dl_config_dci_dl_pdu_rel15_t *dci_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15; + for(i=0; inumber_pdus; ++i){ + if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){ + pdcch_vars2->nb_search_space = pdcch_vars2->nb_search_space + 1; + fapi_nr_dl_config_dci_dl_pdu_rel15_t *dci_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15; - pdcch_vars2->n_RB_BWP[i] = dci_config->N_RB_BWP; - pdcch_vars2->searchSpace[i].monitoringSymbolWithinSlot = dci_config->monitoring_symbols_within_slot; + pdcch_vars2->n_RB_BWP[i] = dci_config->N_RB_BWP; + pdcch_vars2->searchSpace[i].monitoringSymbolWithinSlot = dci_config->monitoring_symbols_within_slot; - pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel1 = dci_config->number_of_candidates[0]; - pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel2 = dci_config->number_of_candidates[1]; - pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel4 = dci_config->number_of_candidates[2]; - pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel8 = dci_config->number_of_candidates[3]; - pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel16 = dci_config->number_of_candidates[4]; + pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel1 = dci_config->number_of_candidates[0]; + pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel2 = dci_config->number_of_candidates[1]; + pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel4 = dci_config->number_of_candidates[2]; + pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel8 = dci_config->number_of_candidates[3]; + pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel16 = dci_config->number_of_candidates[4]; - pdcch_vars2->coreset[i].duration = dci_config->coreset.duration; + pdcch_vars2->coreset[i].duration = dci_config->coreset.duration; - pdcch_vars2->coreset[i].frequencyDomainResources = dci_config->coreset.frequency_domain_resource; - pdcch_vars2->coreset[i].rb_offset = dci_config->coreset.rb_offset; + pdcch_vars2->coreset[i].frequencyDomainResources = dci_config->coreset.frequency_domain_resource; + pdcch_vars2->coreset[i].rb_offset = dci_config->coreset.rb_offset; - if(dci_config->coreset.cce_reg_mapping_type == CCE_REG_MAPPING_TYPE_INTERLEAVED){ - pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = dci_config->coreset.cce_reg_interleaved_shift_index; - pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = dci_config->coreset.cce_reg_interleaved_reg_bundle_size; - pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = dci_config->coreset.cce_reg_interleaved_interleaver_size; - }else{ //CCE_REG_MAPPING_TYPE_NON_INTERLEAVED - pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = 0; - pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = 0; - pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = 0; - } + if(dci_config->coreset.cce_reg_mapping_type == CCE_REG_MAPPING_TYPE_INTERLEAVED){ + pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = dci_config->coreset.cce_reg_interleaved_shift_index; + pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = dci_config->coreset.cce_reg_interleaved_reg_bundle_size; + pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = dci_config->coreset.cce_reg_interleaved_interleaver_size; + }else{ //CCE_REG_MAPPING_TYPE_NON_INTERLEAVED + pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = 0; + pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = 0; + pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = 0; + } - pdcch_vars2->coreset[i].precoderGranularity = dci_config->coreset.precoder_granularity; - //pdcch_vars2->coreset[i].tciStatesPDCCH; - //pdcch_vars2->coreset[i].tciPresentInDCI; - pdcch_vars2->coreset[i].pdcchDMRSScramblingID = dci_config->coreset.pdcch_dmrs_scrambling_id; + pdcch_vars2->coreset[i].precoderGranularity = dci_config->coreset.precoder_granularity; + //pdcch_vars2->coreset[i].tciStatesPDCCH; + //pdcch_vars2->coreset[i].tciPresentInDCI; + pdcch_vars2->coreset[i].pdcchDMRSScramblingID = dci_config->coreset.pdcch_dmrs_scrambling_id; - }else{ //FAPI_NR_DL_CONFIG_TYPE_DLSCH - // dlsch config pdu + }else{ //FAPI_NR_DL_CONFIG_TYPE_DLSCH + // dlsch config pdu - fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15; - uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr; - dlsch0->current_harq_pid = current_harq_pid; - dlsch0->active = 1; + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15; + uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr; + dlsch0->current_harq_pid = current_harq_pid; + dlsch0->active = 1; - //dlsch0->harq_processes[0]->mcs = &dlsch_config_pdu->mcs; + //dlsch0->harq_processes[0]->mcs = &dlsch_config_pdu->mcs; - NR_DL_UE_HARQ_t dlsch0_harq = dlsch0->harq_processes[current_harq_pid]; + NR_DL_UE_HARQ_t dlsch0_harq = dlsch0->harq_processes[current_harq_pid]; - //dlsch0->harq_processes[current_harq_pid]->nb_rb = dlsch_config_pdu->number_rbs; + //dlsch0->harq_processes[current_harq_pid]->nb_rb = dlsch_config_pdu->number_rbs; - dlsch0_harq.nb_rb = dlsch_config_pdu->number_rbs; - dlsch0_harq.start_rb = dlsch_config_pdu->start_rb; - dlsch0_harq.nb_symbols = dlsch_config_pdu->number_symbols; - dlsch0_harq.start_symbol = dlsch_config_pdu->start_symbol; - dlsch0_harq.mcs = dlsch_config_pdu->mcs; - dlsch0_harq.DCINdi = dlsch_config_pdu->ndi; - dlsch0_harq.rvidx = dlsch_config_pdu->rv; - dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH; - dlsch0_harq.harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id; - dlsch0_harq.harq_ack.slot_for_feedback_ack = dlsch_config_pdu->pdsch_to_harq_feedback_time_ind; - printf(">>>> \tdlsch0->g_pucch=%d\tdlsch0_harq.mcs=%d\n",dlsch0->g_pucch,dlsch0_harq.mcs); - //for (int j = 0 ; j<1000; j++) printf("\nk = %d",j); + dlsch0_harq.nb_rb = dlsch_config_pdu->number_rbs; + dlsch0_harq.start_rb = dlsch_config_pdu->start_rb; + dlsch0_harq.nb_symbols = dlsch_config_pdu->number_symbols; + dlsch0_harq.start_symbol = dlsch_config_pdu->start_symbol; + dlsch0_harq.mcs = dlsch_config_pdu->mcs; + dlsch0_harq.DCINdi = dlsch_config_pdu->ndi; + dlsch0_harq.rvidx = dlsch_config_pdu->rv; + dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH; + dlsch0_harq.harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id; + dlsch0_harq.harq_ack.slot_for_feedback_ack = dlsch_config_pdu->pdsch_to_harq_feedback_time_ind; + printf(">>>> \tdlsch0->g_pucch=%d\tdlsch0_harq.mcs=%d\n",dlsch0->g_pucch,dlsch0_harq.mcs); + //for (int j = 0 ; j<1000; j++) printf("\nk = %d",j); - #if 0 - dlsch0->harq_processes[current_harq_pid]->mcs = dlsch_config_pdu->mcs; - dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH; - //pdlsch0->rnti = rnti; - #endif - } - } - }else{ - pdcch_vars2->nb_search_space = 0; - } - - if(scheduled_response->ul_config != NULL){ - fapi_nr_ul_config_request_t *ul_config = scheduled_response->ul_config; - for(i=0; inumber_pdus; ++i){ - if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH){ - // pusch config pdu - fapi_nr_ul_config_pusch_pdu_rel15_t *pusch_config_pdu = &ul_config->ul_config_list[i].ulsch_config_pdu.ulsch_pdu_rel15; - uint8_t current_harq_pid = pusch_config_pdu->harq_process_nbr; - ulsch0->harq_processes[current_harq_pid]->nb_rb = pusch_config_pdu->number_rbs; - ulsch0->harq_processes[current_harq_pid]->first_rb = pusch_config_pdu->start_rb; - ulsch0->harq_processes[current_harq_pid]->nb_symbols = pusch_config_pdu->number_symbols; - ulsch0->harq_processes[current_harq_pid]->start_symbol = pusch_config_pdu->start_symbol; - ulsch0->harq_processes[current_harq_pid]->mcs = pusch_config_pdu->mcs; - ulsch0->harq_processes[current_harq_pid]->DCINdi = pusch_config_pdu->ndi; - ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv; - ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH; - } - if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUCCH){ - // pucch config pdu - fapi_nr_ul_config_pucch_pdu *pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu; - uint8_t pucch_resource_id = 0; //FIXME!!! - uint8_t format = 1; // FIXME!!! - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].hoppingId = pucch_config_pdu->hoppingId; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].p0_nominal = pucch_config_pdu->p0_nominal; -/* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used - pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used - pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK; - pucch_config_common->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping; - pucch_config_common->hoppingId = pucch_config_pdu->hoppingId; - pucch_config_common->p0_nominal = pucch_config_pdu->p0_nominal;*/ - } - if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PRACH){ - // prach config pdu - fapi_nr_ul_config_prach_pdu *prach_config_pdu = &ul_config->ul_config_list[i].prach_config_pdu; - frame_parms.prach_config_common.rootSequenceIndex = prach_config_pdu->root_sequence_index; - frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex = prach_config_pdu->prach_configuration_index; - frame_parms.prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = prach_config_pdu->zero_correlation_zone_config; - frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag = prach_config_pdu->restrictedset_config; - frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset = prach_config_pdu->prach_freq_offset; - prach_resources->ra_PreambleIndex = prach_config_pdu->preamble_index; - } - } - }else{ - - } - - if(scheduled_response->tx_request != NULL){ - - }else{ - - } +#if 0 + dlsch0->harq_processes[current_harq_pid]->mcs = dlsch_config_pdu->mcs; + dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH; + //pdlsch0->rnti = rnti; +#endif + } + } + }else{ + pdcch_vars2->nb_search_space = 0; } - return 0; + if(scheduled_response->ul_config != NULL){ + fapi_nr_ul_config_request_t *ul_config = scheduled_response->ul_config; + for(i=0; inumber_pdus; ++i){ + if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH){ + // pusch config pdu + fapi_nr_ul_config_pusch_pdu_rel15_t *pusch_config_pdu = &ul_config->ul_config_list[i].ulsch_config_pdu.ulsch_pdu_rel15; + uint8_t current_harq_pid = pusch_config_pdu->harq_process_nbr; + ulsch0->harq_processes[current_harq_pid]->nb_rb = pusch_config_pdu->number_rbs; + ulsch0->harq_processes[current_harq_pid]->first_rb = pusch_config_pdu->start_rb; + ulsch0->harq_processes[current_harq_pid]->nb_symbols = pusch_config_pdu->number_symbols; + ulsch0->harq_processes[current_harq_pid]->start_symbol = pusch_config_pdu->start_symbol; + ulsch0->harq_processes[current_harq_pid]->mcs = pusch_config_pdu->mcs; + ulsch0->harq_processes[current_harq_pid]->DCINdi = pusch_config_pdu->ndi; + ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv; + ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH; + } + if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUCCH){ + // pucch config pdu + fapi_nr_ul_config_pucch_pdu *pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu; + uint8_t pucch_resource_id = 0; //FIXME!!! + uint8_t format = 1; // FIXME!!! + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].hoppingId = pucch_config_pdu->hoppingId; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].p0_nominal = pucch_config_pdu->p0_nominal; + /* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used + pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used + pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK; + pucch_config_common->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping; + pucch_config_common->hoppingId = pucch_config_pdu->hoppingId; + pucch_config_common->p0_nominal = pucch_config_pdu->p0_nominal;*/ + } + if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PRACH){ + // prach config pdu + fapi_nr_ul_config_prach_pdu *prach_config_pdu = &ul_config->ul_config_list[i].prach_config_pdu; + frame_parms.prach_config_common.rootSequenceIndex = prach_config_pdu->root_sequence_index; + frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex = prach_config_pdu->prach_configuration_index; + frame_parms.prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = prach_config_pdu->zero_correlation_zone_config; + frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag = prach_config_pdu->restrictedset_config; + frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset = prach_config_pdu->prach_freq_offset; + prach_resources->ra_PreambleIndex = prach_config_pdu->preamble_index; + } + } + }else{ + + } + + if(scheduled_response->tx_request != NULL){ + + }else{ + + } + } + + return 0; } int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){ - if(phy_config != NULL){ - if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){ - printf("[L1][IF module][PHY CONFIG]\n"); - printf("subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common); - printf("ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset); - printf("dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position); - printf("pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1); - printf("cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred); - printf("intra frequency reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection); - printf("system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number); - printf("ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index); - printf("half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit); - printf("-------------------------------\n"); + if(phy_config != NULL){ + if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){ + printf("[L1][IF module][PHY CONFIG]\n"); + printf("subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common); + printf("ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset); + printf("dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position); + printf("pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1); + printf("cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred); + printf("intra frequency reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection); + printf("system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number); + printf("ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index); + printf("half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit); + printf("-------------------------------\n"); - PHY_vars_UE_g[0][0]->proc.proc_rxtx[0].frame_rx = phy_config->config_req.pbch_config.system_frame_number; - } - - if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){ - - } - - if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON){ - - } - - if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED){ - - } - - if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED){ - - } + PHY_vars_UE_g[0][0]->proc.proc_rxtx[0].frame_rx = phy_config->config_req.pbch_config.system_frame_number; } + + if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){ + + } + + if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON){ + + } + + if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED){ + + } + + if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED){ + + } + } - return 0; + return 0; } diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index 7b0267818a..e372d10147 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -150,7 +150,7 @@ int main(int argc, char **argv) unsigned char frame_type = 0; unsigned char pbch_phase = 0; - int frame=0,subframe=1; + int frame=0,slot=1; int frame_length_complex_samples; int frame_length_complex_samples_no_prefix; NR_DL_FRAME_PARMS *frame_parms; @@ -484,6 +484,7 @@ int main(int argc, char **argv) } nr_gold_pbch(UE); + nr_gold_pdcch(UE,0,2); RC.nb_nr_macrlc_inst = 1; mac_top_init_gNB(); @@ -509,11 +510,11 @@ int main(int argc, char **argv) gNB->pbch_configured = 1; for (int i=0;i<4;i++) gNB->pbch_pdu[i]=i+1; - nr_schedule_css_dlsch_phytest(0,frame,subframe); + nr_schedule_css_dlsch_phytest(0,frame,slot); Sched_INFO.module_id = 0; Sched_INFO.CC_id = 0; Sched_INFO.frame = frame; - Sched_INFO.subframe = subframe; + Sched_INFO.slot = slot; Sched_INFO.DL_req = &gNB_mac->DL_req[0]; Sched_INFO.UL_req = NULL; Sched_INFO.HI_DCI0_req = NULL; @@ -521,7 +522,7 @@ int main(int argc, char **argv) nr_schedule_response(&Sched_INFO); gNB_proc.frame_tx = frame; - gNB_proc.subframe_tx = subframe; + gNB_proc.slot_tx = slot; phy_procedures_gNB_TX(gNB,&gNB_proc,0); //nr_common_signal_procedures (gNB,frame,subframe); @@ -660,12 +661,14 @@ int main(int argc, char **argv) UE->rx_offset=0; UE_proc.frame_rx = frame; - UE_proc.nr_tti_rx= subframe; - UE_proc.subframe_rx = subframe; + UE_proc.nr_tti_rx= slot; + UE_proc.subframe_rx = slot; UE_mac->scheduled_response.dl_config = &dl_config; nr_ue_scheduled_response(&UE_mac->scheduled_response); + printf("Running phy procedures UE RX %d.%d\n",frame,slot); + phy_procedures_nrUE_RX(UE, &UE_proc, 0, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 3acefdd00c..f1546a907f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -72,7 +72,8 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, scs, scs, nr_FR1, 0, 0, slots_per_frame, dl_carrier_bandwidth); - + params_rel15->first_slot = 0; + pdu_rel15->frequency_domain_assignment = 5; pdu_rel15->time_domain_assignment = 2; pdu_rel15->vrb_to_prb_mapping = 0; diff --git a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c index 05adde0fe4..881a7832e3 100644 --- a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c @@ -59,7 +59,7 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) { AssertFatal(UL_info->rach_ind.rach_indication_body.number_of_preambles==1,"More than 1 preamble not supported\n"); UL_info->rach_ind.rach_indication_body.number_of_preambles=0; - LOG_D(MAC,"UL_info[Frame %d, Subframe %d] Calling initiate_ra_proc RACH:SFN/SF:%d\n",UL_info->frame,UL_info->subframe, NFAPI_SFNSF2DEC(UL_info->rach_ind.sfn_sf)); + LOG_D(MAC,"UL_info[Frame %d, Slot %d] Calling initiate_ra_proc RACH:SFN/SF:%d\n",UL_info->frame,UL_info->slot, NFAPI_SFNSF2DEC(UL_info->rach_ind.sfn_sf)); initiate_ra_proc(UL_info->module_id, UL_info->CC_id, NFAPI_SFNSF2SFN(UL_info->rach_ind.sfn_sf), @@ -80,12 +80,12 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) { for (i=0;irach_ind_br.rach_indication_body.number_of_preambles;i++) { AssertFatal(UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel13.rach_resource_type>0, "Got regular PRACH preamble, not BL/CE\n"); - LOG_D(MAC,"Frame %d, Subframe %d Calling initiate_ra_proc (CE_level %d)\n",UL_info->frame,UL_info->subframe, + LOG_D(MAC,"Frame %d, Slot %d Calling initiate_ra_proc (CE_level %d)\n",UL_info->frame,UL_info->slot, UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel13.rach_resource_type-1); initiate_ra_proc(UL_info->module_id, UL_info->CC_id, UL_info->frame, - UL_info->subframe, + UL_info->slot, UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.preamble, UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.timing_advance, UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.rnti, @@ -113,7 +113,7 @@ void handle_nr_sr(NR_UL_IND_t *UL_info) { SR_indication(UL_info->module_id, UL_info->CC_id, UL_info->frame, - UL_info->subframe, + UL_info->slot, UL_info->sr_ind.sr_indication_body.sr_pdu_list[i].rx_ue_information.rnti, UL_info->sr_ind.sr_indication_body.sr_pdu_list[i].ul_cqi_information.ul_cqi); } @@ -133,7 +133,7 @@ void handle_nr_cqi(NR_UL_IND_t *UL_info) { nfapi_cqi_indication_t ind; ind.header.message_id = NFAPI_RX_CQI_INDICATION; - ind.sfn_sf = UL_info->frame<<4 | UL_info->subframe; + ind.sfn_sf = UL_info->frame<<4 | UL_info->slot; ind.cqi_indication_body = UL_info->cqi_ind; oai_nfapi_cqi_indication(&ind); @@ -147,7 +147,7 @@ void handle_nr_cqi(NR_UL_IND_t *UL_info) { cqi_indication(UL_info->module_id, UL_info->CC_id, UL_info->frame, - UL_info->subframe, + UL_info->slot, UL_info->cqi_ind.cqi_pdu_list[i].rx_ue_information.rnti, &UL_info->cqi_ind.cqi_pdu_list[i].cqi_indication_rel9, UL_info->cqi_ind.cqi_raw_pdu_list[i].pdu, @@ -220,11 +220,11 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) { UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti) { LOG_D(PHY, "UL_info->crc_ind.crc_indication_body.crc_pdu_list[%d].crc_indication_rel8.crc_flag:%d\n", j, UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].crc_indication_rel8.crc_flag); if (UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].crc_indication_rel8.crc_flag == 1) { // CRC error indication - LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->subframe); + LOG_D(MAC,"Frame %d, Slot %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->slot); rx_sdu(UL_info->module_id, UL_info->CC_id, NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame, - NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->subframe, + NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->slot, UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti, (uint8_t *)NULL, UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length, @@ -232,11 +232,11 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) { UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi); } else { - LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC ok) \n",UL_info->frame,UL_info->subframe); + LOG_D(MAC,"Frame %d, Slot %d Calling rx_sdu (CRC ok) \n",UL_info->frame,UL_info->slot); rx_sdu(UL_info->module_id, UL_info->CC_id, NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame, - NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->subframe, + NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->slot, UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti, UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].data, UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length, @@ -250,12 +250,12 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) { } // for (i=0;irx_ind.number_of_pdus;i++) UL_info->crc_ind.crc_indication_body.number_of_crcs=0; UL_info->rx_ind.rx_indication_body.number_of_pdus = 0; - } // UL_info->rx_ind.rx_indication_body.number_of_pdus>0 && UL_info->subframe && UL_info->crc_ind.crc_indication_body.number_of_crcs>0 + } // UL_info->rx_ind.rx_indication_body.number_of_pdus>0 && UL_info->slot && UL_info->crc_ind.crc_indication_body.number_of_crcs>0 else if (UL_info->rx_ind.rx_indication_body.number_of_pdus!=0 || UL_info->crc_ind.crc_indication_body.number_of_crcs!=0) { LOG_E(PHY,"hoping not to have mis-match between CRC ind and RX ind - hopefully the missing message is coming shortly rx_ind:%d(SFN/SF:%05d) crc_ind:%d(SFN/SF:%05d) UL_info(SFN/SF):%04d%d\n", UL_info->rx_ind.rx_indication_body.number_of_pdus, NFAPI_SFNSF2DEC(UL_info->rx_ind.sfn_sf), UL_info->crc_ind.crc_indication_body.number_of_crcs, NFAPI_SFNSF2DEC(UL_info->crc_ind.sfn_sf), - UL_info->frame, UL_info->subframe); + UL_info->frame, UL_info->slot); } } } @@ -276,7 +276,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) gNB_MAC_INST *mac = RC.nrmac[module_id]; LOG_D(PHY,"SFN/SF:%d%d module_id:%d CC_id:%d UL_info[rx_ind:%d harqs:%d crcs:%d cqis:%d preambles:%d sr_ind:%d]\n", - UL_info->frame,UL_info->subframe, + UL_info->frame,UL_info->slot, module_id,CC_id, UL_info->rx_ind.rx_indication_body.number_of_pdus, UL_info->harq_ind.harq_indication_body.number_of_harqs, UL_info->crc_ind.crc_indication_body.number_of_crcs, UL_info->cqi_ind.number_of_cqis, UL_info->rach_ind.rach_indication_body.number_of_preambles, UL_info->sr_ind.sr_indication_body.number_of_srs); @@ -284,18 +284,18 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) { if (ifi->CC_mask==0) { ifi->current_frame = UL_info->frame; - ifi->current_subframe = UL_info->subframe; + ifi->current_slot = UL_info->slot; } else { AssertFatal(UL_info->frame != ifi->current_frame,"CC_mask %x is not full and frame has changed\n",ifi->CC_mask); - AssertFatal(UL_info->subframe != ifi->current_subframe,"CC_mask %x is not full and subframe has changed\n",ifi->CC_mask); + AssertFatal(UL_info->slot != ifi->current_slot,"CC_mask %x is not full and slot has changed\n",ifi->CC_mask); } ifi->CC_mask |= (1<frame,UL_info->subframe); + clear_nr_nfapi_information(RC.nrmac[module_id],CC_id,UL_info->frame,UL_info->slot); handle_nr_rach(UL_info); @@ -315,24 +315,24 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) if (ifi->CC_mask == ((1<frame+((UL_info->subframe>(9-sf_ahead))?1:0)) % 1024, - (UL_info->subframe+sf_ahead)%10); + (UL_info->frame+((UL_info->slot>(9-sf_ahead))?1:0)) % 1024, + (UL_info->slot+sf_ahead)%10); */ gNB_dlsch_ulsch_scheduler(module_id, - (UL_info->frame+((UL_info->subframe>(9-sf_ahead))?1:0)) % 1024, - (UL_info->subframe+sf_ahead)%10); + (UL_info->frame+((UL_info->slot>(9-sf_ahead))?1:0)) % 1024, + (UL_info->slot+sf_ahead)%10); ifi->CC_mask = 0; sched_info->module_id = module_id; sched_info->CC_id = CC_id; - sched_info->frame = (UL_info->frame + ((UL_info->subframe>(9-sf_ahead)) ? 1 : 0)) % 1024; - sched_info->subframe = (UL_info->subframe+sf_ahead)%10; + sched_info->frame = (UL_info->frame + ((UL_info->slot>(9-sf_ahead)) ? 1 : 0)) % 1024; + sched_info->slot = (UL_info->slot+sf_ahead)%10; sched_info->DL_req = &mac->DL_req[CC_id]; sched_info->HI_DCI0_req = &mac->HI_DCI0_req[CC_id]; if ((mac->common_channels[CC_id].tdd_Config==NULL) || - (is_nr_UL_sf(&mac->common_channels[CC_id],(sched_info->subframe+sf_ahead)%10)>0)) + (is_nr_UL_sf(&mac->common_channels[CC_id],(sched_info->slot+sf_ahead)%10)>0)) sched_info->UL_req = &mac->UL_req[CC_id]; else sched_info->UL_req = NULL; @@ -352,7 +352,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) ifi->NR_Schedule_response(sched_info); } - LOG_D(PHY,"NR_Schedule_response: SFN_SF:%d%d dl_pdus:%d\n",sched_info->frame,sched_info->subframe,sched_info->DL_req->dl_config_request_body.number_pdu); + LOG_D(PHY,"NR_Schedule_response: SFN_SF:%d%d dl_pdus:%d\n",sched_info->frame,sched_info->slot,sched_info->DL_req->dl_config_request_body.number_pdu); } } } @@ -374,4 +374,4 @@ NR_IF_Module_t *NR_IF_Module_init(int Mod_id){ "allocation of if_inst[%d]->if_mutex fails\n",Mod_id); } return if_inst[Mod_id]; -} \ No newline at end of file +} diff --git a/openair2/NR_PHY_INTERFACE/NR_IF_Module.h b/openair2/NR_PHY_INTERFACE/NR_IF_Module.h index 7849c034fe..63cbd68f22 100644 --- a/openair2/NR_PHY_INTERFACE/NR_IF_Module.h +++ b/openair2/NR_PHY_INTERFACE/NR_IF_Module.h @@ -57,8 +57,8 @@ typedef struct{ int CC_id; /// frame frame_t frame; - /// subframe - sub_frame_t subframe; + /// slot + slot_t slot; /// harq indication list nfapi_harq_indication_t harq_ind; @@ -88,7 +88,7 @@ typedef struct{ } NR_UL_IND_t; -// Downlink subframe P7 +// Downlink slot P7 typedef struct{ @@ -98,8 +98,8 @@ typedef struct{ uint8_t CC_id; /// frame frame_t frame; - /// subframe - sub_frame_t subframe; + /// slot + slot_t slot; /// nFAPI DL Config Request nfapi_nr_dl_config_request_t *DL_req; /// nFAPI UL Config Request @@ -123,7 +123,7 @@ typedef struct NR_IF_Module_s{ void (*NR_PHY_config_req)(NR_PHY_Config_t* config_INFO); uint32_t CC_mask; uint16_t current_frame; - uint8_t current_subframe; + uint8_t current_slot; pthread_mutex_t if_mutex; } NR_IF_Module_t; @@ -137,4 +137,4 @@ void NR_UL_indication(NR_UL_IND_t *UL_INFO); /*Interface for Downlink, transmitting the DLSCH SDU, DCI SDU*/ void NR_Schedule_Response(NR_Sched_Rsp_t *Sched_INFO); -#endif /*_NFAPI_INTERFACE_NR_H_*/ \ No newline at end of file +#endif /*_NFAPI_INTERFACE_NR_H_*/ From 7ad45679a9f7091687c7a2613cd8f99de424b19e Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Wed, 5 Dec 2018 19:57:20 +0100 Subject: [PATCH 3/3] gNB DCI encoding output matches UE decoding input. DCI Channel decoding fails in UE. --- openair1/PHY/MODULATION/slot_fep_nr.c | 6 +- openair1/PHY/NR_TRANSPORT/nr_dci.c | 7 +- .../nr_dl_channel_estimation.c | 2 +- openair1/PHY/NR_UE_TRANSPORT/dci_nr.c | 289 +++++++++--------- 4 files changed, 151 insertions(+), 153 deletions(-) diff --git a/openair1/PHY/MODULATION/slot_fep_nr.c b/openair1/PHY/MODULATION/slot_fep_nr.c index caf69b52fc..330817bfc9 100644 --- a/openair1/PHY/MODULATION/slot_fep_nr.c +++ b/openair1/PHY/MODULATION/slot_fep_nr.c @@ -25,14 +25,14 @@ #include "PHY/LTE_ESTIMATION/lte_estimation.h" #include "PHY/NR_UE_ESTIMATION/nr_estimation.h" -#define DEBUG_FEP +//#define DEBUG_FEP #define SOFFSET 0 -#ifdef LOG_I +/*#ifdef LOG_I #undef LOG_I #define LOG_I(A,B...) printf(A) -#endif +#endif*/ int nr_slot_fep(PHY_VARS_NR_UE *ue, unsigned char l, diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c index 90b1827eec..650a0b88b9 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c @@ -150,11 +150,12 @@ void nr_pdcch_scrambling(uint32_t *in, s = lte_gold_generic(&x1, &x2, reset); reset = 0; if (i){ - in++; - out++; - } + in++; + out++; + } } (*out) ^= ((((*in)>>(i&0x1f))&1) ^ ((s>>(i&0x1f))&1))<<(i&0x1f); + printf("nr_pdcch_scrambling: in %d => out %d\n",((*in)>>(i&0x1f))&1,((*out)>>(i&0x1f))&1); } } diff --git a/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c b/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c index c95d6aba1b..de97f0fb9e 100644 --- a/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c +++ b/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c @@ -28,7 +28,7 @@ #include "PHY/NR_REFSIG/refsig_defs_ue.h" #include "filt16a_32.h" #include "T.h" -#define DEBUG_CH +//#define DEBUG_CH int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue, diff --git a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c index 5087927fe9..58b19c0783 100755 --- a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c @@ -237,7 +237,7 @@ void pdcch_channel_level(int32_t **dl_ch_estimates_ext, { int16_t rb; - uint8_t aatx,aarx; + uint8_t aarx; #if defined(__x86_64__) || defined(__i386__) __m128i *dl_ch128; __m128i avg128P; @@ -245,42 +245,43 @@ void pdcch_channel_level(int32_t **dl_ch_estimates_ext, int16x8_t *dl_ch128; int32x4_t *avg128P; #endif - for (aatx=0; aatxnb_antenna_ports_eNB; aatx++) - for (aarx=0; aarxnb_antennas_rx; aarx++) { - //clear average level + for (aarx=0; aarxnb_antennas_rx; aarx++) { + //clear average level #if defined(__x86_64__) || defined(__i386__) - avg128P = _mm_setzero_si128(); - dl_ch128=(__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][0]; + avg128P = _mm_setzero_si128(); + dl_ch128=(__m128i *)&dl_ch_estimates_ext[aarx][0]; #elif defined(__arm__) - + #endif - for (rb=0; rb>2; rb++) { + #if defined(__x86_64__) || defined(__i386__) - avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[0],dl_ch128[0])); - avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[1],dl_ch128[1])); - avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[2],dl_ch128[2])); + avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[0],dl_ch128[0])); + avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[1],dl_ch128[1])); + avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[2],dl_ch128[2])); #elif defined(__arm__) - + #endif - dl_ch128+=3; - /* - if (rb==0) { - print_shorts("dl_ch128",&dl_ch128[0]); - print_shorts("dl_ch128",&dl_ch128[1]); - print_shorts("dl_ch128",&dl_ch128[2]); - } - */ - } - - DevAssert( nb_rb ); - avg[(aatx<<1)+aarx] = (((int32_t*)&avg128P)[0] + - ((int32_t*)&avg128P)[1] + - ((int32_t*)&avg128P)[2] + - ((int32_t*)&avg128P)[3])/(nb_rb*12); - - // printf("Channel level : %d\n",avg[(aatx<<1)+aarx]); + for (int i=0;i<24;i+=2) printf("pdcch channel re %d (%d,%d)\n",(rb*12)+(i>>1),((int16_t*)dl_ch128)[i],((int16_t*)dl_ch128)[i+1]); + dl_ch128+=3; + /* + if (rb==0) { + print_shorts("dl_ch128",&dl_ch128[0]); + print_shorts("dl_ch128",&dl_ch128[1]); + print_shorts("dl_ch128",&dl_ch128[2]); + } + */ } + + DevAssert( nb_rb ); + avg[aarx] = (((int32_t*)&avg128P)[0] + + ((int32_t*)&avg128P)[1] + + ((int32_t*)&avg128P)[2] + + ((int32_t*)&avg128P)[3])/(nb_rb*9); + printf("avg %d\n",avg[aarx]); + + // printf("Channel level : %d\n",avg[(aatx<<1)+aarx]); + } #if defined(__x86_64__) || defined(__i386__) _mm_empty(); @@ -501,7 +502,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) { //if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): even case rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))]; -#ifndef NR_PDCCH_DCI_DEBUG +#ifdef NR_PDCCH_DCI_DEBUG printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in even case c_rb (%d) is lower than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n", c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))); #endif @@ -510,7 +511,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, // number of RBs is even and c_rb is higher than half system bandwidth (we don't skip DC) // if these conditions are true the pointer has to be situated at the 1st part of the rxdataF rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol -#ifndef NR_PDCCH_DCI_DEBUG +#ifdef NR_PDCCH_DCI_DEBUG printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in even case c_rb (%d) is higher than half N_RB_DL (not DC) -> rxF = &rxdataF[aarx = (%d)][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n", c_rb,aarx,(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))); #endif @@ -523,7 +524,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)){ //if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): odd case rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))]; -#ifndef NR_PDCCH_DCI_DEBUG +#ifdef NR_PDCCH_DCI_DEBUG printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is lower or equal than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n", c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))); #endif @@ -532,7 +533,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, // number of RBs is odd and c_rb is higher than half system bandwidth + 1 // if these conditions are true the pointer has to be situated at the 1st part of the rxdataF just after the first IQ symbols of the RB containing DC rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol -#ifndef NR_PDCCH_DCI_DEBUG +#ifdef NR_PDCCH_DCI_DEBUG printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is higher than half N_RB_DL (not DC) -> rxF = &rxdataF[aarx = (%d)][(12*(c_rb - frame_parms->N_RB_DL) - 5 + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n", c_rb,aarx,(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size)))); #endif @@ -541,7 +542,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, // if odd number RBs in system bandwidth and first RB to be treated is higher than middle system bandwidth (around DC) // we have to treat the RB in two parts: first part from i=0 to 5, the data is at the end of rxdataF (pointing at the end of the table) rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))]; -#ifndef NR_PDCCH_DCI_DEBUG +#ifdef NR_PDCCH_DCI_DEBUG printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is half N_RB_DL + 1 we treat DC case -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n", c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))); #endif @@ -576,7 +577,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, } // then we point at the begining of the symbol part of rxdataF do process second part of RB rxF = &rxdataF[aarx][((symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol -#ifndef NR_PDCCH_DCI_DEBUG +#ifdef NR_PDCCH_DCI_DEBUG printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is half N_RB_DL +1 we treat DC case -> rxF = &rxdataF[aarx = (%d)][(symbol * (frame_parms->ofdm_symbol_size)) = (%d)]\n", c_rb,aarx,(symbol * (frame_parms->ofdm_symbol_size))); #endif @@ -611,8 +612,8 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, for (i = 0; i < 12; i++) { if ((i != 1) && (i != 5) && (i != 9)) { rxF_ext[j] = rxF[i]; -#ifndef NR_PDCCH_DCI_DEBUG - printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d)", +#ifdef NR_PDCCH_DCI_DEBUG + printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d)\n", c_rb, i, j, *(short *) &rxF_ext[j],*(1 + (short*) &rxF_ext[j]), i, *(short *) &rxF[i], *(1 + (short*) &rxF[i])); #endif @@ -621,7 +622,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, //printf("\t-> dl_ch0[%d] => dl_ch0_ext[%d](%d,%d)\n", i,j, *(short *) &dl_ch0[i], *(1 + (short*) &dl_ch0[i])); j++; } else { -#ifndef NR_PDCCH_DCI_DEBUG +#ifdef NR_PDCCH_DCI_DEBUG printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d) \t\t <==> DM-RS PDCCH, this is a pilot symbol\n", c_rb, i, j, *(short *) &rxF_ext[j], *(1 + (short*) &rxF_ext[j]), i, *(short *) &rxF[i], *(1 + (short*) &rxF[i])); @@ -654,7 +655,7 @@ void nr_pdcch_channel_compensation(int32_t **rxdataF_ext, { uint16_t rb; //,nb_rb=20; - uint8_t aatx,aarx; + uint8_t aarx; #if defined(__x86_64__) || defined(__i386__) __m128i mmtmpP0,mmtmpP1,mmtmpP2,mmtmpP3; @@ -668,99 +669,99 @@ void nr_pdcch_channel_compensation(int32_t **rxdataF_ext, #endif - for (aatx=0; aatxnb_antenna_ports_eNB;aatx++) - for (aarx=0; aarxnb_antennas_rx; aarx++) { - + for (aarx=0; aarxnb_antennas_rx; aarx++) { + #if defined(__x86_64__) || defined(__i386__) - dl_ch128 = (__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*coreset_nbr_rb*12]; - rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol*coreset_nbr_rb*12]; - rxdataF_comp128 = (__m128i *)&rxdataF_comp[(aatx<<1)+aarx][symbol*coreset_nbr_rb*12]; - //printf("ch compensation dl_ch ext addr %p \n", &dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*20*12]); - //printf("rxdataf ext addr %p symbol %d\n", &rxdataF_ext[aarx][symbol*20*12], symbol); - //printf("rxdataf_comp addr %p\n",&rxdataF_comp[(aatx<<1)+aarx][symbol*20*12]); + dl_ch128 = (__m128i *)&dl_ch_estimates_ext[aarx][symbol*coreset_nbr_rb*12]; + rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol*coreset_nbr_rb*12]; + rxdataF_comp128 = (__m128i *)&rxdataF_comp[aarx][symbol*coreset_nbr_rb*12]; + //printf("ch compensation dl_ch ext addr %p \n", &dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*20*12]); + //printf("rxdataf ext addr %p symbol %d\n", &rxdataF_ext[aarx][symbol*20*12], symbol); + //printf("rxdataf_comp addr %p\n",&rxdataF_comp[(aatx<<1)+aarx][symbol*20*12]); + +#elif defined(__arm__) + // to be filled in +#endif + + for (rb=0; rb<(coreset_nbr_rb*3)>>2; rb++) { + //printf("rb %d\n",rb); +#if defined(__x86_64__) || defined(__i386__) + // multiply by conjugated channel + mmtmpP0 = _mm_madd_epi16(dl_ch128[0],rxdataF128[0]); + // print_ints("re",&mmtmpP0); + // mmtmpP0 contains real part of 4 consecutive outputs (32-bit) + mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[0],_MM_SHUFFLE(2,3,0,1)); + mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1)); + mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i*)&conjugate[0]); + // print_ints("im",&mmtmpP1); + mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[0]); + // mmtmpP1 contains imag part of 4 consecutive outputs (32-bit) + mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift); + // print_ints("re(shift)",&mmtmpP0); + mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift); + // print_ints("im(shift)",&mmtmpP1); + mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1); + mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1); + // print_ints("c0",&mmtmpP2); + // print_ints("c1",&mmtmpP3); + rxdataF_comp128[0] = _mm_packs_epi32(mmtmpP2,mmtmpP3); + //print_shorts("rx:",rxdataF128); + //print_shorts("ch:",dl_ch128); + //print_shorts("pack:",rxdataF_comp128); + + // multiply by conjugated channel + mmtmpP0 = _mm_madd_epi16(dl_ch128[1],rxdataF128[1]); + // mmtmpP0 contains real part of 4 consecutive outputs (32-bit) + mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[1],_MM_SHUFFLE(2,3,0,1)); + mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1)); + mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i*)&conjugate[0]); + mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[1]); + // mmtmpP1 contains imag part of 4 consecutive outputs (32-bit) + mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift); + mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift); + mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1); + mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1); + rxdataF_comp128[1] = _mm_packs_epi32(mmtmpP2,mmtmpP3); + //print_shorts("rx:",rxdataF128+1); + //print_shorts("ch:",dl_ch128+1); + //print_shorts("pack:",rxdataF_comp128+1); + + // multiply by conjugated channel + mmtmpP0 = _mm_madd_epi16(dl_ch128[2],rxdataF128[2]); + // mmtmpP0 contains real part of 4 consecutive outputs (32-bit) + mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[2],_MM_SHUFFLE(2,3,0,1)); + mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1)); + mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i*)&conjugate[0]); + mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[2]); + // mmtmpP1 contains imag part of 4 consecutive outputs (32-bit) + mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift); + mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift); + mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1); + mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1); + rxdataF_comp128[2] = _mm_packs_epi32(mmtmpP2,mmtmpP3); + /////////////////////////////////////////////////////////////////////////////////////////////// + //print_shorts("rx:",rxdataF128+2); + //print_shorts("ch:",dl_ch128+2); + //print_shorts("pack:",rxdataF_comp128+2); +#ifdef NR_PDCCH_DCI_DEBUG + for (int i=0; i<12 ; i++) + printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_channel_compensation)-> rxdataF128[%d]=(%d,%d) X dlch[%d]=(%d,%d) rxdataF_comp128[%d]=(%d,%d)\n", + (rb*12)+i, ((short *)rxdataF128)[i<<1],((short*)rxdataF128)[1+(i<<1)], + (rb*12)+i, ((short *)dl_ch128)[i<<1],((short*)dl_ch128)[1+(i<<1)], + (rb*12)+i, ((short *)rxdataF_comp128)[i<<1],((short*)rxdataF_comp128)[1+(i<<1)]); + +#endif + + dl_ch128+=3; + rxdataF128+=3; + rxdataF_comp128+=3; + #elif defined(__arm__) // to be filled in #endif - - for (rb=0; rb rb=%d rxdataF128[%d]=(%d,%d) rxdataF_comp128[%d]=(%d,%d)\n", - rb, i, *(short *) &rxdataF128[i],*(1 + (short*) &rxdataF128[i]), - i,*(short *) &rxdataF_comp128[i], *(1 + (short*) &rxdataF_comp128[i])); - -#endif - - dl_ch128+=3; - rxdataF128+=3; - rxdataF_comp128+=3; - -#elif defined(__arm__) - // to be filled in -#endif - } } + } #if defined(__x86_64__) || defined(__i386__) _mm_empty(); _m_empty(); @@ -773,7 +774,6 @@ void pdcch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms, uint8_t symbol) { - uint8_t aatx; #if defined(__x86_64__) || defined(__i386__) __m128i *rxdataF_comp128_0,*rxdataF_comp128_1; @@ -783,22 +783,20 @@ void pdcch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms, int32_t i; if (frame_parms->nb_antennas_rx>1) { - for (aatx=0; aatxnb_antenna_ports_eNB; aatx++) { #if defined(__x86_64__) || defined(__i386__) - rxdataF_comp128_0 = (__m128i *)&rxdataF_comp[(aatx<<1)][symbol*frame_parms->N_RB_DL*12]; - rxdataF_comp128_1 = (__m128i *)&rxdataF_comp[(aatx<<1)+1][symbol*frame_parms->N_RB_DL*12]; + rxdataF_comp128_0 = (__m128i *)&rxdataF_comp[0][symbol*frame_parms->N_RB_DL*12]; + rxdataF_comp128_1 = (__m128i *)&rxdataF_comp[1][symbol*frame_parms->N_RB_DL*12]; #elif defined(__arm__) - rxdataF_comp128_0 = (int16x8_t *)&rxdataF_comp[(aatx<<1)][symbol*frame_parms->N_RB_DL*12]; - rxdataF_comp128_1 = (int16x8_t *)&rxdataF_comp[(aatx<<1)+1][symbol*frame_parms->N_RB_DL*12]; + rxdataF_comp128_0 = (int16x8_t *)&rxdataF_comp[0][symbol*frame_parms->N_RB_DL*12]; + rxdataF_comp128_1 = (int16x8_t *)&rxdataF_comp[1][symbol*frame_parms->N_RB_DL*12]; #endif - // MRC on each re of rb - for (i=0; iN_RB_DL*3; i++) { + // MRC on each re of rb + for (i=0; iN_RB_DL*3; i++) { #if defined(__x86_64__) || defined(__i386__) - rxdataF_comp128_0[i] = _mm_adds_epi16(_mm_srai_epi16(rxdataF_comp128_0[i],1),_mm_srai_epi16(rxdataF_comp128_1[i],1)); + rxdataF_comp128_0[i] = _mm_adds_epi16(_mm_srai_epi16(rxdataF_comp128_0[i],1),_mm_srai_epi16(rxdataF_comp128_1[i],1)); #elif defined(__arm__) - rxdataF_comp128_0[i] = vhaddq_s16(rxdataF_comp128_0[i],rxdataF_comp128_1[i]); + rxdataF_comp128_0[i] = vhaddq_s16(rxdataF_comp128_0[i],rxdataF_comp128_1[i]); #endif - } } } @@ -831,7 +829,6 @@ void pdcch_siso(NR_DL_FRAME_PARMS *frame_parms, } -int32_t avgP[4]; @@ -858,6 +855,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, if (searchSpaceType == ue_specific) do_common=0; uint8_t log2_maxh, aatx, aarx; int32_t avgs; + int32_t avgP[4]; // number of RB (1 symbol) or REG (12 RE) in one CORESET: higher-layer parameter CORESET-freq-dom // (bit map 45 bits: each bit indicates 6 RB in CORESET -> 1 bit MSB indicates PRB 0..6 are part of CORESET) @@ -879,7 +877,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, // For each BWP the number of CORESETs is limited to 3 (including initial CORESET Id=0 -> ControlResourceSetId (0..maxNrofControlReourceSets-1) (0..12-1) //uint32_t n_BWP_start = 0; //uint32_t n_rb_offset = 0; - uint32_t n_rb_offset = pdcch_vars2->coreset[nb_coreset_active].rb_offset+43; //to be removed 43 + uint32_t n_rb_offset = pdcch_vars2->coreset[nb_coreset_active].rb_offset+(int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB); // start time position for CORESET // parameter symbol_mon is a 14 bits bitmap indicating monitoring symbols within a slot uint8_t start_symbol = 0; @@ -967,9 +965,8 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, avgP, coreset_nbr_rb); avgs = 0; - for (aatx = 0; aatx < frame_parms->nb_antenna_ports_eNB; aatx++) - for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) - avgs = cmax(avgs, avgP[(aarx << 1) + aatx]); + for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) + avgs = cmax(avgs, avgP[aarx]); log2_maxh = (log2_approx(avgs) / 2) + 5; //+frame_parms->nb_antennas_rx; #ifdef UE_DEBUG_TRACE LOG_D(PHY,"nr_tti_rx %d: pdcch log2_maxh = %d (%d,%d)\n",nr_tti_rx,log2_maxh,avgP[0],avgs); @@ -1122,7 +1119,7 @@ void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8 //uint32_t calc_x2=puissance_2_16%puissance_2_31; x2 = (((1<<16)*n_rnti)+n_id); //mod 2^31 is implicit //this is c_init in 38.211 v15.1.0 Section 7.3.2.3 // x2 = (nr_tti_rx << 9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.8.2 -#ifndef NR_PDCCH_DCI_DEBUG +#ifdef NR_PDCCH_DCI_DEBUG printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> (c_init=%d, n_id=%d, n_rnti=%d, length=%d)\n",x2,n_id,n_rnti,length); #endif for (i = 0; i < length; i++) { @@ -1132,7 +1129,7 @@ void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8 reset = 0; } -#ifndef NR_PDCCH_DCI_DEBUG +#ifdef NR_PDCCH_DCI_DEBUG if (i%2 == 0) printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> unscrambling %d : scrambled_z=%d, => ", i,*(char*) &z[(int)floor(i/2)]); if (i%2 == 1) printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> unscrambling %d : scrambled_z=%d, => ", @@ -1144,7 +1141,7 @@ void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8 } //llr[i] = -llr[i]; //llr[i] = (-1)*llr[i]; -#ifndef NR_PDCCH_DCI_DEBUG +#ifdef NR_PDCCH_DCI_DEBUG if (i%2 == 0) printf("unscrambled_z=%d\n",*(char*) &z[(int)floor(i/2)]); if (i%2 == 1) printf("unscrambled_z=%d\n",*(1 + (char*) &z[(int)floor(i/2)])); #endif